exec-all.h

   1 /*
   2  * internal execution defines for qemu
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 /* allow to see translation results - the slowdown should be negligible, so we leave it */
  22 #define DEBUG_DISAS
  23
  24 #ifndef glue
  25 #define xglue(x, y) x ## y
  26 #define glue(x, y) xglue(x, y)
  27 #define stringify(s)    tostring(s)
  28 #define tostring(s)     #s
  29 #endif
  30
  31 #if GCC_MAJOR < 3
  32 #define __builtin_expect(x, n) (x)
  33 #endif
  34
  35 #ifdef __i386__
  36 #define REGPARM(n) __attribute((regparm(n)))
  37 #else
  38 #define REGPARM(n)
  39 #endif
  40
  41 /* is_jmp field values */
  42 #define DISAS_NEXT    0 /* next instruction can be analyzed */
  43 #define DISAS_JUMP    1 /* only pc was modified dynamically */
  44 #define DISAS_UPDATE  2 /* cpu state was modified dynamically */
  45 #define DISAS_TB_JUMP 3 /* only pc was modified statically */
  46
  47 struct TranslationBlock;
  48
  49 /* XXX: make safe guess about sizes */
  50 #define MAX_OP_PER_INSTR 32
  51 #define OPC_BUF_SIZE 512
  52 #define OPC_MAX_SIZE (OPC_BUF_SIZE - MAX_OP_PER_INSTR)
  53
  54 #define OPPARAM_BUF_SIZE (OPC_BUF_SIZE * 3)
  55
  56 extern uint16_t gen_opc_buf[OPC_BUF_SIZE];
  57 extern uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE];
  58 extern uint32_t gen_opc_pc[OPC_BUF_SIZE];
  59 extern uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
  60 extern uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
  61
  62 #if defined(TARGET_I386)
  63
  64 void optimize_flags_init(void);
  65
  66 #endif
  67
  68 extern FILE *logfile;
  69 extern int loglevel;
  70
  71 int gen_intermediate_code(CPUState *env, struct TranslationBlock *tb);
  72 int gen_intermediate_code_pc(CPUState *env, struct TranslationBlock *tb);
  73 void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf);
  74 int cpu_gen_code(CPUState *env, struct TranslationBlock *tb,
  75                  int max_code_size, int *gen_code_size_ptr);
  76 int cpu_restore_state(struct TranslationBlock *tb,
  77                       CPUState *env, unsigned long searched_pc);
  78 void cpu_exec_init(void);
  79 int page_unprotect(unsigned long address);
  80 void page_unmap(void);
  81 void tlb_flush_page(CPUState *env, uint32_t addr);
  82 void tlb_flush_page_write(CPUState *env, uint32_t addr);
  83 void tlb_flush(CPUState *env);
  84
  85 #define CODE_GEN_MAX_SIZE        65536
  86 #define CODE_GEN_ALIGN           16 /* must be >= of the size of a icache line */
  87
  88 #define CODE_GEN_HASH_BITS     15
  89 #define CODE_GEN_HASH_SIZE     (1 << CODE_GEN_HASH_BITS)
  90
  91 /* maximum total translate dcode allocated */
  92 #define CODE_GEN_BUFFER_SIZE     (2048 * 1024)
  93 //#define CODE_GEN_BUFFER_SIZE     (128 * 1024)
  94
  95 #if defined(__powerpc__)
  96 #define USE_DIRECT_JUMP
  97 #endif
  98
  99 typedef struct TranslationBlock {
 100     unsigned long pc;   /* simulated PC corresponding to this block (EIP + CS base) */
 101     unsigned long cs_base; /* CS base for this block */
 102     unsigned int flags; /* flags defining in which context the code was generated */
 103     uint16_t size;      /* size of target code for this block (1 <=
 104                            size <= TARGET_PAGE_SIZE) */
 105     uint8_t *tc_ptr;    /* pointer to the translated code */
 106     struct TranslationBlock *hash_next; /* next matching block */
 107     struct TranslationBlock *page_next[2]; /* next blocks in even/odd page */
 108     /* the following data are used to directly call another TB from
 109        the code of this one. */
 110     uint16_t tb_next_offset[2]; /* offset of original jump target */
 111 #ifdef USE_DIRECT_JUMP
 112     uint16_t tb_jmp_offset[4]; /* offset of jump instruction */
 113 #else
 114     uint32_t tb_next[2]; /* address of jump generated code */
 115 #endif
 116     /* list of TBs jumping to this one. This is a circular list using
 117        the two least significant bits of the pointers to tell what is
 118        the next pointer: 0 = jmp_next[0], 1 = jmp_next[1], 2 =
 119        jmp_first */
 120     struct TranslationBlock *jmp_next[2];
 121     struct TranslationBlock *jmp_first;
 122 } TranslationBlock;
 123
 124 static inline unsigned int tb_hash_func(unsigned long pc)
 125 {
 126     return pc & (CODE_GEN_HASH_SIZE - 1);
 127 }
 128
 129 TranslationBlock *tb_alloc(unsigned long pc);
 130 void tb_flush(void);
 131 void tb_link(TranslationBlock *tb);
 132
 133 extern TranslationBlock *tb_hash[CODE_GEN_HASH_SIZE];
 134
 135 extern uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
 136 extern uint8_t *code_gen_ptr;
 137
 138 /* find a translation block in the translation cache. If not found,
 139    return NULL and the pointer to the last element of the list in pptb */
 140 static inline TranslationBlock *tb_find(TranslationBlock ***pptb,
 141                                         unsigned long pc,
 142                                         unsigned long cs_base,
 143                                         unsigned int flags)
 144 {
 145     TranslationBlock **ptb, *tb;
 146     unsigned int h;
 147
 148     h = tb_hash_func(pc);
 149     ptb = &tb_hash[h];
 150     for(;;) {
 151         tb = *ptb;
 152         if (!tb)
 153             break;
 154         if (tb->pc == pc && tb->cs_base == cs_base && tb->flags == flags)
 155             return tb;
 156         ptb = &tb->hash_next;
 157     }
 158     *pptb = ptb;
 159     return NULL;
 160 }
 161
 162 #if defined(__powerpc__)
 163
 164 static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
 165 {
 166     uint32_t val, *ptr;
 167
 168     /* patch the branch destination */
 169     ptr = (uint32_t *)jmp_addr;
 170     val = *ptr;
 171     val = (val & ~0x03fffffc) | ((addr - jmp_addr) & 0x03fffffc);
 172     *ptr = val;
 173     /* flush icache */
 174     asm volatile ("dcbst 0,%0" : : "r"(ptr) : "memory");
 175     asm volatile ("sync" : : : "memory");
 176     asm volatile ("icbi 0,%0" : : "r"(ptr) : "memory");
 177     asm volatile ("sync" : : : "memory");
 178     asm volatile ("isync" : : : "memory");
 179 }
 180
 181 static inline void tb_set_jmp_target(TranslationBlock *tb,
 182                                      int n, unsigned long addr)
 183 {
 184     unsigned long offset;
 185
 186     offset = tb->tb_jmp_offset[n];
 187     tb_set_jmp_target1((unsigned long)(tb->tc_ptr + offset), addr);
 188     offset = tb->tb_jmp_offset[n + 2];
 189     if (offset != 0xffff)
 190         tb_set_jmp_target1((unsigned long)(tb->tc_ptr + offset), addr);
 191 }
 192
 193 #else
 194
 195 /* set the jump target */
 196 static inline void tb_set_jmp_target(TranslationBlock *tb,
 197                                      int n, unsigned long addr)
 198 {
 199     tb->tb_next[n] = addr;
 200 }
 201
 202 #endif
 203
 204 static inline void tb_add_jump(TranslationBlock *tb, int n,
 205                                TranslationBlock *tb_next)
 206 {
 207     /* NOTE: this test is only needed for thread safety */
 208     if (!tb->jmp_next[n]) {
 209         /* patch the native jump address */
 210         tb_set_jmp_target(tb, n, (unsigned long)tb_next->tc_ptr);
 211
 212         /* add in TB jmp circular list */
 213         tb->jmp_next[n] = tb_next->jmp_first;
 214         tb_next->jmp_first = (TranslationBlock *)((long)(tb) | (n));
 215     }
 216 }
 217
 218 TranslationBlock *tb_find_pc(unsigned long pc_ptr);
 219
 220 #ifndef offsetof
 221 #define offsetof(type, field) ((size_t) &((type *)0)->field)
 222 #endif
 223
 224 #if defined(__powerpc__)
 225
 226 /* on PowerPC we patch the jump instruction directly */
 227 #define JUMP_TB(opname, tbparam, n, eip)\
 228 do {\
 229     asm volatile (".section \".data\"\n"\
 230                   "__op_label" #n "." stringify(opname) ":\n"\
 231                   ".long 1f\n"\
 232                   ".previous\n"\
 233                   "b __op_jmp" #n "\n"\
 234                   "1:\n");\
 235     T0 = (long)(tbparam) + (n);\
 236     EIP = eip;\
 237     EXIT_TB();\
 238 } while (0)
 239
 240 #define JUMP_TB2(opname, tbparam, n)\
 241 do {\
 242     asm volatile ("b __op_jmp%0\n" : : "i" (n + 2));\
 243 } while (0)
 244
 245 #else
 246
 247 /* jump to next block operations (more portable code, does not need
 248    cache flushing, but slower because of indirect jump) */
 249 #define JUMP_TB(opname, tbparam, n, eip)\
 250 do {\
 251     static void __attribute__((unused)) *__op_label ## n = &&label ## n;\
 252     static void __attribute__((unused)) *dummy ## n = &&dummy_label ## n;\
 253     goto *(void *)(((TranslationBlock *)tbparam)->tb_next[n]);\
 254 label ## n:\
 255     T0 = (long)(tbparam) + (n);\
 256     EIP = eip;\
 257 dummy_label ## n:\
 258     EXIT_TB();\
 259 } while (0)
 260
 261 /* second jump to same destination 'n' */
 262 #define JUMP_TB2(opname, tbparam, n)\
 263 do {\
 264     goto *(void *)(((TranslationBlock *)tbparam)->tb_next[n]);\
 265 } while (0)
 266
 267 #endif
 268
 269 /* physical memory access */
 270 #define IO_MEM_NB_ENTRIES  256
 271 #define TLB_INVALID_MASK   (1 << 3)
 272 #define IO_MEM_SHIFT       4
 273 #define IO_MEM_UNASSIGNED  (1 << IO_MEM_SHIFT)
 274
 275 unsigned long physpage_find(unsigned long page);
 276
 277 extern CPUWriteMemoryFunc *io_mem_write[IO_MEM_NB_ENTRIES][4];
 278 extern CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];
 279
 280 #ifdef __powerpc__
 281 static inline int testandset (int *p)
 282 {
 283     int ret;
 284     __asm__ __volatile__ (
 285                           "0:    lwarx %0,0,%1 ;"
 286                           "      xor. %0,%3,%0;"
 287                           "      bne 1f;"
 288                           "      stwcx. %2,0,%1;"
 289                           "      bne- 0b;"
 290                           "1:    "
 291                           : "=&r" (ret)
 292                           : "r" (p), "r" (1), "r" (0)
 293                           : "cr0", "memory");
 294     return ret;
 295 }
 296 #endif
 297
 298 #ifdef __i386__
 299 static inline int testandset (int *p)
 300 {
 301     char ret;
 302     long int readval;
 303
 304     __asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0"
 305                           : "=q" (ret), "=m" (*p), "=a" (readval)
 306                           : "r" (1), "m" (*p), "a" (0)
 307                           : "memory");
 308     return ret;
 309 }
 310 #endif
 311
 312 #ifdef __s390__
 313 static inline int testandset (int *p)
 314 {
 315     int ret;
 316
 317     __asm__ __volatile__ ("0: cs    %0,%1,0(%2)\n"
 318                           "   jl    0b"
 319                           : "=&d" (ret)
 320                           : "r" (1), "a" (p), "0" (*p)
 321                           : "cc", "memory" );
 322     return ret;
 323 }
 324 #endif
 325
 326 #ifdef __alpha__
 327 static inline int testandset (int *p)
 328 {
 329     int ret;
 330     unsigned long one;
 331
 332     __asm__ __volatile__ ("0:   mov 1,%2\n"
 333                           "     ldl_l %0,%1\n"
 334                           "     stl_c %2,%1\n"
 335                           "     beq %2,1f\n"
 336                           ".subsection 2\n"
 337                           "1:   br 0b\n"
 338                           ".previous"
 339                           : "=r" (ret), "=m" (*p), "=r" (one)
 340                           : "m" (*p));
 341     return ret;
 342 }
 343 #endif
 344
 345 #ifdef __sparc__
 346 static inline int testandset (int *p)
 347 {
 348         int ret;
 349
 350         __asm__ __volatile__("ldstub    [%1], %0"
 351                              : "=r" (ret)
 352                              : "r" (p)
 353                              : "memory");
 354
 355         return (ret ? 1 : 0);
 356 }
 357 #endif
 358
 359 #ifdef __arm__
 360 static inline int testandset (int *spinlock)
 361 {
 362     register unsigned int ret;
 363     __asm__ __volatile__("swp %0, %1, [%2]"
 364                          : "=r"(ret)
 365                          : "0"(1), "r"(spinlock));
 366
 367     return ret;
 368 }
 369 #endif
 370
 371 #ifdef __mc68000
 372 static inline int testandset (int *p)
 373 {
 374     char ret;
 375     __asm__ __volatile__("tas %1; sne %0"
 376                          : "=r" (ret)
 377                          : "m" (p)
 378                          : "cc","memory");
 379     return ret == 0;
 380 }
 381 #endif
 382
 383 typedef int spinlock_t;
 384
 385 #define SPIN_LOCK_UNLOCKED 0
 386
 387 #if defined(CONFIG_USER_ONLY)
 388 static inline void spin_lock(spinlock_t *lock)
 389 {
 390     while (testandset(lock));
 391 }
 392
 393 static inline void spin_unlock(spinlock_t *lock)
 394 {
 395     *lock = 0;
 396 }
 397
 398 static inline int spin_trylock(spinlock_t *lock)
 399 {
 400     return !testandset(lock);
 401 }
 402 #else
 403 static inline void spin_lock(spinlock_t *lock)
 404 {
 405 }
 406
 407 static inline void spin_unlock(spinlock_t *lock)
 408 {
 409 }
 410
 411 static inline int spin_trylock(spinlock_t *lock)
 412 {
 413     return 1;
 414 }
 415 #endif
 416
 417 extern spinlock_t tb_lock;
 418
 419 extern int tb_invalidated_flag;
 420
 421 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
 422
 423 void tlb_fill(unsigned long addr, int is_write, int is_user,
 424               void *retaddr);
 425
 426 #define ACCESS_TYPE 3
 427 #define MEMSUFFIX _code
 428 #define env cpu_single_env
 429
 430 #define DATA_SIZE 1
 431 #include "softmmu_header.h"
 432
 433 #define DATA_SIZE 2
 434 #include "softmmu_header.h"
 435
 436 #define DATA_SIZE 4
 437 #include "softmmu_header.h"
 438
 439 #undef ACCESS_TYPE
 440 #undef MEMSUFFIX
 441 #undef env
 442
 443 #endif