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git.proxmox.com Git - qemu.git/blob - exec-i386.c
2 * i386 emulator main execution loop
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "exec-i386.h"
24 //#define DEBUG_SIGNAL
26 /* main execution loop */
28 /* maximum total translate dcode allocated */
29 #define CODE_GEN_BUFFER_SIZE (2048 * 1024)
30 //#define CODE_GEN_BUFFER_SIZE (128 * 1024)
31 #define CODE_GEN_MAX_SIZE 65536
32 #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */
34 /* threshold to flush the translated code buffer */
35 #define CODE_GEN_BUFFER_MAX_SIZE (CODE_GEN_BUFFER_SIZE - CODE_GEN_MAX_SIZE)
37 #define CODE_GEN_MAX_BLOCKS (CODE_GEN_BUFFER_SIZE / 64)
38 #define CODE_GEN_HASH_BITS 15
39 #define CODE_GEN_HASH_SIZE (1 << CODE_GEN_HASH_BITS)
41 typedef struct TranslationBlock
{
42 unsigned long pc
; /* simulated PC corresponding to this block (EIP + CS base) */
43 unsigned long cs_base
; /* CS base for this block */
44 unsigned int flags
; /* flags defining in which context the code was generated */
45 uint8_t *tc_ptr
; /* pointer to the translated code */
46 struct TranslationBlock
*hash_next
; /* next matching block */
49 TranslationBlock tbs
[CODE_GEN_MAX_BLOCKS
];
50 TranslationBlock
*tb_hash
[CODE_GEN_HASH_SIZE
];
53 uint8_t code_gen_buffer
[CODE_GEN_BUFFER_SIZE
];
54 uint8_t *code_gen_ptr
;
59 static inline int testandset (int *p
)
62 __asm__
__volatile__ (
70 : "r" (p
), "r" (1), "r" (0)
77 static inline int testandset (int *p
)
82 __asm__
__volatile__ ("lock; cmpxchgl %3, %1; sete %0"
83 : "=q" (ret
), "=m" (*p
), "=a" (readval
)
84 : "r" (1), "m" (*p
), "a" (0)
90 int global_cpu_lock
= 0;
94 while (testandset(&global_cpu_lock
));
102 /* exception support */
103 /* NOTE: not static to force relocation generation by GCC */
104 void raise_exception(int exception_index
)
106 /* NOTE: the register at this point must be saved by hand because
107 longjmp restore them */
109 env
->regs
[R_EAX
] = EAX
;
112 env
->regs
[R_ECX
] = ECX
;
115 env
->regs
[R_EDX
] = EDX
;
118 env
->regs
[R_EBX
] = EBX
;
121 env
->regs
[R_ESP
] = ESP
;
124 env
->regs
[R_EBP
] = EBP
;
127 env
->regs
[R_ESI
] = ESI
;
130 env
->regs
[R_EDI
] = EDI
;
132 env
->exception_index
= exception_index
;
133 longjmp(env
->jmp_env
, 1);
136 #if defined(DEBUG_EXEC)
137 static const char *cc_op_str
[] = {
170 static void cpu_x86_dump_state(FILE *f
)
173 eflags
= cc_table
[CC_OP
].compute_all();
174 eflags
|= (DF
& DIRECTION_FLAG
);
176 "EAX=%08x EBX=%08X ECX=%08x EDX=%08x\n"
177 "ESI=%08x EDI=%08X EBP=%08x ESP=%08x\n"
178 "CCS=%08x CCD=%08x CCO=%-8s EFL=%c%c%c%c%c%c%c\n"
180 env
->regs
[R_EAX
], env
->regs
[R_EBX
], env
->regs
[R_ECX
], env
->regs
[R_EDX
],
181 env
->regs
[R_ESI
], env
->regs
[R_EDI
], env
->regs
[R_EBP
], env
->regs
[R_ESP
],
182 env
->cc_src
, env
->cc_dst
, cc_op_str
[env
->cc_op
],
183 eflags
& DIRECTION_FLAG
? 'D' : '-',
184 eflags
& CC_O
? 'O' : '-',
185 eflags
& CC_S
? 'S' : '-',
186 eflags
& CC_Z
? 'Z' : '-',
187 eflags
& CC_A
? 'A' : '-',
188 eflags
& CC_P
? 'P' : '-',
189 eflags
& CC_C
? 'C' : '-',
192 fprintf(f
, "ST0=%f ST1=%f ST2=%f ST3=%f\n",
193 (double)ST0
, (double)ST1
, (double)ST(2), (double)ST(3));
199 void cpu_x86_tblocks_init(void)
202 code_gen_ptr
= code_gen_buffer
;
206 /* flush all the translation blocks */
207 static void tb_flush(void)
211 printf("gemu: flush code_size=%d nb_tbs=%d avg_tb_size=%d\n",
212 code_gen_ptr
- code_gen_buffer
,
214 (code_gen_ptr
- code_gen_buffer
) / nb_tbs
);
217 for(i
= 0;i
< CODE_GEN_HASH_SIZE
; i
++)
219 code_gen_ptr
= code_gen_buffer
;
220 /* XXX: flush processor icache at this point */
223 /* find a translation block in the translation cache. If not found,
224 return NULL and the pointer to the last element of the list in pptb */
225 static inline TranslationBlock
*tb_find(TranslationBlock
***pptb
,
227 unsigned long cs_base
,
230 TranslationBlock
**ptb
, *tb
;
233 h
= pc
& (CODE_GEN_HASH_SIZE
- 1);
239 if (tb
->pc
== pc
&& tb
->cs_base
== cs_base
&& tb
->flags
== flags
)
241 ptb
= &tb
->hash_next
;
247 /* allocate a new translation block. flush the translation buffer if
248 too many translation blocks or too much generated code */
249 static inline TranslationBlock
*tb_alloc(void)
251 TranslationBlock
*tb
;
252 if (nb_tbs
>= CODE_GEN_MAX_BLOCKS
||
253 (code_gen_ptr
- code_gen_buffer
) >= CODE_GEN_BUFFER_MAX_SIZE
)
259 int cpu_x86_exec(CPUX86State
*env1
)
261 int saved_T0
, saved_T1
, saved_A0
;
262 CPUX86State
*saved_env
;
287 int code_gen_size
, ret
;
288 void (*gen_func
)(void);
289 TranslationBlock
*tb
, **ptb
;
290 uint8_t *tc_ptr
, *cs_base
, *pc
;
293 /* first we save global registers */
301 EAX
= env
->regs
[R_EAX
];
305 ECX
= env
->regs
[R_ECX
];
309 EDX
= env
->regs
[R_EDX
];
313 EBX
= env
->regs
[R_EBX
];
317 ESP
= env
->regs
[R_ESP
];
321 EBP
= env
->regs
[R_EBP
];
325 ESI
= env
->regs
[R_ESI
];
329 EDI
= env
->regs
[R_EDI
];
332 /* put eflags in CPU temporary format */
335 CC_OP
= CC_OP_EFLAGS
;
336 env
->interrupt_request
= 0;
338 /* prepare setjmp context for exception handling */
339 if (setjmp(env
->jmp_env
) == 0) {
341 if (env
->interrupt_request
) {
342 raise_exception(EXCP_INTERRUPT
);
346 cpu_x86_dump_state(logfile
);
349 /* we compute the CPU state. We assume it will not
350 change during the whole generated block. */
351 flags
= env
->seg_cache
[R_CS
].seg_32bit
<< GEN_FLAG_CODE32_SHIFT
;
352 flags
|= env
->seg_cache
[R_SS
].seg_32bit
<< GEN_FLAG_SS32_SHIFT
;
353 flags
|= (((unsigned long)env
->seg_cache
[R_DS
].base
|
354 (unsigned long)env
->seg_cache
[R_ES
].base
|
355 (unsigned long)env
->seg_cache
[R_SS
].base
) != 0) <<
356 GEN_FLAG_ADDSEG_SHIFT
;
357 cs_base
= env
->seg_cache
[R_CS
].base
;
358 pc
= cs_base
+ env
->eip
;
359 tb
= tb_find(&ptb
, (unsigned long)pc
, (unsigned long)cs_base
,
362 /* if no translated code available, then translate it now */
363 /* XXX: very inefficient: we lock all the cpus when
366 tc_ptr
= code_gen_ptr
;
367 ret
= cpu_x86_gen_code(code_gen_ptr
, CODE_GEN_MAX_SIZE
,
368 &code_gen_size
, pc
, cs_base
, flags
);
369 /* if invalid instruction, signal it */
372 raise_exception(EXCP06_ILLOP
);
376 tb
->pc
= (unsigned long)pc
;
377 tb
->cs_base
= (unsigned long)cs_base
;
380 tb
->hash_next
= NULL
;
381 code_gen_ptr
= (void *)(((unsigned long)code_gen_ptr
+ code_gen_size
+ CODE_GEN_ALIGN
- 1) & ~(CODE_GEN_ALIGN
- 1));
384 /* execute the generated code */
386 gen_func
= (void *)tc_ptr
;
390 ret
= env
->exception_index
;
392 /* restore flags in standard format */
396 /* restore global registers */
428 void cpu_x86_interrupt(CPUX86State
*s
)
430 s
->interrupt_request
= 1;
434 void cpu_x86_load_seg(CPUX86State
*s
, int seg_reg
, int selector
)
436 CPUX86State
*saved_env
;
440 load_seg(seg_reg
, selector
);
454 #include <sys/ucontext.h>
456 static inline int handle_cpu_signal(unsigned long pc
,
460 printf("gemu: SIGSEGV pc=0x%08lx oldset=0x%08lx\n",
461 pc
, *(unsigned long *)old_set
);
463 if (pc
>= (unsigned long)code_gen_buffer
&&
464 pc
< (unsigned long)code_gen_buffer
+ CODE_GEN_BUFFER_SIZE
) {
465 /* the PC is inside the translated code. It means that we have
466 a virtual CPU fault */
467 /* we restore the process signal mask as the sigreturn should
469 sigprocmask(SIG_SETMASK
, old_set
, NULL
);
470 /* XXX: need to compute virtual pc position by retranslating
471 code. The rest of the CPU state should be correct. */
472 raise_exception(EXCP0D_GPF
);
473 /* never comes here */
480 int cpu_x86_signal_handler(int host_signum
, struct siginfo
*info
,
483 #if defined(__i386__)
484 struct ucontext
*uc
= puc
;
488 pc
= uc
->uc_mcontext
.gregs
[EIP
];
489 pold_set
= &uc
->uc_sigmask
;
490 return handle_cpu_signal(pc
, pold_set
);
492 #warning No CPU specific signal handler: cannot handle target SIGSEGV events