exec.h

   1 /*
   2  * internal execution defines for qemu
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #define GEN_FLAG_CODE32_SHIFT 0
  22 #define GEN_FLAG_ADDSEG_SHIFT 1
  23 #define GEN_FLAG_SS32_SHIFT   2
  24 #define GEN_FLAG_VM_SHIFT     3
  25 #define GEN_FLAG_ST_SHIFT     4
  26 #define GEN_FLAG_TF_SHIFT     8 /* same position as eflags */
  27 #define GEN_FLAG_CPL_SHIFT    9
  28 #define GEN_FLAG_IOPL_SHIFT   12 /* same position as eflags */
  29
  30 struct TranslationBlock;
  31 int cpu_x86_gen_code(uint8_t *gen_code_buf, int max_code_size,
  32                      int *gen_code_size_ptr,
  33                      uint8_t *pc_start,  uint8_t *cs_base, int flags,
  34                      int *code_size_ptr, struct TranslationBlock *tb);
  35 void cpu_x86_tblocks_init(void);
  36 void page_init(void);
  37 int page_unprotect(unsigned long address);
  38
  39 #define CODE_GEN_MAX_SIZE        65536
  40 #define CODE_GEN_ALIGN           16 /* must be >= of the size of a icache line */
  41
  42 #define CODE_GEN_HASH_BITS     15
  43 #define CODE_GEN_HASH_SIZE     (1 << CODE_GEN_HASH_BITS)
  44
  45 /* maximum total translate dcode allocated */
  46 #define CODE_GEN_BUFFER_SIZE     (2048 * 1024)
  47 //#define CODE_GEN_BUFFER_SIZE     (128 * 1024)
  48
  49 #if defined(__powerpc__)
  50 #define USE_DIRECT_JUMP
  51 #endif
  52
  53 typedef struct TranslationBlock {
  54     unsigned long pc;   /* simulated PC corresponding to this block (EIP + CS base) */
  55     unsigned long cs_base; /* CS base for this block */
  56     unsigned int flags; /* flags defining in which context the code was generated */
  57     uint16_t size;      /* size of target code for this block (1 <=
  58                            size <= TARGET_PAGE_SIZE) */
  59     uint8_t *tc_ptr;    /* pointer to the translated code */
  60     struct TranslationBlock *hash_next; /* next matching block */
  61     struct TranslationBlock *page_next[2]; /* next blocks in even/odd page */
  62     /* the following data are used to directly call another TB from
  63        the code of this one. */
  64     uint16_t tb_next_offset[2]; /* offset of original jump target */
  65 #ifdef USE_DIRECT_JUMP
  66     uint16_t tb_jmp_offset[2]; /* offset of jump instruction */
  67 #else
  68     uint8_t *tb_next[2]; /* address of jump generated code */
  69 #endif
  70     /* list of TBs jumping to this one. This is a circular list using
  71        the two least significant bits of the pointers to tell what is
  72        the next pointer: 0 = jmp_next[0], 1 = jmp_next[1], 2 =
  73        jmp_first */
  74     struct TranslationBlock *jmp_next[2];
  75     struct TranslationBlock *jmp_first;
  76 } TranslationBlock;
  77
  78 static inline unsigned int tb_hash_func(unsigned long pc)
  79 {
  80     return pc & (CODE_GEN_HASH_SIZE - 1);
  81 }
  82
  83 TranslationBlock *tb_alloc(unsigned long pc);
  84 void tb_flush(void);
  85 void tb_link(TranslationBlock *tb);
  86
  87 extern TranslationBlock *tb_hash[CODE_GEN_HASH_SIZE];
  88
  89 extern uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
  90 extern uint8_t *code_gen_ptr;
  91
  92 /* find a translation block in the translation cache. If not found,
  93    return NULL and the pointer to the last element of the list in pptb */
  94 static inline TranslationBlock *tb_find(TranslationBlock ***pptb,
  95                                         unsigned long pc,
  96                                         unsigned long cs_base,
  97                                         unsigned int flags)
  98 {
  99     TranslationBlock **ptb, *tb;
 100     unsigned int h;
 101
 102     h = tb_hash_func(pc);
 103     ptb = &tb_hash[h];
 104     for(;;) {
 105         tb = *ptb;
 106         if (!tb)
 107             break;
 108         if (tb->pc == pc && tb->cs_base == cs_base && tb->flags == flags)
 109             return tb;
 110         ptb = &tb->hash_next;
 111     }
 112     *pptb = ptb;
 113     return NULL;
 114 }
 115
 116 #if defined(__powerpc__)
 117
 118 static inline void tb_set_jmp_target(TranslationBlock *tb,
 119                                      int n, unsigned long addr)
 120 {
 121     uint32_t val, *ptr;
 122     unsigned long offset;
 123
 124     offset = (unsigned long)(tb->tc_ptr + tb->tb_jmp_offset[n]);
 125
 126     /* patch the branch destination */
 127     ptr = (uint32_t *)offset;
 128     val = *ptr;
 129     val = (val & ~0x03fffffc) | ((addr - offset) & 0x03fffffc);
 130     *ptr = val;
 131     /* flush icache */
 132     asm volatile ("dcbst 0,%0" : : "r"(ptr) : "memory");
 133     asm volatile ("sync" : : : "memory");
 134     asm volatile ("icbi 0,%0" : : "r"(ptr) : "memory");
 135     asm volatile ("sync" : : : "memory");
 136     asm volatile ("isync" : : : "memory");
 137 }
 138
 139 #else
 140
 141 /* set the jump target */
 142 static inline void tb_set_jmp_target(TranslationBlock *tb,
 143                                      int n, unsigned long addr)
 144 {
 145     tb->tb_next[n] = (void *)addr;
 146 }
 147
 148 #endif
 149
 150 static inline void tb_add_jump(TranslationBlock *tb, int n,
 151                                TranslationBlock *tb_next)
 152 {
 153     /* NOTE: this test is only needed for thread safety */
 154     if (!tb->jmp_next[n]) {
 155         /* patch the native jump address */
 156         tb_set_jmp_target(tb, n, (unsigned long)tb_next->tc_ptr);
 157
 158         /* add in TB jmp circular list */
 159         tb->jmp_next[n] = tb_next->jmp_first;
 160         tb_next->jmp_first = (TranslationBlock *)((long)(tb) | (n));
 161     }
 162 }
 163
 164 #ifndef offsetof
 165 #define offsetof(type, field) ((size_t) &((type *)0)->field)
 166 #endif
 167
 168 #ifdef __powerpc__
 169 static inline int testandset (int *p)
 170 {
 171     int ret;
 172     __asm__ __volatile__ (
 173                           "0:    lwarx %0,0,%1 ;"
 174                           "      xor. %0,%3,%0;"
 175                           "      bne 1f;"
 176                           "      stwcx. %2,0,%1;"
 177                           "      bne- 0b;"
 178                           "1:    "
 179                           : "=&r" (ret)
 180                           : "r" (p), "r" (1), "r" (0)
 181                           : "cr0", "memory");
 182     return ret;
 183 }
 184 #endif
 185
 186 #ifdef __i386__
 187 static inline int testandset (int *p)
 188 {
 189     char ret;
 190     long int readval;
 191
 192     __asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0"
 193                           : "=q" (ret), "=m" (*p), "=a" (readval)
 194                           : "r" (1), "m" (*p), "a" (0)
 195                           : "memory");
 196     return ret;
 197 }
 198 #endif
 199
 200 #ifdef __s390__
 201 static inline int testandset (int *p)
 202 {
 203     int ret;
 204
 205     __asm__ __volatile__ ("0: cs    %0,%1,0(%2)\n"
 206                           "   jl    0b"
 207                           : "=&d" (ret)
 208                           : "r" (1), "a" (p), "0" (*p)
 209                           : "cc", "memory" );
 210     return ret;
 211 }
 212 #endif
 213
 214 #ifdef __alpha__
 215 int testandset (int *p)
 216 {
 217     int ret;
 218     unsigned long one;
 219
 220     __asm__ __volatile__ ("0:   mov 1,%2\n"
 221                           "     ldl_l %0,%1\n"
 222                           "     stl_c %2,%1\n"
 223                           "     beq %2,1f\n"
 224                           ".subsection 2\n"
 225                           "1:   br 0b\n"
 226                           ".previous"
 227                           : "=r" (ret), "=m" (*p), "=r" (one)
 228                           : "m" (*p));
 229     return ret;
 230 }
 231 #endif
 232
 233 #ifdef __sparc__
 234 static inline int testandset (int *p)
 235 {
 236         int ret;
 237
 238         __asm__ __volatile__("ldstub    [%1], %0"
 239                              : "=r" (ret)
 240                              : "r" (p)
 241                              : "memory");
 242
 243         return (ret ? 1 : 0);
 244 }
 245 #endif
 246
 247 typedef int spinlock_t;
 248
 249 #define SPIN_LOCK_UNLOCKED 0
 250
 251 static inline void spin_lock(spinlock_t *lock)
 252 {
 253     while (testandset(lock));
 254 }
 255
 256 static inline void spin_unlock(spinlock_t *lock)
 257 {
 258     *lock = 0;
 259 }
 260
 261 static inline int spin_trylock(spinlock_t *lock)
 262 {
 263     return !testandset(lock);
 264 }
 265
 266 extern spinlock_t tb_lock;
 267