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1 /*
2 * QEMU float support
3 *
4 * Derived from SoftFloat.
5 */
6
7 /*============================================================================
8
9 This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
10 Arithmetic Package, Release 2b.
11
12 Written by John R. Hauser. This work was made possible in part by the
13 International Computer Science Institute, located at Suite 600, 1947 Center
14 Street, Berkeley, California 94704. Funding was partially provided by the
15 National Science Foundation under grant MIP-9311980. The original version
16 of this code was written as part of a project to build a fixed-point vector
17 processor in collaboration with the University of California at Berkeley,
18 overseen by Profs. Nelson Morgan and John Wawrzynek. More information
19 is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
20 arithmetic/SoftFloat.html'.
21
22 THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
23 been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
24 RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
25 AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
26 COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
27 EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
28 INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
29 OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
30
31 Derivative works are acceptable, even for commercial purposes, so long as
32 (1) the source code for the derivative work includes prominent notice that
33 the work is derivative, and (2) the source code includes prominent notice with
34 these four paragraphs for those parts of this code that are retained.
35
36 =============================================================================*/
37
38 #if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
39 #define SNAN_BIT_IS_ONE 1
40 #else
41 #define SNAN_BIT_IS_ONE 0
42 #endif
43
44 #if defined(TARGET_XTENSA)
45 /* Define for architectures which deviate from IEEE in not supporting
46 * signaling NaNs (so all NaNs are treated as quiet).
47 */
48 #define NO_SIGNALING_NANS 1
49 #endif
50
51 /*----------------------------------------------------------------------------
52 | The pattern for a default generated half-precision NaN.
53 *----------------------------------------------------------------------------*/
54 #if defined(TARGET_ARM)
55 const float16 float16_default_nan = const_float16(0x7E00);
56 #elif SNAN_BIT_IS_ONE
57 const float16 float16_default_nan = const_float16(0x7DFF);
58 #else
59 const float16 float16_default_nan = const_float16(0xFE00);
60 #endif
61
62 /*----------------------------------------------------------------------------
63 | The pattern for a default generated single-precision NaN.
64 *----------------------------------------------------------------------------*/
65 #if defined(TARGET_SPARC)
66 const float32 float32_default_nan = const_float32(0x7FFFFFFF);
67 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
68 defined(TARGET_XTENSA)
69 const float32 float32_default_nan = const_float32(0x7FC00000);
70 #elif SNAN_BIT_IS_ONE
71 const float32 float32_default_nan = const_float32(0x7FBFFFFF);
72 #else
73 const float32 float32_default_nan = const_float32(0xFFC00000);
74 #endif
75
76 /*----------------------------------------------------------------------------
77 | The pattern for a default generated double-precision NaN.
78 *----------------------------------------------------------------------------*/
79 #if defined(TARGET_SPARC)
80 const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
81 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
82 const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
83 #elif SNAN_BIT_IS_ONE
84 const float64 float64_default_nan = const_float64(LIT64( 0x7FF7FFFFFFFFFFFF ));
85 #else
86 const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
87 #endif
88
89 /*----------------------------------------------------------------------------
90 | The pattern for a default generated extended double-precision NaN.
91 *----------------------------------------------------------------------------*/
92 #if SNAN_BIT_IS_ONE
93 #define floatx80_default_nan_high 0x7FFF
94 #define floatx80_default_nan_low LIT64( 0xBFFFFFFFFFFFFFFF )
95 #else
96 #define floatx80_default_nan_high 0xFFFF
97 #define floatx80_default_nan_low LIT64( 0xC000000000000000 )
98 #endif
99
100 const floatx80 floatx80_default_nan
101 = make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
102
103 /*----------------------------------------------------------------------------
104 | The pattern for a default generated quadruple-precision NaN. The `high' and
105 | `low' values hold the most- and least-significant bits, respectively.
106 *----------------------------------------------------------------------------*/
107 #if SNAN_BIT_IS_ONE
108 #define float128_default_nan_high LIT64( 0x7FFF7FFFFFFFFFFF )
109 #define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
110 #else
111 #define float128_default_nan_high LIT64( 0xFFFF800000000000 )
112 #define float128_default_nan_low LIT64( 0x0000000000000000 )
113 #endif
114
115 const float128 float128_default_nan
116 = make_float128_init(float128_default_nan_high, float128_default_nan_low);
117
118 /*----------------------------------------------------------------------------
119 | Raises the exceptions specified by `flags'. Floating-point traps can be
120 | defined here if desired. It is currently not possible for such a trap
121 | to substitute a result value. If traps are not implemented, this routine
122 | should be simply `float_exception_flags |= flags;'.
123 *----------------------------------------------------------------------------*/
124
125 void float_raise( int8 flags STATUS_PARAM )
126 {
127 STATUS(float_exception_flags) |= flags;
128 }
129
130 /*----------------------------------------------------------------------------
131 | Internal canonical NaN format.
132 *----------------------------------------------------------------------------*/
133 typedef struct {
134 flag sign;
135 uint64_t high, low;
136 } commonNaNT;
137
138 #ifdef NO_SIGNALING_NANS
139 int float16_is_quiet_nan(float16 a_)
140 {
141 return float16_is_any_nan(a_);
142 }
143
144 int float16_is_signaling_nan(float16 a_)
145 {
146 return 0;
147 }
148 #else
149 /*----------------------------------------------------------------------------
150 | Returns 1 if the half-precision floating-point value `a' is a quiet
151 | NaN; otherwise returns 0.
152 *----------------------------------------------------------------------------*/
153
154 int float16_is_quiet_nan(float16 a_)
155 {
156 uint16_t a = float16_val(a_);
157 #if SNAN_BIT_IS_ONE
158 return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
159 #else
160 return ((a & ~0x8000) >= 0x7c80);
161 #endif
162 }
163
164 /*----------------------------------------------------------------------------
165 | Returns 1 if the half-precision floating-point value `a' is a signaling
166 | NaN; otherwise returns 0.
167 *----------------------------------------------------------------------------*/
168
169 int float16_is_signaling_nan(float16 a_)
170 {
171 uint16_t a = float16_val(a_);
172 #if SNAN_BIT_IS_ONE
173 return ((a & ~0x8000) >= 0x7c80);
174 #else
175 return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
176 #endif
177 }
178 #endif
179
180 /*----------------------------------------------------------------------------
181 | Returns a quiet NaN if the half-precision floating point value `a' is a
182 | signaling NaN; otherwise returns `a'.
183 *----------------------------------------------------------------------------*/
184 float16 float16_maybe_silence_nan(float16 a_)
185 {
186 if (float16_is_signaling_nan(a_)) {
187 #if SNAN_BIT_IS_ONE
188 # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
189 return float16_default_nan;
190 # else
191 # error Rules for silencing a signaling NaN are target-specific
192 # endif
193 #else
194 uint16_t a = float16_val(a_);
195 a |= (1 << 9);
196 return make_float16(a);
197 #endif
198 }
199 return a_;
200 }
201
202 /*----------------------------------------------------------------------------
203 | Returns the result of converting the half-precision floating-point NaN
204 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
205 | exception is raised.
206 *----------------------------------------------------------------------------*/
207
208 static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM )
209 {
210 commonNaNT z;
211
212 if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
213 z.sign = float16_val(a) >> 15;
214 z.low = 0;
215 z.high = ((uint64_t) float16_val(a))<<54;
216 return z;
217 }
218
219 /*----------------------------------------------------------------------------
220 | Returns the result of converting the canonical NaN `a' to the half-
221 | precision floating-point format.
222 *----------------------------------------------------------------------------*/
223
224 static float16 commonNaNToFloat16(commonNaNT a STATUS_PARAM)
225 {
226 uint16_t mantissa = a.high>>54;
227
228 if (STATUS(default_nan_mode)) {
229 return float16_default_nan;
230 }
231
232 if (mantissa) {
233 return make_float16(((((uint16_t) a.sign) << 15)
234 | (0x1F << 10) | mantissa));
235 } else {
236 return float16_default_nan;
237 }
238 }
239
240 #ifdef NO_SIGNALING_NANS
241 int float32_is_quiet_nan(float32 a_)
242 {
243 return float32_is_any_nan(a_);
244 }
245
246 int float32_is_signaling_nan(float32 a_)
247 {
248 return 0;
249 }
250 #else
251 /*----------------------------------------------------------------------------
252 | Returns 1 if the single-precision floating-point value `a' is a quiet
253 | NaN; otherwise returns 0.
254 *----------------------------------------------------------------------------*/
255
256 int float32_is_quiet_nan( float32 a_ )
257 {
258 uint32_t a = float32_val(a_);
259 #if SNAN_BIT_IS_ONE
260 return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
261 #else
262 return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
263 #endif
264 }
265
266 /*----------------------------------------------------------------------------
267 | Returns 1 if the single-precision floating-point value `a' is a signaling
268 | NaN; otherwise returns 0.
269 *----------------------------------------------------------------------------*/
270
271 int float32_is_signaling_nan( float32 a_ )
272 {
273 uint32_t a = float32_val(a_);
274 #if SNAN_BIT_IS_ONE
275 return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
276 #else
277 return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
278 #endif
279 }
280 #endif
281
282 /*----------------------------------------------------------------------------
283 | Returns a quiet NaN if the single-precision floating point value `a' is a
284 | signaling NaN; otherwise returns `a'.
285 *----------------------------------------------------------------------------*/
286
287 float32 float32_maybe_silence_nan( float32 a_ )
288 {
289 if (float32_is_signaling_nan(a_)) {
290 #if SNAN_BIT_IS_ONE
291 # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
292 return float32_default_nan;
293 # else
294 # error Rules for silencing a signaling NaN are target-specific
295 # endif
296 #else
297 uint32_t a = float32_val(a_);
298 a |= (1 << 22);
299 return make_float32(a);
300 #endif
301 }
302 return a_;
303 }
304
305 /*----------------------------------------------------------------------------
306 | Returns the result of converting the single-precision floating-point NaN
307 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
308 | exception is raised.
309 *----------------------------------------------------------------------------*/
310
311 static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM )
312 {
313 commonNaNT z;
314
315 if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
316 z.sign = float32_val(a)>>31;
317 z.low = 0;
318 z.high = ( (uint64_t) float32_val(a) )<<41;
319 return z;
320 }
321
322 /*----------------------------------------------------------------------------
323 | Returns the result of converting the canonical NaN `a' to the single-
324 | precision floating-point format.
325 *----------------------------------------------------------------------------*/
326
327 static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM)
328 {
329 uint32_t mantissa = a.high>>41;
330
331 if ( STATUS(default_nan_mode) ) {
332 return float32_default_nan;
333 }
334
335 if ( mantissa )
336 return make_float32(
337 ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
338 else
339 return float32_default_nan;
340 }
341
342 /*----------------------------------------------------------------------------
343 | Select which NaN to propagate for a two-input operation.
344 | IEEE754 doesn't specify all the details of this, so the
345 | algorithm is target-specific.
346 | The routine is passed various bits of information about the
347 | two NaNs and should return 0 to select NaN a and 1 for NaN b.
348 | Note that signalling NaNs are always squashed to quiet NaNs
349 | by the caller, by calling floatXX_maybe_silence_nan() before
350 | returning them.
351 |
352 | aIsLargerSignificand is only valid if both a and b are NaNs
353 | of some kind, and is true if a has the larger significand,
354 | or if both a and b have the same significand but a is
355 | positive but b is negative. It is only needed for the x87
356 | tie-break rule.
357 *----------------------------------------------------------------------------*/
358
359 #if defined(TARGET_ARM)
360 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
361 flag aIsLargerSignificand)
362 {
363 /* ARM mandated NaN propagation rules: take the first of:
364 * 1. A if it is signaling
365 * 2. B if it is signaling
366 * 3. A (quiet)
367 * 4. B (quiet)
368 * A signaling NaN is always quietened before returning it.
369 */
370 if (aIsSNaN) {
371 return 0;
372 } else if (bIsSNaN) {
373 return 1;
374 } else if (aIsQNaN) {
375 return 0;
376 } else {
377 return 1;
378 }
379 }
380 #elif defined(TARGET_MIPS)
381 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
382 flag aIsLargerSignificand)
383 {
384 /* According to MIPS specifications, if one of the two operands is
385 * a sNaN, a new qNaN has to be generated. This is done in
386 * floatXX_maybe_silence_nan(). For qNaN inputs the specifications
387 * says: "When possible, this QNaN result is one of the operand QNaN
388 * values." In practice it seems that most implementations choose
389 * the first operand if both operands are qNaN. In short this gives
390 * the following rules:
391 * 1. A if it is signaling
392 * 2. B if it is signaling
393 * 3. A (quiet)
394 * 4. B (quiet)
395 * A signaling NaN is always silenced before returning it.
396 */
397 if (aIsSNaN) {
398 return 0;
399 } else if (bIsSNaN) {
400 return 1;
401 } else if (aIsQNaN) {
402 return 0;
403 } else {
404 return 1;
405 }
406 }
407 #elif defined(TARGET_PPC) || defined(TARGET_XTENSA)
408 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
409 flag aIsLargerSignificand)
410 {
411 /* PowerPC propagation rules:
412 * 1. A if it sNaN or qNaN
413 * 2. B if it sNaN or qNaN
414 * A signaling NaN is always silenced before returning it.
415 */
416 if (aIsSNaN || aIsQNaN) {
417 return 0;
418 } else {
419 return 1;
420 }
421 }
422 #else
423 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
424 flag aIsLargerSignificand)
425 {
426 /* This implements x87 NaN propagation rules:
427 * SNaN + QNaN => return the QNaN
428 * two SNaNs => return the one with the larger significand, silenced
429 * two QNaNs => return the one with the larger significand
430 * SNaN and a non-NaN => return the SNaN, silenced
431 * QNaN and a non-NaN => return the QNaN
432 *
433 * If we get down to comparing significands and they are the same,
434 * return the NaN with the positive sign bit (if any).
435 */
436 if (aIsSNaN) {
437 if (bIsSNaN) {
438 return aIsLargerSignificand ? 0 : 1;
439 }
440 return bIsQNaN ? 1 : 0;
441 }
442 else if (aIsQNaN) {
443 if (bIsSNaN || !bIsQNaN)
444 return 0;
445 else {
446 return aIsLargerSignificand ? 0 : 1;
447 }
448 } else {
449 return 1;
450 }
451 }
452 #endif
453
454 /*----------------------------------------------------------------------------
455 | Select which NaN to propagate for a three-input operation.
456 | For the moment we assume that no CPU needs the 'larger significand'
457 | information.
458 | Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
459 *----------------------------------------------------------------------------*/
460 #if defined(TARGET_ARM)
461 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
462 flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
463 {
464 /* For ARM, the (inf,zero,qnan) case sets InvalidOp and returns
465 * the default NaN
466 */
467 if (infzero && cIsQNaN) {
468 float_raise(float_flag_invalid STATUS_VAR);
469 return 3;
470 }
471
472 /* This looks different from the ARM ARM pseudocode, because the ARM ARM
473 * puts the operands to a fused mac operation (a*b)+c in the order c,a,b.
474 */
475 if (cIsSNaN) {
476 return 2;
477 } else if (aIsSNaN) {
478 return 0;
479 } else if (bIsSNaN) {
480 return 1;
481 } else if (cIsQNaN) {
482 return 2;
483 } else if (aIsQNaN) {
484 return 0;
485 } else {
486 return 1;
487 }
488 }
489 #elif defined(TARGET_PPC)
490 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
491 flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
492 {
493 /* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
494 * to return an input NaN if we have one (ie c) rather than generating
495 * a default NaN
496 */
497 if (infzero) {
498 float_raise(float_flag_invalid STATUS_VAR);
499 return 2;
500 }
501
502 /* If fRA is a NaN return it; otherwise if fRB is a NaN return it;
503 * otherwise return fRC. Note that muladd on PPC is (fRA * fRC) + frB
504 */
505 if (aIsSNaN || aIsQNaN) {
506 return 0;
507 } else if (cIsSNaN || cIsQNaN) {
508 return 2;
509 } else {
510 return 1;
511 }
512 }
513 #else
514 /* A default implementation: prefer a to b to c.
515 * This is unlikely to actually match any real implementation.
516 */
517 static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
518 flag cIsQNaN, flag cIsSNaN, flag infzero STATUS_PARAM)
519 {
520 if (aIsSNaN || aIsQNaN) {
521 return 0;
522 } else if (bIsSNaN || bIsQNaN) {
523 return 1;
524 } else {
525 return 2;
526 }
527 }
528 #endif
529
530 /*----------------------------------------------------------------------------
531 | Takes two single-precision floating-point values `a' and `b', one of which
532 | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
533 | signaling NaN, the invalid exception is raised.
534 *----------------------------------------------------------------------------*/
535
536 static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM)
537 {
538 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
539 flag aIsLargerSignificand;
540 uint32_t av, bv;
541
542 aIsQuietNaN = float32_is_quiet_nan( a );
543 aIsSignalingNaN = float32_is_signaling_nan( a );
544 bIsQuietNaN = float32_is_quiet_nan( b );
545 bIsSignalingNaN = float32_is_signaling_nan( b );
546 av = float32_val(a);
547 bv = float32_val(b);
548
549 if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
550
551 if ( STATUS(default_nan_mode) )
552 return float32_default_nan;
553
554 if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
555 aIsLargerSignificand = 0;
556 } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
557 aIsLargerSignificand = 1;
558 } else {
559 aIsLargerSignificand = (av < bv) ? 1 : 0;
560 }
561
562 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
563 aIsLargerSignificand)) {
564 return float32_maybe_silence_nan(b);
565 } else {
566 return float32_maybe_silence_nan(a);
567 }
568 }
569
570 /*----------------------------------------------------------------------------
571 | Takes three single-precision floating-point values `a', `b' and `c', one of
572 | which is a NaN, and returns the appropriate NaN result. If any of `a',
573 | `b' or `c' is a signaling NaN, the invalid exception is raised.
574 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
575 | obviously c is a NaN, and whether to propagate c or some other NaN is
576 | implementation defined).
577 *----------------------------------------------------------------------------*/
578
579 static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
580 float32 c, flag infzero STATUS_PARAM)
581 {
582 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
583 cIsQuietNaN, cIsSignalingNaN;
584 int which;
585
586 aIsQuietNaN = float32_is_quiet_nan(a);
587 aIsSignalingNaN = float32_is_signaling_nan(a);
588 bIsQuietNaN = float32_is_quiet_nan(b);
589 bIsSignalingNaN = float32_is_signaling_nan(b);
590 cIsQuietNaN = float32_is_quiet_nan(c);
591 cIsSignalingNaN = float32_is_signaling_nan(c);
592
593 if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
594 float_raise(float_flag_invalid STATUS_VAR);
595 }
596
597 which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
598 bIsQuietNaN, bIsSignalingNaN,
599 cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
600
601 if (STATUS(default_nan_mode)) {
602 /* Note that this check is after pickNaNMulAdd so that function
603 * has an opportunity to set the Invalid flag.
604 */
605 return float32_default_nan;
606 }
607
608 switch (which) {
609 case 0:
610 return float32_maybe_silence_nan(a);
611 case 1:
612 return float32_maybe_silence_nan(b);
613 case 2:
614 return float32_maybe_silence_nan(c);
615 case 3:
616 default:
617 return float32_default_nan;
618 }
619 }
620
621 #ifdef NO_SIGNALING_NANS
622 int float64_is_quiet_nan(float64 a_)
623 {
624 return float64_is_any_nan(a_);
625 }
626
627 int float64_is_signaling_nan(float64 a_)
628 {
629 return 0;
630 }
631 #else
632 /*----------------------------------------------------------------------------
633 | Returns 1 if the double-precision floating-point value `a' is a quiet
634 | NaN; otherwise returns 0.
635 *----------------------------------------------------------------------------*/
636
637 int float64_is_quiet_nan( float64 a_ )
638 {
639 uint64_t a = float64_val(a_);
640 #if SNAN_BIT_IS_ONE
641 return
642 ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
643 && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
644 #else
645 return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
646 #endif
647 }
648
649 /*----------------------------------------------------------------------------
650 | Returns 1 if the double-precision floating-point value `a' is a signaling
651 | NaN; otherwise returns 0.
652 *----------------------------------------------------------------------------*/
653
654 int float64_is_signaling_nan( float64 a_ )
655 {
656 uint64_t a = float64_val(a_);
657 #if SNAN_BIT_IS_ONE
658 return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
659 #else
660 return
661 ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
662 && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
663 #endif
664 }
665 #endif
666
667 /*----------------------------------------------------------------------------
668 | Returns a quiet NaN if the double-precision floating point value `a' is a
669 | signaling NaN; otherwise returns `a'.
670 *----------------------------------------------------------------------------*/
671
672 float64 float64_maybe_silence_nan( float64 a_ )
673 {
674 if (float64_is_signaling_nan(a_)) {
675 #if SNAN_BIT_IS_ONE
676 # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
677 return float64_default_nan;
678 # else
679 # error Rules for silencing a signaling NaN are target-specific
680 # endif
681 #else
682 uint64_t a = float64_val(a_);
683 a |= LIT64( 0x0008000000000000 );
684 return make_float64(a);
685 #endif
686 }
687 return a_;
688 }
689
690 /*----------------------------------------------------------------------------
691 | Returns the result of converting the double-precision floating-point NaN
692 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
693 | exception is raised.
694 *----------------------------------------------------------------------------*/
695
696 static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM)
697 {
698 commonNaNT z;
699
700 if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
701 z.sign = float64_val(a)>>63;
702 z.low = 0;
703 z.high = float64_val(a)<<12;
704 return z;
705 }
706
707 /*----------------------------------------------------------------------------
708 | Returns the result of converting the canonical NaN `a' to the double-
709 | precision floating-point format.
710 *----------------------------------------------------------------------------*/
711
712 static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM)
713 {
714 uint64_t mantissa = a.high>>12;
715
716 if ( STATUS(default_nan_mode) ) {
717 return float64_default_nan;
718 }
719
720 if ( mantissa )
721 return make_float64(
722 ( ( (uint64_t) a.sign )<<63 )
723 | LIT64( 0x7FF0000000000000 )
724 | ( a.high>>12 ));
725 else
726 return float64_default_nan;
727 }
728
729 /*----------------------------------------------------------------------------
730 | Takes two double-precision floating-point values `a' and `b', one of which
731 | is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
732 | signaling NaN, the invalid exception is raised.
733 *----------------------------------------------------------------------------*/
734
735 static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM)
736 {
737 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
738 flag aIsLargerSignificand;
739 uint64_t av, bv;
740
741 aIsQuietNaN = float64_is_quiet_nan( a );
742 aIsSignalingNaN = float64_is_signaling_nan( a );
743 bIsQuietNaN = float64_is_quiet_nan( b );
744 bIsSignalingNaN = float64_is_signaling_nan( b );
745 av = float64_val(a);
746 bv = float64_val(b);
747
748 if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
749
750 if ( STATUS(default_nan_mode) )
751 return float64_default_nan;
752
753 if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
754 aIsLargerSignificand = 0;
755 } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
756 aIsLargerSignificand = 1;
757 } else {
758 aIsLargerSignificand = (av < bv) ? 1 : 0;
759 }
760
761 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
762 aIsLargerSignificand)) {
763 return float64_maybe_silence_nan(b);
764 } else {
765 return float64_maybe_silence_nan(a);
766 }
767 }
768
769 /*----------------------------------------------------------------------------
770 | Takes three double-precision floating-point values `a', `b' and `c', one of
771 | which is a NaN, and returns the appropriate NaN result. If any of `a',
772 | `b' or `c' is a signaling NaN, the invalid exception is raised.
773 | The input infzero indicates whether a*b was 0*inf or inf*0 (in which case
774 | obviously c is a NaN, and whether to propagate c or some other NaN is
775 | implementation defined).
776 *----------------------------------------------------------------------------*/
777
778 static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
779 float64 c, flag infzero STATUS_PARAM)
780 {
781 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
782 cIsQuietNaN, cIsSignalingNaN;
783 int which;
784
785 aIsQuietNaN = float64_is_quiet_nan(a);
786 aIsSignalingNaN = float64_is_signaling_nan(a);
787 bIsQuietNaN = float64_is_quiet_nan(b);
788 bIsSignalingNaN = float64_is_signaling_nan(b);
789 cIsQuietNaN = float64_is_quiet_nan(c);
790 cIsSignalingNaN = float64_is_signaling_nan(c);
791
792 if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) {
793 float_raise(float_flag_invalid STATUS_VAR);
794 }
795
796 which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
797 bIsQuietNaN, bIsSignalingNaN,
798 cIsQuietNaN, cIsSignalingNaN, infzero STATUS_VAR);
799
800 if (STATUS(default_nan_mode)) {
801 /* Note that this check is after pickNaNMulAdd so that function
802 * has an opportunity to set the Invalid flag.
803 */
804 return float64_default_nan;
805 }
806
807 switch (which) {
808 case 0:
809 return float64_maybe_silence_nan(a);
810 case 1:
811 return float64_maybe_silence_nan(b);
812 case 2:
813 return float64_maybe_silence_nan(c);
814 case 3:
815 default:
816 return float64_default_nan;
817 }
818 }
819
820 #ifdef NO_SIGNALING_NANS
821 int floatx80_is_quiet_nan(floatx80 a_)
822 {
823 return floatx80_is_any_nan(a_);
824 }
825
826 int floatx80_is_signaling_nan(floatx80 a_)
827 {
828 return 0;
829 }
830 #else
831 /*----------------------------------------------------------------------------
832 | Returns 1 if the extended double-precision floating-point value `a' is a
833 | quiet NaN; otherwise returns 0. This slightly differs from the same
834 | function for other types as floatx80 has an explicit bit.
835 *----------------------------------------------------------------------------*/
836
837 int floatx80_is_quiet_nan( floatx80 a )
838 {
839 #if SNAN_BIT_IS_ONE
840 uint64_t aLow;
841
842 aLow = a.low & ~ LIT64( 0x4000000000000000 );
843 return
844 ( ( a.high & 0x7FFF ) == 0x7FFF )
845 && (uint64_t) ( aLow<<1 )
846 && ( a.low == aLow );
847 #else
848 return ( ( a.high & 0x7FFF ) == 0x7FFF )
849 && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
850 #endif
851 }
852
853 /*----------------------------------------------------------------------------
854 | Returns 1 if the extended double-precision floating-point value `a' is a
855 | signaling NaN; otherwise returns 0. This slightly differs from the same
856 | function for other types as floatx80 has an explicit bit.
857 *----------------------------------------------------------------------------*/
858
859 int floatx80_is_signaling_nan( floatx80 a )
860 {
861 #if SNAN_BIT_IS_ONE
862 return ( ( a.high & 0x7FFF ) == 0x7FFF )
863 && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
864 #else
865 uint64_t aLow;
866
867 aLow = a.low & ~ LIT64( 0x4000000000000000 );
868 return
869 ( ( a.high & 0x7FFF ) == 0x7FFF )
870 && (uint64_t) ( aLow<<1 )
871 && ( a.low == aLow );
872 #endif
873 }
874 #endif
875
876 /*----------------------------------------------------------------------------
877 | Returns a quiet NaN if the extended double-precision floating point value
878 | `a' is a signaling NaN; otherwise returns `a'.
879 *----------------------------------------------------------------------------*/
880
881 floatx80 floatx80_maybe_silence_nan( floatx80 a )
882 {
883 if (floatx80_is_signaling_nan(a)) {
884 #if SNAN_BIT_IS_ONE
885 # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
886 a.low = floatx80_default_nan_low;
887 a.high = floatx80_default_nan_high;
888 # else
889 # error Rules for silencing a signaling NaN are target-specific
890 # endif
891 #else
892 a.low |= LIT64( 0xC000000000000000 );
893 return a;
894 #endif
895 }
896 return a;
897 }
898
899 /*----------------------------------------------------------------------------
900 | Returns the result of converting the extended double-precision floating-
901 | point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
902 | invalid exception is raised.
903 *----------------------------------------------------------------------------*/
904
905 static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM)
906 {
907 commonNaNT z;
908
909 if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
910 if ( a.low >> 63 ) {
911 z.sign = a.high >> 15;
912 z.low = 0;
913 z.high = a.low << 1;
914 } else {
915 z.sign = floatx80_default_nan_high >> 15;
916 z.low = 0;
917 z.high = floatx80_default_nan_low << 1;
918 }
919 return z;
920 }
921
922 /*----------------------------------------------------------------------------
923 | Returns the result of converting the canonical NaN `a' to the extended
924 | double-precision floating-point format.
925 *----------------------------------------------------------------------------*/
926
927 static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM)
928 {
929 floatx80 z;
930
931 if ( STATUS(default_nan_mode) ) {
932 z.low = floatx80_default_nan_low;
933 z.high = floatx80_default_nan_high;
934 return z;
935 }
936
937 if (a.high >> 1) {
938 z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
939 z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
940 } else {
941 z.low = floatx80_default_nan_low;
942 z.high = floatx80_default_nan_high;
943 }
944
945 return z;
946 }
947
948 /*----------------------------------------------------------------------------
949 | Takes two extended double-precision floating-point values `a' and `b', one
950 | of which is a NaN, and returns the appropriate NaN result. If either `a' or
951 | `b' is a signaling NaN, the invalid exception is raised.
952 *----------------------------------------------------------------------------*/
953
954 static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b STATUS_PARAM)
955 {
956 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
957 flag aIsLargerSignificand;
958
959 aIsQuietNaN = floatx80_is_quiet_nan( a );
960 aIsSignalingNaN = floatx80_is_signaling_nan( a );
961 bIsQuietNaN = floatx80_is_quiet_nan( b );
962 bIsSignalingNaN = floatx80_is_signaling_nan( b );
963
964 if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
965
966 if ( STATUS(default_nan_mode) ) {
967 a.low = floatx80_default_nan_low;
968 a.high = floatx80_default_nan_high;
969 return a;
970 }
971
972 if (a.low < b.low) {
973 aIsLargerSignificand = 0;
974 } else if (b.low < a.low) {
975 aIsLargerSignificand = 1;
976 } else {
977 aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
978 }
979
980 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
981 aIsLargerSignificand)) {
982 return floatx80_maybe_silence_nan(b);
983 } else {
984 return floatx80_maybe_silence_nan(a);
985 }
986 }
987
988 #ifdef NO_SIGNALING_NANS
989 int float128_is_quiet_nan(float128 a_)
990 {
991 return float128_is_any_nan(a_);
992 }
993
994 int float128_is_signaling_nan(float128 a_)
995 {
996 return 0;
997 }
998 #else
999 /*----------------------------------------------------------------------------
1000 | Returns 1 if the quadruple-precision floating-point value `a' is a quiet
1001 | NaN; otherwise returns 0.
1002 *----------------------------------------------------------------------------*/
1003
1004 int float128_is_quiet_nan( float128 a )
1005 {
1006 #if SNAN_BIT_IS_ONE
1007 return
1008 ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
1009 && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
1010 #else
1011 return
1012 ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
1013 && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
1014 #endif
1015 }
1016
1017 /*----------------------------------------------------------------------------
1018 | Returns 1 if the quadruple-precision floating-point value `a' is a
1019 | signaling NaN; otherwise returns 0.
1020 *----------------------------------------------------------------------------*/
1021
1022 int float128_is_signaling_nan( float128 a )
1023 {
1024 #if SNAN_BIT_IS_ONE
1025 return
1026 ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
1027 && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
1028 #else
1029 return
1030 ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
1031 && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
1032 #endif
1033 }
1034 #endif
1035
1036 /*----------------------------------------------------------------------------
1037 | Returns a quiet NaN if the quadruple-precision floating point value `a' is
1038 | a signaling NaN; otherwise returns `a'.
1039 *----------------------------------------------------------------------------*/
1040
1041 float128 float128_maybe_silence_nan( float128 a )
1042 {
1043 if (float128_is_signaling_nan(a)) {
1044 #if SNAN_BIT_IS_ONE
1045 # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
1046 a.low = float128_default_nan_low;
1047 a.high = float128_default_nan_high;
1048 # else
1049 # error Rules for silencing a signaling NaN are target-specific
1050 # endif
1051 #else
1052 a.high |= LIT64( 0x0000800000000000 );
1053 return a;
1054 #endif
1055 }
1056 return a;
1057 }
1058
1059 /*----------------------------------------------------------------------------
1060 | Returns the result of converting the quadruple-precision floating-point NaN
1061 | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
1062 | exception is raised.
1063 *----------------------------------------------------------------------------*/
1064
1065 static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM)
1066 {
1067 commonNaNT z;
1068
1069 if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
1070 z.sign = a.high>>63;
1071 shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
1072 return z;
1073 }
1074
1075 /*----------------------------------------------------------------------------
1076 | Returns the result of converting the canonical NaN `a' to the quadruple-
1077 | precision floating-point format.
1078 *----------------------------------------------------------------------------*/
1079
1080 static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM)
1081 {
1082 float128 z;
1083
1084 if ( STATUS(default_nan_mode) ) {
1085 z.low = float128_default_nan_low;
1086 z.high = float128_default_nan_high;
1087 return z;
1088 }
1089
1090 shift128Right( a.high, a.low, 16, &z.high, &z.low );
1091 z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
1092 return z;
1093 }
1094
1095 /*----------------------------------------------------------------------------
1096 | Takes two quadruple-precision floating-point values `a' and `b', one of
1097 | which is a NaN, and returns the appropriate NaN result. If either `a' or
1098 | `b' is a signaling NaN, the invalid exception is raised.
1099 *----------------------------------------------------------------------------*/
1100
1101 static float128 propagateFloat128NaN( float128 a, float128 b STATUS_PARAM)
1102 {
1103 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
1104 flag aIsLargerSignificand;
1105
1106 aIsQuietNaN = float128_is_quiet_nan( a );
1107 aIsSignalingNaN = float128_is_signaling_nan( a );
1108 bIsQuietNaN = float128_is_quiet_nan( b );
1109 bIsSignalingNaN = float128_is_signaling_nan( b );
1110
1111 if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
1112
1113 if ( STATUS(default_nan_mode) ) {
1114 a.low = float128_default_nan_low;
1115 a.high = float128_default_nan_high;
1116 return a;
1117 }
1118
1119 if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
1120 aIsLargerSignificand = 0;
1121 } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
1122 aIsLargerSignificand = 1;
1123 } else {
1124 aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
1125 }
1126
1127 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
1128 aIsLargerSignificand)) {
1129 return float128_maybe_silence_nan(b);
1130 } else {
1131 return float128_maybe_silence_nan(a);
1132 }
1133 }
1134