4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
21 #include "qemu-common.h"
22 #ifdef CONFIG_USER_ONLY
33 #include "qemu-char.h"
38 #define MAX_PACKET_LENGTH 4096
40 #include "qemu_socket.h"
47 GDB_SIGNAL_UNKNOWN
= 143
50 #ifdef CONFIG_USER_ONLY
52 /* Map target signal numbers to GDB protocol signal numbers and vice
53 * versa. For user emulation's currently supported systems, we can
54 * assume most signals are defined.
57 static int gdb_signal_table
[] = {
217 /* In system mode we only need SIGINT and SIGTRAP; other signals
218 are not yet supported. */
225 static int gdb_signal_table
[] = {
235 #ifdef CONFIG_USER_ONLY
236 static int target_signal_to_gdb (int sig
)
239 for (i
= 0; i
< ARRAY_SIZE (gdb_signal_table
); i
++)
240 if (gdb_signal_table
[i
] == sig
)
242 return GDB_SIGNAL_UNKNOWN
;
246 static int gdb_signal_to_target (int sig
)
248 if (sig
< ARRAY_SIZE (gdb_signal_table
))
249 return gdb_signal_table
[sig
];
256 typedef struct GDBRegisterState
{
262 struct GDBRegisterState
*next
;
272 typedef struct GDBState
{
273 CPUState
*c_cpu
; /* current CPU for step/continue ops */
274 CPUState
*g_cpu
; /* current CPU for other ops */
275 CPUState
*query_cpu
; /* for q{f|s}ThreadInfo */
276 enum RSState state
; /* parsing state */
277 char line_buf
[MAX_PACKET_LENGTH
];
280 uint8_t last_packet
[MAX_PACKET_LENGTH
+ 4];
283 #ifdef CONFIG_USER_ONLY
287 CharDriverState
*chr
;
291 /* By default use no IRQs and no timers while single stepping so as to
292 * make single stepping like an ICE HW step.
294 static int sstep_flags
= SSTEP_ENABLE
|SSTEP_NOIRQ
|SSTEP_NOTIMER
;
296 static GDBState
*gdbserver_state
;
298 /* This is an ugly hack to cope with both new and old gdb.
299 If gdb sends qXfer:features:read then assume we're talking to a newish
300 gdb that understands target descriptions. */
301 static int gdb_has_xml
;
303 #ifdef CONFIG_USER_ONLY
304 /* XXX: This is not thread safe. Do we care? */
305 static int gdbserver_fd
= -1;
307 static int get_char(GDBState
*s
)
313 ret
= recv(s
->fd
, &ch
, 1, 0);
315 if (errno
== ECONNRESET
)
317 if (errno
!= EINTR
&& errno
!= EAGAIN
)
319 } else if (ret
== 0) {
331 static gdb_syscall_complete_cb gdb_current_syscall_cb
;
339 /* If gdb is connected when the first semihosting syscall occurs then use
340 remote gdb syscalls. Otherwise use native file IO. */
341 int use_gdb_syscalls(void)
343 if (gdb_syscall_mode
== GDB_SYS_UNKNOWN
) {
344 gdb_syscall_mode
= (gdbserver_state
? GDB_SYS_ENABLED
347 return gdb_syscall_mode
== GDB_SYS_ENABLED
;
350 /* Resume execution. */
351 static inline void gdb_continue(GDBState
*s
)
353 #ifdef CONFIG_USER_ONLY
354 s
->running_state
= 1;
360 static void put_buffer(GDBState
*s
, const uint8_t *buf
, int len
)
362 #ifdef CONFIG_USER_ONLY
366 ret
= send(s
->fd
, buf
, len
, 0);
368 if (errno
!= EINTR
&& errno
!= EAGAIN
)
376 qemu_chr_write(s
->chr
, buf
, len
);
380 static inline int fromhex(int v
)
382 if (v
>= '0' && v
<= '9')
384 else if (v
>= 'A' && v
<= 'F')
386 else if (v
>= 'a' && v
<= 'f')
392 static inline int tohex(int v
)
400 static void memtohex(char *buf
, const uint8_t *mem
, int len
)
405 for(i
= 0; i
< len
; i
++) {
407 *q
++ = tohex(c
>> 4);
408 *q
++ = tohex(c
& 0xf);
413 static void hextomem(uint8_t *mem
, const char *buf
, int len
)
417 for(i
= 0; i
< len
; i
++) {
418 mem
[i
] = (fromhex(buf
[0]) << 4) | fromhex(buf
[1]);
423 /* return -1 if error, 0 if OK */
424 static int put_packet_binary(GDBState
*s
, const char *buf
, int len
)
435 for(i
= 0; i
< len
; i
++) {
439 *(p
++) = tohex((csum
>> 4) & 0xf);
440 *(p
++) = tohex((csum
) & 0xf);
442 s
->last_packet_len
= p
- s
->last_packet
;
443 put_buffer(s
, (uint8_t *)s
->last_packet
, s
->last_packet_len
);
445 #ifdef CONFIG_USER_ONLY
458 /* return -1 if error, 0 if OK */
459 static int put_packet(GDBState
*s
, const char *buf
)
462 printf("reply='%s'\n", buf
);
465 return put_packet_binary(s
, buf
, strlen(buf
));
468 /* The GDB remote protocol transfers values in target byte order. This means
469 we can use the raw memory access routines to access the value buffer.
470 Conveniently, these also handle the case where the buffer is mis-aligned.
472 #define GET_REG8(val) do { \
473 stb_p(mem_buf, val); \
476 #define GET_REG16(val) do { \
477 stw_p(mem_buf, val); \
480 #define GET_REG32(val) do { \
481 stl_p(mem_buf, val); \
484 #define GET_REG64(val) do { \
485 stq_p(mem_buf, val); \
489 #if TARGET_LONG_BITS == 64
490 #define GET_REGL(val) GET_REG64(val)
491 #define ldtul_p(addr) ldq_p(addr)
493 #define GET_REGL(val) GET_REG32(val)
494 #define ldtul_p(addr) ldl_p(addr)
497 #if defined(TARGET_I386)
500 static const int gpr_map
[16] = {
501 R_EAX
, R_EBX
, R_ECX
, R_EDX
, R_ESI
, R_EDI
, R_EBP
, R_ESP
,
502 8, 9, 10, 11, 12, 13, 14, 15
505 static const int gpr_map
[8] = {0, 1, 2, 3, 4, 5, 6, 7};
508 #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
510 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
512 if (n
< CPU_NB_REGS
) {
513 GET_REGL(env
->regs
[gpr_map
[n
]]);
514 } else if (n
>= CPU_NB_REGS
+ 8 && n
< CPU_NB_REGS
+ 16) {
515 /* FIXME: byteswap float values. */
516 #ifdef USE_X86LDOUBLE
517 memcpy(mem_buf
, &env
->fpregs
[n
- (CPU_NB_REGS
+ 8)], 10);
519 memset(mem_buf
, 0, 10);
522 } else if (n
>= CPU_NB_REGS
+ 24) {
523 n
-= CPU_NB_REGS
+ 24;
524 if (n
< CPU_NB_REGS
) {
525 stq_p(mem_buf
, env
->xmm_regs
[n
].XMM_Q(0));
526 stq_p(mem_buf
+ 8, env
->xmm_regs
[n
].XMM_Q(1));
528 } else if (n
== CPU_NB_REGS
) {
529 GET_REG32(env
->mxcsr
);
534 case 0: GET_REGL(env
->eip
);
535 case 1: GET_REG32(env
->eflags
);
536 case 2: GET_REG32(env
->segs
[R_CS
].selector
);
537 case 3: GET_REG32(env
->segs
[R_SS
].selector
);
538 case 4: GET_REG32(env
->segs
[R_DS
].selector
);
539 case 5: GET_REG32(env
->segs
[R_ES
].selector
);
540 case 6: GET_REG32(env
->segs
[R_FS
].selector
);
541 case 7: GET_REG32(env
->segs
[R_GS
].selector
);
542 /* 8...15 x87 regs. */
543 case 16: GET_REG32(env
->fpuc
);
544 case 17: GET_REG32((env
->fpus
& ~0x3800) | (env
->fpstt
& 0x7) << 11);
545 case 18: GET_REG32(0); /* ftag */
546 case 19: GET_REG32(0); /* fiseg */
547 case 20: GET_REG32(0); /* fioff */
548 case 21: GET_REG32(0); /* foseg */
549 case 22: GET_REG32(0); /* fooff */
550 case 23: GET_REG32(0); /* fop */
557 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int i
)
561 if (i
< CPU_NB_REGS
) {
562 env
->regs
[gpr_map
[i
]] = ldtul_p(mem_buf
);
563 return sizeof(target_ulong
);
564 } else if (i
>= CPU_NB_REGS
+ 8 && i
< CPU_NB_REGS
+ 16) {
565 i
-= CPU_NB_REGS
+ 8;
566 #ifdef USE_X86LDOUBLE
567 memcpy(&env
->fpregs
[i
], mem_buf
, 10);
570 } else if (i
>= CPU_NB_REGS
+ 24) {
571 i
-= CPU_NB_REGS
+ 24;
572 if (i
< CPU_NB_REGS
) {
573 env
->xmm_regs
[i
].XMM_Q(0) = ldq_p(mem_buf
);
574 env
->xmm_regs
[i
].XMM_Q(1) = ldq_p(mem_buf
+ 8);
576 } else if (i
== CPU_NB_REGS
) {
577 env
->mxcsr
= ldl_p(mem_buf
);
583 case 0: env
->eip
= ldtul_p(mem_buf
); return sizeof(target_ulong
);
584 case 1: env
->eflags
= ldl_p(mem_buf
); return 4;
585 #if defined(CONFIG_USER_ONLY)
586 #define LOAD_SEG(index, sreg)\
587 tmp = ldl_p(mem_buf);\
588 if (tmp != env->segs[sreg].selector)\
589 cpu_x86_load_seg(env, sreg, tmp);
591 /* FIXME: Honor segment registers. Needs to avoid raising an exception
592 when the selector is invalid. */
593 #define LOAD_SEG(index, sreg) do {} while(0)
595 case 2: LOAD_SEG(10, R_CS
); return 4;
596 case 3: LOAD_SEG(11, R_SS
); return 4;
597 case 4: LOAD_SEG(12, R_DS
); return 4;
598 case 5: LOAD_SEG(13, R_ES
); return 4;
599 case 6: LOAD_SEG(14, R_FS
); return 4;
600 case 7: LOAD_SEG(15, R_GS
); return 4;
601 /* 8...15 x87 regs. */
602 case 16: env
->fpuc
= ldl_p(mem_buf
); return 4;
604 tmp
= ldl_p(mem_buf
);
605 env
->fpstt
= (tmp
>> 11) & 7;
606 env
->fpus
= tmp
& ~0x3800;
608 case 18: /* ftag */ return 4;
609 case 19: /* fiseg */ return 4;
610 case 20: /* fioff */ return 4;
611 case 21: /* foseg */ return 4;
612 case 22: /* fooff */ return 4;
613 case 23: /* fop */ return 4;
617 /* Unrecognised register. */
621 #elif defined (TARGET_PPC)
623 #define NUM_CORE_REGS 71
625 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
629 GET_REGL(env
->gpr
[n
]);
632 stfq_p(mem_buf
, env
->fpr
[n
-32]);
636 case 64: GET_REGL(env
->nip
);
637 case 65: GET_REGL(env
->msr
);
642 for (i
= 0; i
< 8; i
++)
643 cr
|= env
->crf
[i
] << (32 - ((i
+ 1) * 4));
646 case 67: GET_REGL(env
->lr
);
647 case 68: GET_REGL(env
->ctr
);
648 case 69: GET_REGL(env
->xer
);
649 case 70: GET_REG32(0); /* fpscr */
655 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
659 env
->gpr
[n
] = ldtul_p(mem_buf
);
660 return sizeof(target_ulong
);
663 env
->fpr
[n
-32] = ldfq_p(mem_buf
);
668 env
->nip
= ldtul_p(mem_buf
);
669 return sizeof(target_ulong
);
671 ppc_store_msr(env
, ldtul_p(mem_buf
));
672 return sizeof(target_ulong
);
675 uint32_t cr
= ldl_p(mem_buf
);
677 for (i
= 0; i
< 8; i
++)
678 env
->crf
[i
] = (cr
>> (32 - ((i
+ 1) * 4))) & 0xF;
682 env
->lr
= ldtul_p(mem_buf
);
683 return sizeof(target_ulong
);
685 env
->ctr
= ldtul_p(mem_buf
);
686 return sizeof(target_ulong
);
688 env
->xer
= ldtul_p(mem_buf
);
689 return sizeof(target_ulong
);
698 #elif defined (TARGET_SPARC)
700 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
701 #define NUM_CORE_REGS 86
703 #define NUM_CORE_REGS 72
707 #define GET_REGA(val) GET_REG32(val)
709 #define GET_REGA(val) GET_REGL(val)
712 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
716 GET_REGA(env
->gregs
[n
]);
719 /* register window */
720 GET_REGA(env
->regwptr
[n
- 8]);
722 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
725 GET_REG32(*((uint32_t *)&env
->fpr
[n
- 32]));
727 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
729 case 64: GET_REGA(env
->y
);
730 case 65: GET_REGA(GET_PSR(env
));
731 case 66: GET_REGA(env
->wim
);
732 case 67: GET_REGA(env
->tbr
);
733 case 68: GET_REGA(env
->pc
);
734 case 69: GET_REGA(env
->npc
);
735 case 70: GET_REGA(env
->fsr
);
736 case 71: GET_REGA(0); /* csr */
737 default: GET_REGA(0);
742 GET_REG32(*((uint32_t *)&env
->fpr
[n
- 32]));
745 /* f32-f62 (double width, even numbers only) */
748 val
= (uint64_t)*((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 32]) << 32;
749 val
|= *((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 33]);
753 case 80: GET_REGL(env
->pc
);
754 case 81: GET_REGL(env
->npc
);
755 case 82: GET_REGL(((uint64_t)GET_CCR(env
) << 32) |
756 ((env
->asi
& 0xff) << 24) |
757 ((env
->pstate
& 0xfff) << 8) |
759 case 83: GET_REGL(env
->fsr
);
760 case 84: GET_REGL(env
->fprs
);
761 case 85: GET_REGL(env
->y
);
767 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
769 #if defined(TARGET_ABI32)
772 tmp
= ldl_p(mem_buf
);
776 tmp
= ldtul_p(mem_buf
);
783 /* register window */
784 env
->regwptr
[n
- 8] = tmp
;
786 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
789 *((uint32_t *)&env
->fpr
[n
- 32]) = tmp
;
791 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
793 case 64: env
->y
= tmp
; break;
794 case 65: PUT_PSR(env
, tmp
); break;
795 case 66: env
->wim
= tmp
; break;
796 case 67: env
->tbr
= tmp
; break;
797 case 68: env
->pc
= tmp
; break;
798 case 69: env
->npc
= tmp
; break;
799 case 70: env
->fsr
= tmp
; break;
807 env
->fpr
[n
] = ldfl_p(mem_buf
);
810 /* f32-f62 (double width, even numbers only) */
811 *((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 32]) = tmp
>> 32;
812 *((uint32_t *)&env
->fpr
[(n
- 64) * 2 + 33]) = tmp
;
815 case 80: env
->pc
= tmp
; break;
816 case 81: env
->npc
= tmp
; break;
818 PUT_CCR(env
, tmp
>> 32);
819 env
->asi
= (tmp
>> 24) & 0xff;
820 env
->pstate
= (tmp
>> 8) & 0xfff;
821 PUT_CWP64(env
, tmp
& 0xff);
823 case 83: env
->fsr
= tmp
; break;
824 case 84: env
->fprs
= tmp
; break;
825 case 85: env
->y
= tmp
; break;
832 #elif defined (TARGET_ARM)
834 /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
835 whatever the target description contains. Due to a historical mishap
836 the FPA registers appear in between core integer regs and the CPSR.
837 We hack round this by giving the FPA regs zero size when talking to a
839 #define NUM_CORE_REGS 26
840 #define GDB_CORE_XML "arm-core.xml"
842 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
845 /* Core integer register. */
846 GET_REG32(env
->regs
[n
]);
852 memset(mem_buf
, 0, 12);
857 /* FPA status register. */
863 GET_REG32(cpsr_read(env
));
865 /* Unknown register. */
869 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
873 tmp
= ldl_p(mem_buf
);
875 /* Mask out low bit of PC to workaround gdb bugs. This will probably
876 cause problems if we ever implement the Jazelle DBX extensions. */
881 /* Core integer register. */
885 if (n
< 24) { /* 16-23 */
886 /* FPA registers (ignored). */
893 /* FPA status register (ignored). */
899 cpsr_write (env
, tmp
, 0xffffffff);
902 /* Unknown register. */
906 #elif defined (TARGET_M68K)
908 #define NUM_CORE_REGS 18
910 #define GDB_CORE_XML "cf-core.xml"
912 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
916 GET_REG32(env
->dregs
[n
]);
919 GET_REG32(env
->aregs
[n
- 8]);
922 case 16: GET_REG32(env
->sr
);
923 case 17: GET_REG32(env
->pc
);
926 /* FP registers not included here because they vary between
927 ColdFire and m68k. Use XML bits for these. */
931 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
935 tmp
= ldl_p(mem_buf
);
942 env
->aregs
[n
- 8] = tmp
;
945 case 16: env
->sr
= tmp
; break;
946 case 17: env
->pc
= tmp
; break;
952 #elif defined (TARGET_MIPS)
954 #define NUM_CORE_REGS 73
956 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
959 GET_REGL(env
->active_tc
.gpr
[n
]);
961 if (env
->CP0_Config1
& (1 << CP0C1_FP
)) {
962 if (n
>= 38 && n
< 70) {
963 if (env
->CP0_Status
& (1 << CP0St_FR
))
964 GET_REGL(env
->active_fpu
.fpr
[n
- 38].d
);
966 GET_REGL(env
->active_fpu
.fpr
[n
- 38].w
[FP_ENDIAN_IDX
]);
969 case 70: GET_REGL((int32_t)env
->active_fpu
.fcr31
);
970 case 71: GET_REGL((int32_t)env
->active_fpu
.fcr0
);
974 case 32: GET_REGL((int32_t)env
->CP0_Status
);
975 case 33: GET_REGL(env
->active_tc
.LO
[0]);
976 case 34: GET_REGL(env
->active_tc
.HI
[0]);
977 case 35: GET_REGL(env
->CP0_BadVAddr
);
978 case 36: GET_REGL((int32_t)env
->CP0_Cause
);
979 case 37: GET_REGL(env
->active_tc
.PC
);
980 case 72: GET_REGL(0); /* fp */
981 case 89: GET_REGL((int32_t)env
->CP0_PRid
);
983 if (n
>= 73 && n
<= 88) {
984 /* 16 embedded regs. */
991 /* convert MIPS rounding mode in FCR31 to IEEE library */
992 static unsigned int ieee_rm
[] =
994 float_round_nearest_even
,
999 #define RESTORE_ROUNDING_MODE \
1000 set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
1002 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1006 tmp
= ldtul_p(mem_buf
);
1009 env
->active_tc
.gpr
[n
] = tmp
;
1010 return sizeof(target_ulong
);
1012 if (env
->CP0_Config1
& (1 << CP0C1_FP
)
1013 && n
>= 38 && n
< 73) {
1015 if (env
->CP0_Status
& (1 << CP0St_FR
))
1016 env
->active_fpu
.fpr
[n
- 38].d
= tmp
;
1018 env
->active_fpu
.fpr
[n
- 38].w
[FP_ENDIAN_IDX
] = tmp
;
1022 env
->active_fpu
.fcr31
= tmp
& 0xFF83FFFF;
1023 /* set rounding mode */
1024 RESTORE_ROUNDING_MODE
;
1025 #ifndef CONFIG_SOFTFLOAT
1026 /* no floating point exception for native float */
1027 SET_FP_ENABLE(env
->active_fpu
.fcr31
, 0);
1030 case 71: env
->active_fpu
.fcr0
= tmp
; break;
1032 return sizeof(target_ulong
);
1035 case 32: env
->CP0_Status
= tmp
; break;
1036 case 33: env
->active_tc
.LO
[0] = tmp
; break;
1037 case 34: env
->active_tc
.HI
[0] = tmp
; break;
1038 case 35: env
->CP0_BadVAddr
= tmp
; break;
1039 case 36: env
->CP0_Cause
= tmp
; break;
1040 case 37: env
->active_tc
.PC
= tmp
; break;
1041 case 72: /* fp, ignored */ break;
1045 /* Other registers are readonly. Ignore writes. */
1049 return sizeof(target_ulong
);
1051 #elif defined (TARGET_SH4)
1053 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
1054 /* FIXME: We should use XML for this. */
1056 #define NUM_CORE_REGS 59
1058 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1061 if ((env
->sr
& (SR_MD
| SR_RB
)) == (SR_MD
| SR_RB
)) {
1062 GET_REGL(env
->gregs
[n
+ 16]);
1064 GET_REGL(env
->gregs
[n
]);
1066 } else if (n
< 16) {
1067 GET_REGL(env
->gregs
[n
- 8]);
1068 } else if (n
>= 25 && n
< 41) {
1069 GET_REGL(env
->fregs
[(n
- 25) + ((env
->fpscr
& FPSCR_FR
) ? 16 : 0)]);
1070 } else if (n
>= 43 && n
< 51) {
1071 GET_REGL(env
->gregs
[n
- 43]);
1072 } else if (n
>= 51 && n
< 59) {
1073 GET_REGL(env
->gregs
[n
- (51 - 16)]);
1076 case 16: GET_REGL(env
->pc
);
1077 case 17: GET_REGL(env
->pr
);
1078 case 18: GET_REGL(env
->gbr
);
1079 case 19: GET_REGL(env
->vbr
);
1080 case 20: GET_REGL(env
->mach
);
1081 case 21: GET_REGL(env
->macl
);
1082 case 22: GET_REGL(env
->sr
);
1083 case 23: GET_REGL(env
->fpul
);
1084 case 24: GET_REGL(env
->fpscr
);
1085 case 41: GET_REGL(env
->ssr
);
1086 case 42: GET_REGL(env
->spc
);
1092 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1096 tmp
= ldl_p(mem_buf
);
1099 if ((env
->sr
& (SR_MD
| SR_RB
)) == (SR_MD
| SR_RB
)) {
1100 env
->gregs
[n
+ 16] = tmp
;
1102 env
->gregs
[n
] = tmp
;
1105 } else if (n
< 16) {
1106 env
->gregs
[n
- 8] = tmp
;
1108 } else if (n
>= 25 && n
< 41) {
1109 env
->fregs
[(n
- 25) + ((env
->fpscr
& FPSCR_FR
) ? 16 : 0)] = tmp
;
1110 } else if (n
>= 43 && n
< 51) {
1111 env
->gregs
[n
- 43] = tmp
;
1113 } else if (n
>= 51 && n
< 59) {
1114 env
->gregs
[n
- (51 - 16)] = tmp
;
1118 case 16: env
->pc
= tmp
;
1119 case 17: env
->pr
= tmp
;
1120 case 18: env
->gbr
= tmp
;
1121 case 19: env
->vbr
= tmp
;
1122 case 20: env
->mach
= tmp
;
1123 case 21: env
->macl
= tmp
;
1124 case 22: env
->sr
= tmp
;
1125 case 23: env
->fpul
= tmp
;
1126 case 24: env
->fpscr
= tmp
;
1127 case 41: env
->ssr
= tmp
;
1128 case 42: env
->spc
= tmp
;
1134 #elif defined (TARGET_CRIS)
1136 #define NUM_CORE_REGS 49
1138 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1142 srs
= env
->pregs
[PR_SRS
];
1144 GET_REG32(env
->regs
[n
]);
1147 if (n
>= 21 && n
< 32) {
1148 GET_REG32(env
->pregs
[n
- 16]);
1150 if (n
>= 33 && n
< 49) {
1151 GET_REG32(env
->sregs
[srs
][n
- 33]);
1154 case 16: GET_REG8(env
->pregs
[0]);
1155 case 17: GET_REG8(env
->pregs
[1]);
1156 case 18: GET_REG32(env
->pregs
[2]);
1157 case 19: GET_REG8(srs
);
1158 case 20: GET_REG16(env
->pregs
[4]);
1159 case 32: GET_REG32(env
->pc
);
1165 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1172 tmp
= ldl_p(mem_buf
);
1178 if (n
>= 21 && n
< 32) {
1179 env
->pregs
[n
- 16] = tmp
;
1182 /* FIXME: Should support function regs be writable? */
1186 case 18: env
->pregs
[PR_PID
] = tmp
; break;
1189 case 32: env
->pc
= tmp
; break;
1194 #elif defined (TARGET_ALPHA)
1196 #define NUM_CORE_REGS 65
1198 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1201 GET_REGL(env
->ir
[n
]);
1209 val
=*((uint64_t *)&env
->fir
[n
-32]);
1213 GET_REGL(env
->fpcr
);
1225 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1228 tmp
= ldtul_p(mem_buf
);
1234 if (n
> 31 && n
< 63) {
1235 env
->fir
[n
- 32] = ldfl_p(mem_buf
);
1246 #define NUM_CORE_REGS 0
1248 static int cpu_gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1253 static int cpu_gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int n
)
1260 static int num_g_regs
= NUM_CORE_REGS
;
1263 /* Encode data using the encoding for 'x' packets. */
1264 static int memtox(char *buf
, const char *mem
, int len
)
1272 case '#': case '$': case '*': case '}':
1284 static const char *get_feature_xml(const char *p
, const char **newp
)
1286 extern const char *const xml_builtin
[][2];
1290 static char target_xml
[1024];
1293 while (p
[len
] && p
[len
] != ':')
1298 if (strncmp(p
, "target.xml", len
) == 0) {
1299 /* Generate the XML description for this CPU. */
1300 if (!target_xml
[0]) {
1301 GDBRegisterState
*r
;
1303 snprintf(target_xml
, sizeof(target_xml
),
1304 "<?xml version=\"1.0\"?>"
1305 "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1307 "<xi:include href=\"%s\"/>",
1310 for (r
= first_cpu
->gdb_regs
; r
; r
= r
->next
) {
1311 strcat(target_xml
, "<xi:include href=\"");
1312 strcat(target_xml
, r
->xml
);
1313 strcat(target_xml
, "\"/>");
1315 strcat(target_xml
, "</target>");
1319 for (i
= 0; ; i
++) {
1320 name
= xml_builtin
[i
][0];
1321 if (!name
|| (strncmp(name
, p
, len
) == 0 && strlen(name
) == len
))
1324 return name
? xml_builtin
[i
][1] : NULL
;
1328 static int gdb_read_register(CPUState
*env
, uint8_t *mem_buf
, int reg
)
1330 GDBRegisterState
*r
;
1332 if (reg
< NUM_CORE_REGS
)
1333 return cpu_gdb_read_register(env
, mem_buf
, reg
);
1335 for (r
= env
->gdb_regs
; r
; r
= r
->next
) {
1336 if (r
->base_reg
<= reg
&& reg
< r
->base_reg
+ r
->num_regs
) {
1337 return r
->get_reg(env
, mem_buf
, reg
- r
->base_reg
);
1343 static int gdb_write_register(CPUState
*env
, uint8_t *mem_buf
, int reg
)
1345 GDBRegisterState
*r
;
1347 if (reg
< NUM_CORE_REGS
)
1348 return cpu_gdb_write_register(env
, mem_buf
, reg
);
1350 for (r
= env
->gdb_regs
; r
; r
= r
->next
) {
1351 if (r
->base_reg
<= reg
&& reg
< r
->base_reg
+ r
->num_regs
) {
1352 return r
->set_reg(env
, mem_buf
, reg
- r
->base_reg
);
1358 /* Register a supplemental set of CPU registers. If g_pos is nonzero it
1359 specifies the first register number and these registers are included in
1360 a standard "g" packet. Direction is relative to gdb, i.e. get_reg is
1361 gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1364 void gdb_register_coprocessor(CPUState
* env
,
1365 gdb_reg_cb get_reg
, gdb_reg_cb set_reg
,
1366 int num_regs
, const char *xml
, int g_pos
)
1368 GDBRegisterState
*s
;
1369 GDBRegisterState
**p
;
1370 static int last_reg
= NUM_CORE_REGS
;
1372 s
= (GDBRegisterState
*)qemu_mallocz(sizeof(GDBRegisterState
));
1373 s
->base_reg
= last_reg
;
1374 s
->num_regs
= num_regs
;
1375 s
->get_reg
= get_reg
;
1376 s
->set_reg
= set_reg
;
1380 /* Check for duplicates. */
1381 if (strcmp((*p
)->xml
, xml
) == 0)
1385 /* Add to end of list. */
1386 last_reg
+= num_regs
;
1389 if (g_pos
!= s
->base_reg
) {
1390 fprintf(stderr
, "Error: Bad gdb register numbering for '%s'\n"
1391 "Expected %d got %d\n", xml
, g_pos
, s
->base_reg
);
1393 num_g_regs
= last_reg
;
1398 /* GDB breakpoint/watchpoint types */
1399 #define GDB_BREAKPOINT_SW 0
1400 #define GDB_BREAKPOINT_HW 1
1401 #define GDB_WATCHPOINT_WRITE 2
1402 #define GDB_WATCHPOINT_READ 3
1403 #define GDB_WATCHPOINT_ACCESS 4
1405 #ifndef CONFIG_USER_ONLY
1406 static const int xlat_gdb_type
[] = {
1407 [GDB_WATCHPOINT_WRITE
] = BP_GDB
| BP_MEM_WRITE
,
1408 [GDB_WATCHPOINT_READ
] = BP_GDB
| BP_MEM_READ
,
1409 [GDB_WATCHPOINT_ACCESS
] = BP_GDB
| BP_MEM_ACCESS
,
1413 static int gdb_breakpoint_insert(target_ulong addr
, target_ulong len
, int type
)
1419 case GDB_BREAKPOINT_SW
:
1420 case GDB_BREAKPOINT_HW
:
1421 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1422 err
= cpu_breakpoint_insert(env
, addr
, BP_GDB
, NULL
);
1427 #ifndef CONFIG_USER_ONLY
1428 case GDB_WATCHPOINT_WRITE
:
1429 case GDB_WATCHPOINT_READ
:
1430 case GDB_WATCHPOINT_ACCESS
:
1431 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1432 err
= cpu_watchpoint_insert(env
, addr
, len
, xlat_gdb_type
[type
],
1444 static int gdb_breakpoint_remove(target_ulong addr
, target_ulong len
, int type
)
1450 case GDB_BREAKPOINT_SW
:
1451 case GDB_BREAKPOINT_HW
:
1452 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1453 err
= cpu_breakpoint_remove(env
, addr
, BP_GDB
);
1458 #ifndef CONFIG_USER_ONLY
1459 case GDB_WATCHPOINT_WRITE
:
1460 case GDB_WATCHPOINT_READ
:
1461 case GDB_WATCHPOINT_ACCESS
:
1462 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1463 err
= cpu_watchpoint_remove(env
, addr
, len
, xlat_gdb_type
[type
]);
1474 static void gdb_breakpoint_remove_all(void)
1478 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
) {
1479 cpu_breakpoint_remove_all(env
, BP_GDB
);
1480 #ifndef CONFIG_USER_ONLY
1481 cpu_watchpoint_remove_all(env
, BP_GDB
);
1486 static int gdb_handle_packet(GDBState
*s
, const char *line_buf
)
1490 int ch
, reg_size
, type
, res
, thread
;
1491 char buf
[MAX_PACKET_LENGTH
];
1492 uint8_t mem_buf
[MAX_PACKET_LENGTH
];
1494 target_ulong addr
, len
;
1497 printf("command='%s'\n", line_buf
);
1503 /* TODO: Make this return the correct value for user-mode. */
1504 snprintf(buf
, sizeof(buf
), "T%02xthread:%02x;", GDB_SIGNAL_TRAP
,
1505 s
->c_cpu
->cpu_index
+1);
1507 /* Remove all the breakpoints when this query is issued,
1508 * because gdb is doing and initial connect and the state
1509 * should be cleaned up.
1511 gdb_breakpoint_remove_all();
1515 addr
= strtoull(p
, (char **)&p
, 16);
1516 #if defined(TARGET_I386)
1517 s
->c_cpu
->eip
= addr
;
1518 #elif defined (TARGET_PPC)
1519 s
->c_cpu
->nip
= addr
;
1520 #elif defined (TARGET_SPARC)
1521 s
->c_cpu
->pc
= addr
;
1522 s
->c_cpu
->npc
= addr
+ 4;
1523 #elif defined (TARGET_ARM)
1524 s
->c_cpu
->regs
[15] = addr
;
1525 #elif defined (TARGET_SH4)
1526 s
->c_cpu
->pc
= addr
;
1527 #elif defined (TARGET_MIPS)
1528 s
->c_cpu
->active_tc
.PC
= addr
;
1529 #elif defined (TARGET_CRIS)
1530 s
->c_cpu
->pc
= addr
;
1531 #elif defined (TARGET_ALPHA)
1532 s
->c_cpu
->pc
= addr
;
1539 s
->signal
= gdb_signal_to_target (strtoul(p
, (char **)&p
, 16));
1540 if (s
->signal
== -1)
1545 /* Kill the target */
1546 fprintf(stderr
, "\nQEMU: Terminated via GDBstub\n");
1550 gdb_breakpoint_remove_all();
1552 put_packet(s
, "OK");
1556 addr
= strtoull(p
, (char **)&p
, 16);
1557 #if defined(TARGET_I386)
1558 s
->c_cpu
->eip
= addr
;
1559 #elif defined (TARGET_PPC)
1560 s
->c_cpu
->nip
= addr
;
1561 #elif defined (TARGET_SPARC)
1562 s
->c_cpu
->pc
= addr
;
1563 s
->c_cpu
->npc
= addr
+ 4;
1564 #elif defined (TARGET_ARM)
1565 s
->c_cpu
->regs
[15] = addr
;
1566 #elif defined (TARGET_SH4)
1567 s
->c_cpu
->pc
= addr
;
1568 #elif defined (TARGET_MIPS)
1569 s
->c_cpu
->active_tc
.PC
= addr
;
1570 #elif defined (TARGET_CRIS)
1571 s
->c_cpu
->pc
= addr
;
1572 #elif defined (TARGET_ALPHA)
1573 s
->c_cpu
->pc
= addr
;
1576 cpu_single_step(s
->c_cpu
, sstep_flags
);
1584 ret
= strtoull(p
, (char **)&p
, 16);
1587 err
= strtoull(p
, (char **)&p
, 16);
1594 if (gdb_current_syscall_cb
)
1595 gdb_current_syscall_cb(s
->c_cpu
, ret
, err
);
1597 put_packet(s
, "T02");
1605 for (addr
= 0; addr
< num_g_regs
; addr
++) {
1606 reg_size
= gdb_read_register(s
->g_cpu
, mem_buf
+ len
, addr
);
1609 memtohex(buf
, mem_buf
, len
);
1613 registers
= mem_buf
;
1614 len
= strlen(p
) / 2;
1615 hextomem((uint8_t *)registers
, p
, len
);
1616 for (addr
= 0; addr
< num_g_regs
&& len
> 0; addr
++) {
1617 reg_size
= gdb_write_register(s
->g_cpu
, registers
, addr
);
1619 registers
+= reg_size
;
1621 put_packet(s
, "OK");
1624 addr
= strtoull(p
, (char **)&p
, 16);
1627 len
= strtoull(p
, NULL
, 16);
1628 if (cpu_memory_rw_debug(s
->g_cpu
, addr
, mem_buf
, len
, 0) != 0) {
1629 put_packet (s
, "E14");
1631 memtohex(buf
, mem_buf
, len
);
1636 addr
= strtoull(p
, (char **)&p
, 16);
1639 len
= strtoull(p
, (char **)&p
, 16);
1642 hextomem(mem_buf
, p
, len
);
1643 if (cpu_memory_rw_debug(s
->g_cpu
, addr
, mem_buf
, len
, 1) != 0)
1644 put_packet(s
, "E14");
1646 put_packet(s
, "OK");
1649 /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1650 This works, but can be very slow. Anything new enough to
1651 understand XML also knows how to use this properly. */
1653 goto unknown_command
;
1654 addr
= strtoull(p
, (char **)&p
, 16);
1655 reg_size
= gdb_read_register(s
->g_cpu
, mem_buf
, addr
);
1657 memtohex(buf
, mem_buf
, reg_size
);
1660 put_packet(s
, "E14");
1665 goto unknown_command
;
1666 addr
= strtoull(p
, (char **)&p
, 16);
1669 reg_size
= strlen(p
) / 2;
1670 hextomem(mem_buf
, p
, reg_size
);
1671 gdb_write_register(s
->g_cpu
, mem_buf
, addr
);
1672 put_packet(s
, "OK");
1676 type
= strtoul(p
, (char **)&p
, 16);
1679 addr
= strtoull(p
, (char **)&p
, 16);
1682 len
= strtoull(p
, (char **)&p
, 16);
1684 res
= gdb_breakpoint_insert(addr
, len
, type
);
1686 res
= gdb_breakpoint_remove(addr
, len
, type
);
1688 put_packet(s
, "OK");
1689 else if (res
== -ENOSYS
)
1692 put_packet(s
, "E22");
1696 thread
= strtoull(p
, (char **)&p
, 16);
1697 if (thread
== -1 || thread
== 0) {
1698 put_packet(s
, "OK");
1701 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
)
1702 if (env
->cpu_index
+ 1 == thread
)
1705 put_packet(s
, "E22");
1711 put_packet(s
, "OK");
1715 put_packet(s
, "OK");
1718 put_packet(s
, "E22");
1723 thread
= strtoull(p
, (char **)&p
, 16);
1724 #ifndef CONFIG_USER_ONLY
1725 if (thread
> 0 && thread
< smp_cpus
+ 1)
1729 put_packet(s
, "OK");
1731 put_packet(s
, "E22");
1735 /* parse any 'q' packets here */
1736 if (!strcmp(p
,"qemu.sstepbits")) {
1737 /* Query Breakpoint bit definitions */
1738 snprintf(buf
, sizeof(buf
), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1744 } else if (strncmp(p
,"qemu.sstep",10) == 0) {
1745 /* Display or change the sstep_flags */
1748 /* Display current setting */
1749 snprintf(buf
, sizeof(buf
), "0x%x", sstep_flags
);
1754 type
= strtoul(p
, (char **)&p
, 16);
1756 put_packet(s
, "OK");
1758 } else if (strcmp(p
,"C") == 0) {
1759 /* "Current thread" remains vague in the spec, so always return
1760 * the first CPU (gdb returns the first thread). */
1761 put_packet(s
, "QC1");
1763 } else if (strcmp(p
,"fThreadInfo") == 0) {
1764 s
->query_cpu
= first_cpu
;
1765 goto report_cpuinfo
;
1766 } else if (strcmp(p
,"sThreadInfo") == 0) {
1769 snprintf(buf
, sizeof(buf
), "m%x", s
->query_cpu
->cpu_index
+1);
1771 s
->query_cpu
= s
->query_cpu
->next_cpu
;
1775 } else if (strncmp(p
,"ThreadExtraInfo,", 16) == 0) {
1776 thread
= strtoull(p
+16, (char **)&p
, 16);
1777 for (env
= first_cpu
; env
!= NULL
; env
= env
->next_cpu
)
1778 if (env
->cpu_index
+ 1 == thread
) {
1779 len
= snprintf((char *)mem_buf
, sizeof(mem_buf
),
1780 "CPU#%d [%s]", env
->cpu_index
,
1781 env
->halted
? "halted " : "running");
1782 memtohex(buf
, mem_buf
, len
);
1788 #ifdef CONFIG_LINUX_USER
1789 else if (strncmp(p
, "Offsets", 7) == 0) {
1790 TaskState
*ts
= s
->c_cpu
->opaque
;
1792 snprintf(buf
, sizeof(buf
),
1793 "Text=" TARGET_ABI_FMT_lx
";Data=" TARGET_ABI_FMT_lx
1794 ";Bss=" TARGET_ABI_FMT_lx
,
1795 ts
->info
->code_offset
,
1796 ts
->info
->data_offset
,
1797 ts
->info
->data_offset
);
1802 if (strncmp(p
, "Supported", 9) == 0) {
1803 snprintf(buf
, sizeof(buf
), "PacketSize=%x", MAX_PACKET_LENGTH
);
1805 strcat(buf
, ";qXfer:features:read+");
1811 if (strncmp(p
, "Xfer:features:read:", 19) == 0) {
1813 target_ulong total_len
;
1817 xml
= get_feature_xml(p
, &p
);
1819 snprintf(buf
, sizeof(buf
), "E00");
1826 addr
= strtoul(p
, (char **)&p
, 16);
1829 len
= strtoul(p
, (char **)&p
, 16);
1831 total_len
= strlen(xml
);
1832 if (addr
> total_len
) {
1833 snprintf(buf
, sizeof(buf
), "E00");
1837 if (len
> (MAX_PACKET_LENGTH
- 5) / 2)
1838 len
= (MAX_PACKET_LENGTH
- 5) / 2;
1839 if (len
< total_len
- addr
) {
1841 len
= memtox(buf
+ 1, xml
+ addr
, len
);
1844 len
= memtox(buf
+ 1, xml
+ addr
, total_len
- addr
);
1846 put_packet_binary(s
, buf
, len
+ 1);
1850 /* Unrecognised 'q' command. */
1851 goto unknown_command
;
1855 /* put empty packet */
1863 void gdb_set_stop_cpu(CPUState
*env
)
1865 gdbserver_state
->c_cpu
= env
;
1866 gdbserver_state
->g_cpu
= env
;
1869 #ifndef CONFIG_USER_ONLY
1870 static void gdb_vm_state_change(void *opaque
, int running
, int reason
)
1872 GDBState
*s
= gdbserver_state
;
1873 CPUState
*env
= s
->c_cpu
;
1878 if (running
|| (reason
!= EXCP_DEBUG
&& reason
!= EXCP_INTERRUPT
) ||
1879 s
->state
== RS_SYSCALL
)
1882 /* disable single step if it was enable */
1883 cpu_single_step(env
, 0);
1885 if (reason
== EXCP_DEBUG
) {
1886 if (env
->watchpoint_hit
) {
1887 switch (env
->watchpoint_hit
->flags
& BP_MEM_ACCESS
) {
1898 snprintf(buf
, sizeof(buf
),
1899 "T%02xthread:%02x;%swatch:" TARGET_FMT_lx
";",
1900 GDB_SIGNAL_TRAP
, env
->cpu_index
+1, type
,
1901 env
->watchpoint_hit
->vaddr
);
1903 env
->watchpoint_hit
= NULL
;
1907 ret
= GDB_SIGNAL_TRAP
;
1909 ret
= GDB_SIGNAL_INT
;
1911 snprintf(buf
, sizeof(buf
), "T%02xthread:%02x;", ret
, env
->cpu_index
+1);
1916 /* Send a gdb syscall request.
1917 This accepts limited printf-style format specifiers, specifically:
1918 %x - target_ulong argument printed in hex.
1919 %lx - 64-bit argument printed in hex.
1920 %s - string pointer (target_ulong) and length (int) pair. */
1921 void gdb_do_syscall(gdb_syscall_complete_cb cb
, const char *fmt
, ...)
1930 s
= gdbserver_state
;
1933 gdb_current_syscall_cb
= cb
;
1934 s
->state
= RS_SYSCALL
;
1935 #ifndef CONFIG_USER_ONLY
1936 vm_stop(EXCP_DEBUG
);
1947 addr
= va_arg(va
, target_ulong
);
1948 p
+= snprintf(p
, &buf
[sizeof(buf
)] - p
, TARGET_FMT_lx
, addr
);
1951 if (*(fmt
++) != 'x')
1953 i64
= va_arg(va
, uint64_t);
1954 p
+= snprintf(p
, &buf
[sizeof(buf
)] - p
, "%" PRIx64
, i64
);
1957 addr
= va_arg(va
, target_ulong
);
1958 p
+= snprintf(p
, &buf
[sizeof(buf
)] - p
, TARGET_FMT_lx
"/%x",
1959 addr
, va_arg(va
, int));
1963 fprintf(stderr
, "gdbstub: Bad syscall format string '%s'\n",
1974 #ifdef CONFIG_USER_ONLY
1975 gdb_handlesig(s
->c_cpu
, 0);
1977 cpu_interrupt(s
->c_cpu
, CPU_INTERRUPT_EXIT
);
1981 static void gdb_read_byte(GDBState
*s
, int ch
)
1986 #ifndef CONFIG_USER_ONLY
1987 if (s
->last_packet_len
) {
1988 /* Waiting for a response to the last packet. If we see the start
1989 of a new command then abandon the previous response. */
1992 printf("Got NACK, retransmitting\n");
1994 put_buffer(s
, (uint8_t *)s
->last_packet
, s
->last_packet_len
);
1998 printf("Got ACK\n");
2000 printf("Got '%c' when expecting ACK/NACK\n", ch
);
2002 if (ch
== '+' || ch
== '$')
2003 s
->last_packet_len
= 0;
2008 /* when the CPU is running, we cannot do anything except stop
2009 it when receiving a char */
2010 vm_stop(EXCP_INTERRUPT
);
2017 s
->line_buf_index
= 0;
2018 s
->state
= RS_GETLINE
;
2023 s
->state
= RS_CHKSUM1
;
2024 } else if (s
->line_buf_index
>= sizeof(s
->line_buf
) - 1) {
2027 s
->line_buf
[s
->line_buf_index
++] = ch
;
2031 s
->line_buf
[s
->line_buf_index
] = '\0';
2032 s
->line_csum
= fromhex(ch
) << 4;
2033 s
->state
= RS_CHKSUM2
;
2036 s
->line_csum
|= fromhex(ch
);
2038 for(i
= 0; i
< s
->line_buf_index
; i
++) {
2039 csum
+= s
->line_buf
[i
];
2041 if (s
->line_csum
!= (csum
& 0xff)) {
2043 put_buffer(s
, &reply
, 1);
2047 put_buffer(s
, &reply
, 1);
2048 s
->state
= gdb_handle_packet(s
, s
->line_buf
);
2057 #ifdef CONFIG_USER_ONLY
2063 s
= gdbserver_state
;
2065 if (gdbserver_fd
< 0 || s
->fd
< 0)
2072 gdb_handlesig (CPUState
*env
, int sig
)
2078 s
= gdbserver_state
;
2079 if (gdbserver_fd
< 0 || s
->fd
< 0)
2082 /* disable single step if it was enabled */
2083 cpu_single_step(env
, 0);
2088 snprintf(buf
, sizeof(buf
), "S%02x", target_signal_to_gdb (sig
));
2091 /* put_packet() might have detected that the peer terminated the
2098 s
->running_state
= 0;
2099 while (s
->running_state
== 0) {
2100 n
= read (s
->fd
, buf
, 256);
2105 for (i
= 0; i
< n
; i
++)
2106 gdb_read_byte (s
, buf
[i
]);
2108 else if (n
== 0 || errno
!= EAGAIN
)
2110 /* XXX: Connection closed. Should probably wait for annother
2111 connection before continuing. */
2120 /* Tell the remote gdb that the process has exited. */
2121 void gdb_exit(CPUState
*env
, int code
)
2126 s
= gdbserver_state
;
2127 if (gdbserver_fd
< 0 || s
->fd
< 0)
2130 snprintf(buf
, sizeof(buf
), "W%02x", code
);
2134 /* Tell the remote gdb that the process has exited due to SIG. */
2135 void gdb_signalled(CPUState
*env
, int sig
)
2140 s
= gdbserver_state
;
2141 if (gdbserver_fd
< 0 || s
->fd
< 0)
2144 snprintf(buf
, sizeof(buf
), "X%02x", target_signal_to_gdb (sig
));
2148 static void gdb_accept(void)
2151 struct sockaddr_in sockaddr
;
2156 len
= sizeof(sockaddr
);
2157 fd
= accept(gdbserver_fd
, (struct sockaddr
*)&sockaddr
, &len
);
2158 if (fd
< 0 && errno
!= EINTR
) {
2161 } else if (fd
>= 0) {
2166 /* set short latency */
2168 setsockopt(fd
, IPPROTO_TCP
, TCP_NODELAY
, (char *)&val
, sizeof(val
));
2170 s
= qemu_mallocz(sizeof(GDBState
));
2177 memset (s
, 0, sizeof (GDBState
));
2178 s
->c_cpu
= first_cpu
;
2179 s
->g_cpu
= first_cpu
;
2183 gdbserver_state
= s
;
2185 fcntl(fd
, F_SETFL
, O_NONBLOCK
);
2188 static int gdbserver_open(int port
)
2190 struct sockaddr_in sockaddr
;
2193 fd
= socket(PF_INET
, SOCK_STREAM
, 0);
2199 /* allow fast reuse */
2201 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (char *)&val
, sizeof(val
));
2203 sockaddr
.sin_family
= AF_INET
;
2204 sockaddr
.sin_port
= htons(port
);
2205 sockaddr
.sin_addr
.s_addr
= 0;
2206 ret
= bind(fd
, (struct sockaddr
*)&sockaddr
, sizeof(sockaddr
));
2211 ret
= listen(fd
, 0);
2219 int gdbserver_start(int port
)
2221 gdbserver_fd
= gdbserver_open(port
);
2222 if (gdbserver_fd
< 0)
2224 /* accept connections */
2229 /* Disable gdb stub for child processes. */
2230 void gdbserver_fork(CPUState
*env
)
2232 GDBState
*s
= gdbserver_state
;
2233 if (gdbserver_fd
< 0 || s
->fd
< 0)
2237 cpu_breakpoint_remove_all(env
, BP_GDB
);
2238 cpu_watchpoint_remove_all(env
, BP_GDB
);
2241 static int gdb_chr_can_receive(void *opaque
)
2243 /* We can handle an arbitrarily large amount of data.
2244 Pick the maximum packet size, which is as good as anything. */
2245 return MAX_PACKET_LENGTH
;
2248 static void gdb_chr_receive(void *opaque
, const uint8_t *buf
, int size
)
2252 for (i
= 0; i
< size
; i
++) {
2253 gdb_read_byte(gdbserver_state
, buf
[i
]);
2257 static void gdb_chr_event(void *opaque
, int event
)
2260 case CHR_EVENT_RESET
:
2261 vm_stop(EXCP_INTERRUPT
);
2269 int gdbserver_start(const char *port
)
2272 char gdbstub_port_name
[128];
2275 CharDriverState
*chr
;
2277 if (!port
|| !*port
)
2280 port_num
= strtol(port
, &p
, 10);
2282 /* A numeric value is interpreted as a port number. */
2283 snprintf(gdbstub_port_name
, sizeof(gdbstub_port_name
),
2284 "tcp::%d,nowait,nodelay,server", port_num
);
2285 port
= gdbstub_port_name
;
2288 chr
= qemu_chr_open("gdb", port
, NULL
);
2292 s
= qemu_mallocz(sizeof(GDBState
));
2296 s
->c_cpu
= first_cpu
;
2297 s
->g_cpu
= first_cpu
;
2299 gdbserver_state
= s
;
2300 qemu_chr_add_handlers(chr
, gdb_chr_can_receive
, gdb_chr_receive
,
2301 gdb_chr_event
, NULL
);
2302 qemu_add_vm_change_state_handler(gdb_vm_state_change
, NULL
);