gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #include "qemu-common.h"
  22 #ifdef CONFIG_USER_ONLY
  23 #include <stdlib.h>
  24 #include <stdio.h>
  25 #include <stdarg.h>
  26 #include <string.h>
  27 #include <errno.h>
  28 #include <unistd.h>
  29 #include <fcntl.h>
  30
  31 #include "qemu.h"
  32 #else
  33 #include "qemu-char.h"
  34 #include "sysemu.h"
  35 #include "gdbstub.h"
  36 #endif
  37
  38 #define MAX_PACKET_LENGTH 4096
  39
  40 #include "qemu_socket.h"
  41 #ifdef _WIN32
  42 /* XXX: these constants may be independent of the host ones even for Unix */
  43 #ifndef SIGTRAP
  44 #define SIGTRAP 5
  45 #endif
  46 #ifndef SIGINT
  47 #define SIGINT 2
  48 #endif
  49 #else
  50 #include <signal.h>
  51 #endif
  52
  53 //#define DEBUG_GDB
  54
  55 typedef struct GDBRegisterState {
  56     int base_reg;
  57     int num_regs;
  58     gdb_reg_cb get_reg;
  59     gdb_reg_cb set_reg;
  60     const char *xml;
  61     struct GDBRegisterState *next;
  62 } GDBRegisterState;
  63
  64 enum RSState {
  65     RS_IDLE,
  66     RS_GETLINE,
  67     RS_CHKSUM1,
  68     RS_CHKSUM2,
  69     RS_SYSCALL,
  70 };
  71 typedef struct GDBState {
  72     CPUState *env; /* current CPU */
  73     enum RSState state; /* parsing state */
  74     char line_buf[MAX_PACKET_LENGTH];
  75     int line_buf_index;
  76     int line_csum;
  77     uint8_t last_packet[MAX_PACKET_LENGTH + 4];
  78     int last_packet_len;
  79     int signal;
  80 #ifdef CONFIG_USER_ONLY
  81     int fd;
  82     int running_state;
  83 #else
  84     CharDriverState *chr;
  85 #endif
  86 } GDBState;
  87
  88 /* By default use no IRQs and no timers while single stepping so as to
  89  * make single stepping like an ICE HW step.
  90  */
  91 static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
  92
  93 /* This is an ugly hack to cope with both new and old gdb.
  94    If gdb sends qXfer:features:read then assume we're talking to a newish
  95    gdb that understands target descriptions.  */
  96 static int gdb_has_xml;
  97
  98 #ifdef CONFIG_USER_ONLY
  99 /* XXX: This is not thread safe.  Do we care?  */
 100 static int gdbserver_fd = -1;
 101
 102 /* XXX: remove this hack.  */
 103 static GDBState gdbserver_state;
 104
 105 static int get_char(GDBState *s)
 106 {
 107     uint8_t ch;
 108     int ret;
 109
 110     for(;;) {
 111         ret = recv(s->fd, &ch, 1, 0);
 112         if (ret < 0) {
 113             if (errno == ECONNRESET)
 114                 s->fd = -1;
 115             if (errno != EINTR && errno != EAGAIN)
 116                 return -1;
 117         } else if (ret == 0) {
 118             close(s->fd);
 119             s->fd = -1;
 120             return -1;
 121         } else {
 122             break;
 123         }
 124     }
 125     return ch;
 126 }
 127 #endif
 128
 129 /* GDB stub state for use by semihosting syscalls.  */
 130 static GDBState *gdb_syscall_state;
 131 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 132
 133 enum {
 134     GDB_SYS_UNKNOWN,
 135     GDB_SYS_ENABLED,
 136     GDB_SYS_DISABLED,
 137 } gdb_syscall_mode;
 138
 139 /* If gdb is connected when the first semihosting syscall occurs then use
 140    remote gdb syscalls.  Otherwise use native file IO.  */
 141 int use_gdb_syscalls(void)
 142 {
 143     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 144         gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
 145                                               : GDB_SYS_DISABLED);
 146     }
 147     return gdb_syscall_mode == GDB_SYS_ENABLED;
 148 }
 149
 150 /* Resume execution.  */
 151 static inline void gdb_continue(GDBState *s)
 152 {
 153 #ifdef CONFIG_USER_ONLY
 154     s->running_state = 1;
 155 #else
 156     vm_start();
 157 #endif
 158 }
 159
 160 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 161 {
 162 #ifdef CONFIG_USER_ONLY
 163     int ret;
 164
 165     while (len > 0) {
 166         ret = send(s->fd, buf, len, 0);
 167         if (ret < 0) {
 168             if (errno != EINTR && errno != EAGAIN)
 169                 return;
 170         } else {
 171             buf += ret;
 172             len -= ret;
 173         }
 174     }
 175 #else
 176     qemu_chr_write(s->chr, buf, len);
 177 #endif
 178 }
 179
 180 static inline int fromhex(int v)
 181 {
 182     if (v >= '0' && v <= '9')
 183         return v - '0';
 184     else if (v >= 'A' && v <= 'F')
 185         return v - 'A' + 10;
 186     else if (v >= 'a' && v <= 'f')
 187         return v - 'a' + 10;
 188     else
 189         return 0;
 190 }
 191
 192 static inline int tohex(int v)
 193 {
 194     if (v < 10)
 195         return v + '0';
 196     else
 197         return v - 10 + 'a';
 198 }
 199
 200 static void memtohex(char *buf, const uint8_t *mem, int len)
 201 {
 202     int i, c;
 203     char *q;
 204     q = buf;
 205     for(i = 0; i < len; i++) {
 206         c = mem[i];
 207         *q++ = tohex(c >> 4);
 208         *q++ = tohex(c & 0xf);
 209     }
 210     *q = '\0';
 211 }
 212
 213 static void hextomem(uint8_t *mem, const char *buf, int len)
 214 {
 215     int i;
 216
 217     for(i = 0; i < len; i++) {
 218         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 219         buf += 2;
 220     }
 221 }
 222
 223 /* return -1 if error, 0 if OK */
 224 static int put_packet_binary(GDBState *s, const char *buf, int len)
 225 {
 226     int csum, i;
 227     uint8_t *p;
 228
 229     for(;;) {
 230         p = s->last_packet;
 231         *(p++) = '$';
 232         memcpy(p, buf, len);
 233         p += len;
 234         csum = 0;
 235         for(i = 0; i < len; i++) {
 236             csum += buf[i];
 237         }
 238         *(p++) = '#';
 239         *(p++) = tohex((csum >> 4) & 0xf);
 240         *(p++) = tohex((csum) & 0xf);
 241
 242         s->last_packet_len = p - s->last_packet;
 243         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 244
 245 #ifdef CONFIG_USER_ONLY
 246         i = get_char(s);
 247         if (i < 0)
 248             return -1;
 249         if (i == '+')
 250             break;
 251 #else
 252         break;
 253 #endif
 254     }
 255     return 0;
 256 }
 257
 258 /* return -1 if error, 0 if OK */
 259 static int put_packet(GDBState *s, const char *buf)
 260 {
 261 #ifdef DEBUG_GDB
 262     printf("reply='%s'\n", buf);
 263 #endif
 264
 265     return put_packet_binary(s, buf, strlen(buf));
 266 }
 267
 268 /* The GDB remote protocol transfers values in target byte order.  This means
 269    we can use the raw memory access routines to access the value buffer.
 270    Conveniently, these also handle the case where the buffer is mis-aligned.
 271  */
 272 #define GET_REG8(val) do { \
 273     stb_p(mem_buf, val); \
 274     return 1; \
 275     } while(0)
 276 #define GET_REG16(val) do { \
 277     stw_p(mem_buf, val); \
 278     return 2; \
 279     } while(0)
 280 #define GET_REG32(val) do { \
 281     stl_p(mem_buf, val); \
 282     return 4; \
 283     } while(0)
 284 #define GET_REG64(val) do { \
 285     stq_p(mem_buf, val); \
 286     return 8; \
 287     } while(0)
 288
 289 #if TARGET_LONG_BITS == 64
 290 #define GET_REGL(val) GET_REG64(val)
 291 #define ldtul_p(addr) ldq_p(addr)
 292 #else
 293 #define GET_REGL(val) GET_REG32(val)
 294 #define ldtul_p(addr) ldl_p(addr)
 295 #endif
 296
 297 #if defined(TARGET_I386)
 298
 299 #ifdef TARGET_X86_64
 300 static const int gpr_map[16] = {
 301     R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
 302     8, 9, 10, 11, 12, 13, 14, 15
 303 };
 304 #else
 305 static const int gpr_map[8] = {0, 1, 2, 3, 4, 5, 6, 7};
 306 #endif
 307
 308 #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
 309
 310 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 311 {
 312     if (n < CPU_NB_REGS) {
 313         GET_REGL(env->regs[gpr_map[n]]);
 314     } else if (n >= CPU_NB_REGS + 8 && n < CPU_NB_REGS + 16) {
 315         /* FIXME: byteswap float values.  */
 316 #ifdef USE_X86LDOUBLE
 317         memcpy(mem_buf, &env->fpregs[n - (CPU_NB_REGS + 8)], 10);
 318 #else
 319         memset(mem_buf, 0, 10);
 320 #endif
 321         return 10;
 322     } else if (n >= CPU_NB_REGS + 24) {
 323         n -= CPU_NB_REGS + 24;
 324         if (n < CPU_NB_REGS) {
 325             stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
 326             stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
 327             return 16;
 328         } else if (n == CPU_NB_REGS) {
 329             GET_REG32(env->mxcsr);
 330         }
 331     } else {
 332         n -= CPU_NB_REGS;
 333         switch (n) {
 334         case 0: GET_REGL(env->eip);
 335         case 1: GET_REG32(env->eflags);
 336         case 2: GET_REG32(env->segs[R_CS].selector);
 337         case 3: GET_REG32(env->segs[R_SS].selector);
 338         case 4: GET_REG32(env->segs[R_DS].selector);
 339         case 5: GET_REG32(env->segs[R_ES].selector);
 340         case 6: GET_REG32(env->segs[R_FS].selector);
 341         case 7: GET_REG32(env->segs[R_GS].selector);
 342         /* 8...15 x87 regs.  */
 343         case 16: GET_REG32(env->fpuc);
 344         case 17: GET_REG32((env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11);
 345         case 18: GET_REG32(0); /* ftag */
 346         case 19: GET_REG32(0); /* fiseg */
 347         case 20: GET_REG32(0); /* fioff */
 348         case 21: GET_REG32(0); /* foseg */
 349         case 22: GET_REG32(0); /* fooff */
 350         case 23: GET_REG32(0); /* fop */
 351         /* 24+ xmm regs.  */
 352         }
 353     }
 354     return 0;
 355 }
 356
 357 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int i)
 358 {
 359     uint32_t tmp;
 360
 361     if (i < CPU_NB_REGS) {
 362         env->regs[gpr_map[i]] = ldtul_p(mem_buf);
 363         return sizeof(target_ulong);
 364     } else if (i >= CPU_NB_REGS + 8 && i < CPU_NB_REGS + 16) {
 365         i -= CPU_NB_REGS + 8;
 366 #ifdef USE_X86LDOUBLE
 367         memcpy(&env->fpregs[i], mem_buf, 10);
 368 #endif
 369         return 10;
 370     } else if (i >= CPU_NB_REGS + 24) {
 371         i -= CPU_NB_REGS + 24;
 372         if (i < CPU_NB_REGS) {
 373             env->xmm_regs[i].XMM_Q(0) = ldq_p(mem_buf);
 374             env->xmm_regs[i].XMM_Q(1) = ldq_p(mem_buf + 8);
 375             return 16;
 376         } else if (i == CPU_NB_REGS) {
 377             env->mxcsr = ldl_p(mem_buf);
 378             return 4;
 379         }
 380     } else {
 381         i -= CPU_NB_REGS;
 382         switch (i) {
 383         case 0: env->eip = ldtul_p(mem_buf); return sizeof(target_ulong);
 384         case 1: env->eflags = ldl_p(mem_buf); return 4;
 385 #if defined(CONFIG_USER_ONLY)
 386 #define LOAD_SEG(index, sreg)\
 387             tmp = ldl_p(mem_buf);\
 388             if (tmp != env->segs[sreg].selector)\
 389                 cpu_x86_load_seg(env, sreg, tmp);
 390 #else
 391 /* FIXME: Honor segment registers.  Needs to avoid raising an exception
 392    when the selector is invalid.  */
 393 #define LOAD_SEG(index, sreg) do {} while(0)
 394 #endif
 395         case 2: LOAD_SEG(10, R_CS); return 4;
 396         case 3: LOAD_SEG(11, R_SS); return 4;
 397         case 4: LOAD_SEG(12, R_DS); return 4;
 398         case 5: LOAD_SEG(13, R_ES); return 4;
 399         case 6: LOAD_SEG(14, R_FS); return 4;
 400         case 7: LOAD_SEG(15, R_GS); return 4;
 401         /* 8...15 x87 regs.  */
 402         case 16: env->fpuc = ldl_p(mem_buf); return 4;
 403         case 17:
 404                  tmp = ldl_p(mem_buf);
 405                  env->fpstt = (tmp >> 11) & 7;
 406                  env->fpus = tmp & ~0x3800;
 407                  return 4;
 408         case 18: /* ftag */ return 4;
 409         case 19: /* fiseg */ return 4;
 410         case 20: /* fioff */ return 4;
 411         case 21: /* foseg */ return 4;
 412         case 22: /* fooff */ return 4;
 413         case 23: /* fop */ return 4;
 414         /* 24+ xmm regs.  */
 415         }
 416     }
 417     /* Unrecognised register.  */
 418     return 0;
 419 }
 420
 421 #elif defined (TARGET_PPC)
 422
 423 #define NUM_CORE_REGS 71
 424
 425 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 426 {
 427     if (n < 32) {
 428         /* gprs */
 429         GET_REGL(env->gpr[n]);
 430     } else if (n < 64) {
 431         /* fprs */
 432         stfq_p(mem_buf, env->fpr[n]);
 433         return 8;
 434     } else {
 435         switch (n) {
 436         case 64: GET_REGL(env->nip);
 437         case 65: GET_REGL(env->msr);
 438         case 66:
 439             {
 440                 uint32_t cr = 0;
 441                 int i;
 442                 for (i = 0; i < 8; i++)
 443                     cr |= env->crf[i] << (32 - ((i + 1) * 4));
 444                 GET_REG32(cr);
 445             }
 446         case 67: GET_REGL(env->lr);
 447         case 68: GET_REGL(env->ctr);
 448         case 69: GET_REGL(env->xer);
 449         case 70: GET_REG32(0); /* fpscr */
 450         }
 451     }
 452     return 0;
 453 }
 454
 455 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 456 {
 457     if (n < 32) {
 458         /* gprs */
 459         env->gpr[n] = ldtul_p(mem_buf);
 460         return sizeof(target_ulong);
 461     } else if (n < 64) {
 462         /* fprs */
 463         env->fpr[n] = ldfq_p(mem_buf);
 464         return 8;
 465     } else {
 466         switch (n) {
 467         case 64:
 468             env->nip = ldtul_p(mem_buf);
 469             return sizeof(target_ulong);
 470         case 65:
 471             ppc_store_msr(env, ldtul_p(mem_buf));
 472             return sizeof(target_ulong);
 473         case 66:
 474             {
 475                 uint32_t cr = ldl_p(mem_buf);
 476                 int i;
 477                 for (i = 0; i < 8; i++)
 478                     env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
 479                 return 4;
 480             }
 481         case 67:
 482             env->lr = ldtul_p(mem_buf);
 483             return sizeof(target_ulong);
 484         case 68:
 485             env->ctr = ldtul_p(mem_buf);
 486             return sizeof(target_ulong);
 487         case 69:
 488             env->xer = ldtul_p(mem_buf);
 489             return sizeof(target_ulong);
 490         case 70:
 491             /* fpscr */
 492             return 4;
 493         }
 494     }
 495     return 0;
 496 }
 497
 498 #elif defined (TARGET_SPARC)
 499
 500 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
 501 #define NUM_CORE_REGS 86
 502 #else
 503 #define NUM_CORE_REGS 73
 504 #endif
 505
 506 #ifdef TARGET_ABI32
 507 #define GET_REGA(val) GET_REG32(val)
 508 #else
 509 #define GET_REGA(val) GET_REGL(val)
 510 #endif
 511
 512 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 513 {
 514     if (n < 8) {
 515         /* g0..g7 */
 516         GET_REGA(env->gregs[n]);
 517     }
 518     if (n < 32) {
 519         /* register window */
 520         GET_REGA(env->regwptr[n - 8]);
 521     }
 522 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
 523     if (n < 64) {
 524         /* fprs */
 525         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
 526     }
 527     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 528     switch (n) {
 529     case 64: GET_REGA(env->y);
 530     case 65: GET_REGA(GET_PSR(env));
 531     case 66: GET_REGA(env->wim);
 532     case 67: GET_REGA(env->tbr);
 533     case 68: GET_REGA(env->pc);
 534     case 69: GET_REGA(env->npc);
 535     case 70: GET_REGA(env->fsr);
 536     case 71: GET_REGA(0); /* csr */
 537     case 72: GET_REGA(0);
 538     }
 539 #else
 540     if (n < 64) {
 541         /* f0-f31 */
 542         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
 543     }
 544     if (n < 80) {
 545         /* f32-f62 (double width, even numbers only) */
 546         uint64_t val;
 547
 548         val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32;
 549         val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]);
 550         GET_REG64(val);
 551     }
 552     switch (n) {
 553     case 80: GET_REGL(env->pc);
 554     case 81: GET_REGL(env->npc);
 555     case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
 556                            ((env->asi & 0xff) << 24) |
 557                            ((env->pstate & 0xfff) << 8) |
 558                            GET_CWP64(env));
 559     case 83: GET_REGL(env->fsr);
 560     case 84: GET_REGL(env->fprs);
 561     case 85: GET_REGL(env->y);
 562     }
 563 #endif
 564     return 0;
 565 }
 566
 567 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 568 {
 569 #if defined(TARGET_ABI32)
 570     abi_ulong tmp;
 571
 572     tmp = ldl_p(mem_buf);
 573 #else
 574     target_ulong tmp;
 575
 576     tmp = ldtul_p(mem_buf);
 577 #endif
 578
 579     if (n < 8) {
 580         /* g0..g7 */
 581         env->gregs[n] = tmp;
 582     } else if (n < 32) {
 583         /* register window */
 584         env->regwptr[n - 8] = tmp;
 585     }
 586 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
 587     else if (n < 64) {
 588         /* fprs */
 589         *((uint32_t *)&env->fpr[n - 32]) = tmp;
 590     } else {
 591         /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 592         switch (n) {
 593         case 64: env->y = tmp; break;
 594         case 65: PUT_PSR(env, tmp); break;
 595         case 66: env->wim = tmp; break;
 596         case 67: env->tbr = tmp; break;
 597         case 68: env->pc = tmp; break;
 598         case 69: env->npc = tmp; break;
 599         case 70: env->fsr = tmp; break;
 600         default: return 0;
 601         }
 602     }
 603     return 4;
 604 #else
 605     else if (n < 64) {
 606         /* f0-f31 */
 607         env->fpr[n] = ldfl_p(mem_buf);
 608         return 4;
 609     } else if (n < 80) {
 610         /* f32-f62 (double width, even numbers only) */
 611         *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
 612         *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
 613     } else {
 614         switch (n) {
 615         case 80: env->pc = tmp; break;
 616         case 81: env->npc = tmp; break;
 617         case 82:
 618             PUT_CCR(env, tmp >> 32);
 619             env->asi = (tmp >> 24) & 0xff;
 620             env->pstate = (tmp >> 8) & 0xfff;
 621             PUT_CWP64(env, tmp & 0xff);
 622             break;
 623         case 83: env->fsr = tmp; break;
 624         case 84: env->fprs = tmp; break;
 625         case 85: env->y = tmp; break;
 626         default: return 0;
 627         }
 628     }
 629     return 8;
 630 #endif
 631 }
 632 #elif defined (TARGET_ARM)
 633
 634 /* Old gdb always expect FPA registers.  Newer (xml-aware) gdb only expect
 635    whatever the target description contains.  Due to a historical mishap
 636    the FPA registers appear in between core integer regs and the CPSR.
 637    We hack round this by giving the FPA regs zero size when talking to a
 638    newer gdb.  */
 639 #define NUM_CORE_REGS 26
 640 #define GDB_CORE_XML "arm-core.xml"
 641
 642 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 643 {
 644     if (n < 16) {
 645         /* Core integer register.  */
 646         GET_REG32(env->regs[n]);
 647     }
 648     if (n < 24) {
 649         /* FPA registers.  */
 650         if (gdb_has_xml)
 651             return 0;
 652         memset(mem_buf, 0, 12);
 653         return 12;
 654     }
 655     switch (n) {
 656     case 24:
 657         /* FPA status register.  */
 658         if (gdb_has_xml)
 659             return 0;
 660         GET_REG32(0);
 661     case 25:
 662         /* CPSR */
 663         GET_REG32(cpsr_read(env));
 664     }
 665     /* Unknown register.  */
 666     return 0;
 667 }
 668
 669 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 670 {
 671     uint32_t tmp;
 672
 673     tmp = ldl_p(mem_buf);
 674
 675     /* Mask out low bit of PC to workaround gdb bugs.  This will probably
 676        cause problems if we ever implement the Jazelle DBX extensions.  */
 677     if (n == 15)
 678         tmp &= ~1;
 679
 680     if (n < 16) {
 681         /* Core integer register.  */
 682         env->regs[n] = tmp;
 683         return 4;
 684     }
 685     if (n < 24) { /* 16-23 */
 686         /* FPA registers (ignored).  */
 687         if (gdb_has_xml)
 688             return 0;
 689         return 12;
 690     }
 691     switch (n) {
 692     case 24:
 693         /* FPA status register (ignored).  */
 694         if (gdb_has_xml)
 695             return 0;
 696         return 4;
 697     case 25:
 698         /* CPSR */
 699         cpsr_write (env, tmp, 0xffffffff);
 700         return 4;
 701     }
 702     /* Unknown register.  */
 703     return 0;
 704 }
 705
 706 #elif defined (TARGET_M68K)
 707
 708 #define NUM_CORE_REGS 18
 709
 710 #define GDB_CORE_XML "cf-core.xml"
 711
 712 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 713 {
 714     if (n < 8) {
 715         /* D0-D7 */
 716         GET_REG32(env->dregs[n]);
 717     } else if (n < 16) {
 718         /* A0-A7 */
 719         GET_REG32(env->aregs[n - 8]);
 720     } else {
 721         switch (n) {
 722         case 16: GET_REG32(env->sr);
 723         case 17: GET_REG32(env->pc);
 724         }
 725     }
 726     /* FP registers not included here because they vary between
 727        ColdFire and m68k.  Use XML bits for these.  */
 728     return 0;
 729 }
 730
 731 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 732 {
 733     uint32_t tmp;
 734
 735     tmp = ldl_p(mem_buf);
 736
 737     if (n < 8) {
 738         /* D0-D7 */
 739         env->dregs[n] = tmp;
 740     } else if (n < 8) {
 741         /* A0-A7 */
 742         env->aregs[n - 8] = tmp;
 743     } else {
 744         switch (n) {
 745         case 16: env->sr = tmp; break;
 746         case 17: env->pc = tmp; break;
 747         default: return 0;
 748         }
 749     }
 750     return 4;
 751 }
 752 #elif defined (TARGET_MIPS)
 753
 754 #define NUM_CORE_REGS 73
 755
 756 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 757 {
 758     if (n < 32) {
 759         GET_REGL(env->active_tc.gpr[n]);
 760     }
 761     if (env->CP0_Config1 & (1 << CP0C1_FP)) {
 762         if (n >= 38 && n < 70) {
 763             if (env->CP0_Status & (1 << CP0St_FR))
 764                 GET_REGL(env->active_fpu.fpr[n - 38].d);
 765             else
 766                 GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
 767         }
 768         switch (n) {
 769         case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
 770         case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
 771         }
 772     }
 773     switch (n) {
 774     case 32: GET_REGL((int32_t)env->CP0_Status);
 775     case 33: GET_REGL(env->active_tc.LO[0]);
 776     case 34: GET_REGL(env->active_tc.HI[0]);
 777     case 35: GET_REGL(env->CP0_BadVAddr);
 778     case 36: GET_REGL((int32_t)env->CP0_Cause);
 779     case 37: GET_REGL(env->active_tc.PC);
 780     case 72: GET_REGL(0); /* fp */
 781     case 89: GET_REGL((int32_t)env->CP0_PRid);
 782     }
 783     if (n >= 73 && n <= 88) {
 784         /* 16 embedded regs.  */
 785         GET_REGL(0);
 786     }
 787
 788     return 0;
 789 }
 790
 791 /* convert MIPS rounding mode in FCR31 to IEEE library */
 792 static unsigned int ieee_rm[] =
 793   {
 794     float_round_nearest_even,
 795     float_round_to_zero,
 796     float_round_up,
 797     float_round_down
 798   };
 799 #define RESTORE_ROUNDING_MODE \
 800     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
 801
 802 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 803 {
 804     target_ulong tmp;
 805
 806     tmp = ldtul_p(mem_buf);
 807
 808     if (n < 32) {
 809         env->active_tc.gpr[n] = tmp;
 810         return sizeof(target_ulong);
 811     }
 812     if (env->CP0_Config1 & (1 << CP0C1_FP)
 813             && n >= 38 && n < 73) {
 814         if (n < 70) {
 815             if (env->CP0_Status & (1 << CP0St_FR))
 816               env->active_fpu.fpr[n - 38].d = tmp;
 817             else
 818               env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
 819         }
 820         switch (n) {
 821         case 70:
 822             env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
 823             /* set rounding mode */
 824             RESTORE_ROUNDING_MODE;
 825 #ifndef CONFIG_SOFTFLOAT
 826             /* no floating point exception for native float */
 827             SET_FP_ENABLE(env->active_fpu.fcr31, 0);
 828 #endif
 829             break;
 830         case 71: env->active_fpu.fcr0 = tmp; break;
 831         }
 832         return sizeof(target_ulong);
 833     }
 834     switch (n) {
 835     case 32: env->CP0_Status = tmp; break;
 836     case 33: env->active_tc.LO[0] = tmp; break;
 837     case 34: env->active_tc.HI[0] = tmp; break;
 838     case 35: env->CP0_BadVAddr = tmp; break;
 839     case 36: env->CP0_Cause = tmp; break;
 840     case 37: env->active_tc.PC = tmp; break;
 841     case 72: /* fp, ignored */ break;
 842     default:
 843         if (n > 89)
 844             return 0;
 845         /* Other registers are readonly.  Ignore writes.  */
 846         break;
 847     }
 848
 849     return sizeof(target_ulong);
 850 }
 851 #elif defined (TARGET_SH4)
 852
 853 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
 854 /* FIXME: We should use XML for this.  */
 855
 856 #define NUM_CORE_REGS 59
 857
 858 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 859 {
 860     if (n < 8) {
 861         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 862             GET_REGL(env->gregs[n + 16]);
 863         } else {
 864             GET_REGL(env->gregs[n]);
 865         }
 866     } else if (n < 16) {
 867         GET_REGL(env->gregs[n - 8]);
 868     } else if (n >= 25 && n < 41) {
 869         GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 870     } else if (n >= 43 && n < 51) {
 871         GET_REGL(env->gregs[n - 43]);
 872     } else if (n >= 51 && n < 59) {
 873         GET_REGL(env->gregs[n - (51 - 16)]);
 874     }
 875     switch (n) {
 876     case 16: GET_REGL(env->pc);
 877     case 17: GET_REGL(env->pr);
 878     case 18: GET_REGL(env->gbr);
 879     case 19: GET_REGL(env->vbr);
 880     case 20: GET_REGL(env->mach);
 881     case 21: GET_REGL(env->macl);
 882     case 22: GET_REGL(env->sr);
 883     case 23: GET_REGL(env->fpul);
 884     case 24: GET_REGL(env->fpscr);
 885     case 41: GET_REGL(env->ssr);
 886     case 42: GET_REGL(env->spc);
 887     }
 888
 889     return 0;
 890 }
 891
 892 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 893 {
 894     uint32_t tmp;
 895
 896     tmp = ldl_p(mem_buf);
 897
 898     if (n < 8) {
 899         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 900             env->gregs[n + 16] = tmp;
 901         } else {
 902             env->gregs[n] = tmp;
 903         }
 904         return 4;
 905     } else if (n < 16) {
 906         env->gregs[n - 8] = tmp;
 907         return 4;
 908     } else if (n >= 25 && n < 41) {
 909         env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
 910     } else if (n >= 43 && n < 51) {
 911         env->gregs[n - 43] = tmp;
 912         return 4;
 913     } else if (n >= 51 && n < 59) {
 914         env->gregs[n - (51 - 16)] = tmp;
 915         return 4;
 916     }
 917     switch (n) {
 918     case 16: env->pc = tmp;
 919     case 17: env->pr = tmp;
 920     case 18: env->gbr = tmp;
 921     case 19: env->vbr = tmp;
 922     case 20: env->mach = tmp;
 923     case 21: env->macl = tmp;
 924     case 22: env->sr = tmp;
 925     case 23: env->fpul = tmp;
 926     case 24: env->fpscr = tmp;
 927     case 41: env->ssr = tmp;
 928     case 42: env->spc = tmp;
 929     default: return 0;
 930     }
 931
 932     return 4;
 933 }
 934 #elif defined (TARGET_CRIS)
 935
 936 #define NUM_CORE_REGS 49
 937
 938 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 939 {
 940     uint8_t srs;
 941
 942     srs = env->pregs[PR_SRS];
 943     if (n < 16) {
 944         GET_REG32(env->regs[n]);
 945     }
 946
 947     if (n >= 21 && n < 32) {
 948         GET_REG32(env->pregs[n - 16]);
 949     }
 950     if (n >= 33 && n < 49) {
 951         GET_REG32(env->sregs[srs][n - 33]);
 952     }
 953     switch (n) {
 954     case 16: GET_REG8(env->pregs[0]);
 955     case 17: GET_REG8(env->pregs[1]);
 956     case 18: GET_REG32(env->pregs[2]);
 957     case 19: GET_REG8(srs);
 958     case 20: GET_REG16(env->pregs[4]);
 959     case 32: GET_REG32(env->pc);
 960     }
 961
 962     return 0;
 963 }
 964
 965 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 966 {
 967     uint32_t tmp;
 968
 969     if (n > 49)
 970         return 0;
 971
 972     tmp = ldl_p(mem_buf);
 973
 974     if (n < 16) {
 975         env->regs[n] = tmp;
 976     }
 977
 978     if (n >= 21 && n < 32) {
 979         env->pregs[n - 16] = tmp;
 980     }
 981
 982     /* FIXME: Should support function regs be writable?  */
 983     switch (n) {
 984     case 16: return 1;
 985     case 17: return 1;
 986     case 18: env->pregs[PR_PID] = tmp; break;
 987     case 19: return 1;
 988     case 20: return 2;
 989     case 32: env->pc = tmp; break;
 990     }
 991
 992     return 4;
 993 }
 994 #else
 995
 996 #define NUM_CORE_REGS 0
 997
 998 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 999 {
1000     return 0;
1001 }
1002
1003 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1004 {
1005     return 0;
1006 }
1007
1008 #endif
1009
1010 static int num_g_regs = NUM_CORE_REGS;
1011
1012 #ifdef GDB_CORE_XML
1013 /* Encode data using the encoding for 'x' packets.  */
1014 static int memtox(char *buf, const char *mem, int len)
1015 {
1016     char *p = buf;
1017     char c;
1018
1019     while (len--) {
1020         c = *(mem++);
1021         switch (c) {
1022         case '#': case '$': case '*': case '}':
1023             *(p++) = '}';
1024             *(p++) = c ^ 0x20;
1025             break;
1026         default:
1027             *(p++) = c;
1028             break;
1029         }
1030     }
1031     return p - buf;
1032 }
1033
1034 const char *get_feature_xml(CPUState *env, const char *p, const char **newp)
1035 {
1036     extern const char *const xml_builtin[][2];
1037     size_t len;
1038     int i;
1039     const char *name;
1040     static char target_xml[1024];
1041
1042     len = 0;
1043     while (p[len] && p[len] != ':')
1044         len++;
1045     *newp = p + len;
1046
1047     name = NULL;
1048     if (strncmp(p, "target.xml", len) == 0) {
1049         /* Generate the XML description for this CPU.  */
1050         if (!target_xml[0]) {
1051             GDBRegisterState *r;
1052
1053             snprintf(target_xml, sizeof(target_xml),
1054                      "<?xml version=\"1.0\"?>"
1055                      "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1056                      "<target>"
1057                      "<xi:include href=\"%s\"/>",
1058                      GDB_CORE_XML);
1059
1060             for (r = env->gdb_regs; r; r = r->next) {
1061                 strcat(target_xml, "<xi:include href=\"");
1062                 strcat(target_xml, r->xml);
1063                 strcat(target_xml, "\"/>");
1064             }
1065             strcat(target_xml, "</target>");
1066         }
1067         return target_xml;
1068     }
1069     for (i = 0; ; i++) {
1070         name = xml_builtin[i][0];
1071         if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
1072             break;
1073     }
1074     return name ? xml_builtin[i][1] : NULL;
1075 }
1076 #endif
1077
1078 static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
1079 {
1080     GDBRegisterState *r;
1081
1082     if (reg < NUM_CORE_REGS)
1083         return cpu_gdb_read_register(env, mem_buf, reg);
1084
1085     for (r = env->gdb_regs; r; r = r->next) {
1086         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1087             return r->get_reg(env, mem_buf, reg - r->base_reg);
1088         }
1089     }
1090     return 0;
1091 }
1092
1093 static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
1094 {
1095     GDBRegisterState *r;
1096
1097     if (reg < NUM_CORE_REGS)
1098         return cpu_gdb_write_register(env, mem_buf, reg);
1099
1100     for (r = env->gdb_regs; r; r = r->next) {
1101         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1102             return r->set_reg(env, mem_buf, reg - r->base_reg);
1103         }
1104     }
1105     return 0;
1106 }
1107
1108 /* Register a supplemental set of CPU registers.  If g_pos is nonzero it
1109    specifies the first register number and these registers are included in
1110    a standard "g" packet.  Direction is relative to gdb, i.e. get_reg is
1111    gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1112  */
1113
1114 void gdb_register_coprocessor(CPUState * env,
1115                              gdb_reg_cb get_reg, gdb_reg_cb set_reg,
1116                              int num_regs, const char *xml, int g_pos)
1117 {
1118     GDBRegisterState *s;
1119     GDBRegisterState **p;
1120     static int last_reg = NUM_CORE_REGS;
1121
1122     s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState));
1123     s->base_reg = last_reg;
1124     s->num_regs = num_regs;
1125     s->get_reg = get_reg;
1126     s->set_reg = set_reg;
1127     s->xml = xml;
1128     p = &env->gdb_regs;
1129     while (*p) {
1130         /* Check for duplicates.  */
1131         if (strcmp((*p)->xml, xml) == 0)
1132             return;
1133         p = &(*p)->next;
1134     }
1135     /* Add to end of list.  */
1136     last_reg += num_regs;
1137     *p = s;
1138     if (g_pos) {
1139         if (g_pos != s->base_reg) {
1140             fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
1141                     "Expected %d got %d\n", xml, g_pos, s->base_reg);
1142         } else {
1143             num_g_regs = last_reg;
1144         }
1145     }
1146 }
1147
1148 /* GDB breakpoint/watchpoint types */
1149 #define GDB_BREAKPOINT_SW        0
1150 #define GDB_BREAKPOINT_HW        1
1151 #define GDB_WATCHPOINT_WRITE     2
1152 #define GDB_WATCHPOINT_READ      3
1153 #define GDB_WATCHPOINT_ACCESS    4
1154
1155 #ifndef CONFIG_USER_ONLY
1156 static const int xlat_gdb_type[] = {
1157     [GDB_WATCHPOINT_WRITE]  = BP_GDB | BP_MEM_WRITE,
1158     [GDB_WATCHPOINT_READ]   = BP_GDB | BP_MEM_READ,
1159     [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
1160 };
1161 #endif
1162
1163 static int gdb_breakpoint_insert(CPUState *env, target_ulong addr,
1164                                  target_ulong len, int type)
1165 {
1166     switch (type) {
1167     case GDB_BREAKPOINT_SW:
1168     case GDB_BREAKPOINT_HW:
1169         return cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
1170 #ifndef CONFIG_USER_ONLY
1171     case GDB_WATCHPOINT_WRITE:
1172     case GDB_WATCHPOINT_READ:
1173     case GDB_WATCHPOINT_ACCESS:
1174         return cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
1175                                      NULL);
1176 #endif
1177     default:
1178         return -ENOSYS;
1179     }
1180 }
1181
1182 static int gdb_breakpoint_remove(CPUState *env, target_ulong addr,
1183                                  target_ulong len, int type)
1184 {
1185     switch (type) {
1186     case GDB_BREAKPOINT_SW:
1187     case GDB_BREAKPOINT_HW:
1188         return cpu_breakpoint_remove(env, addr, BP_GDB);
1189 #ifndef CONFIG_USER_ONLY
1190     case GDB_WATCHPOINT_WRITE:
1191     case GDB_WATCHPOINT_READ:
1192     case GDB_WATCHPOINT_ACCESS:
1193         return cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
1194 #endif
1195     default:
1196         return -ENOSYS;
1197     }
1198 }
1199
1200 static void gdb_breakpoint_remove_all(CPUState *env)
1201 {
1202     cpu_breakpoint_remove_all(env, BP_GDB);
1203 #ifndef CONFIG_USER_ONLY
1204     cpu_watchpoint_remove_all(env, BP_GDB);
1205 #endif
1206 }
1207
1208 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
1209 {
1210     const char *p;
1211     int ch, reg_size, type, res;
1212     char buf[MAX_PACKET_LENGTH];
1213     uint8_t mem_buf[MAX_PACKET_LENGTH];
1214     uint8_t *registers;
1215     target_ulong addr, len;
1216
1217 #ifdef DEBUG_GDB
1218     printf("command='%s'\n", line_buf);
1219 #endif
1220     p = line_buf;
1221     ch = *p++;
1222     switch(ch) {
1223     case '?':
1224         /* TODO: Make this return the correct value for user-mode.  */
1225         snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
1226         put_packet(s, buf);
1227         /* Remove all the breakpoints when this query is issued,
1228          * because gdb is doing and initial connect and the state
1229          * should be cleaned up.
1230          */
1231         gdb_breakpoint_remove_all(env);
1232         break;
1233     case 'c':
1234         if (*p != '\0') {
1235             addr = strtoull(p, (char **)&p, 16);
1236 #if defined(TARGET_I386)
1237             env->eip = addr;
1238 #elif defined (TARGET_PPC)
1239             env->nip = addr;
1240 #elif defined (TARGET_SPARC)
1241             env->pc = addr;
1242             env->npc = addr + 4;
1243 #elif defined (TARGET_ARM)
1244             env->regs[15] = addr;
1245 #elif defined (TARGET_SH4)
1246             env->pc = addr;
1247 #elif defined (TARGET_MIPS)
1248             env->active_tc.PC = addr;
1249 #elif defined (TARGET_CRIS)
1250             env->pc = addr;
1251 #endif
1252         }
1253         gdb_continue(s);
1254         return RS_IDLE;
1255     case 'C':
1256         s->signal = strtoul(p, (char **)&p, 16);
1257         gdb_continue(s);
1258         return RS_IDLE;
1259     case 'k':
1260         /* Kill the target */
1261         fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1262         exit(0);
1263     case 'D':
1264         /* Detach packet */
1265         gdb_breakpoint_remove_all(env);
1266         gdb_continue(s);
1267         put_packet(s, "OK");
1268         break;
1269     case 's':
1270         if (*p != '\0') {
1271             addr = strtoull(p, (char **)&p, 16);
1272 #if defined(TARGET_I386)
1273             env->eip = addr;
1274 #elif defined (TARGET_PPC)
1275             env->nip = addr;
1276 #elif defined (TARGET_SPARC)
1277             env->pc = addr;
1278             env->npc = addr + 4;
1279 #elif defined (TARGET_ARM)
1280             env->regs[15] = addr;
1281 #elif defined (TARGET_SH4)
1282             env->pc = addr;
1283 #elif defined (TARGET_MIPS)
1284             env->active_tc.PC = addr;
1285 #elif defined (TARGET_CRIS)
1286             env->pc = addr;
1287 #endif
1288         }
1289         cpu_single_step(env, sstep_flags);
1290         gdb_continue(s);
1291         return RS_IDLE;
1292     case 'F':
1293         {
1294             target_ulong ret;
1295             target_ulong err;
1296
1297             ret = strtoull(p, (char **)&p, 16);
1298             if (*p == ',') {
1299                 p++;
1300                 err = strtoull(p, (char **)&p, 16);
1301             } else {
1302                 err = 0;
1303             }
1304             if (*p == ',')
1305                 p++;
1306             type = *p;
1307             if (gdb_current_syscall_cb)
1308                 gdb_current_syscall_cb(s->env, ret, err);
1309             if (type == 'C') {
1310                 put_packet(s, "T02");
1311             } else {
1312                 gdb_continue(s);
1313             }
1314         }
1315         break;
1316     case 'g':
1317         len = 0;
1318         for (addr = 0; addr < num_g_regs; addr++) {
1319             reg_size = gdb_read_register(env, mem_buf + len, addr);
1320             len += reg_size;
1321         }
1322         memtohex(buf, mem_buf, len);
1323         put_packet(s, buf);
1324         break;
1325     case 'G':
1326         registers = mem_buf;
1327         len = strlen(p) / 2;
1328         hextomem((uint8_t *)registers, p, len);
1329         for (addr = 0; addr < num_g_regs && len > 0; addr++) {
1330             reg_size = gdb_write_register(env, registers, addr);
1331             len -= reg_size;
1332             registers += reg_size;
1333         }
1334         put_packet(s, "OK");
1335         break;
1336     case 'm':
1337         addr = strtoull(p, (char **)&p, 16);
1338         if (*p == ',')
1339             p++;
1340         len = strtoull(p, NULL, 16);
1341         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
1342             put_packet (s, "E14");
1343         } else {
1344             memtohex(buf, mem_buf, len);
1345             put_packet(s, buf);
1346         }
1347         break;
1348     case 'M':
1349         addr = strtoull(p, (char **)&p, 16);
1350         if (*p == ',')
1351             p++;
1352         len = strtoull(p, (char **)&p, 16);
1353         if (*p == ':')
1354             p++;
1355         hextomem(mem_buf, p, len);
1356         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
1357             put_packet(s, "E14");
1358         else
1359             put_packet(s, "OK");
1360         break;
1361     case 'p':
1362         /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1363            This works, but can be very slow.  Anything new enough to
1364            understand XML also knows how to use this properly.  */
1365         if (!gdb_has_xml)
1366             goto unknown_command;
1367         addr = strtoull(p, (char **)&p, 16);
1368         reg_size = gdb_read_register(env, mem_buf, addr);
1369         if (reg_size) {
1370             memtohex(buf, mem_buf, reg_size);
1371             put_packet(s, buf);
1372         } else {
1373             put_packet(s, "E14");
1374         }
1375         break;
1376     case 'P':
1377         if (!gdb_has_xml)
1378             goto unknown_command;
1379         addr = strtoull(p, (char **)&p, 16);
1380         if (*p == '=')
1381             p++;
1382         reg_size = strlen(p) / 2;
1383         hextomem(mem_buf, p, reg_size);
1384         gdb_write_register(env, mem_buf, addr);
1385         put_packet(s, "OK");
1386         break;
1387     case 'Z':
1388     case 'z':
1389         type = strtoul(p, (char **)&p, 16);
1390         if (*p == ',')
1391             p++;
1392         addr = strtoull(p, (char **)&p, 16);
1393         if (*p == ',')
1394             p++;
1395         len = strtoull(p, (char **)&p, 16);
1396         if (ch == 'Z')
1397             res = gdb_breakpoint_insert(env, addr, len, type);
1398         else
1399             res = gdb_breakpoint_remove(env, addr, len, type);
1400         if (res >= 0)
1401              put_packet(s, "OK");
1402         else if (res == -ENOSYS)
1403             put_packet(s, "");
1404         else
1405             put_packet(s, "E22");
1406         break;
1407     case 'q':
1408     case 'Q':
1409         /* parse any 'q' packets here */
1410         if (!strcmp(p,"qemu.sstepbits")) {
1411             /* Query Breakpoint bit definitions */
1412             snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1413                      SSTEP_ENABLE,
1414                      SSTEP_NOIRQ,
1415                      SSTEP_NOTIMER);
1416             put_packet(s, buf);
1417             break;
1418         } else if (strncmp(p,"qemu.sstep",10) == 0) {
1419             /* Display or change the sstep_flags */
1420             p += 10;
1421             if (*p != '=') {
1422                 /* Display current setting */
1423                 snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
1424                 put_packet(s, buf);
1425                 break;
1426             }
1427             p++;
1428             type = strtoul(p, (char **)&p, 16);
1429             sstep_flags = type;
1430             put_packet(s, "OK");
1431             break;
1432         }
1433 #ifdef CONFIG_LINUX_USER
1434         else if (strncmp(p, "Offsets", 7) == 0) {
1435             TaskState *ts = env->opaque;
1436
1437             snprintf(buf, sizeof(buf),
1438                      "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1439                      ";Bss=" TARGET_ABI_FMT_lx,
1440                      ts->info->code_offset,
1441                      ts->info->data_offset,
1442                      ts->info->data_offset);
1443             put_packet(s, buf);
1444             break;
1445         }
1446 #endif
1447         if (strncmp(p, "Supported", 9) == 0) {
1448             snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
1449 #ifdef GDB_CORE_XML
1450             strcat(buf, ";qXfer:features:read+");
1451 #endif
1452             put_packet(s, buf);
1453             break;
1454         }
1455 #ifdef GDB_CORE_XML
1456         if (strncmp(p, "Xfer:features:read:", 19) == 0) {
1457             const char *xml;
1458             target_ulong total_len;
1459
1460             gdb_has_xml = 1;
1461             p += 19;
1462             xml = get_feature_xml(env, p, &p);
1463             if (!xml) {
1464                 snprintf(buf, sizeof(buf), "E00");
1465                 put_packet(s, buf);
1466                 break;
1467             }
1468
1469             if (*p == ':')
1470                 p++;
1471             addr = strtoul(p, (char **)&p, 16);
1472             if (*p == ',')
1473                 p++;
1474             len = strtoul(p, (char **)&p, 16);
1475
1476             total_len = strlen(xml);
1477             if (addr > total_len) {
1478                 snprintf(buf, sizeof(buf), "E00");
1479                 put_packet(s, buf);
1480                 break;
1481             }
1482             if (len > (MAX_PACKET_LENGTH - 5) / 2)
1483                 len = (MAX_PACKET_LENGTH - 5) / 2;
1484             if (len < total_len - addr) {
1485                 buf[0] = 'm';
1486                 len = memtox(buf + 1, xml + addr, len);
1487             } else {
1488                 buf[0] = 'l';
1489                 len = memtox(buf + 1, xml + addr, total_len - addr);
1490             }
1491             put_packet_binary(s, buf, len + 1);
1492             break;
1493         }
1494 #endif
1495         /* Unrecognised 'q' command.  */
1496         goto unknown_command;
1497
1498     default:
1499     unknown_command:
1500         /* put empty packet */
1501         buf[0] = '\0';
1502         put_packet(s, buf);
1503         break;
1504     }
1505     return RS_IDLE;
1506 }
1507
1508 extern void tb_flush(CPUState *env);
1509
1510 #ifndef CONFIG_USER_ONLY
1511 static void gdb_vm_stopped(void *opaque, int reason)
1512 {
1513     GDBState *s = opaque;
1514     char buf[256];
1515     const char *type;
1516     int ret;
1517
1518     if (s->state == RS_SYSCALL)
1519         return;
1520
1521     /* disable single step if it was enable */
1522     cpu_single_step(s->env, 0);
1523
1524     if (reason == EXCP_DEBUG) {
1525         if (s->env->watchpoint_hit) {
1526             switch (s->env->watchpoint_hit->flags & BP_MEM_ACCESS) {
1527             case BP_MEM_READ:
1528                 type = "r";
1529                 break;
1530             case BP_MEM_ACCESS:
1531                 type = "a";
1532                 break;
1533             default:
1534                 type = "";
1535                 break;
1536             }
1537             snprintf(buf, sizeof(buf), "T%02x%swatch:" TARGET_FMT_lx ";",
1538                      SIGTRAP, type, s->env->watchpoint_hit->vaddr);
1539             put_packet(s, buf);
1540             s->env->watchpoint_hit = NULL;
1541             return;
1542         }
1543         tb_flush(s->env);
1544         ret = SIGTRAP;
1545     } else if (reason == EXCP_INTERRUPT) {
1546         ret = SIGINT;
1547     } else {
1548         ret = 0;
1549     }
1550     snprintf(buf, sizeof(buf), "S%02x", ret);
1551     put_packet(s, buf);
1552 }
1553 #endif
1554
1555 /* Send a gdb syscall request.
1556    This accepts limited printf-style format specifiers, specifically:
1557     %x  - target_ulong argument printed in hex.
1558     %lx - 64-bit argument printed in hex.
1559     %s  - string pointer (target_ulong) and length (int) pair.  */
1560 void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
1561 {
1562     va_list va;
1563     char buf[256];
1564     char *p;
1565     target_ulong addr;
1566     uint64_t i64;
1567     GDBState *s;
1568
1569     s = gdb_syscall_state;
1570     if (!s)
1571         return;
1572     gdb_current_syscall_cb = cb;
1573     s->state = RS_SYSCALL;
1574 #ifndef CONFIG_USER_ONLY
1575     vm_stop(EXCP_DEBUG);
1576 #endif
1577     s->state = RS_IDLE;
1578     va_start(va, fmt);
1579     p = buf;
1580     *(p++) = 'F';
1581     while (*fmt) {
1582         if (*fmt == '%') {
1583             fmt++;
1584             switch (*fmt++) {
1585             case 'x':
1586                 addr = va_arg(va, target_ulong);
1587                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr);
1588                 break;
1589             case 'l':
1590                 if (*(fmt++) != 'x')
1591                     goto bad_format;
1592                 i64 = va_arg(va, uint64_t);
1593                 p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64);
1594                 break;
1595             case 's':
1596                 addr = va_arg(va, target_ulong);
1597                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x",
1598                               addr, va_arg(va, int));
1599                 break;
1600             default:
1601             bad_format:
1602                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1603                         fmt - 1);
1604                 break;
1605             }
1606         } else {
1607             *(p++) = *(fmt++);
1608         }
1609     }
1610     *p = 0;
1611     va_end(va);
1612     put_packet(s, buf);
1613 #ifdef CONFIG_USER_ONLY
1614     gdb_handlesig(s->env, 0);
1615 #else
1616     cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1617 #endif
1618 }
1619
1620 static void gdb_read_byte(GDBState *s, int ch)
1621 {
1622     CPUState *env = s->env;
1623     int i, csum;
1624     uint8_t reply;
1625
1626 #ifndef CONFIG_USER_ONLY
1627     if (s->last_packet_len) {
1628         /* Waiting for a response to the last packet.  If we see the start
1629            of a new command then abandon the previous response.  */
1630         if (ch == '-') {
1631 #ifdef DEBUG_GDB
1632             printf("Got NACK, retransmitting\n");
1633 #endif
1634             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
1635         }
1636 #ifdef DEBUG_GDB
1637         else if (ch == '+')
1638             printf("Got ACK\n");
1639         else
1640             printf("Got '%c' when expecting ACK/NACK\n", ch);
1641 #endif
1642         if (ch == '+' || ch == '$')
1643             s->last_packet_len = 0;
1644         if (ch != '$')
1645             return;
1646     }
1647     if (vm_running) {
1648         /* when the CPU is running, we cannot do anything except stop
1649            it when receiving a char */
1650         vm_stop(EXCP_INTERRUPT);
1651     } else
1652 #endif
1653     {
1654         switch(s->state) {
1655         case RS_IDLE:
1656             if (ch == '$') {
1657                 s->line_buf_index = 0;
1658                 s->state = RS_GETLINE;
1659             }
1660             break;
1661         case RS_GETLINE:
1662             if (ch == '#') {
1663             s->state = RS_CHKSUM1;
1664             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1665                 s->state = RS_IDLE;
1666             } else {
1667             s->line_buf[s->line_buf_index++] = ch;
1668             }
1669             break;
1670         case RS_CHKSUM1:
1671             s->line_buf[s->line_buf_index] = '\0';
1672             s->line_csum = fromhex(ch) << 4;
1673             s->state = RS_CHKSUM2;
1674             break;
1675         case RS_CHKSUM2:
1676             s->line_csum |= fromhex(ch);
1677             csum = 0;
1678             for(i = 0; i < s->line_buf_index; i++) {
1679                 csum += s->line_buf[i];
1680             }
1681             if (s->line_csum != (csum & 0xff)) {
1682                 reply = '-';
1683                 put_buffer(s, &reply, 1);
1684                 s->state = RS_IDLE;
1685             } else {
1686                 reply = '+';
1687                 put_buffer(s, &reply, 1);
1688                 s->state = gdb_handle_packet(s, env, s->line_buf);
1689             }
1690             break;
1691         default:
1692             abort();
1693         }
1694     }
1695 }
1696
1697 #ifdef CONFIG_USER_ONLY
1698 int
1699 gdb_handlesig (CPUState *env, int sig)
1700 {
1701   GDBState *s;
1702   char buf[256];
1703   int n;
1704
1705   s = &gdbserver_state;
1706   if (gdbserver_fd < 0 || s->fd < 0)
1707     return sig;
1708
1709   /* disable single step if it was enabled */
1710   cpu_single_step(env, 0);
1711   tb_flush(env);
1712
1713   if (sig != 0)
1714     {
1715       snprintf(buf, sizeof(buf), "S%02x", sig);
1716       put_packet(s, buf);
1717     }
1718   /* put_packet() might have detected that the peer terminated the
1719      connection.  */
1720   if (s->fd < 0)
1721       return sig;
1722
1723   sig = 0;
1724   s->state = RS_IDLE;
1725   s->running_state = 0;
1726   while (s->running_state == 0) {
1727       n = read (s->fd, buf, 256);
1728       if (n > 0)
1729         {
1730           int i;
1731
1732           for (i = 0; i < n; i++)
1733             gdb_read_byte (s, buf[i]);
1734         }
1735       else if (n == 0 || errno != EAGAIN)
1736         {
1737           /* XXX: Connection closed.  Should probably wait for annother
1738              connection before continuing.  */
1739           return sig;
1740         }
1741   }
1742   sig = s->signal;
1743   s->signal = 0;
1744   return sig;
1745 }
1746
1747 /* Tell the remote gdb that the process has exited.  */
1748 void gdb_exit(CPUState *env, int code)
1749 {
1750   GDBState *s;
1751   char buf[4];
1752
1753   s = &gdbserver_state;
1754   if (gdbserver_fd < 0 || s->fd < 0)
1755     return;
1756
1757   snprintf(buf, sizeof(buf), "W%02x", code);
1758   put_packet(s, buf);
1759 }
1760
1761
1762 static void gdb_accept(void *opaque)
1763 {
1764     GDBState *s;
1765     struct sockaddr_in sockaddr;
1766     socklen_t len;
1767     int val, fd;
1768
1769     for(;;) {
1770         len = sizeof(sockaddr);
1771         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1772         if (fd < 0 && errno != EINTR) {
1773             perror("accept");
1774             return;
1775         } else if (fd >= 0) {
1776             break;
1777         }
1778     }
1779
1780     /* set short latency */
1781     val = 1;
1782     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1783
1784     s = &gdbserver_state;
1785     memset (s, 0, sizeof (GDBState));
1786     s->env = first_cpu; /* XXX: allow to change CPU */
1787     s->fd = fd;
1788     gdb_has_xml = 0;
1789
1790     gdb_syscall_state = s;
1791
1792     fcntl(fd, F_SETFL, O_NONBLOCK);
1793 }
1794
1795 static int gdbserver_open(int port)
1796 {
1797     struct sockaddr_in sockaddr;
1798     int fd, val, ret;
1799
1800     fd = socket(PF_INET, SOCK_STREAM, 0);
1801     if (fd < 0) {
1802         perror("socket");
1803         return -1;
1804     }
1805
1806     /* allow fast reuse */
1807     val = 1;
1808     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1809
1810     sockaddr.sin_family = AF_INET;
1811     sockaddr.sin_port = htons(port);
1812     sockaddr.sin_addr.s_addr = 0;
1813     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1814     if (ret < 0) {
1815         perror("bind");
1816         return -1;
1817     }
1818     ret = listen(fd, 0);
1819     if (ret < 0) {
1820         perror("listen");
1821         return -1;
1822     }
1823     return fd;
1824 }
1825
1826 int gdbserver_start(int port)
1827 {
1828     gdbserver_fd = gdbserver_open(port);
1829     if (gdbserver_fd < 0)
1830         return -1;
1831     /* accept connections */
1832     gdb_accept (NULL);
1833     return 0;
1834 }
1835 #else
1836 static int gdb_chr_can_receive(void *opaque)
1837 {
1838   /* We can handle an arbitrarily large amount of data.
1839    Pick the maximum packet size, which is as good as anything.  */
1840   return MAX_PACKET_LENGTH;
1841 }
1842
1843 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1844 {
1845     GDBState *s = opaque;
1846     int i;
1847
1848     for (i = 0; i < size; i++) {
1849         gdb_read_byte(s, buf[i]);
1850     }
1851 }
1852
1853 static void gdb_chr_event(void *opaque, int event)
1854 {
1855     switch (event) {
1856     case CHR_EVENT_RESET:
1857         vm_stop(EXCP_INTERRUPT);
1858         gdb_syscall_state = opaque;
1859         gdb_has_xml = 0;
1860         break;
1861     default:
1862         break;
1863     }
1864 }
1865
1866 int gdbserver_start(const char *port)
1867 {
1868     GDBState *s;
1869     char gdbstub_port_name[128];
1870     int port_num;
1871     char *p;
1872     CharDriverState *chr;
1873
1874     if (!port || !*port)
1875       return -1;
1876
1877     port_num = strtol(port, &p, 10);
1878     if (*p == 0) {
1879         /* A numeric value is interpreted as a port number.  */
1880         snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1881                  "tcp::%d,nowait,nodelay,server", port_num);
1882         port = gdbstub_port_name;
1883     }
1884
1885     chr = qemu_chr_open("gdb", port);
1886     if (!chr)
1887         return -1;
1888
1889     s = qemu_mallocz(sizeof(GDBState));
1890     if (!s) {
1891         return -1;
1892     }
1893     s->env = first_cpu; /* XXX: allow to change CPU */
1894     s->chr = chr;
1895     qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1896                           gdb_chr_event, s);
1897     qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1898     return 0;
1899 }
1900 #endif