hw/ac97.c

   1 /*
   2  * Copyright (C) 2006 InnoTek Systemberatung GmbH
   3  *
   4  * This file is part of VirtualBox Open Source Edition (OSE), as
   5  * available from http://www.virtualbox.org. This file is free software;
   6  * you can redistribute it and/or modify it under the terms of the GNU
   7  * General Public License as published by the Free Software Foundation,
   8  * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
   9  * distribution. VirtualBox OSE is distributed in the hope that it will
  10  * be useful, but WITHOUT ANY WARRANTY of any kind.
  11  *
  12  * If you received this file as part of a commercial VirtualBox
  13  * distribution, then only the terms of your commercial VirtualBox
  14  * license agreement apply instead of the previous paragraph.
  15  *
  16  * Contributions after 2012-01-13 are licensed under the terms of the
  17  * GNU GPL, version 2 or (at your option) any later version.
  18  */
  19
  20 #include "hw.h"
  21 #include "audiodev.h"
  22 #include "audio/audio.h"
  23 #include "pci.h"
  24 #include "dma.h"
  25
  26 enum {
  27     AC97_Reset                     = 0x00,
  28     AC97_Master_Volume_Mute        = 0x02,
  29     AC97_Headphone_Volume_Mute     = 0x04,
  30     AC97_Master_Volume_Mono_Mute   = 0x06,
  31     AC97_Master_Tone_RL            = 0x08,
  32     AC97_PC_BEEP_Volume_Mute       = 0x0A,
  33     AC97_Phone_Volume_Mute         = 0x0C,
  34     AC97_Mic_Volume_Mute           = 0x0E,
  35     AC97_Line_In_Volume_Mute       = 0x10,
  36     AC97_CD_Volume_Mute            = 0x12,
  37     AC97_Video_Volume_Mute         = 0x14,
  38     AC97_Aux_Volume_Mute           = 0x16,
  39     AC97_PCM_Out_Volume_Mute       = 0x18,
  40     AC97_Record_Select             = 0x1A,
  41     AC97_Record_Gain_Mute          = 0x1C,
  42     AC97_Record_Gain_Mic_Mute      = 0x1E,
  43     AC97_General_Purpose           = 0x20,
  44     AC97_3D_Control                = 0x22,
  45     AC97_AC_97_RESERVED            = 0x24,
  46     AC97_Powerdown_Ctrl_Stat       = 0x26,
  47     AC97_Extended_Audio_ID         = 0x28,
  48     AC97_Extended_Audio_Ctrl_Stat  = 0x2A,
  49     AC97_PCM_Front_DAC_Rate        = 0x2C,
  50     AC97_PCM_Surround_DAC_Rate     = 0x2E,
  51     AC97_PCM_LFE_DAC_Rate          = 0x30,
  52     AC97_PCM_LR_ADC_Rate           = 0x32,
  53     AC97_MIC_ADC_Rate              = 0x34,
  54     AC97_6Ch_Vol_C_LFE_Mute        = 0x36,
  55     AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
  56     AC97_Vendor_Reserved           = 0x58,
  57     AC97_Vendor_ID1                = 0x7c,
  58     AC97_Vendor_ID2                = 0x7e
  59 };
  60
  61 #define SOFT_VOLUME
  62 #define SR_FIFOE 16             /* rwc */
  63 #define SR_BCIS  8              /* rwc */
  64 #define SR_LVBCI 4              /* rwc */
  65 #define SR_CELV  2              /* ro */
  66 #define SR_DCH   1              /* ro */
  67 #define SR_VALID_MASK ((1 << 5) - 1)
  68 #define SR_WCLEAR_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
  69 #define SR_RO_MASK (SR_DCH | SR_CELV)
  70 #define SR_INT_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
  71
  72 #define CR_IOCE  16             /* rw */
  73 #define CR_FEIE  8              /* rw */
  74 #define CR_LVBIE 4              /* rw */
  75 #define CR_RR    2              /* rw */
  76 #define CR_RPBM  1              /* rw */
  77 #define CR_VALID_MASK ((1 << 5) - 1)
  78 #define CR_DONT_CLEAR_MASK (CR_IOCE | CR_FEIE | CR_LVBIE)
  79
  80 #define GC_WR    4              /* rw */
  81 #define GC_CR    2              /* rw */
  82 #define GC_VALID_MASK ((1 << 6) - 1)
  83
  84 #define GS_MD3   (1<<17)        /* rw */
  85 #define GS_AD3   (1<<16)        /* rw */
  86 #define GS_RCS   (1<<15)        /* rwc */
  87 #define GS_B3S12 (1<<14)        /* ro */
  88 #define GS_B2S12 (1<<13)        /* ro */
  89 #define GS_B1S12 (1<<12)        /* ro */
  90 #define GS_S1R1  (1<<11)        /* rwc */
  91 #define GS_S0R1  (1<<10)        /* rwc */
  92 #define GS_S1CR  (1<<9)         /* ro */
  93 #define GS_S0CR  (1<<8)         /* ro */
  94 #define GS_MINT  (1<<7)         /* ro */
  95 #define GS_POINT (1<<6)         /* ro */
  96 #define GS_PIINT (1<<5)         /* ro */
  97 #define GS_RSRVD ((1<<4)|(1<<3))
  98 #define GS_MOINT (1<<2)         /* ro */
  99 #define GS_MIINT (1<<1)         /* ro */
 100 #define GS_GSCI  1              /* rwc */
 101 #define GS_RO_MASK (GS_B3S12|                   \
 102                     GS_B2S12|                   \
 103                     GS_B1S12|                   \
 104                     GS_S1CR|                    \
 105                     GS_S0CR|                    \
 106                     GS_MINT|                    \
 107                     GS_POINT|                   \
 108                     GS_PIINT|                   \
 109                     GS_RSRVD|                   \
 110                     GS_MOINT|                   \
 111                     GS_MIINT)
 112 #define GS_VALID_MASK ((1 << 18) - 1)
 113 #define GS_WCLEAR_MASK (GS_RCS|GS_S1R1|GS_S0R1|GS_GSCI)
 114
 115 #define BD_IOC (1<<31)
 116 #define BD_BUP (1<<30)
 117
 118 #define EACS_VRA 1
 119 #define EACS_VRM 8
 120
 121 #define MUTE_SHIFT 15
 122
 123 #define REC_MASK 7
 124 enum {
 125     REC_MIC = 0,
 126     REC_CD,
 127     REC_VIDEO,
 128     REC_AUX,
 129     REC_LINE_IN,
 130     REC_STEREO_MIX,
 131     REC_MONO_MIX,
 132     REC_PHONE
 133 };
 134
 135 typedef struct BD {
 136     uint32_t addr;
 137     uint32_t ctl_len;
 138 } BD;
 139
 140 typedef struct AC97BusMasterRegs {
 141     uint32_t bdbar;             /* rw 0 */
 142     uint8_t civ;                /* ro 0 */
 143     uint8_t lvi;                /* rw 0 */
 144     uint16_t sr;                /* rw 1 */
 145     uint16_t picb;              /* ro 0 */
 146     uint8_t piv;                /* ro 0 */
 147     uint8_t cr;                 /* rw 0 */
 148     unsigned int bd_valid;
 149     BD bd;
 150 } AC97BusMasterRegs;
 151
 152 typedef struct AC97LinkState {
 153     PCIDevice dev;
 154     QEMUSoundCard card;
 155     uint32_t use_broken_id;
 156     uint32_t glob_cnt;
 157     uint32_t glob_sta;
 158     uint32_t cas;
 159     uint32_t last_samp;
 160     AC97BusMasterRegs bm_regs[3];
 161     uint8_t mixer_data[256];
 162     SWVoiceIn *voice_pi;
 163     SWVoiceOut *voice_po;
 164     SWVoiceIn *voice_mc;
 165     int invalid_freq[3];
 166     uint8_t silence[128];
 167     int bup_flag;
 168     MemoryRegion io_nam;
 169     MemoryRegion io_nabm;
 170 } AC97LinkState;
 171
 172 enum {
 173     BUP_SET = 1,
 174     BUP_LAST = 2
 175 };
 176
 177 #ifdef DEBUG_AC97
 178 #define dolog(...) AUD_log ("ac97", __VA_ARGS__)
 179 #else
 180 #define dolog(...)
 181 #endif
 182
 183 #define MKREGS(prefix, start)                   \
 184 enum {                                          \
 185     prefix ## _BDBAR = start,                   \
 186     prefix ## _CIV = start + 4,                 \
 187     prefix ## _LVI = start + 5,                 \
 188     prefix ## _SR = start + 6,                  \
 189     prefix ## _PICB = start + 8,                \
 190     prefix ## _PIV = start + 10,                \
 191     prefix ## _CR = start + 11                  \
 192 }
 193
 194 enum {
 195     PI_INDEX = 0,
 196     PO_INDEX,
 197     MC_INDEX,
 198     LAST_INDEX
 199 };
 200
 201 MKREGS (PI, PI_INDEX * 16);
 202 MKREGS (PO, PO_INDEX * 16);
 203 MKREGS (MC, MC_INDEX * 16);
 204
 205 enum {
 206     GLOB_CNT = 0x2c,
 207     GLOB_STA = 0x30,
 208     CAS      = 0x34
 209 };
 210
 211 #define GET_BM(index) (((index) >> 4) & 3)
 212
 213 static void po_callback (void *opaque, int free);
 214 static void pi_callback (void *opaque, int avail);
 215 static void mc_callback (void *opaque, int avail);
 216
 217 static void warm_reset (AC97LinkState *s)
 218 {
 219     (void) s;
 220 }
 221
 222 static void cold_reset (AC97LinkState * s)
 223 {
 224     (void) s;
 225 }
 226
 227 static void fetch_bd (AC97LinkState *s, AC97BusMasterRegs *r)
 228 {
 229     uint8_t b[8];
 230
 231     pci_dma_read (&s->dev, r->bdbar + r->civ * 8, b, 8);
 232     r->bd_valid = 1;
 233     r->bd.addr = le32_to_cpu (*(uint32_t *) &b[0]) & ~3;
 234     r->bd.ctl_len = le32_to_cpu (*(uint32_t *) &b[4]);
 235     r->picb = r->bd.ctl_len & 0xffff;
 236     dolog ("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
 237            r->civ, r->bd.addr, r->bd.ctl_len >> 16,
 238            r->bd.ctl_len & 0xffff,
 239            (r->bd.ctl_len & 0xffff) << 1);
 240 }
 241
 242 static void update_sr (AC97LinkState *s, AC97BusMasterRegs *r, uint32_t new_sr)
 243 {
 244     int event = 0;
 245     int level = 0;
 246     uint32_t new_mask = new_sr & SR_INT_MASK;
 247     uint32_t old_mask = r->sr & SR_INT_MASK;
 248     uint32_t masks[] = {GS_PIINT, GS_POINT, GS_MINT};
 249
 250     if (new_mask ^ old_mask) {
 251         /** @todo is IRQ deasserted when only one of status bits is cleared? */
 252         if (!new_mask) {
 253             event = 1;
 254             level = 0;
 255         }
 256         else {
 257             if ((new_mask & SR_LVBCI) && (r->cr & CR_LVBIE)) {
 258                 event = 1;
 259                 level = 1;
 260             }
 261             if ((new_mask & SR_BCIS) && (r->cr & CR_IOCE)) {
 262                 event = 1;
 263                 level = 1;
 264             }
 265         }
 266     }
 267
 268     r->sr = new_sr;
 269
 270     dolog ("IOC%d LVB%d sr=%#x event=%d level=%d\n",
 271            r->sr & SR_BCIS, r->sr & SR_LVBCI,
 272            r->sr,
 273            event, level);
 274
 275     if (!event)
 276         return;
 277
 278     if (level) {
 279         s->glob_sta |= masks[r - s->bm_regs];
 280         dolog ("set irq level=1\n");
 281         qemu_set_irq (s->dev.irq[0], 1);
 282     }
 283     else {
 284         s->glob_sta &= ~masks[r - s->bm_regs];
 285         dolog ("set irq level=0\n");
 286         qemu_set_irq (s->dev.irq[0], 0);
 287     }
 288 }
 289
 290 static void voice_set_active (AC97LinkState *s, int bm_index, int on)
 291 {
 292     switch (bm_index) {
 293     case PI_INDEX:
 294         AUD_set_active_in (s->voice_pi, on);
 295         break;
 296
 297     case PO_INDEX:
 298         AUD_set_active_out (s->voice_po, on);
 299         break;
 300
 301     case MC_INDEX:
 302         AUD_set_active_in (s->voice_mc, on);
 303         break;
 304
 305     default:
 306         AUD_log ("ac97", "invalid bm_index(%d) in voice_set_active", bm_index);
 307         break;
 308     }
 309 }
 310
 311 static void reset_bm_regs (AC97LinkState *s, AC97BusMasterRegs *r)
 312 {
 313     dolog ("reset_bm_regs\n");
 314     r->bdbar = 0;
 315     r->civ = 0;
 316     r->lvi = 0;
 317     /** todo do we need to do that? */
 318     update_sr (s, r, SR_DCH);
 319     r->picb = 0;
 320     r->piv = 0;
 321     r->cr = r->cr & CR_DONT_CLEAR_MASK;
 322     r->bd_valid = 0;
 323
 324     voice_set_active (s, r - s->bm_regs, 0);
 325     memset (s->silence, 0, sizeof (s->silence));
 326 }
 327
 328 static void mixer_store (AC97LinkState *s, uint32_t i, uint16_t v)
 329 {
 330     if (i + 2 > sizeof (s->mixer_data)) {
 331         dolog ("mixer_store: index %d out of bounds %zd\n",
 332                i, sizeof (s->mixer_data));
 333         return;
 334     }
 335
 336     s->mixer_data[i + 0] = v & 0xff;
 337     s->mixer_data[i + 1] = v >> 8;
 338 }
 339
 340 static uint16_t mixer_load (AC97LinkState *s, uint32_t i)
 341 {
 342     uint16_t val = 0xffff;
 343
 344     if (i + 2 > sizeof (s->mixer_data)) {
 345         dolog ("mixer_store: index %d out of bounds %zd\n",
 346                i, sizeof (s->mixer_data));
 347     }
 348     else {
 349         val = s->mixer_data[i + 0] | (s->mixer_data[i + 1] << 8);
 350     }
 351
 352     return val;
 353 }
 354
 355 static void open_voice (AC97LinkState *s, int index, int freq)
 356 {
 357     struct audsettings as;
 358
 359     as.freq = freq;
 360     as.nchannels = 2;
 361     as.fmt = AUD_FMT_S16;
 362     as.endianness = 0;
 363
 364     if (freq > 0) {
 365         s->invalid_freq[index] = 0;
 366         switch (index) {
 367         case PI_INDEX:
 368             s->voice_pi = AUD_open_in (
 369                 &s->card,
 370                 s->voice_pi,
 371                 "ac97.pi",
 372                 s,
 373                 pi_callback,
 374                 &as
 375                 );
 376             break;
 377
 378         case PO_INDEX:
 379             s->voice_po = AUD_open_out (
 380                 &s->card,
 381                 s->voice_po,
 382                 "ac97.po",
 383                 s,
 384                 po_callback,
 385                 &as
 386                 );
 387             break;
 388
 389         case MC_INDEX:
 390             s->voice_mc = AUD_open_in (
 391                 &s->card,
 392                 s->voice_mc,
 393                 "ac97.mc",
 394                 s,
 395                 mc_callback,
 396                 &as
 397                 );
 398             break;
 399         }
 400     }
 401     else {
 402         s->invalid_freq[index] = freq;
 403         switch (index) {
 404         case PI_INDEX:
 405             AUD_close_in (&s->card, s->voice_pi);
 406             s->voice_pi = NULL;
 407             break;
 408
 409         case PO_INDEX:
 410             AUD_close_out (&s->card, s->voice_po);
 411             s->voice_po = NULL;
 412             break;
 413
 414         case MC_INDEX:
 415             AUD_close_in (&s->card, s->voice_mc);
 416             s->voice_mc = NULL;
 417             break;
 418         }
 419     }
 420 }
 421
 422 static void reset_voices (AC97LinkState *s, uint8_t active[LAST_INDEX])
 423 {
 424     uint16_t freq;
 425
 426     freq = mixer_load (s, AC97_PCM_LR_ADC_Rate);
 427     open_voice (s, PI_INDEX, freq);
 428     AUD_set_active_in (s->voice_pi, active[PI_INDEX]);
 429
 430     freq = mixer_load (s, AC97_PCM_Front_DAC_Rate);
 431     open_voice (s, PO_INDEX, freq);
 432     AUD_set_active_out (s->voice_po, active[PO_INDEX]);
 433
 434     freq = mixer_load (s, AC97_MIC_ADC_Rate);
 435     open_voice (s, MC_INDEX, freq);
 436     AUD_set_active_in (s->voice_mc, active[MC_INDEX]);
 437 }
 438
 439 static void get_volume (uint16_t vol, uint16_t mask, int inverse,
 440                         int *mute, uint8_t *lvol, uint8_t *rvol)
 441 {
 442     *mute = (vol >> MUTE_SHIFT) & 1;
 443     *rvol = (255 * (vol & mask)) / mask;
 444     *lvol = (255 * ((vol >> 8) & mask)) / mask;
 445
 446     if (inverse) {
 447         *rvol = 255 - *rvol;
 448         *lvol = 255 - *lvol;
 449     }
 450 }
 451
 452 static void update_combined_volume_out (AC97LinkState *s)
 453 {
 454     uint8_t lvol, rvol, plvol, prvol;
 455     int mute, pmute;
 456
 457     get_volume (mixer_load (s, AC97_Master_Volume_Mute), 0x3f, 1,
 458                 &mute, &lvol, &rvol);
 459     /* FIXME: should be 1f according to spec */
 460     get_volume (mixer_load (s, AC97_PCM_Out_Volume_Mute), 0x3f, 1,
 461                 &pmute, &plvol, &prvol);
 462
 463     mute = mute | pmute;
 464     lvol = (lvol * plvol) / 255;
 465     rvol = (rvol * prvol) / 255;
 466
 467     AUD_set_volume_out (s->voice_po, mute, lvol, rvol);
 468 }
 469
 470 static void update_volume_in (AC97LinkState *s)
 471 {
 472     uint8_t lvol, rvol;
 473     int mute;
 474
 475     get_volume (mixer_load (s, AC97_Record_Gain_Mute), 0x0f, 0,
 476                 &mute, &lvol, &rvol);
 477
 478     AUD_set_volume_in (s->voice_pi, mute, lvol, rvol);
 479 }
 480
 481 static void set_volume (AC97LinkState *s, int index, uint32_t val)
 482 {
 483     mixer_store (s, index, val);
 484     if (index == AC97_Master_Volume_Mute || index == AC97_PCM_Out_Volume_Mute) {
 485         update_combined_volume_out (s);
 486     } else if (index == AC97_Record_Gain_Mute) {
 487         update_volume_in (s);
 488     }
 489 }
 490
 491 static void record_select (AC97LinkState *s, uint32_t val)
 492 {
 493     uint8_t rs = val & REC_MASK;
 494     uint8_t ls = (val >> 8) & REC_MASK;
 495     mixer_store (s, AC97_Record_Select, rs | (ls << 8));
 496 }
 497
 498 static void mixer_reset (AC97LinkState *s)
 499 {
 500     uint8_t active[LAST_INDEX];
 501
 502     dolog ("mixer_reset\n");
 503     memset (s->mixer_data, 0, sizeof (s->mixer_data));
 504     memset (active, 0, sizeof (active));
 505     mixer_store (s, AC97_Reset                   , 0x0000); /* 6940 */
 506     mixer_store (s, AC97_Master_Volume_Mono_Mute , 0x8000);
 507     mixer_store (s, AC97_PC_BEEP_Volume_Mute     , 0x0000);
 508
 509     mixer_store (s, AC97_Phone_Volume_Mute       , 0x8008);
 510     mixer_store (s, AC97_Mic_Volume_Mute         , 0x8008);
 511     mixer_store (s, AC97_CD_Volume_Mute          , 0x8808);
 512     mixer_store (s, AC97_Aux_Volume_Mute         , 0x8808);
 513     mixer_store (s, AC97_Record_Gain_Mic_Mute    , 0x8000);
 514     mixer_store (s, AC97_General_Purpose         , 0x0000);
 515     mixer_store (s, AC97_3D_Control              , 0x0000);
 516     mixer_store (s, AC97_Powerdown_Ctrl_Stat     , 0x000f);
 517
 518     /*
 519      * Sigmatel 9700 (STAC9700)
 520      */
 521     mixer_store (s, AC97_Vendor_ID1              , 0x8384);
 522     mixer_store (s, AC97_Vendor_ID2              , 0x7600); /* 7608 */
 523
 524     mixer_store (s, AC97_Extended_Audio_ID       , 0x0809);
 525     mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
 526     mixer_store (s, AC97_PCM_Front_DAC_Rate      , 0xbb80);
 527     mixer_store (s, AC97_PCM_Surround_DAC_Rate   , 0xbb80);
 528     mixer_store (s, AC97_PCM_LFE_DAC_Rate        , 0xbb80);
 529     mixer_store (s, AC97_PCM_LR_ADC_Rate         , 0xbb80);
 530     mixer_store (s, AC97_MIC_ADC_Rate            , 0xbb80);
 531
 532     record_select (s, 0);
 533     set_volume (s, AC97_Master_Volume_Mute, 0x8000);
 534     set_volume (s, AC97_PCM_Out_Volume_Mute, 0x8808);
 535     set_volume (s, AC97_Line_In_Volume_Mute, 0x8808);
 536
 537     reset_voices (s, active);
 538 }
 539
 540 /**
 541  * Native audio mixer
 542  * I/O Reads
 543  */
 544 static uint32_t nam_readb (void *opaque, uint32_t addr)
 545 {
 546     AC97LinkState *s = opaque;
 547     dolog ("U nam readb %#x\n", addr);
 548     s->cas = 0;
 549     return ~0U;
 550 }
 551
 552 static uint32_t nam_readw (void *opaque, uint32_t addr)
 553 {
 554     AC97LinkState *s = opaque;
 555     uint32_t val = ~0U;
 556     uint32_t index = addr;
 557     s->cas = 0;
 558     val = mixer_load (s, index);
 559     return val;
 560 }
 561
 562 static uint32_t nam_readl (void *opaque, uint32_t addr)
 563 {
 564     AC97LinkState *s = opaque;
 565     dolog ("U nam readl %#x\n", addr);
 566     s->cas = 0;
 567     return ~0U;
 568 }
 569
 570 /**
 571  * Native audio mixer
 572  * I/O Writes
 573  */
 574 static void nam_writeb (void *opaque, uint32_t addr, uint32_t val)
 575 {
 576     AC97LinkState *s = opaque;
 577     dolog ("U nam writeb %#x <- %#x\n", addr, val);
 578     s->cas = 0;
 579 }
 580
 581 static void nam_writew (void *opaque, uint32_t addr, uint32_t val)
 582 {
 583     AC97LinkState *s = opaque;
 584     uint32_t index = addr;
 585     s->cas = 0;
 586     switch (index) {
 587     case AC97_Reset:
 588         mixer_reset (s);
 589         break;
 590     case AC97_Powerdown_Ctrl_Stat:
 591         val &= ~0xf;
 592         val |= mixer_load (s, index) & 0xf;
 593         mixer_store (s, index, val);
 594         break;
 595     case AC97_PCM_Out_Volume_Mute:
 596     case AC97_Master_Volume_Mute:
 597     case AC97_Record_Gain_Mute:
 598     case AC97_Line_In_Volume_Mute:
 599         set_volume (s, index, val);
 600         break;
 601     case AC97_Record_Select:
 602         record_select (s, val);
 603         break;
 604     case AC97_Vendor_ID1:
 605     case AC97_Vendor_ID2:
 606         dolog ("Attempt to write vendor ID to %#x\n", val);
 607         break;
 608     case AC97_Extended_Audio_ID:
 609         dolog ("Attempt to write extended audio ID to %#x\n", val);
 610         break;
 611     case AC97_Extended_Audio_Ctrl_Stat:
 612         if (!(val & EACS_VRA)) {
 613             mixer_store (s, AC97_PCM_Front_DAC_Rate, 0xbb80);
 614             mixer_store (s, AC97_PCM_LR_ADC_Rate,    0xbb80);
 615             open_voice (s, PI_INDEX, 48000);
 616             open_voice (s, PO_INDEX, 48000);
 617         }
 618         if (!(val & EACS_VRM)) {
 619             mixer_store (s, AC97_MIC_ADC_Rate, 0xbb80);
 620             open_voice (s, MC_INDEX, 48000);
 621         }
 622         dolog ("Setting extended audio control to %#x\n", val);
 623         mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, val);
 624         break;
 625     case AC97_PCM_Front_DAC_Rate:
 626         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
 627             mixer_store (s, index, val);
 628             dolog ("Set front DAC rate to %d\n", val);
 629             open_voice (s, PO_INDEX, val);
 630         }
 631         else {
 632             dolog ("Attempt to set front DAC rate to %d, "
 633                    "but VRA is not set\n",
 634                    val);
 635         }
 636         break;
 637     case AC97_MIC_ADC_Rate:
 638         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM) {
 639             mixer_store (s, index, val);
 640             dolog ("Set MIC ADC rate to %d\n", val);
 641             open_voice (s, MC_INDEX, val);
 642         }
 643         else {
 644             dolog ("Attempt to set MIC ADC rate to %d, "
 645                    "but VRM is not set\n",
 646                    val);
 647         }
 648         break;
 649     case AC97_PCM_LR_ADC_Rate:
 650         if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
 651             mixer_store (s, index, val);
 652             dolog ("Set front LR ADC rate to %d\n", val);
 653             open_voice (s, PI_INDEX, val);
 654         }
 655         else {
 656             dolog ("Attempt to set LR ADC rate to %d, but VRA is not set\n",
 657                     val);
 658         }
 659         break;
 660     default:
 661         dolog ("U nam writew %#x <- %#x\n", addr, val);
 662         mixer_store (s, index, val);
 663         break;
 664     }
 665 }
 666
 667 static void nam_writel (void *opaque, uint32_t addr, uint32_t val)
 668 {
 669     AC97LinkState *s = opaque;
 670     dolog ("U nam writel %#x <- %#x\n", addr, val);
 671     s->cas = 0;
 672 }
 673
 674 /**
 675  * Native audio bus master
 676  * I/O Reads
 677  */
 678 static uint32_t nabm_readb (void *opaque, uint32_t addr)
 679 {
 680     AC97LinkState *s = opaque;
 681     AC97BusMasterRegs *r = NULL;
 682     uint32_t index = addr;
 683     uint32_t val = ~0U;
 684
 685     switch (index) {
 686     case CAS:
 687         dolog ("CAS %d\n", s->cas);
 688         val = s->cas;
 689         s->cas = 1;
 690         break;
 691     case PI_CIV:
 692     case PO_CIV:
 693     case MC_CIV:
 694         r = &s->bm_regs[GET_BM (index)];
 695         val = r->civ;
 696         dolog ("CIV[%d] -> %#x\n", GET_BM (index), val);
 697         break;
 698     case PI_LVI:
 699     case PO_LVI:
 700     case MC_LVI:
 701         r = &s->bm_regs[GET_BM (index)];
 702         val = r->lvi;
 703         dolog ("LVI[%d] -> %#x\n", GET_BM (index), val);
 704         break;
 705     case PI_PIV:
 706     case PO_PIV:
 707     case MC_PIV:
 708         r = &s->bm_regs[GET_BM (index)];
 709         val = r->piv;
 710         dolog ("PIV[%d] -> %#x\n", GET_BM (index), val);
 711         break;
 712     case PI_CR:
 713     case PO_CR:
 714     case MC_CR:
 715         r = &s->bm_regs[GET_BM (index)];
 716         val = r->cr;
 717         dolog ("CR[%d] -> %#x\n", GET_BM (index), val);
 718         break;
 719     case PI_SR:
 720     case PO_SR:
 721     case MC_SR:
 722         r = &s->bm_regs[GET_BM (index)];
 723         val = r->sr & 0xff;
 724         dolog ("SRb[%d] -> %#x\n", GET_BM (index), val);
 725         break;
 726     default:
 727         dolog ("U nabm readb %#x -> %#x\n", addr, val);
 728         break;
 729     }
 730     return val;
 731 }
 732
 733 static uint32_t nabm_readw (void *opaque, uint32_t addr)
 734 {
 735     AC97LinkState *s = opaque;
 736     AC97BusMasterRegs *r = NULL;
 737     uint32_t index = addr;
 738     uint32_t val = ~0U;
 739
 740     switch (index) {
 741     case PI_SR:
 742     case PO_SR:
 743     case MC_SR:
 744         r = &s->bm_regs[GET_BM (index)];
 745         val = r->sr;
 746         dolog ("SR[%d] -> %#x\n", GET_BM (index), val);
 747         break;
 748     case PI_PICB:
 749     case PO_PICB:
 750     case MC_PICB:
 751         r = &s->bm_regs[GET_BM (index)];
 752         val = r->picb;
 753         dolog ("PICB[%d] -> %#x\n", GET_BM (index), val);
 754         break;
 755     default:
 756         dolog ("U nabm readw %#x -> %#x\n", addr, val);
 757         break;
 758     }
 759     return val;
 760 }
 761
 762 static uint32_t nabm_readl (void *opaque, uint32_t addr)
 763 {
 764     AC97LinkState *s = opaque;
 765     AC97BusMasterRegs *r = NULL;
 766     uint32_t index = addr;
 767     uint32_t val = ~0U;
 768
 769     switch (index) {
 770     case PI_BDBAR:
 771     case PO_BDBAR:
 772     case MC_BDBAR:
 773         r = &s->bm_regs[GET_BM (index)];
 774         val = r->bdbar;
 775         dolog ("BMADDR[%d] -> %#x\n", GET_BM (index), val);
 776         break;
 777     case PI_CIV:
 778     case PO_CIV:
 779     case MC_CIV:
 780         r = &s->bm_regs[GET_BM (index)];
 781         val = r->civ | (r->lvi << 8) | (r->sr << 16);
 782         dolog ("CIV LVI SR[%d] -> %#x, %#x, %#x\n", GET_BM (index),
 783                r->civ, r->lvi, r->sr);
 784         break;
 785     case PI_PICB:
 786     case PO_PICB:
 787     case MC_PICB:
 788         r = &s->bm_regs[GET_BM (index)];
 789         val = r->picb | (r->piv << 16) | (r->cr << 24);
 790         dolog ("PICB PIV CR[%d] -> %#x %#x %#x %#x\n", GET_BM (index),
 791                val, r->picb, r->piv, r->cr);
 792         break;
 793     case GLOB_CNT:
 794         val = s->glob_cnt;
 795         dolog ("glob_cnt -> %#x\n", val);
 796         break;
 797     case GLOB_STA:
 798         val = s->glob_sta | GS_S0CR;
 799         dolog ("glob_sta -> %#x\n", val);
 800         break;
 801     default:
 802         dolog ("U nabm readl %#x -> %#x\n", addr, val);
 803         break;
 804     }
 805     return val;
 806 }
 807
 808 /**
 809  * Native audio bus master
 810  * I/O Writes
 811  */
 812 static void nabm_writeb (void *opaque, uint32_t addr, uint32_t val)
 813 {
 814     AC97LinkState *s = opaque;
 815     AC97BusMasterRegs *r = NULL;
 816     uint32_t index = addr;
 817     switch (index) {
 818     case PI_LVI:
 819     case PO_LVI:
 820     case MC_LVI:
 821         r = &s->bm_regs[GET_BM (index)];
 822         if ((r->cr & CR_RPBM) && (r->sr & SR_DCH)) {
 823             r->sr &= ~(SR_DCH | SR_CELV);
 824             r->civ = r->piv;
 825             r->piv = (r->piv + 1) % 32;
 826             fetch_bd (s, r);
 827         }
 828         r->lvi = val % 32;
 829         dolog ("LVI[%d] <- %#x\n", GET_BM (index), val);
 830         break;
 831     case PI_CR:
 832     case PO_CR:
 833     case MC_CR:
 834         r = &s->bm_regs[GET_BM (index)];
 835         if (val & CR_RR) {
 836             reset_bm_regs (s, r);
 837         }
 838         else {
 839             r->cr = val & CR_VALID_MASK;
 840             if (!(r->cr & CR_RPBM)) {
 841                 voice_set_active (s, r - s->bm_regs, 0);
 842                 r->sr |= SR_DCH;
 843             }
 844             else {
 845                 r->civ = r->piv;
 846                 r->piv = (r->piv + 1) % 32;
 847                 fetch_bd (s, r);
 848                 r->sr &= ~SR_DCH;
 849                 voice_set_active (s, r - s->bm_regs, 1);
 850             }
 851         }
 852         dolog ("CR[%d] <- %#x (cr %#x)\n", GET_BM (index), val, r->cr);
 853         break;
 854     case PI_SR:
 855     case PO_SR:
 856     case MC_SR:
 857         r = &s->bm_regs[GET_BM (index)];
 858         r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
 859         update_sr (s, r, r->sr & ~(val & SR_WCLEAR_MASK));
 860         dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index), val, r->sr);
 861         break;
 862     default:
 863         dolog ("U nabm writeb %#x <- %#x\n", addr, val);
 864         break;
 865     }
 866 }
 867
 868 static void nabm_writew (void *opaque, uint32_t addr, uint32_t val)
 869 {
 870     AC97LinkState *s = opaque;
 871     AC97BusMasterRegs *r = NULL;
 872     uint32_t index = addr;
 873     switch (index) {
 874     case PI_SR:
 875     case PO_SR:
 876     case MC_SR:
 877         r = &s->bm_regs[GET_BM (index)];
 878         r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
 879         update_sr (s, r, r->sr & ~(val & SR_WCLEAR_MASK));
 880         dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index), val, r->sr);
 881         break;
 882     default:
 883         dolog ("U nabm writew %#x <- %#x\n", addr, val);
 884         break;
 885     }
 886 }
 887
 888 static void nabm_writel (void *opaque, uint32_t addr, uint32_t val)
 889 {
 890     AC97LinkState *s = opaque;
 891     AC97BusMasterRegs *r = NULL;
 892     uint32_t index = addr;
 893     switch (index) {
 894     case PI_BDBAR:
 895     case PO_BDBAR:
 896     case MC_BDBAR:
 897         r = &s->bm_regs[GET_BM (index)];
 898         r->bdbar = val & ~3;
 899         dolog ("BDBAR[%d] <- %#x (bdbar %#x)\n",
 900                GET_BM (index), val, r->bdbar);
 901         break;
 902     case GLOB_CNT:
 903         if (val & GC_WR)
 904             warm_reset (s);
 905         if (val & GC_CR)
 906             cold_reset (s);
 907         if (!(val & (GC_WR | GC_CR)))
 908             s->glob_cnt = val & GC_VALID_MASK;
 909         dolog ("glob_cnt <- %#x (glob_cnt %#x)\n", val, s->glob_cnt);
 910         break;
 911     case GLOB_STA:
 912         s->glob_sta &= ~(val & GS_WCLEAR_MASK);
 913         s->glob_sta |= (val & ~(GS_WCLEAR_MASK | GS_RO_MASK)) & GS_VALID_MASK;
 914         dolog ("glob_sta <- %#x (glob_sta %#x)\n", val, s->glob_sta);
 915         break;
 916     default:
 917         dolog ("U nabm writel %#x <- %#x\n", addr, val);
 918         break;
 919     }
 920 }
 921
 922 static int write_audio (AC97LinkState *s, AC97BusMasterRegs *r,
 923                         int max, int *stop)
 924 {
 925     uint8_t tmpbuf[4096];
 926     uint32_t addr = r->bd.addr;
 927     uint32_t temp = r->picb << 1;
 928     uint32_t written = 0;
 929     int to_copy = 0;
 930     temp = audio_MIN (temp, max);
 931
 932     if (!temp) {
 933         *stop = 1;
 934         return 0;
 935     }
 936
 937     while (temp) {
 938         int copied;
 939         to_copy = audio_MIN (temp, sizeof (tmpbuf));
 940         pci_dma_read (&s->dev, addr, tmpbuf, to_copy);
 941         copied = AUD_write (s->voice_po, tmpbuf, to_copy);
 942         dolog ("write_audio max=%x to_copy=%x copied=%x\n",
 943                max, to_copy, copied);
 944         if (!copied) {
 945             *stop = 1;
 946             break;
 947         }
 948         temp -= copied;
 949         addr += copied;
 950         written += copied;
 951     }
 952
 953     if (!temp) {
 954         if (to_copy < 4) {
 955             dolog ("whoops\n");
 956             s->last_samp = 0;
 957         }
 958         else {
 959             s->last_samp = *(uint32_t *) &tmpbuf[to_copy - 4];
 960         }
 961     }
 962
 963     r->bd.addr = addr;
 964     return written;
 965 }
 966
 967 static void write_bup (AC97LinkState *s, int elapsed)
 968 {
 969     dolog ("write_bup\n");
 970     if (!(s->bup_flag & BUP_SET)) {
 971         if (s->bup_flag & BUP_LAST) {
 972             int i;
 973             uint8_t *p = s->silence;
 974             for (i = 0; i < sizeof (s->silence) / 4; i++, p += 4) {
 975                 *(uint32_t *) p = s->last_samp;
 976             }
 977         }
 978         else {
 979             memset (s->silence, 0, sizeof (s->silence));
 980         }
 981         s->bup_flag |= BUP_SET;
 982     }
 983
 984     while (elapsed) {
 985         int temp = audio_MIN (elapsed, sizeof (s->silence));
 986         while (temp) {
 987             int copied = AUD_write (s->voice_po, s->silence, temp);
 988             if (!copied)
 989                 return;
 990             temp -= copied;
 991             elapsed -= copied;
 992         }
 993     }
 994 }
 995
 996 static int read_audio (AC97LinkState *s, AC97BusMasterRegs *r,
 997                        int max, int *stop)
 998 {
 999     uint8_t tmpbuf[4096];
1000     uint32_t addr = r->bd.addr;
1001     uint32_t temp = r->picb << 1;
1002     uint32_t nread = 0;
1003     int to_copy = 0;
1004     SWVoiceIn *voice = (r - s->bm_regs) == MC_INDEX ? s->voice_mc : s->voice_pi;
1005
1006     temp = audio_MIN (temp, max);
1007
1008     if (!temp) {
1009         *stop = 1;
1010         return 0;
1011     }
1012
1013     while (temp) {
1014         int acquired;
1015         to_copy = audio_MIN (temp, sizeof (tmpbuf));
1016         acquired = AUD_read (voice, tmpbuf, to_copy);
1017         if (!acquired) {
1018             *stop = 1;
1019             break;
1020         }
1021         pci_dma_write (&s->dev, addr, tmpbuf, acquired);
1022         temp -= acquired;
1023         addr += acquired;
1024         nread += acquired;
1025     }
1026
1027     r->bd.addr = addr;
1028     return nread;
1029 }
1030
1031 static void transfer_audio (AC97LinkState *s, int index, int elapsed)
1032 {
1033     AC97BusMasterRegs *r = &s->bm_regs[index];
1034     int stop = 0;
1035
1036     if (s->invalid_freq[index]) {
1037         AUD_log ("ac97", "attempt to use voice %d with invalid frequency %d\n",
1038                  index, s->invalid_freq[index]);
1039         return;
1040     }
1041
1042     if (r->sr & SR_DCH) {
1043         if (r->cr & CR_RPBM) {
1044             switch (index) {
1045             case PO_INDEX:
1046                 write_bup (s, elapsed);
1047                 break;
1048             }
1049         }
1050         return;
1051     }
1052
1053     while ((elapsed >> 1) && !stop) {
1054         int temp;
1055
1056         if (!r->bd_valid) {
1057             dolog ("invalid bd\n");
1058             fetch_bd (s, r);
1059         }
1060
1061         if (!r->picb) {
1062             dolog ("fresh bd %d is empty %#x %#x\n",
1063                    r->civ, r->bd.addr, r->bd.ctl_len);
1064             if (r->civ == r->lvi) {
1065                 r->sr |= SR_DCH; /* CELV? */
1066                 s->bup_flag = 0;
1067                 break;
1068             }
1069             r->sr &= ~SR_CELV;
1070             r->civ = r->piv;
1071             r->piv = (r->piv + 1) % 32;
1072             fetch_bd (s, r);
1073             return;
1074         }
1075
1076         switch (index) {
1077         case PO_INDEX:
1078             temp = write_audio (s, r, elapsed, &stop);
1079             elapsed -= temp;
1080             r->picb -= (temp >> 1);
1081             break;
1082
1083         case PI_INDEX:
1084         case MC_INDEX:
1085             temp = read_audio (s, r, elapsed, &stop);
1086             elapsed -= temp;
1087             r->picb -= (temp >> 1);
1088             break;
1089         }
1090
1091         if (!r->picb) {
1092             uint32_t new_sr = r->sr & ~SR_CELV;
1093
1094             if (r->bd.ctl_len & BD_IOC) {
1095                 new_sr |= SR_BCIS;
1096             }
1097
1098             if (r->civ == r->lvi) {
1099                 dolog ("Underrun civ (%d) == lvi (%d)\n", r->civ, r->lvi);
1100
1101                 new_sr |= SR_LVBCI | SR_DCH | SR_CELV;
1102                 stop = 1;
1103                 s->bup_flag = (r->bd.ctl_len & BD_BUP) ? BUP_LAST : 0;
1104             }
1105             else {
1106                 r->civ = r->piv;
1107                 r->piv = (r->piv + 1) % 32;
1108                 fetch_bd (s, r);
1109             }
1110
1111             update_sr (s, r, new_sr);
1112         }
1113     }
1114 }
1115
1116 static void pi_callback (void *opaque, int avail)
1117 {
1118     transfer_audio (opaque, PI_INDEX, avail);
1119 }
1120
1121 static void mc_callback (void *opaque, int avail)
1122 {
1123     transfer_audio (opaque, MC_INDEX, avail);
1124 }
1125
1126 static void po_callback (void *opaque, int free)
1127 {
1128     transfer_audio (opaque, PO_INDEX, free);
1129 }
1130
1131 static const VMStateDescription vmstate_ac97_bm_regs = {
1132     .name = "ac97_bm_regs",
1133     .version_id = 1,
1134     .minimum_version_id = 1,
1135     .minimum_version_id_old = 1,
1136     .fields      = (VMStateField []) {
1137         VMSTATE_UINT32 (bdbar, AC97BusMasterRegs),
1138         VMSTATE_UINT8 (civ, AC97BusMasterRegs),
1139         VMSTATE_UINT8 (lvi, AC97BusMasterRegs),
1140         VMSTATE_UINT16 (sr, AC97BusMasterRegs),
1141         VMSTATE_UINT16 (picb, AC97BusMasterRegs),
1142         VMSTATE_UINT8 (piv, AC97BusMasterRegs),
1143         VMSTATE_UINT8 (cr, AC97BusMasterRegs),
1144         VMSTATE_UINT32 (bd_valid, AC97BusMasterRegs),
1145         VMSTATE_UINT32 (bd.addr, AC97BusMasterRegs),
1146         VMSTATE_UINT32 (bd.ctl_len, AC97BusMasterRegs),
1147         VMSTATE_END_OF_LIST ()
1148     }
1149 };
1150
1151 static int ac97_post_load (void *opaque, int version_id)
1152 {
1153     uint8_t active[LAST_INDEX];
1154     AC97LinkState *s = opaque;
1155
1156     record_select (s, mixer_load (s, AC97_Record_Select));
1157     set_volume (s, AC97_Master_Volume_Mute,
1158                 mixer_load (s, AC97_Master_Volume_Mute));
1159     set_volume (s, AC97_PCM_Out_Volume_Mute,
1160                 mixer_load (s, AC97_PCM_Out_Volume_Mute));
1161     set_volume (s, AC97_Line_In_Volume_Mute,
1162                 mixer_load (s, AC97_Line_In_Volume_Mute));
1163
1164     active[PI_INDEX] = !!(s->bm_regs[PI_INDEX].cr & CR_RPBM);
1165     active[PO_INDEX] = !!(s->bm_regs[PO_INDEX].cr & CR_RPBM);
1166     active[MC_INDEX] = !!(s->bm_regs[MC_INDEX].cr & CR_RPBM);
1167     reset_voices (s, active);
1168
1169     s->bup_flag = 0;
1170     s->last_samp = 0;
1171     return 0;
1172 }
1173
1174 static bool is_version_2 (void *opaque, int version_id)
1175 {
1176     return version_id == 2;
1177 }
1178
1179 static const VMStateDescription vmstate_ac97 = {
1180     .name = "ac97",
1181     .version_id = 3,
1182     .minimum_version_id = 2,
1183     .minimum_version_id_old = 2,
1184     .post_load = ac97_post_load,
1185     .fields      = (VMStateField []) {
1186         VMSTATE_PCI_DEVICE (dev, AC97LinkState),
1187         VMSTATE_UINT32 (glob_cnt, AC97LinkState),
1188         VMSTATE_UINT32 (glob_sta, AC97LinkState),
1189         VMSTATE_UINT32 (cas, AC97LinkState),
1190         VMSTATE_STRUCT_ARRAY (bm_regs, AC97LinkState, 3, 1,
1191                               vmstate_ac97_bm_regs, AC97BusMasterRegs),
1192         VMSTATE_BUFFER (mixer_data, AC97LinkState),
1193         VMSTATE_UNUSED_TEST (is_version_2, 3),
1194         VMSTATE_END_OF_LIST ()
1195     }
1196 };
1197
1198 static const MemoryRegionPortio nam_portio[] = {
1199     { 0, 256 * 1, 1, .read = nam_readb, },
1200     { 0, 256 * 2, 2, .read = nam_readw, },
1201     { 0, 256 * 4, 4, .read = nam_readl, },
1202     { 0, 256 * 1, 1, .write = nam_writeb, },
1203     { 0, 256 * 2, 2, .write = nam_writew, },
1204     { 0, 256 * 4, 4, .write = nam_writel, },
1205     PORTIO_END_OF_LIST (),
1206 };
1207
1208 static const MemoryRegionOps ac97_io_nam_ops = {
1209     .old_portio = nam_portio,
1210 };
1211
1212 static const MemoryRegionPortio nabm_portio[] = {
1213     { 0, 64 * 1, 1, .read = nabm_readb, },
1214     { 0, 64 * 2, 2, .read = nabm_readw, },
1215     { 0, 64 * 4, 4, .read = nabm_readl, },
1216     { 0, 64 * 1, 1, .write = nabm_writeb, },
1217     { 0, 64 * 2, 2, .write = nabm_writew, },
1218     { 0, 64 * 4, 4, .write = nabm_writel, },
1219     PORTIO_END_OF_LIST ()
1220 };
1221
1222 static const MemoryRegionOps ac97_io_nabm_ops = {
1223     .old_portio = nabm_portio,
1224 };
1225
1226 static void ac97_on_reset (void *opaque)
1227 {
1228     AC97LinkState *s = opaque;
1229
1230     reset_bm_regs (s, &s->bm_regs[0]);
1231     reset_bm_regs (s, &s->bm_regs[1]);
1232     reset_bm_regs (s, &s->bm_regs[2]);
1233
1234     /*
1235      * Reset the mixer too. The Windows XP driver seems to rely on
1236      * this. At least it wants to read the vendor id before it resets
1237      * the codec manually.
1238      */
1239     mixer_reset (s);
1240 }
1241
1242 static int ac97_initfn (PCIDevice *dev)
1243 {
1244     AC97LinkState *s = DO_UPCAST (AC97LinkState, dev, dev);
1245     uint8_t *c = s->dev.config;
1246
1247     /* TODO: no need to override */
1248     c[PCI_COMMAND] = 0x00;      /* pcicmd pci command rw, ro */
1249     c[PCI_COMMAND + 1] = 0x00;
1250
1251     /* TODO: */
1252     c[PCI_STATUS] = PCI_STATUS_FAST_BACK;      /* pcists pci status rwc, ro */
1253     c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_MEDIUM >> 8;
1254
1255     c[PCI_CLASS_PROG] = 0x00;      /* pi programming interface ro */
1256
1257     /* TODO set when bar is registered. no need to override. */
1258     /* nabmar native audio mixer base address rw */
1259     c[PCI_BASE_ADDRESS_0] = PCI_BASE_ADDRESS_SPACE_IO;
1260     c[PCI_BASE_ADDRESS_0 + 1] = 0x00;
1261     c[PCI_BASE_ADDRESS_0 + 2] = 0x00;
1262     c[PCI_BASE_ADDRESS_0 + 3] = 0x00;
1263
1264     /* TODO set when bar is registered. no need to override. */
1265       /* nabmbar native audio bus mastering base address rw */
1266     c[PCI_BASE_ADDRESS_0 + 4] = PCI_BASE_ADDRESS_SPACE_IO;
1267     c[PCI_BASE_ADDRESS_0 + 5] = 0x00;
1268     c[PCI_BASE_ADDRESS_0 + 6] = 0x00;
1269     c[PCI_BASE_ADDRESS_0 + 7] = 0x00;
1270
1271     if (s->use_broken_id) {
1272         c[PCI_SUBSYSTEM_VENDOR_ID] = 0x86;
1273         c[PCI_SUBSYSTEM_VENDOR_ID + 1] = 0x80;
1274         c[PCI_SUBSYSTEM_ID] = 0x00;
1275         c[PCI_SUBSYSTEM_ID + 1] = 0x00;
1276     }
1277
1278     c[PCI_INTERRUPT_LINE] = 0x00;      /* intr_ln interrupt line rw */
1279     c[PCI_INTERRUPT_PIN] = 0x01;      /* intr_pn interrupt pin ro */
1280
1281     memory_region_init_io (&s->io_nam, &ac97_io_nam_ops, s, "ac97-nam", 1024);
1282     memory_region_init_io (&s->io_nabm, &ac97_io_nabm_ops, s, "ac97-nabm", 256);
1283     pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nam);
1284     pci_register_bar (&s->dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io_nabm);
1285     qemu_register_reset (ac97_on_reset, s);
1286     AUD_register_card ("ac97", &s->card);
1287     ac97_on_reset (s);
1288     return 0;
1289 }
1290
1291 static int ac97_exitfn (PCIDevice *dev)
1292 {
1293     AC97LinkState *s = DO_UPCAST (AC97LinkState, dev, dev);
1294
1295     memory_region_destroy (&s->io_nam);
1296     memory_region_destroy (&s->io_nabm);
1297     return 0;
1298 }
1299
1300 int ac97_init (PCIBus *bus)
1301 {
1302     pci_create_simple (bus, -1, "AC97");
1303     return 0;
1304 }
1305
1306 static Property ac97_properties[] = {
1307     DEFINE_PROP_UINT32 ("use_broken_id", AC97LinkState, use_broken_id, 0),
1308     DEFINE_PROP_END_OF_LIST (),
1309 };
1310
1311 static void ac97_class_init (ObjectClass *klass, void *data)
1312 {
1313     DeviceClass *dc = DEVICE_CLASS (klass);
1314     PCIDeviceClass *k = PCI_DEVICE_CLASS (klass);
1315
1316     k->init = ac97_initfn;
1317     k->exit = ac97_exitfn;
1318     k->vendor_id = PCI_VENDOR_ID_INTEL;
1319     k->device_id = PCI_DEVICE_ID_INTEL_82801AA_5;
1320     k->revision = 0x01;
1321     k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
1322     dc->desc = "Intel 82801AA AC97 Audio";
1323     dc->vmsd = &vmstate_ac97;
1324     dc->props = ac97_properties;
1325 }
1326
1327 static TypeInfo ac97_info = {
1328     .name          = "AC97",
1329     .parent        = TYPE_PCI_DEVICE,
1330     .instance_size = sizeof (AC97LinkState),
1331     .class_init    = ac97_class_init,
1332 };
1333
1334 static void ac97_register_types (void)
1335 {
1336     type_register_static (&ac97_info);
1337 }
1338
1339 type_init (ac97_register_types)