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Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu
[qemu.git] / hw / arm_boot.c
1 /*
2 * ARM kernel loader.
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10 #include "config.h"
11 #include "hw.h"
12 #include "arm-misc.h"
13 #include "sysemu.h"
14 #include "boards.h"
15 #include "loader.h"
16 #include "elf.h"
17 #include "device_tree.h"
18
19 #define KERNEL_ARGS_ADDR 0x100
20 #define KERNEL_LOAD_ADDR 0x00010000
21 #define INITRD_LOAD_ADDR 0x00d00000
22
23 /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
24 static uint32_t bootloader[] = {
25 0xe3a00000, /* mov r0, #0 */
26 0xe59f1004, /* ldr r1, [pc, #4] */
27 0xe59f2004, /* ldr r2, [pc, #4] */
28 0xe59ff004, /* ldr pc, [pc, #4] */
29 0, /* Board ID */
30 0, /* Address of kernel args. Set by integratorcp_init. */
31 0 /* Kernel entry point. Set by integratorcp_init. */
32 };
33
34 /* Handling for secondary CPU boot in a multicore system.
35 * Unlike the uniprocessor/primary CPU boot, this is platform
36 * dependent. The default code here is based on the secondary
37 * CPU boot protocol used on realview/vexpress boards, with
38 * some parameterisation to increase its flexibility.
39 * QEMU platform models for which this code is not appropriate
40 * should override write_secondary_boot and secondary_cpu_reset_hook
41 * instead.
42 *
43 * This code enables the interrupt controllers for the secondary
44 * CPUs and then puts all the secondary CPUs into a loop waiting
45 * for an interprocessor interrupt and polling a configurable
46 * location for the kernel secondary CPU entry point.
47 */
48 static uint32_t smpboot[] = {
49 0xe59f201c, /* ldr r2, gic_cpu_if */
50 0xe59f001c, /* ldr r0, startaddr */
51 0xe3a01001, /* mov r1, #1 */
52 0xe5821000, /* str r1, [r2] */
53 0xe320f003, /* wfi */
54 0xe5901000, /* ldr r1, [r0] */
55 0xe1110001, /* tst r1, r1 */
56 0x0afffffb, /* beq <wfi> */
57 0xe12fff11, /* bx r1 */
58 0, /* gic_cpu_if: base address of GIC CPU interface */
59 0 /* bootreg: Boot register address is held here */
60 };
61
62 static void default_write_secondary(ARMCPU *cpu,
63 const struct arm_boot_info *info)
64 {
65 int n;
66 smpboot[ARRAY_SIZE(smpboot) - 1] = info->smp_bootreg_addr;
67 smpboot[ARRAY_SIZE(smpboot) - 2] = info->gic_cpu_if_addr;
68 for (n = 0; n < ARRAY_SIZE(smpboot); n++) {
69 smpboot[n] = tswap32(smpboot[n]);
70 }
71 rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot),
72 info->smp_loader_start);
73 }
74
75 static void default_reset_secondary(ARMCPU *cpu,
76 const struct arm_boot_info *info)
77 {
78 CPUARMState *env = &cpu->env;
79
80 stl_phys_notdirty(info->smp_bootreg_addr, 0);
81 env->regs[15] = info->smp_loader_start;
82 }
83
84 #define WRITE_WORD(p, value) do { \
85 stl_phys_notdirty(p, value); \
86 p += 4; \
87 } while (0)
88
89 static void set_kernel_args(const struct arm_boot_info *info)
90 {
91 int initrd_size = info->initrd_size;
92 target_phys_addr_t base = info->loader_start;
93 target_phys_addr_t p;
94
95 p = base + KERNEL_ARGS_ADDR;
96 /* ATAG_CORE */
97 WRITE_WORD(p, 5);
98 WRITE_WORD(p, 0x54410001);
99 WRITE_WORD(p, 1);
100 WRITE_WORD(p, 0x1000);
101 WRITE_WORD(p, 0);
102 /* ATAG_MEM */
103 /* TODO: handle multiple chips on one ATAG list */
104 WRITE_WORD(p, 4);
105 WRITE_WORD(p, 0x54410002);
106 WRITE_WORD(p, info->ram_size);
107 WRITE_WORD(p, info->loader_start);
108 if (initrd_size) {
109 /* ATAG_INITRD2 */
110 WRITE_WORD(p, 4);
111 WRITE_WORD(p, 0x54420005);
112 WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR);
113 WRITE_WORD(p, initrd_size);
114 }
115 if (info->kernel_cmdline && *info->kernel_cmdline) {
116 /* ATAG_CMDLINE */
117 int cmdline_size;
118
119 cmdline_size = strlen(info->kernel_cmdline);
120 cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline,
121 cmdline_size + 1);
122 cmdline_size = (cmdline_size >> 2) + 1;
123 WRITE_WORD(p, cmdline_size + 2);
124 WRITE_WORD(p, 0x54410009);
125 p += cmdline_size * 4;
126 }
127 if (info->atag_board) {
128 /* ATAG_BOARD */
129 int atag_board_len;
130 uint8_t atag_board_buf[0x1000];
131
132 atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
133 WRITE_WORD(p, (atag_board_len + 8) >> 2);
134 WRITE_WORD(p, 0x414f4d50);
135 cpu_physical_memory_write(p, atag_board_buf, atag_board_len);
136 p += atag_board_len;
137 }
138 /* ATAG_END */
139 WRITE_WORD(p, 0);
140 WRITE_WORD(p, 0);
141 }
142
143 static void set_kernel_args_old(const struct arm_boot_info *info)
144 {
145 target_phys_addr_t p;
146 const char *s;
147 int initrd_size = info->initrd_size;
148 target_phys_addr_t base = info->loader_start;
149
150 /* see linux/include/asm-arm/setup.h */
151 p = base + KERNEL_ARGS_ADDR;
152 /* page_size */
153 WRITE_WORD(p, 4096);
154 /* nr_pages */
155 WRITE_WORD(p, info->ram_size / 4096);
156 /* ramdisk_size */
157 WRITE_WORD(p, 0);
158 #define FLAG_READONLY 1
159 #define FLAG_RDLOAD 4
160 #define FLAG_RDPROMPT 8
161 /* flags */
162 WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
163 /* rootdev */
164 WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */
165 /* video_num_cols */
166 WRITE_WORD(p, 0);
167 /* video_num_rows */
168 WRITE_WORD(p, 0);
169 /* video_x */
170 WRITE_WORD(p, 0);
171 /* video_y */
172 WRITE_WORD(p, 0);
173 /* memc_control_reg */
174 WRITE_WORD(p, 0);
175 /* unsigned char sounddefault */
176 /* unsigned char adfsdrives */
177 /* unsigned char bytes_per_char_h */
178 /* unsigned char bytes_per_char_v */
179 WRITE_WORD(p, 0);
180 /* pages_in_bank[4] */
181 WRITE_WORD(p, 0);
182 WRITE_WORD(p, 0);
183 WRITE_WORD(p, 0);
184 WRITE_WORD(p, 0);
185 /* pages_in_vram */
186 WRITE_WORD(p, 0);
187 /* initrd_start */
188 if (initrd_size)
189 WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR);
190 else
191 WRITE_WORD(p, 0);
192 /* initrd_size */
193 WRITE_WORD(p, initrd_size);
194 /* rd_start */
195 WRITE_WORD(p, 0);
196 /* system_rev */
197 WRITE_WORD(p, 0);
198 /* system_serial_low */
199 WRITE_WORD(p, 0);
200 /* system_serial_high */
201 WRITE_WORD(p, 0);
202 /* mem_fclk_21285 */
203 WRITE_WORD(p, 0);
204 /* zero unused fields */
205 while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
206 WRITE_WORD(p, 0);
207 }
208 s = info->kernel_cmdline;
209 if (s) {
210 cpu_physical_memory_write(p, (void *)s, strlen(s) + 1);
211 } else {
212 WRITE_WORD(p, 0);
213 }
214 }
215
216 static int load_dtb(target_phys_addr_t addr, const struct arm_boot_info *binfo)
217 {
218 #ifdef CONFIG_FDT
219 uint32_t *mem_reg_property;
220 uint32_t mem_reg_propsize;
221 void *fdt = NULL;
222 char *filename;
223 int size, rc;
224 uint32_t acells, scells, hival;
225
226 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
227 if (!filename) {
228 fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
229 return -1;
230 }
231
232 fdt = load_device_tree(filename, &size);
233 if (!fdt) {
234 fprintf(stderr, "Couldn't open dtb file %s\n", filename);
235 g_free(filename);
236 return -1;
237 }
238 g_free(filename);
239
240 acells = qemu_devtree_getprop_cell(fdt, "/", "#address-cells");
241 scells = qemu_devtree_getprop_cell(fdt, "/", "#size-cells");
242 if (acells == 0 || scells == 0) {
243 fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
244 return -1;
245 }
246
247 mem_reg_propsize = acells + scells;
248 mem_reg_property = g_new0(uint32_t, mem_reg_propsize);
249 mem_reg_property[acells - 1] = cpu_to_be32(binfo->loader_start);
250 hival = cpu_to_be32(binfo->loader_start >> 32);
251 if (acells > 1) {
252 mem_reg_property[acells - 2] = hival;
253 } else if (hival != 0) {
254 fprintf(stderr, "qemu: dtb file not compatible with "
255 "RAM start address > 4GB\n");
256 exit(1);
257 }
258 mem_reg_property[acells + scells - 1] = cpu_to_be32(binfo->ram_size);
259 hival = cpu_to_be32(binfo->ram_size >> 32);
260 if (scells > 1) {
261 mem_reg_property[acells + scells - 2] = hival;
262 } else if (hival != 0) {
263 fprintf(stderr, "qemu: dtb file not compatible with "
264 "RAM size > 4GB\n");
265 exit(1);
266 }
267
268 rc = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
269 mem_reg_propsize * sizeof(uint32_t));
270 if (rc < 0) {
271 fprintf(stderr, "couldn't set /memory/reg\n");
272 }
273
274 if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
275 rc = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
276 binfo->kernel_cmdline);
277 if (rc < 0) {
278 fprintf(stderr, "couldn't set /chosen/bootargs\n");
279 }
280 }
281
282 if (binfo->initrd_size) {
283 rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
284 binfo->loader_start + INITRD_LOAD_ADDR);
285 if (rc < 0) {
286 fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
287 }
288
289 rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
290 binfo->loader_start + INITRD_LOAD_ADDR +
291 binfo->initrd_size);
292 if (rc < 0) {
293 fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
294 }
295 }
296
297 cpu_physical_memory_write(addr, fdt, size);
298
299 return 0;
300
301 #else
302 fprintf(stderr, "Device tree requested, "
303 "but qemu was compiled without fdt support\n");
304 return -1;
305 #endif
306 }
307
308 static void do_cpu_reset(void *opaque)
309 {
310 ARMCPU *cpu = opaque;
311 CPUARMState *env = &cpu->env;
312 const struct arm_boot_info *info = env->boot_info;
313
314 cpu_reset(CPU(cpu));
315 if (info) {
316 if (!info->is_linux) {
317 /* Jump to the entry point. */
318 env->regs[15] = info->entry & 0xfffffffe;
319 env->thumb = info->entry & 1;
320 } else {
321 if (env == first_cpu) {
322 env->regs[15] = info->loader_start;
323 if (!info->dtb_filename) {
324 if (old_param) {
325 set_kernel_args_old(info);
326 } else {
327 set_kernel_args(info);
328 }
329 }
330 } else {
331 info->secondary_cpu_reset_hook(cpu, info);
332 }
333 }
334 }
335 }
336
337 void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
338 {
339 CPUARMState *env = &cpu->env;
340 int kernel_size;
341 int initrd_size;
342 int n;
343 int is_linux = 0;
344 uint64_t elf_entry;
345 target_phys_addr_t entry;
346 int big_endian;
347 QemuOpts *machine_opts;
348
349 /* Load the kernel. */
350 if (!info->kernel_filename) {
351 fprintf(stderr, "Kernel image must be specified\n");
352 exit(1);
353 }
354
355 machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
356 if (machine_opts) {
357 info->dtb_filename = qemu_opt_get(machine_opts, "dtb");
358 } else {
359 info->dtb_filename = NULL;
360 }
361
362 if (!info->secondary_cpu_reset_hook) {
363 info->secondary_cpu_reset_hook = default_reset_secondary;
364 }
365 if (!info->write_secondary_boot) {
366 info->write_secondary_boot = default_write_secondary;
367 }
368
369 if (info->nb_cpus == 0)
370 info->nb_cpus = 1;
371
372 #ifdef TARGET_WORDS_BIGENDIAN
373 big_endian = 1;
374 #else
375 big_endian = 0;
376 #endif
377
378 /* Assume that raw images are linux kernels, and ELF images are not. */
379 kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
380 NULL, NULL, big_endian, ELF_MACHINE, 1);
381 entry = elf_entry;
382 if (kernel_size < 0) {
383 kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
384 &is_linux);
385 }
386 if (kernel_size < 0) {
387 entry = info->loader_start + KERNEL_LOAD_ADDR;
388 kernel_size = load_image_targphys(info->kernel_filename, entry,
389 info->ram_size - KERNEL_LOAD_ADDR);
390 is_linux = 1;
391 }
392 if (kernel_size < 0) {
393 fprintf(stderr, "qemu: could not load kernel '%s'\n",
394 info->kernel_filename);
395 exit(1);
396 }
397 info->entry = entry;
398 if (is_linux) {
399 if (info->initrd_filename) {
400 initrd_size = load_image_targphys(info->initrd_filename,
401 info->loader_start
402 + INITRD_LOAD_ADDR,
403 info->ram_size
404 - INITRD_LOAD_ADDR);
405 if (initrd_size < 0) {
406 fprintf(stderr, "qemu: could not load initrd '%s'\n",
407 info->initrd_filename);
408 exit(1);
409 }
410 } else {
411 initrd_size = 0;
412 }
413 info->initrd_size = initrd_size;
414
415 bootloader[4] = info->board_id;
416
417 /* for device tree boot, we pass the DTB directly in r2. Otherwise
418 * we point to the kernel args.
419 */
420 if (info->dtb_filename) {
421 /* Place the DTB after the initrd in memory */
422 target_phys_addr_t dtb_start = TARGET_PAGE_ALIGN(info->loader_start
423 + INITRD_LOAD_ADDR
424 + initrd_size);
425 if (load_dtb(dtb_start, info)) {
426 exit(1);
427 }
428 bootloader[5] = dtb_start;
429 } else {
430 bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
431 if (info->ram_size >= (1ULL << 32)) {
432 fprintf(stderr, "qemu: RAM size must be less than 4GB to boot"
433 " Linux kernel using ATAGS (try passing a device tree"
434 " using -dtb)\n");
435 exit(1);
436 }
437 }
438 bootloader[6] = entry;
439 for (n = 0; n < sizeof(bootloader) / 4; n++) {
440 bootloader[n] = tswap32(bootloader[n]);
441 }
442 rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
443 info->loader_start);
444 if (info->nb_cpus > 1) {
445 info->write_secondary_boot(cpu, info);
446 }
447 }
448 info->is_linux = is_linux;
449
450 for (; env; env = env->next_cpu) {
451 cpu = arm_env_get_cpu(env);
452 env->boot_info = info;
453 qemu_register_reset(do_cpu_reset, cpu);
454 }
455 }