hw/char/serial-pci.c

   1 /*
   2  * QEMU 16550A UART emulation
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  * Copyright (c) 2008 Citrix Systems, Inc.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 /* see docs/specs/pci-serial.txt */
  27
  28 #include "hw/char/serial.h"
  29 #include "hw/pci/pci.h"
  30 #include "qapi/qmp/qerror.h"
  31
  32 #define PCI_SERIAL_MAX_PORTS 4
  33
  34 typedef struct PCISerialState {
  35     PCIDevice dev;
  36     SerialState state;
  37 } PCISerialState;
  38
  39 typedef struct PCIMultiSerialState {
  40     PCIDevice    dev;
  41     MemoryRegion iobar;
  42     uint32_t     ports;
  43     char         *name[PCI_SERIAL_MAX_PORTS];
  44     SerialState  state[PCI_SERIAL_MAX_PORTS];
  45     uint32_t     level[PCI_SERIAL_MAX_PORTS];
  46     qemu_irq     *irqs;
  47 } PCIMultiSerialState;
  48
  49 static int serial_pci_init(PCIDevice *dev)
  50 {
  51     PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev);
  52     SerialState *s = &pci->state;
  53     Error *err = NULL;
  54
  55     s->baudbase = 115200;
  56     serial_realize_core(s, &err);
  57     if (err != NULL) {
  58         qerror_report_err(err);
  59         error_free(err);
  60         return -1;
  61     }
  62
  63     pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
  64     s->irq = pci->dev.irq[0];
  65
  66     memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8);
  67     pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
  68     return 0;
  69 }
  70
  71 static void multi_serial_irq_mux(void *opaque, int n, int level)
  72 {
  73     PCIMultiSerialState *pci = opaque;
  74     int i, pending = 0;
  75
  76     pci->level[n] = level;
  77     for (i = 0; i < pci->ports; i++) {
  78         if (pci->level[i]) {
  79             pending = 1;
  80         }
  81     }
  82     qemu_set_irq(pci->dev.irq[0], pending);
  83 }
  84
  85 static int multi_serial_pci_init(PCIDevice *dev)
  86 {
  87     PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
  88     PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev);
  89     SerialState *s;
  90     Error *err = NULL;
  91     int i;
  92
  93     switch (pc->device_id) {
  94     case 0x0003:
  95         pci->ports = 2;
  96         break;
  97     case 0x0004:
  98         pci->ports = 4;
  99         break;
 100     }
 101     assert(pci->ports > 0);
 102     assert(pci->ports <= PCI_SERIAL_MAX_PORTS);
 103
 104     pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
 105     memory_region_init(&pci->iobar, NULL, "multiserial", 8 * pci->ports);
 106     pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar);
 107     pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci,
 108                                    pci->ports);
 109
 110     for (i = 0; i < pci->ports; i++) {
 111         s = pci->state + i;
 112         s->baudbase = 115200;
 113         serial_realize_core(s, &err);
 114         if (err != NULL) {
 115             qerror_report_err(err);
 116             error_free(err);
 117             return -1;
 118         }
 119         s->irq = pci->irqs[i];
 120         pci->name[i] = g_strdup_printf("uart #%d", i+1);
 121         memory_region_init_io(&s->io, NULL, &serial_io_ops, s, pci->name[i], 8);
 122         memory_region_add_subregion(&pci->iobar, 8 * i, &s->io);
 123     }
 124     return 0;
 125 }
 126
 127 static void serial_pci_exit(PCIDevice *dev)
 128 {
 129     PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev);
 130     SerialState *s = &pci->state;
 131
 132     serial_exit_core(s);
 133     memory_region_destroy(&s->io);
 134 }
 135
 136 static void multi_serial_pci_exit(PCIDevice *dev)
 137 {
 138     PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev);
 139     SerialState *s;
 140     int i;
 141
 142     for (i = 0; i < pci->ports; i++) {
 143         s = pci->state + i;
 144         serial_exit_core(s);
 145         memory_region_destroy(&s->io);
 146         g_free(pci->name[i]);
 147     }
 148     memory_region_destroy(&pci->iobar);
 149     qemu_free_irqs(pci->irqs);
 150 }
 151
 152 static const VMStateDescription vmstate_pci_serial = {
 153     .name = "pci-serial",
 154     .version_id = 1,
 155     .minimum_version_id = 1,
 156     .fields      = (VMStateField[]) {
 157         VMSTATE_PCI_DEVICE(dev, PCISerialState),
 158         VMSTATE_STRUCT(state, PCISerialState, 0, vmstate_serial, SerialState),
 159         VMSTATE_END_OF_LIST()
 160     }
 161 };
 162
 163 static const VMStateDescription vmstate_pci_multi_serial = {
 164     .name = "pci-serial-multi",
 165     .version_id = 1,
 166     .minimum_version_id = 1,
 167     .fields      = (VMStateField[]) {
 168         VMSTATE_PCI_DEVICE(dev, PCIMultiSerialState),
 169         VMSTATE_STRUCT_ARRAY(state, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS,
 170                              0, vmstate_serial, SerialState),
 171         VMSTATE_UINT32_ARRAY(level, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS),
 172         VMSTATE_END_OF_LIST()
 173     }
 174 };
 175
 176 static Property serial_pci_properties[] = {
 177     DEFINE_PROP_CHR("chardev",  PCISerialState, state.chr),
 178     DEFINE_PROP_END_OF_LIST(),
 179 };
 180
 181 static Property multi_2x_serial_pci_properties[] = {
 182     DEFINE_PROP_CHR("chardev1",  PCIMultiSerialState, state[0].chr),
 183     DEFINE_PROP_CHR("chardev2",  PCIMultiSerialState, state[1].chr),
 184     DEFINE_PROP_END_OF_LIST(),
 185 };
 186
 187 static Property multi_4x_serial_pci_properties[] = {
 188     DEFINE_PROP_CHR("chardev1",  PCIMultiSerialState, state[0].chr),
 189     DEFINE_PROP_CHR("chardev2",  PCIMultiSerialState, state[1].chr),
 190     DEFINE_PROP_CHR("chardev3",  PCIMultiSerialState, state[2].chr),
 191     DEFINE_PROP_CHR("chardev4",  PCIMultiSerialState, state[3].chr),
 192     DEFINE_PROP_END_OF_LIST(),
 193 };
 194
 195 static void serial_pci_class_initfn(ObjectClass *klass, void *data)
 196 {
 197     DeviceClass *dc = DEVICE_CLASS(klass);
 198     PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
 199     pc->init = serial_pci_init;
 200     pc->exit = serial_pci_exit;
 201     pc->vendor_id = PCI_VENDOR_ID_REDHAT;
 202     pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL;
 203     pc->revision = 1;
 204     pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
 205     dc->vmsd = &vmstate_pci_serial;
 206     dc->props = serial_pci_properties;
 207 }
 208
 209 static void multi_2x_serial_pci_class_initfn(ObjectClass *klass, void *data)
 210 {
 211     DeviceClass *dc = DEVICE_CLASS(klass);
 212     PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
 213     pc->init = multi_serial_pci_init;
 214     pc->exit = multi_serial_pci_exit;
 215     pc->vendor_id = PCI_VENDOR_ID_REDHAT;
 216     pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL2;
 217     pc->revision = 1;
 218     pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
 219     dc->vmsd = &vmstate_pci_multi_serial;
 220     dc->props = multi_2x_serial_pci_properties;
 221 }
 222
 223 static void multi_4x_serial_pci_class_initfn(ObjectClass *klass, void *data)
 224 {
 225     DeviceClass *dc = DEVICE_CLASS(klass);
 226     PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
 227     pc->init = multi_serial_pci_init;
 228     pc->exit = multi_serial_pci_exit;
 229     pc->vendor_id = PCI_VENDOR_ID_REDHAT;
 230     pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL4;
 231     pc->revision = 1;
 232     pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
 233     dc->vmsd = &vmstate_pci_multi_serial;
 234     dc->props = multi_4x_serial_pci_properties;
 235 }
 236
 237 static const TypeInfo serial_pci_info = {
 238     .name          = "pci-serial",
 239     .parent        = TYPE_PCI_DEVICE,
 240     .instance_size = sizeof(PCISerialState),
 241     .class_init    = serial_pci_class_initfn,
 242 };
 243
 244 static const TypeInfo multi_2x_serial_pci_info = {
 245     .name          = "pci-serial-2x",
 246     .parent        = TYPE_PCI_DEVICE,
 247     .instance_size = sizeof(PCIMultiSerialState),
 248     .class_init    = multi_2x_serial_pci_class_initfn,
 249 };
 250
 251 static const TypeInfo multi_4x_serial_pci_info = {
 252     .name          = "pci-serial-4x",
 253     .parent        = TYPE_PCI_DEVICE,
 254     .instance_size = sizeof(PCIMultiSerialState),
 255     .class_init    = multi_4x_serial_pci_class_initfn,
 256 };
 257
 258 static void serial_pci_register_types(void)
 259 {
 260     type_register_static(&serial_pci_info);
 261     type_register_static(&multi_2x_serial_pci_info);
 262     type_register_static(&multi_4x_serial_pci_info);
 263 }
 264
 265 type_init(serial_pci_register_types)