4 * Copyright (C) 2014 Red Hat Inc
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qemu/accel.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/qapi-visit-machine.h"
23 #include "qapi/visitor.h"
24 #include "qom/object_interfaces.h"
25 #include "hw/sysbus.h"
26 #include "sysemu/cpus.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/reset.h"
29 #include "sysemu/runstate.h"
30 #include "sysemu/numa.h"
31 #include "sysemu/xen.h"
32 #include "qemu/error-report.h"
33 #include "sysemu/qtest.h"
34 #include "hw/pci/pci.h"
35 #include "hw/mem/nvdimm.h"
36 #include "migration/global_state.h"
37 #include "migration/vmstate.h"
38 #include "exec/confidential-guest-support.h"
39 #include "hw/virtio/virtio.h"
40 #include "hw/virtio/virtio-pci.h"
42 GlobalProperty hw_compat_8_0
[] = {
43 { "migration", "multifd-flush-after-each-section", "on"},
45 const size_t hw_compat_8_0_len
= G_N_ELEMENTS(hw_compat_8_0
);
47 GlobalProperty hw_compat_7_2
[] = {
48 { "e1000e", "migrate-timadj", "off" },
49 { "virtio-mem", "x-early-migration", "false" },
50 { "migration", "x-preempt-pre-7-2", "true" },
51 { TYPE_PCI_DEVICE
, "x-pcie-err-unc-mask", "off" },
53 const size_t hw_compat_7_2_len
= G_N_ELEMENTS(hw_compat_7_2
);
55 GlobalProperty hw_compat_7_1
[] = {
56 { "virtio-device", "queue_reset", "false" },
57 { "virtio-rng-pci", "vectors", "0" },
58 { "virtio-rng-pci-transitional", "vectors", "0" },
59 { "virtio-rng-pci-non-transitional", "vectors", "0" },
61 const size_t hw_compat_7_1_len
= G_N_ELEMENTS(hw_compat_7_1
);
63 GlobalProperty hw_compat_7_0
[] = {
64 { "arm-gicv3-common", "force-8-bit-prio", "on" },
65 { "nvme-ns", "eui64-default", "on"},
67 const size_t hw_compat_7_0_len
= G_N_ELEMENTS(hw_compat_7_0
);
69 GlobalProperty hw_compat_6_2
[] = {
70 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"},
72 const size_t hw_compat_6_2_len
= G_N_ELEMENTS(hw_compat_6_2
);
74 GlobalProperty hw_compat_6_1
[] = {
75 { "vhost-user-vsock-device", "seqpacket", "off" },
76 { "nvme-ns", "shared", "off" },
78 const size_t hw_compat_6_1_len
= G_N_ELEMENTS(hw_compat_6_1
);
80 GlobalProperty hw_compat_6_0
[] = {
81 { "gpex-pcihost", "allow-unmapped-accesses", "false" },
82 { "i8042", "extended-state", "false"},
83 { "nvme-ns", "eui64-default", "off"},
84 { "e1000", "init-vet", "off" },
85 { "e1000e", "init-vet", "off" },
86 { "vhost-vsock-device", "seqpacket", "off" },
88 const size_t hw_compat_6_0_len
= G_N_ELEMENTS(hw_compat_6_0
);
90 GlobalProperty hw_compat_5_2
[] = {
91 { "ICH9-LPC", "smm-compat", "on"},
92 { "PIIX4_PM", "smm-compat", "on"},
93 { "virtio-blk-device", "report-discard-granularity", "off" },
94 { "virtio-net-pci-base", "vectors", "3"},
96 const size_t hw_compat_5_2_len
= G_N_ELEMENTS(hw_compat_5_2
);
98 GlobalProperty hw_compat_5_1
[] = {
99 { "vhost-scsi", "num_queues", "1"},
100 { "vhost-user-blk", "num-queues", "1"},
101 { "vhost-user-scsi", "num_queues", "1"},
102 { "virtio-blk-device", "num-queues", "1"},
103 { "virtio-scsi-device", "num_queues", "1"},
104 { "nvme", "use-intel-id", "on"},
105 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
106 { "pl011", "migrate-clk", "off" },
107 { "virtio-pci", "x-ats-page-aligned", "off"},
109 const size_t hw_compat_5_1_len
= G_N_ELEMENTS(hw_compat_5_1
);
111 GlobalProperty hw_compat_5_0
[] = {
112 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
113 { "virtio-balloon-device", "page-poison", "false" },
114 { "vmport", "x-read-set-eax", "off" },
115 { "vmport", "x-signal-unsupported-cmd", "off" },
116 { "vmport", "x-report-vmx-type", "off" },
117 { "vmport", "x-cmds-v2", "off" },
118 { "virtio-device", "x-disable-legacy-check", "true" },
120 const size_t hw_compat_5_0_len
= G_N_ELEMENTS(hw_compat_5_0
);
122 GlobalProperty hw_compat_4_2
[] = {
123 { "virtio-blk-device", "queue-size", "128"},
124 { "virtio-scsi-device", "virtqueue_size", "128"},
125 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
126 { "virtio-blk-device", "seg-max-adjust", "off"},
127 { "virtio-scsi-device", "seg_max_adjust", "off"},
128 { "vhost-blk-device", "seg_max_adjust", "off"},
129 { "usb-host", "suppress-remote-wake", "off" },
130 { "usb-redir", "suppress-remote-wake", "off" },
131 { "qxl", "revision", "4" },
132 { "qxl-vga", "revision", "4" },
133 { "fw_cfg", "acpi-mr-restore", "false" },
134 { "virtio-device", "use-disabled-flag", "false" },
136 const size_t hw_compat_4_2_len
= G_N_ELEMENTS(hw_compat_4_2
);
138 GlobalProperty hw_compat_4_1
[] = {
139 { "virtio-pci", "x-pcie-flr-init", "off" },
141 const size_t hw_compat_4_1_len
= G_N_ELEMENTS(hw_compat_4_1
);
143 GlobalProperty hw_compat_4_0
[] = {
144 { "VGA", "edid", "false" },
145 { "secondary-vga", "edid", "false" },
146 { "bochs-display", "edid", "false" },
147 { "virtio-vga", "edid", "false" },
148 { "virtio-gpu-device", "edid", "false" },
149 { "virtio-device", "use-started", "false" },
150 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
151 { "pl031", "migrate-tick-offset", "false" },
153 const size_t hw_compat_4_0_len
= G_N_ELEMENTS(hw_compat_4_0
);
155 GlobalProperty hw_compat_3_1
[] = {
156 { "pcie-root-port", "x-speed", "2_5" },
157 { "pcie-root-port", "x-width", "1" },
158 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
159 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
160 { "tpm-crb", "ppi", "false" },
161 { "tpm-tis", "ppi", "false" },
162 { "usb-kbd", "serial", "42" },
163 { "usb-mouse", "serial", "42" },
164 { "usb-tablet", "serial", "42" },
165 { "virtio-blk-device", "discard", "false" },
166 { "virtio-blk-device", "write-zeroes", "false" },
167 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
168 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
170 const size_t hw_compat_3_1_len
= G_N_ELEMENTS(hw_compat_3_1
);
172 GlobalProperty hw_compat_3_0
[] = {};
173 const size_t hw_compat_3_0_len
= G_N_ELEMENTS(hw_compat_3_0
);
175 GlobalProperty hw_compat_2_12
[] = {
176 { "migration", "decompress-error-check", "off" },
177 { "hda-audio", "use-timer", "false" },
178 { "cirrus-vga", "global-vmstate", "true" },
179 { "VGA", "global-vmstate", "true" },
180 { "vmware-svga", "global-vmstate", "true" },
181 { "qxl-vga", "global-vmstate", "true" },
183 const size_t hw_compat_2_12_len
= G_N_ELEMENTS(hw_compat_2_12
);
185 GlobalProperty hw_compat_2_11
[] = {
186 { "hpet", "hpet-offset-saved", "false" },
187 { "virtio-blk-pci", "vectors", "2" },
188 { "vhost-user-blk-pci", "vectors", "2" },
189 { "e1000", "migrate_tso_props", "off" },
191 const size_t hw_compat_2_11_len
= G_N_ELEMENTS(hw_compat_2_11
);
193 GlobalProperty hw_compat_2_10
[] = {
194 { "virtio-mouse-device", "wheel-axis", "false" },
195 { "virtio-tablet-device", "wheel-axis", "false" },
197 const size_t hw_compat_2_10_len
= G_N_ELEMENTS(hw_compat_2_10
);
199 GlobalProperty hw_compat_2_9
[] = {
200 { "pci-bridge", "shpc", "off" },
201 { "intel-iommu", "pt", "off" },
202 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
203 { "pcie-root-port", "x-migrate-msix", "false" },
205 const size_t hw_compat_2_9_len
= G_N_ELEMENTS(hw_compat_2_9
);
207 GlobalProperty hw_compat_2_8
[] = {
208 { "fw_cfg_mem", "x-file-slots", "0x10" },
209 { "fw_cfg_io", "x-file-slots", "0x10" },
210 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
211 { "pci-bridge", "shpc", "on" },
212 { TYPE_PCI_DEVICE
, "x-pcie-extcap-init", "off" },
213 { "virtio-pci", "x-pcie-deverr-init", "off" },
214 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
215 { "virtio-pci", "x-pcie-pm-init", "off" },
216 { "cirrus-vga", "vgamem_mb", "8" },
217 { "isa-cirrus-vga", "vgamem_mb", "8" },
219 const size_t hw_compat_2_8_len
= G_N_ELEMENTS(hw_compat_2_8
);
221 GlobalProperty hw_compat_2_7
[] = {
222 { "virtio-pci", "page-per-vq", "on" },
223 { "virtio-serial-device", "emergency-write", "off" },
224 { "ioapic", "version", "0x11" },
225 { "intel-iommu", "x-buggy-eim", "true" },
226 { "virtio-pci", "x-ignore-backend-features", "on" },
228 const size_t hw_compat_2_7_len
= G_N_ELEMENTS(hw_compat_2_7
);
230 GlobalProperty hw_compat_2_6
[] = {
231 { "virtio-mmio", "format_transport_address", "off" },
232 /* Optional because not all virtio-pci devices support legacy mode */
233 { "virtio-pci", "disable-modern", "on", .optional
= true },
234 { "virtio-pci", "disable-legacy", "off", .optional
= true },
236 const size_t hw_compat_2_6_len
= G_N_ELEMENTS(hw_compat_2_6
);
238 GlobalProperty hw_compat_2_5
[] = {
239 { "isa-fdc", "fallback", "144" },
240 { "pvscsi", "x-old-pci-configuration", "on" },
241 { "pvscsi", "x-disable-pcie", "on" },
242 { "vmxnet3", "x-old-msi-offsets", "on" },
243 { "vmxnet3", "x-disable-pcie", "on" },
245 const size_t hw_compat_2_5_len
= G_N_ELEMENTS(hw_compat_2_5
);
247 GlobalProperty hw_compat_2_4
[] = {
248 /* Optional because the 'scsi' property is Linux-only */
249 { "virtio-blk-device", "scsi", "true", .optional
= true },
250 { "e1000", "extra_mac_registers", "off" },
251 { "virtio-pci", "x-disable-pcie", "on" },
252 { "virtio-pci", "migrate-extra", "off" },
253 { "fw_cfg_mem", "dma_enabled", "off" },
254 { "fw_cfg_io", "dma_enabled", "off" }
256 const size_t hw_compat_2_4_len
= G_N_ELEMENTS(hw_compat_2_4
);
258 GlobalProperty hw_compat_2_3
[] = {
259 { "virtio-blk-pci", "any_layout", "off" },
260 { "virtio-balloon-pci", "any_layout", "off" },
261 { "virtio-serial-pci", "any_layout", "off" },
262 { "virtio-9p-pci", "any_layout", "off" },
263 { "virtio-rng-pci", "any_layout", "off" },
264 { TYPE_PCI_DEVICE
, "x-pcie-lnksta-dllla", "off" },
265 { "migration", "send-configuration", "off" },
266 { "migration", "send-section-footer", "off" },
267 { "migration", "store-global-state", "off" },
269 const size_t hw_compat_2_3_len
= G_N_ELEMENTS(hw_compat_2_3
);
271 GlobalProperty hw_compat_2_2
[] = {};
272 const size_t hw_compat_2_2_len
= G_N_ELEMENTS(hw_compat_2_2
);
274 GlobalProperty hw_compat_2_1
[] = {
275 { "intel-hda", "old_msi_addr", "on" },
276 { "VGA", "qemu-extended-regs", "off" },
277 { "secondary-vga", "qemu-extended-regs", "off" },
278 { "virtio-scsi-pci", "any_layout", "off" },
279 { "usb-mouse", "usb_version", "1" },
280 { "usb-kbd", "usb_version", "1" },
281 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
283 const size_t hw_compat_2_1_len
= G_N_ELEMENTS(hw_compat_2_1
);
285 MachineState
*current_machine
;
287 static char *machine_get_kernel(Object
*obj
, Error
**errp
)
289 MachineState
*ms
= MACHINE(obj
);
291 return g_strdup(ms
->kernel_filename
);
294 static void machine_set_kernel(Object
*obj
, const char *value
, Error
**errp
)
296 MachineState
*ms
= MACHINE(obj
);
298 g_free(ms
->kernel_filename
);
299 ms
->kernel_filename
= g_strdup(value
);
302 static char *machine_get_initrd(Object
*obj
, Error
**errp
)
304 MachineState
*ms
= MACHINE(obj
);
306 return g_strdup(ms
->initrd_filename
);
309 static void machine_set_initrd(Object
*obj
, const char *value
, Error
**errp
)
311 MachineState
*ms
= MACHINE(obj
);
313 g_free(ms
->initrd_filename
);
314 ms
->initrd_filename
= g_strdup(value
);
317 static char *machine_get_append(Object
*obj
, Error
**errp
)
319 MachineState
*ms
= MACHINE(obj
);
321 return g_strdup(ms
->kernel_cmdline
);
324 static void machine_set_append(Object
*obj
, const char *value
, Error
**errp
)
326 MachineState
*ms
= MACHINE(obj
);
328 g_free(ms
->kernel_cmdline
);
329 ms
->kernel_cmdline
= g_strdup(value
);
332 static char *machine_get_dtb(Object
*obj
, Error
**errp
)
334 MachineState
*ms
= MACHINE(obj
);
336 return g_strdup(ms
->dtb
);
339 static void machine_set_dtb(Object
*obj
, const char *value
, Error
**errp
)
341 MachineState
*ms
= MACHINE(obj
);
344 ms
->dtb
= g_strdup(value
);
347 static char *machine_get_dumpdtb(Object
*obj
, Error
**errp
)
349 MachineState
*ms
= MACHINE(obj
);
351 return g_strdup(ms
->dumpdtb
);
354 static void machine_set_dumpdtb(Object
*obj
, const char *value
, Error
**errp
)
356 MachineState
*ms
= MACHINE(obj
);
359 ms
->dumpdtb
= g_strdup(value
);
362 static void machine_get_phandle_start(Object
*obj
, Visitor
*v
,
363 const char *name
, void *opaque
,
366 MachineState
*ms
= MACHINE(obj
);
367 int64_t value
= ms
->phandle_start
;
369 visit_type_int(v
, name
, &value
, errp
);
372 static void machine_set_phandle_start(Object
*obj
, Visitor
*v
,
373 const char *name
, void *opaque
,
376 MachineState
*ms
= MACHINE(obj
);
379 if (!visit_type_int(v
, name
, &value
, errp
)) {
383 ms
->phandle_start
= value
;
386 static char *machine_get_dt_compatible(Object
*obj
, Error
**errp
)
388 MachineState
*ms
= MACHINE(obj
);
390 return g_strdup(ms
->dt_compatible
);
393 static void machine_set_dt_compatible(Object
*obj
, const char *value
, Error
**errp
)
395 MachineState
*ms
= MACHINE(obj
);
397 g_free(ms
->dt_compatible
);
398 ms
->dt_compatible
= g_strdup(value
);
401 static bool machine_get_dump_guest_core(Object
*obj
, Error
**errp
)
403 MachineState
*ms
= MACHINE(obj
);
405 return ms
->dump_guest_core
;
408 static void machine_set_dump_guest_core(Object
*obj
, bool value
, Error
**errp
)
410 MachineState
*ms
= MACHINE(obj
);
412 ms
->dump_guest_core
= value
;
415 static bool machine_get_mem_merge(Object
*obj
, Error
**errp
)
417 MachineState
*ms
= MACHINE(obj
);
419 return ms
->mem_merge
;
422 static void machine_set_mem_merge(Object
*obj
, bool value
, Error
**errp
)
424 MachineState
*ms
= MACHINE(obj
);
426 ms
->mem_merge
= value
;
429 static bool machine_get_usb(Object
*obj
, Error
**errp
)
431 MachineState
*ms
= MACHINE(obj
);
436 static void machine_set_usb(Object
*obj
, bool value
, Error
**errp
)
438 MachineState
*ms
= MACHINE(obj
);
441 ms
->usb_disabled
= !value
;
444 static bool machine_get_graphics(Object
*obj
, Error
**errp
)
446 MachineState
*ms
= MACHINE(obj
);
448 return ms
->enable_graphics
;
451 static void machine_set_graphics(Object
*obj
, bool value
, Error
**errp
)
453 MachineState
*ms
= MACHINE(obj
);
455 ms
->enable_graphics
= value
;
458 static char *machine_get_firmware(Object
*obj
, Error
**errp
)
460 MachineState
*ms
= MACHINE(obj
);
462 return g_strdup(ms
->firmware
);
465 static void machine_set_firmware(Object
*obj
, const char *value
, Error
**errp
)
467 MachineState
*ms
= MACHINE(obj
);
469 g_free(ms
->firmware
);
470 ms
->firmware
= g_strdup(value
);
473 static void machine_set_suppress_vmdesc(Object
*obj
, bool value
, Error
**errp
)
475 MachineState
*ms
= MACHINE(obj
);
477 ms
->suppress_vmdesc
= value
;
480 static bool machine_get_suppress_vmdesc(Object
*obj
, Error
**errp
)
482 MachineState
*ms
= MACHINE(obj
);
484 return ms
->suppress_vmdesc
;
487 static char *machine_get_memory_encryption(Object
*obj
, Error
**errp
)
489 MachineState
*ms
= MACHINE(obj
);
492 return g_strdup(object_get_canonical_path_component(OBJECT(ms
->cgs
)));
498 static void machine_set_memory_encryption(Object
*obj
, const char *value
,
502 object_resolve_path_component(object_get_objects_root(), value
);
505 error_setg(errp
, "No such memory encryption object '%s'", value
);
509 object_property_set_link(obj
, "confidential-guest-support", cgs
, errp
);
512 static void machine_check_confidential_guest_support(const Object
*obj
,
518 * So far the only constraint is that the target has the
519 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
524 static bool machine_get_nvdimm(Object
*obj
, Error
**errp
)
526 MachineState
*ms
= MACHINE(obj
);
528 return ms
->nvdimms_state
->is_enabled
;
531 static void machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
533 MachineState
*ms
= MACHINE(obj
);
535 ms
->nvdimms_state
->is_enabled
= value
;
538 static bool machine_get_hmat(Object
*obj
, Error
**errp
)
540 MachineState
*ms
= MACHINE(obj
);
542 return ms
->numa_state
->hmat_enabled
;
545 static void machine_set_hmat(Object
*obj
, bool value
, Error
**errp
)
547 MachineState
*ms
= MACHINE(obj
);
549 ms
->numa_state
->hmat_enabled
= value
;
552 static void machine_get_mem(Object
*obj
, Visitor
*v
, const char *name
,
553 void *opaque
, Error
**errp
)
555 MachineState
*ms
= MACHINE(obj
);
556 MemorySizeConfiguration mem
= {
558 .size
= ms
->ram_size
,
559 .has_max_size
= !!ms
->ram_slots
,
560 .max_size
= ms
->maxram_size
,
561 .has_slots
= !!ms
->ram_slots
,
562 .slots
= ms
->ram_slots
,
564 MemorySizeConfiguration
*p_mem
= &mem
;
566 visit_type_MemorySizeConfiguration(v
, name
, &p_mem
, &error_abort
);
569 static void machine_set_mem(Object
*obj
, Visitor
*v
, const char *name
,
570 void *opaque
, Error
**errp
)
573 MachineState
*ms
= MACHINE(obj
);
574 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
575 MemorySizeConfiguration
*mem
;
577 if (!visit_type_MemorySizeConfiguration(v
, name
, &mem
, errp
)) {
581 if (!mem
->has_size
) {
582 mem
->has_size
= true;
583 mem
->size
= mc
->default_ram_size
;
585 mem
->size
= QEMU_ALIGN_UP(mem
->size
, 8192);
586 if (mc
->fixup_ram_size
) {
587 mem
->size
= mc
->fixup_ram_size(mem
->size
);
589 if ((ram_addr_t
)mem
->size
!= mem
->size
) {
590 error_setg(errp
, "ram size too large");
594 if (mem
->has_max_size
) {
595 if (mem
->max_size
< mem
->size
) {
596 error_setg(errp
, "invalid value of maxmem: "
597 "maximum memory size (0x%" PRIx64
") must be at least "
598 "the initial memory size (0x%" PRIx64
")",
599 mem
->max_size
, mem
->size
);
602 if (mem
->has_slots
&& mem
->slots
&& mem
->max_size
== mem
->size
) {
603 error_setg(errp
, "invalid value of maxmem: "
604 "memory slots were specified but maximum memory size "
605 "(0x%" PRIx64
") is equal to the initial memory size "
606 "(0x%" PRIx64
")", mem
->max_size
, mem
->size
);
609 ms
->maxram_size
= mem
->max_size
;
611 if (mem
->has_slots
) {
612 error_setg(errp
, "slots specified but no max-size");
615 ms
->maxram_size
= mem
->size
;
617 ms
->ram_size
= mem
->size
;
618 ms
->ram_slots
= mem
->has_slots
? mem
->slots
: 0;
620 qapi_free_MemorySizeConfiguration(mem
);
623 static char *machine_get_nvdimm_persistence(Object
*obj
, Error
**errp
)
625 MachineState
*ms
= MACHINE(obj
);
627 return g_strdup(ms
->nvdimms_state
->persistence_string
);
630 static void machine_set_nvdimm_persistence(Object
*obj
, const char *value
,
633 MachineState
*ms
= MACHINE(obj
);
634 NVDIMMState
*nvdimms_state
= ms
->nvdimms_state
;
636 if (strcmp(value
, "cpu") == 0) {
637 nvdimms_state
->persistence
= 3;
638 } else if (strcmp(value
, "mem-ctrl") == 0) {
639 nvdimms_state
->persistence
= 2;
641 error_setg(errp
, "-machine nvdimm-persistence=%s: unsupported option",
646 g_free(nvdimms_state
->persistence_string
);
647 nvdimms_state
->persistence_string
= g_strdup(value
);
650 void machine_class_allow_dynamic_sysbus_dev(MachineClass
*mc
, const char *type
)
652 QAPI_LIST_PREPEND(mc
->allowed_dynamic_sysbus_devices
, g_strdup(type
));
655 bool device_is_dynamic_sysbus(MachineClass
*mc
, DeviceState
*dev
)
657 Object
*obj
= OBJECT(dev
);
659 if (!object_dynamic_cast(obj
, TYPE_SYS_BUS_DEVICE
)) {
663 return device_type_is_dynamic_sysbus(mc
, object_get_typename(obj
));
666 bool device_type_is_dynamic_sysbus(MachineClass
*mc
, const char *type
)
668 bool allowed
= false;
670 ObjectClass
*klass
= object_class_by_name(type
);
672 for (wl
= mc
->allowed_dynamic_sysbus_devices
;
675 allowed
|= !!object_class_dynamic_cast(klass
, wl
->value
);
681 HotpluggableCPUList
*machine_query_hotpluggable_cpus(MachineState
*machine
)
684 HotpluggableCPUList
*head
= NULL
;
685 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
687 /* force board to initialize possible_cpus if it hasn't been done yet */
688 mc
->possible_cpu_arch_ids(machine
);
690 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
692 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
694 cpu_item
->type
= g_strdup(machine
->possible_cpus
->cpus
[i
].type
);
695 cpu_item
->vcpus_count
= machine
->possible_cpus
->cpus
[i
].vcpus_count
;
696 cpu_item
->props
= g_memdup(&machine
->possible_cpus
->cpus
[i
].props
,
697 sizeof(*cpu_item
->props
));
699 cpu
= machine
->possible_cpus
->cpus
[i
].cpu
;
701 cpu_item
->qom_path
= object_get_canonical_path(cpu
);
703 QAPI_LIST_PREPEND(head
, cpu_item
);
709 * machine_set_cpu_numa_node:
710 * @machine: machine object to modify
711 * @props: specifies which cpu objects to assign to
712 * numa node specified by @props.node_id
713 * @errp: if an error occurs, a pointer to an area to store the error
715 * Associate NUMA node specified by @props.node_id with cpu slots that
716 * match socket/core/thread-ids specified by @props. It's recommended to use
717 * query-hotpluggable-cpus.props values to specify affected cpu slots,
718 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
720 * However for CLI convenience it's possible to pass in subset of properties,
721 * which would affect all cpu slots that match it.
723 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
724 * -numa cpu,node-id=0,socket_id=0 \
725 * -numa cpu,node-id=1,socket_id=1
726 * will assign all child cores of socket 0 to node 0 and
727 * of socket 1 to node 1.
729 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
731 * Empty subset is disallowed and function will return with error in this case.
733 void machine_set_cpu_numa_node(MachineState
*machine
,
734 const CpuInstanceProperties
*props
, Error
**errp
)
736 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
737 NodeInfo
*numa_info
= machine
->numa_state
->nodes
;
741 if (!mc
->possible_cpu_arch_ids
) {
742 error_setg(errp
, "mapping of CPUs to NUMA node is not supported");
746 /* disabling node mapping is not supported, forbid it */
747 assert(props
->has_node_id
);
749 /* force board to initialize possible_cpus if it hasn't been done yet */
750 mc
->possible_cpu_arch_ids(machine
);
752 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
753 CPUArchId
*slot
= &machine
->possible_cpus
->cpus
[i
];
755 /* reject unsupported by board properties */
756 if (props
->has_thread_id
&& !slot
->props
.has_thread_id
) {
757 error_setg(errp
, "thread-id is not supported");
761 if (props
->has_core_id
&& !slot
->props
.has_core_id
) {
762 error_setg(errp
, "core-id is not supported");
766 if (props
->has_cluster_id
&& !slot
->props
.has_cluster_id
) {
767 error_setg(errp
, "cluster-id is not supported");
771 if (props
->has_socket_id
&& !slot
->props
.has_socket_id
) {
772 error_setg(errp
, "socket-id is not supported");
776 if (props
->has_die_id
&& !slot
->props
.has_die_id
) {
777 error_setg(errp
, "die-id is not supported");
781 /* skip slots with explicit mismatch */
782 if (props
->has_thread_id
&& props
->thread_id
!= slot
->props
.thread_id
) {
786 if (props
->has_core_id
&& props
->core_id
!= slot
->props
.core_id
) {
790 if (props
->has_cluster_id
&&
791 props
->cluster_id
!= slot
->props
.cluster_id
) {
795 if (props
->has_die_id
&& props
->die_id
!= slot
->props
.die_id
) {
799 if (props
->has_socket_id
&& props
->socket_id
!= slot
->props
.socket_id
) {
803 /* reject assignment if slot is already assigned, for compatibility
804 * of legacy cpu_index mapping with SPAPR core based mapping do not
805 * error out if cpu thread and matched core have the same node-id */
806 if (slot
->props
.has_node_id
&&
807 slot
->props
.node_id
!= props
->node_id
) {
808 error_setg(errp
, "CPU is already assigned to node-id: %" PRId64
,
809 slot
->props
.node_id
);
813 /* assign slot to node as it's matched '-numa cpu' key */
815 slot
->props
.node_id
= props
->node_id
;
816 slot
->props
.has_node_id
= props
->has_node_id
;
818 if (machine
->numa_state
->hmat_enabled
) {
819 if ((numa_info
[props
->node_id
].initiator
< MAX_NODES
) &&
820 (props
->node_id
!= numa_info
[props
->node_id
].initiator
)) {
821 error_setg(errp
, "The initiator of CPU NUMA node %" PRId64
822 " should be itself (got %" PRIu16
")",
823 props
->node_id
, numa_info
[props
->node_id
].initiator
);
826 numa_info
[props
->node_id
].has_cpu
= true;
827 numa_info
[props
->node_id
].initiator
= props
->node_id
;
832 error_setg(errp
, "no match found");
836 static void machine_get_smp(Object
*obj
, Visitor
*v
, const char *name
,
837 void *opaque
, Error
**errp
)
839 MachineState
*ms
= MACHINE(obj
);
840 SMPConfiguration
*config
= &(SMPConfiguration
){
841 .has_cpus
= true, .cpus
= ms
->smp
.cpus
,
842 .has_sockets
= true, .sockets
= ms
->smp
.sockets
,
843 .has_dies
= true, .dies
= ms
->smp
.dies
,
844 .has_clusters
= true, .clusters
= ms
->smp
.clusters
,
845 .has_cores
= true, .cores
= ms
->smp
.cores
,
846 .has_threads
= true, .threads
= ms
->smp
.threads
,
847 .has_maxcpus
= true, .maxcpus
= ms
->smp
.max_cpus
,
850 if (!visit_type_SMPConfiguration(v
, name
, &config
, &error_abort
)) {
855 static void machine_set_smp(Object
*obj
, Visitor
*v
, const char *name
,
856 void *opaque
, Error
**errp
)
858 MachineState
*ms
= MACHINE(obj
);
859 g_autoptr(SMPConfiguration
) config
= NULL
;
861 if (!visit_type_SMPConfiguration(v
, name
, &config
, errp
)) {
865 machine_parse_smp_config(ms
, config
, errp
);
868 static void machine_get_boot(Object
*obj
, Visitor
*v
, const char *name
,
869 void *opaque
, Error
**errp
)
871 MachineState
*ms
= MACHINE(obj
);
872 BootConfiguration
*config
= &ms
->boot_config
;
873 visit_type_BootConfiguration(v
, name
, &config
, &error_abort
);
876 static void machine_free_boot_config(MachineState
*ms
)
878 g_free(ms
->boot_config
.order
);
879 g_free(ms
->boot_config
.once
);
880 g_free(ms
->boot_config
.splash
);
883 static void machine_copy_boot_config(MachineState
*ms
, BootConfiguration
*config
)
885 MachineClass
*machine_class
= MACHINE_GET_CLASS(ms
);
887 machine_free_boot_config(ms
);
888 ms
->boot_config
= *config
;
889 if (!config
->order
) {
890 ms
->boot_config
.order
= g_strdup(machine_class
->default_boot_order
);
894 static void machine_set_boot(Object
*obj
, Visitor
*v
, const char *name
,
895 void *opaque
, Error
**errp
)
898 MachineState
*ms
= MACHINE(obj
);
899 BootConfiguration
*config
= NULL
;
901 if (!visit_type_BootConfiguration(v
, name
, &config
, errp
)) {
905 validate_bootdevices(config
->order
, errp
);
911 validate_bootdevices(config
->once
, errp
);
917 machine_copy_boot_config(ms
, config
);
918 /* Strings live in ms->boot_config. */
923 qapi_free_BootConfiguration(config
);
926 static void machine_class_init(ObjectClass
*oc
, void *data
)
928 MachineClass
*mc
= MACHINE_CLASS(oc
);
930 /* Default 128 MB as guest ram size */
931 mc
->default_ram_size
= 128 * MiB
;
932 mc
->rom_file_has_mr
= true;
934 /* numa node memory size aligned on 8MB by default.
935 * On Linux, each node's border has to be 8MB aligned
937 mc
->numa_mem_align_shift
= 23;
939 object_class_property_add_str(oc
, "kernel",
940 machine_get_kernel
, machine_set_kernel
);
941 object_class_property_set_description(oc
, "kernel",
942 "Linux kernel image file");
944 object_class_property_add_str(oc
, "initrd",
945 machine_get_initrd
, machine_set_initrd
);
946 object_class_property_set_description(oc
, "initrd",
947 "Linux initial ramdisk file");
949 object_class_property_add_str(oc
, "append",
950 machine_get_append
, machine_set_append
);
951 object_class_property_set_description(oc
, "append",
952 "Linux kernel command line");
954 object_class_property_add_str(oc
, "dtb",
955 machine_get_dtb
, machine_set_dtb
);
956 object_class_property_set_description(oc
, "dtb",
957 "Linux kernel device tree file");
959 object_class_property_add_str(oc
, "dumpdtb",
960 machine_get_dumpdtb
, machine_set_dumpdtb
);
961 object_class_property_set_description(oc
, "dumpdtb",
962 "Dump current dtb to a file and quit");
964 object_class_property_add(oc
, "boot", "BootConfiguration",
965 machine_get_boot
, machine_set_boot
,
967 object_class_property_set_description(oc
, "boot",
968 "Boot configuration");
970 object_class_property_add(oc
, "smp", "SMPConfiguration",
971 machine_get_smp
, machine_set_smp
,
973 object_class_property_set_description(oc
, "smp",
976 object_class_property_add(oc
, "phandle-start", "int",
977 machine_get_phandle_start
, machine_set_phandle_start
,
979 object_class_property_set_description(oc
, "phandle-start",
980 "The first phandle ID we may generate dynamically");
982 object_class_property_add_str(oc
, "dt-compatible",
983 machine_get_dt_compatible
, machine_set_dt_compatible
);
984 object_class_property_set_description(oc
, "dt-compatible",
985 "Overrides the \"compatible\" property of the dt root node");
987 object_class_property_add_bool(oc
, "dump-guest-core",
988 machine_get_dump_guest_core
, machine_set_dump_guest_core
);
989 object_class_property_set_description(oc
, "dump-guest-core",
990 "Include guest memory in a core dump");
992 object_class_property_add_bool(oc
, "mem-merge",
993 machine_get_mem_merge
, machine_set_mem_merge
);
994 object_class_property_set_description(oc
, "mem-merge",
995 "Enable/disable memory merge support");
997 object_class_property_add_bool(oc
, "usb",
998 machine_get_usb
, machine_set_usb
);
999 object_class_property_set_description(oc
, "usb",
1000 "Set on/off to enable/disable usb");
1002 object_class_property_add_bool(oc
, "graphics",
1003 machine_get_graphics
, machine_set_graphics
);
1004 object_class_property_set_description(oc
, "graphics",
1005 "Set on/off to enable/disable graphics emulation");
1007 object_class_property_add_str(oc
, "firmware",
1008 machine_get_firmware
, machine_set_firmware
);
1009 object_class_property_set_description(oc
, "firmware",
1012 object_class_property_add_bool(oc
, "suppress-vmdesc",
1013 machine_get_suppress_vmdesc
, machine_set_suppress_vmdesc
);
1014 object_class_property_set_description(oc
, "suppress-vmdesc",
1015 "Set on to disable self-describing migration");
1017 object_class_property_add_link(oc
, "confidential-guest-support",
1018 TYPE_CONFIDENTIAL_GUEST_SUPPORT
,
1019 offsetof(MachineState
, cgs
),
1020 machine_check_confidential_guest_support
,
1021 OBJ_PROP_LINK_STRONG
);
1022 object_class_property_set_description(oc
, "confidential-guest-support",
1023 "Set confidential guest scheme to support");
1025 /* For compatibility */
1026 object_class_property_add_str(oc
, "memory-encryption",
1027 machine_get_memory_encryption
, machine_set_memory_encryption
);
1028 object_class_property_set_description(oc
, "memory-encryption",
1029 "Set memory encryption object to use");
1031 object_class_property_add_link(oc
, "memory-backend", TYPE_MEMORY_BACKEND
,
1032 offsetof(MachineState
, memdev
), object_property_allow_set_link
,
1033 OBJ_PROP_LINK_STRONG
);
1034 object_class_property_set_description(oc
, "memory-backend",
1036 "Valid value is ID of hostmem based backend");
1038 object_class_property_add(oc
, "memory", "MemorySizeConfiguration",
1039 machine_get_mem
, machine_set_mem
,
1041 object_class_property_set_description(oc
, "memory",
1042 "Memory size configuration");
1045 static void machine_class_base_init(ObjectClass
*oc
, void *data
)
1047 MachineClass
*mc
= MACHINE_CLASS(oc
);
1048 mc
->max_cpus
= mc
->max_cpus
?: 1;
1049 mc
->min_cpus
= mc
->min_cpus
?: 1;
1050 mc
->default_cpus
= mc
->default_cpus
?: 1;
1052 if (!object_class_is_abstract(oc
)) {
1053 const char *cname
= object_class_get_name(oc
);
1054 assert(g_str_has_suffix(cname
, TYPE_MACHINE_SUFFIX
));
1055 mc
->name
= g_strndup(cname
,
1056 strlen(cname
) - strlen(TYPE_MACHINE_SUFFIX
));
1057 mc
->compat_props
= g_ptr_array_new();
1061 static void machine_initfn(Object
*obj
)
1063 MachineState
*ms
= MACHINE(obj
);
1064 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
1066 container_get(obj
, "/peripheral");
1067 container_get(obj
, "/peripheral-anon");
1069 ms
->dump_guest_core
= true;
1070 ms
->mem_merge
= true;
1071 ms
->enable_graphics
= true;
1072 ms
->kernel_cmdline
= g_strdup("");
1073 ms
->ram_size
= mc
->default_ram_size
;
1074 ms
->maxram_size
= mc
->default_ram_size
;
1076 if (mc
->nvdimm_supported
) {
1077 Object
*obj
= OBJECT(ms
);
1079 ms
->nvdimms_state
= g_new0(NVDIMMState
, 1);
1080 object_property_add_bool(obj
, "nvdimm",
1081 machine_get_nvdimm
, machine_set_nvdimm
);
1082 object_property_set_description(obj
, "nvdimm",
1083 "Set on/off to enable/disable "
1084 "NVDIMM instantiation");
1086 object_property_add_str(obj
, "nvdimm-persistence",
1087 machine_get_nvdimm_persistence
,
1088 machine_set_nvdimm_persistence
);
1089 object_property_set_description(obj
, "nvdimm-persistence",
1090 "Set NVDIMM persistence"
1091 "Valid values are cpu, mem-ctrl");
1094 if (mc
->cpu_index_to_instance_props
&& mc
->get_default_cpu_node_id
) {
1095 ms
->numa_state
= g_new0(NumaState
, 1);
1096 object_property_add_bool(obj
, "hmat",
1097 machine_get_hmat
, machine_set_hmat
);
1098 object_property_set_description(obj
, "hmat",
1099 "Set on/off to enable/disable "
1100 "ACPI Heterogeneous Memory Attribute "
1104 /* default to mc->default_cpus */
1105 ms
->smp
.cpus
= mc
->default_cpus
;
1106 ms
->smp
.max_cpus
= mc
->default_cpus
;
1107 ms
->smp
.sockets
= 1;
1109 ms
->smp
.clusters
= 1;
1111 ms
->smp
.threads
= 1;
1113 machine_copy_boot_config(ms
, &(BootConfiguration
){ 0 });
1116 static void machine_finalize(Object
*obj
)
1118 MachineState
*ms
= MACHINE(obj
);
1120 machine_free_boot_config(ms
);
1121 g_free(ms
->kernel_filename
);
1122 g_free(ms
->initrd_filename
);
1123 g_free(ms
->kernel_cmdline
);
1125 g_free(ms
->dumpdtb
);
1126 g_free(ms
->dt_compatible
);
1127 g_free(ms
->firmware
);
1128 g_free(ms
->device_memory
);
1129 g_free(ms
->nvdimms_state
);
1130 g_free(ms
->numa_state
);
1133 bool machine_usb(MachineState
*machine
)
1135 return machine
->usb
;
1138 int machine_phandle_start(MachineState
*machine
)
1140 return machine
->phandle_start
;
1143 bool machine_dump_guest_core(MachineState
*machine
)
1145 return machine
->dump_guest_core
;
1148 bool machine_mem_merge(MachineState
*machine
)
1150 return machine
->mem_merge
;
1153 static char *cpu_slot_to_string(const CPUArchId
*cpu
)
1155 GString
*s
= g_string_new(NULL
);
1156 if (cpu
->props
.has_socket_id
) {
1157 g_string_append_printf(s
, "socket-id: %"PRId64
, cpu
->props
.socket_id
);
1159 if (cpu
->props
.has_die_id
) {
1161 g_string_append_printf(s
, ", ");
1163 g_string_append_printf(s
, "die-id: %"PRId64
, cpu
->props
.die_id
);
1165 if (cpu
->props
.has_cluster_id
) {
1167 g_string_append_printf(s
, ", ");
1169 g_string_append_printf(s
, "cluster-id: %"PRId64
, cpu
->props
.cluster_id
);
1171 if (cpu
->props
.has_core_id
) {
1173 g_string_append_printf(s
, ", ");
1175 g_string_append_printf(s
, "core-id: %"PRId64
, cpu
->props
.core_id
);
1177 if (cpu
->props
.has_thread_id
) {
1179 g_string_append_printf(s
, ", ");
1181 g_string_append_printf(s
, "thread-id: %"PRId64
, cpu
->props
.thread_id
);
1183 return g_string_free(s
, false);
1186 static void numa_validate_initiator(NumaState
*numa_state
)
1189 NodeInfo
*numa_info
= numa_state
->nodes
;
1191 for (i
= 0; i
< numa_state
->num_nodes
; i
++) {
1192 if (numa_info
[i
].initiator
== MAX_NODES
) {
1196 if (!numa_info
[numa_info
[i
].initiator
].present
) {
1197 error_report("NUMA node %" PRIu16
" is missing, use "
1198 "'-numa node' option to declare it first",
1199 numa_info
[i
].initiator
);
1203 if (!numa_info
[numa_info
[i
].initiator
].has_cpu
) {
1204 error_report("The initiator of NUMA node %d is invalid", i
);
1210 static void machine_numa_finish_cpu_init(MachineState
*machine
)
1213 bool default_mapping
;
1214 GString
*s
= g_string_new(NULL
);
1215 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1216 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
1218 assert(machine
->numa_state
->num_nodes
);
1219 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1220 if (possible_cpus
->cpus
[i
].props
.has_node_id
) {
1224 default_mapping
= (i
== possible_cpus
->len
);
1226 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1227 const CPUArchId
*cpu_slot
= &possible_cpus
->cpus
[i
];
1229 if (!cpu_slot
->props
.has_node_id
) {
1230 /* fetch default mapping from board and enable it */
1231 CpuInstanceProperties props
= cpu_slot
->props
;
1233 props
.node_id
= mc
->get_default_cpu_node_id(machine
, i
);
1234 if (!default_mapping
) {
1235 /* record slots with not set mapping,
1236 * TODO: make it hard error in future */
1237 char *cpu_str
= cpu_slot_to_string(cpu_slot
);
1238 g_string_append_printf(s
, "%sCPU %d [%s]",
1239 s
->len
? ", " : "", i
, cpu_str
);
1242 /* non mapped cpus used to fallback to node 0 */
1246 props
.has_node_id
= true;
1247 machine_set_cpu_numa_node(machine
, &props
, &error_fatal
);
1251 if (machine
->numa_state
->hmat_enabled
) {
1252 numa_validate_initiator(machine
->numa_state
);
1255 if (s
->len
&& !qtest_enabled()) {
1256 warn_report("CPU(s) not present in any NUMA nodes: %s",
1258 warn_report("All CPU(s) up to maxcpus should be described "
1259 "in NUMA config, ability to start up with partial NUMA "
1260 "mappings is obsoleted and will be removed in future");
1262 g_string_free(s
, true);
1265 MemoryRegion
*machine_consume_memdev(MachineState
*machine
,
1266 HostMemoryBackend
*backend
)
1268 MemoryRegion
*ret
= host_memory_backend_get_memory(backend
);
1270 if (host_memory_backend_is_mapped(backend
)) {
1271 error_report("memory backend %s can't be used multiple times.",
1272 object_get_canonical_path_component(OBJECT(backend
)));
1275 host_memory_backend_set_mapped(backend
, true);
1276 vmstate_register_ram_global(ret
);
1280 static bool create_default_memdev(MachineState
*ms
, const char *path
, Error
**errp
)
1283 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1286 obj
= object_new(path
? TYPE_MEMORY_BACKEND_FILE
: TYPE_MEMORY_BACKEND_RAM
);
1288 if (!object_property_set_str(obj
, "mem-path", path
, errp
)) {
1292 if (!object_property_set_int(obj
, "size", ms
->ram_size
, errp
)) {
1295 object_property_add_child(object_get_objects_root(), mc
->default_ram_id
,
1297 /* Ensure backend's memory region name is equal to mc->default_ram_id */
1298 if (!object_property_set_bool(obj
, "x-use-canonical-path-for-ramblock-id",
1302 if (!user_creatable_complete(USER_CREATABLE(obj
), errp
)) {
1305 r
= object_property_set_link(OBJECT(ms
), "memory-backend", obj
, errp
);
1313 void machine_run_board_init(MachineState
*machine
, const char *mem_path
, Error
**errp
)
1315 MachineClass
*machine_class
= MACHINE_GET_CLASS(machine
);
1316 ObjectClass
*oc
= object_class_by_name(machine
->cpu_type
);
1319 /* This checkpoint is required by replay to separate prior clock
1320 reading from the other reads, because timer polling functions query
1321 clock values from the log. */
1322 replay_checkpoint(CHECKPOINT_INIT
);
1324 if (!xen_enabled()) {
1325 /* On 32-bit hosts, QEMU is limited by virtual address space */
1326 if (machine
->ram_size
> (2047 << 20) && HOST_LONG_BITS
== 32) {
1327 error_setg(errp
, "at most 2047 MB RAM can be simulated");
1332 if (machine
->memdev
) {
1333 ram_addr_t backend_size
= object_property_get_uint(OBJECT(machine
->memdev
),
1334 "size", &error_abort
);
1335 if (backend_size
!= machine
->ram_size
) {
1336 error_setg(errp
, "Machine memory size does not match the size of the memory backend");
1339 } else if (machine_class
->default_ram_id
&& machine
->ram_size
&&
1340 numa_uses_legacy_mem()) {
1341 if (object_property_find(object_get_objects_root(),
1342 machine_class
->default_ram_id
)) {
1343 error_setg(errp
, "object name '%s' is reserved for the default"
1344 " RAM backend, it can't be used for any other purposes."
1345 " Change the object's 'id' to something else",
1346 machine_class
->default_ram_id
);
1349 if (!create_default_memdev(current_machine
, mem_path
, errp
)) {
1354 if (machine
->numa_state
) {
1355 numa_complete_configuration(machine
);
1356 if (machine
->numa_state
->num_nodes
) {
1357 machine_numa_finish_cpu_init(machine
);
1361 if (!machine
->ram
&& machine
->memdev
) {
1362 machine
->ram
= machine_consume_memdev(machine
, machine
->memdev
);
1365 /* If the machine supports the valid_cpu_types check and the user
1366 * specified a CPU with -cpu check here that the user CPU is supported.
1368 if (machine_class
->valid_cpu_types
&& machine
->cpu_type
) {
1371 for (i
= 0; machine_class
->valid_cpu_types
[i
]; i
++) {
1372 if (object_class_dynamic_cast(oc
,
1373 machine_class
->valid_cpu_types
[i
])) {
1374 /* The user specificed CPU is in the valid field, we are
1381 if (!machine_class
->valid_cpu_types
[i
]) {
1382 /* The user specified CPU is not valid */
1383 error_report("Invalid CPU type: %s", machine
->cpu_type
);
1384 error_printf("The valid types are: %s",
1385 machine_class
->valid_cpu_types
[0]);
1386 for (i
= 1; machine_class
->valid_cpu_types
[i
]; i
++) {
1387 error_printf(", %s", machine_class
->valid_cpu_types
[i
]);
1395 /* Check if CPU type is deprecated and warn if so */
1397 if (cc
&& cc
->deprecation_note
) {
1398 warn_report("CPU model %s is deprecated -- %s", machine
->cpu_type
,
1399 cc
->deprecation_note
);
1404 * With confidential guests, the host can't see the real
1405 * contents of RAM, so there's no point in it trying to merge
1408 machine_set_mem_merge(OBJECT(machine
), false, &error_abort
);
1411 * Virtio devices can't count on directly accessing guest
1412 * memory, so they need iommu_platform=on to use normal DMA
1413 * mechanisms. That requires also disabling legacy virtio
1414 * support for those virtio pci devices which allow it.
1416 object_register_sugar_prop(TYPE_VIRTIO_PCI
, "disable-legacy",
1418 object_register_sugar_prop(TYPE_VIRTIO_DEVICE
, "iommu_platform",
1422 accel_init_interfaces(ACCEL_GET_CLASS(machine
->accelerator
));
1423 machine_class
->init(machine
);
1424 phase_advance(PHASE_MACHINE_INITIALIZED
);
1427 static NotifierList machine_init_done_notifiers
=
1428 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers
);
1430 void qemu_add_machine_init_done_notifier(Notifier
*notify
)
1432 notifier_list_add(&machine_init_done_notifiers
, notify
);
1433 if (phase_check(PHASE_MACHINE_READY
)) {
1434 notify
->notify(notify
, NULL
);
1438 void qemu_remove_machine_init_done_notifier(Notifier
*notify
)
1440 notifier_remove(notify
);
1443 void qdev_machine_creation_done(void)
1445 cpu_synchronize_all_post_init();
1447 if (current_machine
->boot_config
.once
) {
1448 qemu_boot_set(current_machine
->boot_config
.once
, &error_fatal
);
1449 qemu_register_reset(restore_boot_order
, g_strdup(current_machine
->boot_config
.order
));
1453 * ok, initial machine setup is done, starting from now we can
1454 * only create hotpluggable devices
1456 phase_advance(PHASE_MACHINE_READY
);
1457 qdev_assert_realized_properly();
1459 /* TODO: once all bus devices are qdevified, this should be done
1460 * when bus is created by qdev.c */
1462 * TODO: If we had a main 'reset container' that the whole system
1463 * lived in, we could reset that using the multi-phase reset
1464 * APIs. For the moment, we just reset the sysbus, which will cause
1465 * all devices hanging off it (and all their child buses, recursively)
1466 * to be reset. Note that this will *not* reset any Device objects
1467 * which are not attached to some part of the qbus tree!
1469 qemu_register_reset(resettable_cold_reset_fn
, sysbus_get_default());
1471 notifier_list_notify(&machine_init_done_notifiers
, NULL
);
1473 if (rom_check_and_register_reset() != 0) {
1479 /* This checkpoint is required by replay to separate prior clock
1480 reading from the other reads, because timer polling functions query
1481 clock values from the log. */
1482 replay_checkpoint(CHECKPOINT_RESET
);
1483 qemu_system_reset(SHUTDOWN_CAUSE_NONE
);
1484 register_global_state();
1487 static const TypeInfo machine_info
= {
1488 .name
= TYPE_MACHINE
,
1489 .parent
= TYPE_OBJECT
,
1491 .class_size
= sizeof(MachineClass
),
1492 .class_init
= machine_class_init
,
1493 .class_base_init
= machine_class_base_init
,
1494 .instance_size
= sizeof(MachineState
),
1495 .instance_init
= machine_initfn
,
1496 .instance_finalize
= machine_finalize
,
1499 static void machine_register_types(void)
1501 type_register_static(&machine_info
);
1504 type_init(machine_register_types
)