]> git.proxmox.com Git - qemu.git/blob - hw/display/vga-pci.c
console: make DisplayState private to console.c
[qemu.git] / hw / display / vga-pci.c
1 /*
2 * QEMU PCI VGA Emulator.
3 *
4 * see docs/specs/standard-vga.txt for virtual hardware specs.
5 *
6 * Copyright (c) 2003 Fabrice Bellard
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26 #include "hw/hw.h"
27 #include "ui/console.h"
28 #include "hw/pci/pci.h"
29 #include "vga_int.h"
30 #include "ui/pixel_ops.h"
31 #include "qemu/timer.h"
32 #include "hw/loader.h"
33
34 #define PCI_VGA_IOPORT_OFFSET 0x400
35 #define PCI_VGA_IOPORT_SIZE (0x3e0 - 0x3c0)
36 #define PCI_VGA_BOCHS_OFFSET 0x500
37 #define PCI_VGA_BOCHS_SIZE (0x0b * 2)
38 #define PCI_VGA_MMIO_SIZE 0x1000
39
40 enum vga_pci_flags {
41 PCI_VGA_FLAG_ENABLE_MMIO = 1,
42 };
43
44 typedef struct PCIVGAState {
45 PCIDevice dev;
46 VGACommonState vga;
47 uint32_t flags;
48 MemoryRegion mmio;
49 MemoryRegion ioport;
50 MemoryRegion bochs;
51 } PCIVGAState;
52
53 static const VMStateDescription vmstate_vga_pci = {
54 .name = "vga",
55 .version_id = 2,
56 .minimum_version_id = 2,
57 .minimum_version_id_old = 2,
58 .fields = (VMStateField []) {
59 VMSTATE_PCI_DEVICE(dev, PCIVGAState),
60 VMSTATE_STRUCT(vga, PCIVGAState, 0, vmstate_vga_common, VGACommonState),
61 VMSTATE_END_OF_LIST()
62 }
63 };
64
65 static uint64_t pci_vga_ioport_read(void *ptr, hwaddr addr,
66 unsigned size)
67 {
68 PCIVGAState *d = ptr;
69 uint64_t ret = 0;
70
71 switch (size) {
72 case 1:
73 ret = vga_ioport_read(&d->vga, addr);
74 break;
75 case 2:
76 ret = vga_ioport_read(&d->vga, addr);
77 ret |= vga_ioport_read(&d->vga, addr+1) << 8;
78 break;
79 }
80 return ret;
81 }
82
83 static void pci_vga_ioport_write(void *ptr, hwaddr addr,
84 uint64_t val, unsigned size)
85 {
86 PCIVGAState *d = ptr;
87
88 switch (size) {
89 case 1:
90 vga_ioport_write(&d->vga, addr + 0x3c0, val);
91 break;
92 case 2:
93 /*
94 * Update bytes in little endian order. Allows to update
95 * indexed registers with a single word write because the
96 * index byte is updated first.
97 */
98 vga_ioport_write(&d->vga, addr + 0x3c0, val & 0xff);
99 vga_ioport_write(&d->vga, addr + 0x3c1, (val >> 8) & 0xff);
100 break;
101 }
102 }
103
104 static const MemoryRegionOps pci_vga_ioport_ops = {
105 .read = pci_vga_ioport_read,
106 .write = pci_vga_ioport_write,
107 .valid.min_access_size = 1,
108 .valid.max_access_size = 4,
109 .impl.min_access_size = 1,
110 .impl.max_access_size = 2,
111 .endianness = DEVICE_LITTLE_ENDIAN,
112 };
113
114 static uint64_t pci_vga_bochs_read(void *ptr, hwaddr addr,
115 unsigned size)
116 {
117 PCIVGAState *d = ptr;
118 int index = addr >> 1;
119
120 vbe_ioport_write_index(&d->vga, 0, index);
121 return vbe_ioport_read_data(&d->vga, 0);
122 }
123
124 static void pci_vga_bochs_write(void *ptr, hwaddr addr,
125 uint64_t val, unsigned size)
126 {
127 PCIVGAState *d = ptr;
128 int index = addr >> 1;
129
130 vbe_ioport_write_index(&d->vga, 0, index);
131 vbe_ioport_write_data(&d->vga, 0, val);
132 }
133
134 static const MemoryRegionOps pci_vga_bochs_ops = {
135 .read = pci_vga_bochs_read,
136 .write = pci_vga_bochs_write,
137 .valid.min_access_size = 1,
138 .valid.max_access_size = 4,
139 .impl.min_access_size = 2,
140 .impl.max_access_size = 2,
141 .endianness = DEVICE_LITTLE_ENDIAN,
142 };
143
144 static int pci_std_vga_initfn(PCIDevice *dev)
145 {
146 PCIVGAState *d = DO_UPCAST(PCIVGAState, dev, dev);
147 VGACommonState *s = &d->vga;
148
149 /* vga + console init */
150 vga_common_init(s);
151 vga_init(s, pci_address_space(dev), pci_address_space_io(dev), true);
152
153 s->con = graphic_console_init(s->update, s->invalidate,
154 s->text_update, s);
155
156 /* XXX: VGA_RAM_SIZE must be a power of two */
157 pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram);
158
159 /* mmio bar for vga register access */
160 if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_MMIO)) {
161 memory_region_init(&d->mmio, "vga.mmio", 4096);
162 memory_region_init_io(&d->ioport, &pci_vga_ioport_ops, d,
163 "vga ioports remapped", PCI_VGA_IOPORT_SIZE);
164 memory_region_init_io(&d->bochs, &pci_vga_bochs_ops, d,
165 "bochs dispi interface", PCI_VGA_BOCHS_SIZE);
166
167 memory_region_add_subregion(&d->mmio, PCI_VGA_IOPORT_OFFSET,
168 &d->ioport);
169 memory_region_add_subregion(&d->mmio, PCI_VGA_BOCHS_OFFSET,
170 &d->bochs);
171 pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
172 }
173
174 if (!dev->rom_bar) {
175 /* compatibility with pc-0.13 and older */
176 vga_init_vbe(s, pci_address_space(dev));
177 }
178
179 return 0;
180 }
181
182 static Property vga_pci_properties[] = {
183 DEFINE_PROP_UINT32("vgamem_mb", PCIVGAState, vga.vram_size_mb, 16),
184 DEFINE_PROP_BIT("mmio", PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_MMIO, true),
185 DEFINE_PROP_END_OF_LIST(),
186 };
187
188 static void vga_class_init(ObjectClass *klass, void *data)
189 {
190 DeviceClass *dc = DEVICE_CLASS(klass);
191 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
192
193 k->no_hotplug = 1;
194 k->init = pci_std_vga_initfn;
195 k->romfile = "vgabios-stdvga.bin";
196 k->vendor_id = PCI_VENDOR_ID_QEMU;
197 k->device_id = PCI_DEVICE_ID_QEMU_VGA;
198 k->class_id = PCI_CLASS_DISPLAY_VGA;
199 dc->vmsd = &vmstate_vga_pci;
200 dc->props = vga_pci_properties;
201 }
202
203 static const TypeInfo vga_info = {
204 .name = "VGA",
205 .parent = TYPE_PCI_DEVICE,
206 .instance_size = sizeof(PCIVGAState),
207 .class_init = vga_class_init,
208 };
209
210 static void vga_register_types(void)
211 {
212 type_register_static(&vga_info);
213 }
214
215 type_init(vga_register_types)