hw/etraxfs.c

   1 /*
   2  * QEMU ETRAX System Emulator
   3  *
   4  * Copyright (c) 2007 Edgar E. Iglesias, Axis Communications AB.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include <time.h>
  25 #include <sys/time.h>
  26 #include "vl.h"
  27
  28 extern FILE *logfile;
  29
  30 static void main_cpu_reset(void *opaque)
  31 {
  32     CPUState *env = opaque;
  33     cpu_reset(env);
  34 }
  35
  36 static uint32_t fs_mmio_readb (void *opaque, target_phys_addr_t addr)
  37 {
  38         CPUState *env = opaque;
  39         uint32_t r = 0;
  40         printf ("%s %x pc=%x\n", __func__, addr, env->pc);
  41         return r;
  42 }
  43 static uint32_t fs_mmio_readw (void *opaque, target_phys_addr_t addr)
  44 {
  45         CPUState *env = opaque;
  46         uint32_t r = 0;
  47         printf ("%s %x pc=%x\n", __func__, addr, env->pc);
  48         return r;
  49 }
  50
  51 static uint32_t fs_mmio_readl (void *opaque, target_phys_addr_t addr)
  52 {
  53         CPUState *env = opaque;
  54         uint32_t r = 0;
  55         printf ("%s %x p=%x\n", __func__, addr, env->pc);
  56         return r;
  57 }
  58
  59 static void
  60 fs_mmio_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
  61 {
  62         CPUState *env = opaque;
  63         printf ("%s %x %x pc=%x\n", __func__, addr, value, env->pc);
  64 }
  65 static void
  66 fs_mmio_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
  67 {
  68         CPUState *env = opaque;
  69         printf ("%s %x %x pc=%x\n", __func__, addr, value, env->pc);
  70 }
  71 static void
  72 fs_mmio_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  73 {
  74         CPUState *env = opaque;
  75         printf ("%s %x %x pc=%x\n", __func__, addr, value, env->pc);
  76 }
  77
  78 static CPUReadMemoryFunc *fs_mmio_read[] = {
  79     &fs_mmio_readb,
  80     &fs_mmio_readw,
  81     &fs_mmio_readl,
  82 };
  83
  84 static CPUWriteMemoryFunc *fs_mmio_write[] = {
  85     &fs_mmio_writeb,
  86     &fs_mmio_writew,
  87     &fs_mmio_writel,
  88 };
  89
  90
  91 /* Init functions for different blocks.  */
  92 extern void etraxfs_timer_init(CPUState *env, qemu_irq *irqs);
  93 extern void etraxfs_ser_init(CPUState *env, qemu_irq *irqs);
  94
  95 void etrax_ack_irq(CPUState *env, uint32_t mask)
  96 {
  97         env->pending_interrupts &= ~mask;
  98 }
  99
 100 static void dummy_cpu_set_irq(void *opaque, int irq, int level)
 101 {
 102         CPUState *env = opaque;
 103
 104         /* Hmm, should this really be done here?  */
 105         env->pending_interrupts |= 1 << irq;
 106         cpu_interrupt(env, CPU_INTERRUPT_HARD);
 107 }
 108
 109 static
 110 void bareetraxfs_init (int ram_size, int vga_ram_size, int boot_device,
 111                        DisplayState *ds, const char **fd_filename, int snapshot,
 112                        const char *kernel_filename, const char *kernel_cmdline,
 113                        const char *initrd_filename, const char *cpu_model)
 114 {
 115     CPUState *env;
 116     qemu_irq *irqs;
 117     int kernel_size;
 118     int internal_regs;
 119
 120     /* init CPUs */
 121     if (cpu_model == NULL) {
 122         cpu_model = "crisv32";
 123     }
 124     env = cpu_init();
 125 /*    register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); */
 126     qemu_register_reset(main_cpu_reset, env);
 127     irqs = qemu_allocate_irqs(dummy_cpu_set_irq, env, 32);
 128
 129     internal_regs = cpu_register_io_memory(0,
 130                                            fs_mmio_read, fs_mmio_write, env);
 131     /* 0xb0050000 is the last reg.  */
 132     cpu_register_physical_memory (0xac000000, 0x4010000, internal_regs);
 133     /* allocate RAM */
 134     cpu_register_physical_memory(0x40000000, ram_size, IO_MEM_RAM);
 135
 136     etraxfs_timer_init(env, irqs);
 137     etraxfs_ser_init(env, irqs);
 138
 139     kernel_size = load_image(kernel_filename, phys_ram_base + 0x4000);
 140     /* magic for boot.  */
 141     env->regs[8] = 0x56902387;
 142     env->regs[9] = 0x40004000 + kernel_size;
 143     env->pc = 0x40004000;
 144
 145     {
 146        unsigned char *ptr = phys_ram_base + 0x4000;
 147        int i;
 148        for (i = 0; i < 8; i++)
 149        {
 150                 printf ("%2.2x ", ptr[i]);
 151        }
 152         printf("\n");
 153     }
 154
 155     printf ("pc =%x\n", env->pc);
 156     printf ("ram size =%d\n", ram_size);
 157     printf ("kernel name =%s\n", kernel_filename);
 158     printf ("kernel size =%d\n", kernel_size);
 159     printf ("cpu haltd =%d\n", env->halted);
 160 }
 161
 162 void DMA_run(void)
 163 {
 164 }
 165
 166 void pic_info()
 167 {
 168 }
 169
 170 void irq_info()
 171 {
 172 }
 173
 174 QEMUMachine bareetraxfs_machine = {
 175     "bareetraxfs",
 176     "Bare ETRAX FS board",
 177     bareetraxfs_init,
 178 };