2 * QEMU Floppy disk emulator (Intel 82078)
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
32 #include "qemu-error.h"
33 #include "qemu-timer.h"
36 #include "qdev-addr.h"
40 /********************************************************/
41 /* debug Floppy devices */
42 //#define DEBUG_FLOPPY
45 #define FLOPPY_DPRINTF(fmt, ...) \
46 do { printf("FLOPPY: " fmt , ## __VA_ARGS__); } while (0)
48 #define FLOPPY_DPRINTF(fmt, ...)
51 #define FLOPPY_ERROR(fmt, ...) \
52 do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
54 /********************************************************/
55 /* Floppy drive emulation */
57 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
58 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
60 /* Will always be a fixed parameter for us */
61 #define FD_SECTOR_LEN 512
62 #define FD_SECTOR_SC 2 /* Sector size code */
63 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
65 typedef struct FDCtrl FDCtrl
;
67 /* Floppy disk drive emulation */
68 typedef enum FDiskFlags
{
69 FDISK_DBL_SIDES
= 0x01,
72 typedef struct FDrive
{
77 uint8_t perpendicular
; /* 2.88 MB access mode */
84 uint8_t last_sect
; /* Nb sector per track */
85 uint8_t max_track
; /* Nb of tracks */
86 uint16_t bps
; /* Bytes per sector */
87 uint8_t ro
; /* Is read-only */
88 uint8_t media_changed
; /* Is media changed */
89 uint8_t media_rate
; /* Data rate of medium */
92 static void fd_init(FDrive
*drv
)
95 drv
->drive
= FDRIVE_DRV_NONE
;
96 drv
->perpendicular
= 0;
102 #define NUM_SIDES(drv) ((drv)->flags & FDISK_DBL_SIDES ? 2 : 1)
104 static int fd_sector_calc(uint8_t head
, uint8_t track
, uint8_t sect
,
105 uint8_t last_sect
, uint8_t num_sides
)
107 return (((track
* num_sides
) + head
) * last_sect
) + sect
- 1;
110 /* Returns current position, in sectors, for given drive */
111 static int fd_sector(FDrive
*drv
)
113 return fd_sector_calc(drv
->head
, drv
->track
, drv
->sect
, drv
->last_sect
,
117 /* Seek to a new position:
118 * returns 0 if already on right track
119 * returns 1 if track changed
120 * returns 2 if track is invalid
121 * returns 3 if sector is invalid
122 * returns 4 if seek is disabled
124 static int fd_seek(FDrive
*drv
, uint8_t head
, uint8_t track
, uint8_t sect
,
130 if (track
> drv
->max_track
||
131 (head
!= 0 && (drv
->flags
& FDISK_DBL_SIDES
) == 0)) {
132 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
133 head
, track
, sect
, 1,
134 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
135 drv
->max_track
, drv
->last_sect
);
138 if (sect
> drv
->last_sect
) {
139 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
140 head
, track
, sect
, 1,
141 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
142 drv
->max_track
, drv
->last_sect
);
145 sector
= fd_sector_calc(head
, track
, sect
, drv
->last_sect
, NUM_SIDES(drv
));
147 if (sector
!= fd_sector(drv
)) {
150 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
151 head
, track
, sect
, 1, drv
->max_track
, drv
->last_sect
);
156 if (drv
->track
!= track
)
165 /* Set drive back to track 0 */
166 static void fd_recalibrate(FDrive
*drv
)
168 FLOPPY_DPRINTF("recalibrate\n");
174 /* Revalidate a disk drive after a disk change */
175 static void fd_revalidate(FDrive
*drv
)
177 int nb_heads
, max_track
, last_sect
, ro
;
181 FLOPPY_DPRINTF("revalidate\n");
182 if (drv
->bs
!= NULL
&& bdrv_is_inserted(drv
->bs
)) {
183 ro
= bdrv_is_read_only(drv
->bs
);
184 bdrv_get_floppy_geometry_hint(drv
->bs
, &nb_heads
, &max_track
,
185 &last_sect
, drv
->drive
, &drive
, &rate
);
186 if (nb_heads
!= 0 && max_track
!= 0 && last_sect
!= 0) {
187 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
188 nb_heads
- 1, max_track
, last_sect
);
190 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n", nb_heads
,
191 max_track
, last_sect
, ro
? "ro" : "rw");
194 drv
->flags
&= ~FDISK_DBL_SIDES
;
196 drv
->flags
|= FDISK_DBL_SIDES
;
198 drv
->max_track
= max_track
;
199 drv
->last_sect
= last_sect
;
202 drv
->media_rate
= rate
;
204 FLOPPY_DPRINTF("No disk in drive\n");
207 drv
->flags
&= ~FDISK_DBL_SIDES
;
211 /********************************************************/
212 /* Intel 82078 floppy disk controller emulation */
214 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
);
215 static void fdctrl_reset_fifo(FDCtrl
*fdctrl
);
216 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
217 int dma_pos
, int dma_len
);
218 static void fdctrl_raise_irq(FDCtrl
*fdctrl
, uint8_t status0
);
219 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
);
221 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
);
222 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
);
223 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
);
224 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
);
225 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
);
226 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
);
227 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
);
228 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
);
229 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
);
230 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
);
231 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
);
232 static void fdctrl_write_ccr(FDCtrl
*fdctrl
, uint32_t value
);
243 FD_STATE_MULTI
= 0x01, /* multi track flag */
244 FD_STATE_FORMAT
= 0x02, /* format flag */
245 FD_STATE_SEEK
= 0x04, /* seek flag */
261 FD_CMD_READ_TRACK
= 0x02,
262 FD_CMD_SPECIFY
= 0x03,
263 FD_CMD_SENSE_DRIVE_STATUS
= 0x04,
266 FD_CMD_RECALIBRATE
= 0x07,
267 FD_CMD_SENSE_INTERRUPT_STATUS
= 0x08,
268 FD_CMD_WRITE_DELETED
= 0x09,
269 FD_CMD_READ_ID
= 0x0a,
270 FD_CMD_READ_DELETED
= 0x0c,
271 FD_CMD_FORMAT_TRACK
= 0x0d,
272 FD_CMD_DUMPREG
= 0x0e,
274 FD_CMD_VERSION
= 0x10,
275 FD_CMD_SCAN_EQUAL
= 0x11,
276 FD_CMD_PERPENDICULAR_MODE
= 0x12,
277 FD_CMD_CONFIGURE
= 0x13,
279 FD_CMD_VERIFY
= 0x16,
280 FD_CMD_POWERDOWN_MODE
= 0x17,
281 FD_CMD_PART_ID
= 0x18,
282 FD_CMD_SCAN_LOW_OR_EQUAL
= 0x19,
283 FD_CMD_SCAN_HIGH_OR_EQUAL
= 0x1d,
285 FD_CMD_OPTION
= 0x33,
286 FD_CMD_RESTORE
= 0x4e,
287 FD_CMD_DRIVE_SPECIFICATION_COMMAND
= 0x8e,
288 FD_CMD_RELATIVE_SEEK_OUT
= 0x8f,
289 FD_CMD_FORMAT_AND_WRITE
= 0xcd,
290 FD_CMD_RELATIVE_SEEK_IN
= 0xcf,
294 FD_CONFIG_PRETRK
= 0xff, /* Pre-compensation set to track 0 */
295 FD_CONFIG_FIFOTHR
= 0x0f, /* FIFO threshold set to 1 byte */
296 FD_CONFIG_POLL
= 0x10, /* Poll enabled */
297 FD_CONFIG_EFIFO
= 0x20, /* FIFO disabled */
298 FD_CONFIG_EIS
= 0x40, /* No implied seeks */
304 FD_SR0_ABNTERM
= 0x40,
305 FD_SR0_INVCMD
= 0x80,
306 FD_SR0_RDYCHG
= 0xc0,
310 FD_SR1_MA
= 0x01, /* Missing address mark */
311 FD_SR1_NW
= 0x02, /* Not writable */
312 FD_SR1_EC
= 0x80, /* End of cylinder */
316 FD_SR2_SNS
= 0x04, /* Scan not satisfied */
317 FD_SR2_SEH
= 0x08, /* Scan equal hit */
328 FD_SRA_INTPEND
= 0x80,
342 FD_DOR_SELMASK
= 0x03,
344 FD_DOR_SELMASK
= 0x01,
346 FD_DOR_nRESET
= 0x04,
348 FD_DOR_MOTEN0
= 0x10,
349 FD_DOR_MOTEN1
= 0x20,
350 FD_DOR_MOTEN2
= 0x40,
351 FD_DOR_MOTEN3
= 0x80,
356 FD_TDR_BOOTSEL
= 0x0c,
358 FD_TDR_BOOTSEL
= 0x04,
363 FD_DSR_DRATEMASK
= 0x03,
364 FD_DSR_PWRDOWN
= 0x40,
365 FD_DSR_SWRESET
= 0x80,
369 FD_MSR_DRV0BUSY
= 0x01,
370 FD_MSR_DRV1BUSY
= 0x02,
371 FD_MSR_DRV2BUSY
= 0x04,
372 FD_MSR_DRV3BUSY
= 0x08,
373 FD_MSR_CMDBUSY
= 0x10,
374 FD_MSR_NONDMA
= 0x20,
380 FD_DIR_DSKCHG
= 0x80,
383 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
384 #define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
385 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
390 /* Controller state */
391 QEMUTimer
*result_timer
;
393 /* Controller's identification */
399 uint8_t dor_vmstate
; /* only used as temp during vmstate */
414 uint8_t eot
; /* last wanted sector */
415 /* States kept only to be returned back */
416 /* precompensation */
420 /* Power down config (also with status regB access mode */
423 uint8_t num_floppies
;
426 FDrive drives
[MAX_FD
];
428 uint32_t check_media_rate
;
434 typedef struct FDCtrlSysBus
{
439 typedef struct FDCtrlISABus
{
449 static uint32_t fdctrl_read (void *opaque
, uint32_t reg
)
451 FDCtrl
*fdctrl
= opaque
;
457 retval
= fdctrl_read_statusA(fdctrl
);
460 retval
= fdctrl_read_statusB(fdctrl
);
463 retval
= fdctrl_read_dor(fdctrl
);
466 retval
= fdctrl_read_tape(fdctrl
);
469 retval
= fdctrl_read_main_status(fdctrl
);
472 retval
= fdctrl_read_data(fdctrl
);
475 retval
= fdctrl_read_dir(fdctrl
);
478 retval
= (uint32_t)(-1);
481 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg
& 7, retval
);
486 static void fdctrl_write (void *opaque
, uint32_t reg
, uint32_t value
)
488 FDCtrl
*fdctrl
= opaque
;
490 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg
& 7, value
);
495 fdctrl_write_dor(fdctrl
, value
);
498 fdctrl_write_tape(fdctrl
, value
);
501 fdctrl_write_rate(fdctrl
, value
);
504 fdctrl_write_data(fdctrl
, value
);
507 fdctrl_write_ccr(fdctrl
, value
);
514 static uint64_t fdctrl_read_mem (void *opaque
, target_phys_addr_t reg
,
517 return fdctrl_read(opaque
, (uint32_t)reg
);
520 static void fdctrl_write_mem (void *opaque
, target_phys_addr_t reg
,
521 uint64_t value
, unsigned size
)
523 fdctrl_write(opaque
, (uint32_t)reg
, value
);
526 static const MemoryRegionOps fdctrl_mem_ops
= {
527 .read
= fdctrl_read_mem
,
528 .write
= fdctrl_write_mem
,
529 .endianness
= DEVICE_NATIVE_ENDIAN
,
532 static const MemoryRegionOps fdctrl_mem_strict_ops
= {
533 .read
= fdctrl_read_mem
,
534 .write
= fdctrl_write_mem
,
535 .endianness
= DEVICE_NATIVE_ENDIAN
,
537 .min_access_size
= 1,
538 .max_access_size
= 1,
542 static bool fdrive_media_changed_needed(void *opaque
)
544 FDrive
*drive
= opaque
;
546 return (drive
->bs
!= NULL
&& drive
->media_changed
!= 1);
549 static const VMStateDescription vmstate_fdrive_media_changed
= {
550 .name
= "fdrive/media_changed",
552 .minimum_version_id
= 1,
553 .minimum_version_id_old
= 1,
554 .fields
= (VMStateField
[]) {
555 VMSTATE_UINT8(media_changed
, FDrive
),
556 VMSTATE_END_OF_LIST()
560 static bool fdrive_media_rate_needed(void *opaque
)
562 FDrive
*drive
= opaque
;
564 return drive
->fdctrl
->check_media_rate
;
567 static const VMStateDescription vmstate_fdrive_media_rate
= {
568 .name
= "fdrive/media_rate",
570 .minimum_version_id
= 1,
571 .minimum_version_id_old
= 1,
572 .fields
= (VMStateField
[]) {
573 VMSTATE_UINT8(media_rate
, FDrive
),
574 VMSTATE_END_OF_LIST()
578 static const VMStateDescription vmstate_fdrive
= {
581 .minimum_version_id
= 1,
582 .minimum_version_id_old
= 1,
583 .fields
= (VMStateField
[]) {
584 VMSTATE_UINT8(head
, FDrive
),
585 VMSTATE_UINT8(track
, FDrive
),
586 VMSTATE_UINT8(sect
, FDrive
),
587 VMSTATE_END_OF_LIST()
589 .subsections
= (VMStateSubsection
[]) {
591 .vmsd
= &vmstate_fdrive_media_changed
,
592 .needed
= &fdrive_media_changed_needed
,
594 .vmsd
= &vmstate_fdrive_media_rate
,
595 .needed
= &fdrive_media_rate_needed
,
602 static void fdc_pre_save(void *opaque
)
606 s
->dor_vmstate
= s
->dor
| GET_CUR_DRV(s
);
609 static int fdc_post_load(void *opaque
, int version_id
)
613 SET_CUR_DRV(s
, s
->dor_vmstate
& FD_DOR_SELMASK
);
614 s
->dor
= s
->dor_vmstate
& ~FD_DOR_SELMASK
;
618 static const VMStateDescription vmstate_fdc
= {
621 .minimum_version_id
= 2,
622 .minimum_version_id_old
= 2,
623 .pre_save
= fdc_pre_save
,
624 .post_load
= fdc_post_load
,
625 .fields
= (VMStateField
[]) {
626 /* Controller State */
627 VMSTATE_UINT8(sra
, FDCtrl
),
628 VMSTATE_UINT8(srb
, FDCtrl
),
629 VMSTATE_UINT8(dor_vmstate
, FDCtrl
),
630 VMSTATE_UINT8(tdr
, FDCtrl
),
631 VMSTATE_UINT8(dsr
, FDCtrl
),
632 VMSTATE_UINT8(msr
, FDCtrl
),
633 VMSTATE_UINT8(status0
, FDCtrl
),
634 VMSTATE_UINT8(status1
, FDCtrl
),
635 VMSTATE_UINT8(status2
, FDCtrl
),
637 VMSTATE_VARRAY_INT32(fifo
, FDCtrl
, fifo_size
, 0, vmstate_info_uint8
,
639 VMSTATE_UINT32(data_pos
, FDCtrl
),
640 VMSTATE_UINT32(data_len
, FDCtrl
),
641 VMSTATE_UINT8(data_state
, FDCtrl
),
642 VMSTATE_UINT8(data_dir
, FDCtrl
),
643 VMSTATE_UINT8(eot
, FDCtrl
),
644 /* States kept only to be returned back */
645 VMSTATE_UINT8(timer0
, FDCtrl
),
646 VMSTATE_UINT8(timer1
, FDCtrl
),
647 VMSTATE_UINT8(precomp_trk
, FDCtrl
),
648 VMSTATE_UINT8(config
, FDCtrl
),
649 VMSTATE_UINT8(lock
, FDCtrl
),
650 VMSTATE_UINT8(pwrd
, FDCtrl
),
651 VMSTATE_UINT8_EQUAL(num_floppies
, FDCtrl
),
652 VMSTATE_STRUCT_ARRAY(drives
, FDCtrl
, MAX_FD
, 1,
653 vmstate_fdrive
, FDrive
),
654 VMSTATE_END_OF_LIST()
658 static void fdctrl_external_reset_sysbus(DeviceState
*d
)
660 FDCtrlSysBus
*sys
= container_of(d
, FDCtrlSysBus
, busdev
.qdev
);
661 FDCtrl
*s
= &sys
->state
;
666 static void fdctrl_external_reset_isa(DeviceState
*d
)
668 FDCtrlISABus
*isa
= container_of(d
, FDCtrlISABus
, busdev
.qdev
);
669 FDCtrl
*s
= &isa
->state
;
674 static void fdctrl_handle_tc(void *opaque
, int irq
, int level
)
676 //FDCtrl *s = opaque;
680 FLOPPY_DPRINTF("TC pulsed\n");
684 /* Change IRQ state */
685 static void fdctrl_reset_irq(FDCtrl
*fdctrl
)
687 if (!(fdctrl
->sra
& FD_SRA_INTPEND
))
689 FLOPPY_DPRINTF("Reset interrupt\n");
690 qemu_set_irq(fdctrl
->irq
, 0);
691 fdctrl
->sra
&= ~FD_SRA_INTPEND
;
694 static void fdctrl_raise_irq(FDCtrl
*fdctrl
, uint8_t status0
)
697 if (fdctrl
->sun4m
&& (fdctrl
->msr
& FD_MSR_CMDBUSY
)) {
699 fdctrl
->msr
&= ~FD_MSR_CMDBUSY
;
700 fdctrl
->msr
|= FD_MSR_RQM
| FD_MSR_DIO
;
701 fdctrl
->status0
= status0
;
704 if (!(fdctrl
->sra
& FD_SRA_INTPEND
)) {
705 qemu_set_irq(fdctrl
->irq
, 1);
706 fdctrl
->sra
|= FD_SRA_INTPEND
;
708 fdctrl
->reset_sensei
= 0;
709 fdctrl
->status0
= status0
;
710 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl
->status0
);
713 /* Reset controller */
714 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
)
718 FLOPPY_DPRINTF("reset controller\n");
719 fdctrl_reset_irq(fdctrl
);
720 /* Initialise controller */
723 if (!fdctrl
->drives
[1].bs
)
724 fdctrl
->sra
|= FD_SRA_nDRV2
;
726 fdctrl
->dor
= FD_DOR_nRESET
;
727 fdctrl
->dor
|= (fdctrl
->dma_chann
!= -1) ? FD_DOR_DMAEN
: 0;
728 fdctrl
->msr
= FD_MSR_RQM
;
730 fdctrl
->data_pos
= 0;
731 fdctrl
->data_len
= 0;
732 fdctrl
->data_state
= 0;
733 fdctrl
->data_dir
= FD_DIR_WRITE
;
734 for (i
= 0; i
< MAX_FD
; i
++)
735 fd_recalibrate(&fdctrl
->drives
[i
]);
736 fdctrl_reset_fifo(fdctrl
);
738 fdctrl_raise_irq(fdctrl
, FD_SR0_RDYCHG
);
739 fdctrl
->reset_sensei
= FD_RESET_SENSEI_COUNT
;
743 static inline FDrive
*drv0(FDCtrl
*fdctrl
)
745 return &fdctrl
->drives
[(fdctrl
->tdr
& FD_TDR_BOOTSEL
) >> 2];
748 static inline FDrive
*drv1(FDCtrl
*fdctrl
)
750 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (1 << 2))
751 return &fdctrl
->drives
[1];
753 return &fdctrl
->drives
[0];
757 static inline FDrive
*drv2(FDCtrl
*fdctrl
)
759 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (2 << 2))
760 return &fdctrl
->drives
[2];
762 return &fdctrl
->drives
[1];
765 static inline FDrive
*drv3(FDCtrl
*fdctrl
)
767 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (3 << 2))
768 return &fdctrl
->drives
[3];
770 return &fdctrl
->drives
[2];
774 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
)
776 switch (fdctrl
->cur_drv
) {
777 case 0: return drv0(fdctrl
);
778 case 1: return drv1(fdctrl
);
780 case 2: return drv2(fdctrl
);
781 case 3: return drv3(fdctrl
);
783 default: return NULL
;
787 /* Status A register : 0x00 (read-only) */
788 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
)
790 uint32_t retval
= fdctrl
->sra
;
792 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval
);
797 /* Status B register : 0x01 (read-only) */
798 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
)
800 uint32_t retval
= fdctrl
->srb
;
802 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval
);
807 /* Digital output register : 0x02 */
808 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
)
810 uint32_t retval
= fdctrl
->dor
;
813 retval
|= fdctrl
->cur_drv
;
814 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval
);
819 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
)
821 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value
);
824 if (value
& FD_DOR_MOTEN0
)
825 fdctrl
->srb
|= FD_SRB_MTR0
;
827 fdctrl
->srb
&= ~FD_SRB_MTR0
;
828 if (value
& FD_DOR_MOTEN1
)
829 fdctrl
->srb
|= FD_SRB_MTR1
;
831 fdctrl
->srb
&= ~FD_SRB_MTR1
;
835 fdctrl
->srb
|= FD_SRB_DR0
;
837 fdctrl
->srb
&= ~FD_SRB_DR0
;
840 if (!(value
& FD_DOR_nRESET
)) {
841 if (fdctrl
->dor
& FD_DOR_nRESET
) {
842 FLOPPY_DPRINTF("controller enter RESET state\n");
845 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
846 FLOPPY_DPRINTF("controller out of RESET state\n");
847 fdctrl_reset(fdctrl
, 1);
848 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
852 fdctrl
->cur_drv
= value
& FD_DOR_SELMASK
;
857 /* Tape drive register : 0x03 */
858 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
)
860 uint32_t retval
= fdctrl
->tdr
;
862 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval
);
867 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
)
870 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
871 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
874 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value
);
875 /* Disk boot selection indicator */
876 fdctrl
->tdr
= value
& FD_TDR_BOOTSEL
;
877 /* Tape indicators: never allow */
880 /* Main status register : 0x04 (read) */
881 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
)
883 uint32_t retval
= fdctrl
->msr
;
885 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
886 fdctrl
->dor
|= FD_DOR_nRESET
;
890 retval
|= FD_MSR_DIO
;
891 fdctrl_reset_irq(fdctrl
);
894 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval
);
899 /* Data select rate register : 0x04 (write) */
900 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
)
903 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
904 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
907 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value
);
908 /* Reset: autoclear */
909 if (value
& FD_DSR_SWRESET
) {
910 fdctrl
->dor
&= ~FD_DOR_nRESET
;
911 fdctrl_reset(fdctrl
, 1);
912 fdctrl
->dor
|= FD_DOR_nRESET
;
914 if (value
& FD_DSR_PWRDOWN
) {
915 fdctrl_reset(fdctrl
, 1);
920 /* Configuration control register: 0x07 (write) */
921 static void fdctrl_write_ccr(FDCtrl
*fdctrl
, uint32_t value
)
924 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
925 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
928 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value
);
930 /* Only the rate selection bits used in AT mode, and we
931 * store those in the DSR.
933 fdctrl
->dsr
= (fdctrl
->dsr
& ~FD_DSR_DRATEMASK
) |
934 (value
& FD_DSR_DRATEMASK
);
937 static int fdctrl_media_changed(FDrive
*drv
)
943 if (drv
->media_changed
) {
944 drv
->media_changed
= 0;
947 ret
= bdrv_media_changed(drv
->bs
);
949 ret
= 0; /* we don't know, assume no */
958 /* Digital input register : 0x07 (read-only) */
959 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
)
963 if (fdctrl_media_changed(get_cur_drv(fdctrl
))) {
964 retval
|= FD_DIR_DSKCHG
;
967 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval
);
973 /* FIFO state control */
974 static void fdctrl_reset_fifo(FDCtrl
*fdctrl
)
976 fdctrl
->data_dir
= FD_DIR_WRITE
;
977 fdctrl
->data_pos
= 0;
978 fdctrl
->msr
&= ~(FD_MSR_CMDBUSY
| FD_MSR_DIO
);
981 /* Set FIFO status for the host to read */
982 static void fdctrl_set_fifo(FDCtrl
*fdctrl
, int fifo_len
, int do_irq
)
984 fdctrl
->data_dir
= FD_DIR_READ
;
985 fdctrl
->data_len
= fifo_len
;
986 fdctrl
->data_pos
= 0;
987 fdctrl
->msr
|= FD_MSR_CMDBUSY
| FD_MSR_RQM
| FD_MSR_DIO
;
989 fdctrl_raise_irq(fdctrl
, 0x00);
992 /* Set an error: unimplemented/unknown command */
993 static void fdctrl_unimplemented(FDCtrl
*fdctrl
, int direction
)
995 FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl
->fifo
[0]);
996 fdctrl
->fifo
[0] = FD_SR0_INVCMD
;
997 fdctrl_set_fifo(fdctrl
, 1, 0);
1000 /* Seek to next sector */
1001 static int fdctrl_seek_to_next_sect(FDCtrl
*fdctrl
, FDrive
*cur_drv
)
1003 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1004 cur_drv
->head
, cur_drv
->track
, cur_drv
->sect
,
1005 fd_sector(cur_drv
));
1006 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1008 if (cur_drv
->sect
>= cur_drv
->last_sect
||
1009 cur_drv
->sect
== fdctrl
->eot
) {
1011 if (FD_MULTI_TRACK(fdctrl
->data_state
)) {
1012 if (cur_drv
->head
== 0 &&
1013 (cur_drv
->flags
& FDISK_DBL_SIDES
) != 0) {
1018 if ((cur_drv
->flags
& FDISK_DBL_SIDES
) == 0)
1025 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1026 cur_drv
->head
, cur_drv
->track
,
1027 cur_drv
->sect
, fd_sector(cur_drv
));
1034 /* Callback for transfer end (stop or abort) */
1035 static void fdctrl_stop_transfer(FDCtrl
*fdctrl
, uint8_t status0
,
1036 uint8_t status1
, uint8_t status2
)
1040 cur_drv
= get_cur_drv(fdctrl
);
1041 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1042 status0
, status1
, status2
,
1043 status0
| (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
));
1044 fdctrl
->fifo
[0] = status0
| (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
);
1045 fdctrl
->fifo
[1] = status1
;
1046 fdctrl
->fifo
[2] = status2
;
1047 fdctrl
->fifo
[3] = cur_drv
->track
;
1048 fdctrl
->fifo
[4] = cur_drv
->head
;
1049 fdctrl
->fifo
[5] = cur_drv
->sect
;
1050 fdctrl
->fifo
[6] = FD_SECTOR_SC
;
1051 fdctrl
->data_dir
= FD_DIR_READ
;
1052 if (!(fdctrl
->msr
& FD_MSR_NONDMA
)) {
1053 DMA_release_DREQ(fdctrl
->dma_chann
);
1055 fdctrl
->msr
|= FD_MSR_RQM
| FD_MSR_DIO
;
1056 fdctrl
->msr
&= ~FD_MSR_NONDMA
;
1057 fdctrl_set_fifo(fdctrl
, 7, 1);
1060 /* Prepare a data transfer (either DMA or FIFO) */
1061 static void fdctrl_start_transfer(FDCtrl
*fdctrl
, int direction
)
1067 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1068 cur_drv
= get_cur_drv(fdctrl
);
1069 kt
= fdctrl
->fifo
[2];
1070 kh
= fdctrl
->fifo
[3];
1071 ks
= fdctrl
->fifo
[4];
1072 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1073 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1074 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
,
1075 NUM_SIDES(cur_drv
)));
1076 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1079 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1080 fdctrl
->fifo
[3] = kt
;
1081 fdctrl
->fifo
[4] = kh
;
1082 fdctrl
->fifo
[5] = ks
;
1086 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1087 fdctrl
->fifo
[3] = kt
;
1088 fdctrl
->fifo
[4] = kh
;
1089 fdctrl
->fifo
[5] = ks
;
1092 /* No seek enabled */
1093 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1094 fdctrl
->fifo
[3] = kt
;
1095 fdctrl
->fifo
[4] = kh
;
1096 fdctrl
->fifo
[5] = ks
;
1105 /* Check the data rate. If the programmed data rate does not match
1106 * the currently inserted medium, the operation has to fail. */
1107 if (fdctrl
->check_media_rate
&&
1108 (fdctrl
->dsr
& FD_DSR_DRATEMASK
) != cur_drv
->media_rate
) {
1109 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1110 fdctrl
->dsr
& FD_DSR_DRATEMASK
, cur_drv
->media_rate
);
1111 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_MA
, 0x00);
1112 fdctrl
->fifo
[3] = kt
;
1113 fdctrl
->fifo
[4] = kh
;
1114 fdctrl
->fifo
[5] = ks
;
1118 /* Set the FIFO state */
1119 fdctrl
->data_dir
= direction
;
1120 fdctrl
->data_pos
= 0;
1121 fdctrl
->msr
|= FD_MSR_CMDBUSY
;
1122 if (fdctrl
->fifo
[0] & 0x80)
1123 fdctrl
->data_state
|= FD_STATE_MULTI
;
1125 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1127 fdctrl
->data_state
|= FD_STATE_SEEK
;
1129 fdctrl
->data_state
&= ~FD_STATE_SEEK
;
1130 if (fdctrl
->fifo
[5] == 00) {
1131 fdctrl
->data_len
= fdctrl
->fifo
[8];
1134 fdctrl
->data_len
= 128 << (fdctrl
->fifo
[5] > 7 ? 7 : fdctrl
->fifo
[5]);
1135 tmp
= (fdctrl
->fifo
[6] - ks
+ 1);
1136 if (fdctrl
->fifo
[0] & 0x80)
1137 tmp
+= fdctrl
->fifo
[6];
1138 fdctrl
->data_len
*= tmp
;
1140 fdctrl
->eot
= fdctrl
->fifo
[6];
1141 if (fdctrl
->dor
& FD_DOR_DMAEN
) {
1143 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1144 dma_mode
= DMA_get_channel_mode(fdctrl
->dma_chann
);
1145 dma_mode
= (dma_mode
>> 2) & 3;
1146 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1147 dma_mode
, direction
,
1148 (128 << fdctrl
->fifo
[5]) *
1149 (cur_drv
->last_sect
- ks
+ 1), fdctrl
->data_len
);
1150 if (((direction
== FD_DIR_SCANE
|| direction
== FD_DIR_SCANL
||
1151 direction
== FD_DIR_SCANH
) && dma_mode
== 0) ||
1152 (direction
== FD_DIR_WRITE
&& dma_mode
== 2) ||
1153 (direction
== FD_DIR_READ
&& dma_mode
== 1)) {
1154 /* No access is allowed until DMA transfer has completed */
1155 fdctrl
->msr
&= ~FD_MSR_RQM
;
1156 /* Now, we just have to wait for the DMA controller to
1159 DMA_hold_DREQ(fdctrl
->dma_chann
);
1160 DMA_schedule(fdctrl
->dma_chann
);
1163 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode
, direction
);
1166 FLOPPY_DPRINTF("start non-DMA transfer\n");
1167 fdctrl
->msr
|= FD_MSR_NONDMA
;
1168 if (direction
!= FD_DIR_WRITE
)
1169 fdctrl
->msr
|= FD_MSR_DIO
;
1170 /* IO based transfer: calculate len */
1171 fdctrl_raise_irq(fdctrl
, 0x00);
1176 /* Prepare a transfer of deleted data */
1177 static void fdctrl_start_transfer_del(FDCtrl
*fdctrl
, int direction
)
1179 FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1181 /* We don't handle deleted data,
1182 * so we don't return *ANYTHING*
1184 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1187 /* handlers for DMA transfers */
1188 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
1189 int dma_pos
, int dma_len
)
1193 int len
, start_pos
, rel_pos
;
1194 uint8_t status0
= 0x00, status1
= 0x00, status2
= 0x00;
1197 if (fdctrl
->msr
& FD_MSR_RQM
) {
1198 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1201 cur_drv
= get_cur_drv(fdctrl
);
1202 if (fdctrl
->data_dir
== FD_DIR_SCANE
|| fdctrl
->data_dir
== FD_DIR_SCANL
||
1203 fdctrl
->data_dir
== FD_DIR_SCANH
)
1204 status2
= FD_SR2_SNS
;
1205 if (dma_len
> fdctrl
->data_len
)
1206 dma_len
= fdctrl
->data_len
;
1207 if (cur_drv
->bs
== NULL
) {
1208 if (fdctrl
->data_dir
== FD_DIR_WRITE
)
1209 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1211 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1213 goto transfer_error
;
1215 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1216 for (start_pos
= fdctrl
->data_pos
; fdctrl
->data_pos
< dma_len
;) {
1217 len
= dma_len
- fdctrl
->data_pos
;
1218 if (len
+ rel_pos
> FD_SECTOR_LEN
)
1219 len
= FD_SECTOR_LEN
- rel_pos
;
1220 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1221 "(%d-0x%08x 0x%08x)\n", len
, dma_len
, fdctrl
->data_pos
,
1222 fdctrl
->data_len
, GET_CUR_DRV(fdctrl
), cur_drv
->head
,
1223 cur_drv
->track
, cur_drv
->sect
, fd_sector(cur_drv
),
1224 fd_sector(cur_drv
) * FD_SECTOR_LEN
);
1225 if (fdctrl
->data_dir
!= FD_DIR_WRITE
||
1226 len
< FD_SECTOR_LEN
|| rel_pos
!= 0) {
1227 /* READ & SCAN commands and realign to a sector for WRITE */
1228 if (bdrv_read(cur_drv
->bs
, fd_sector(cur_drv
),
1229 fdctrl
->fifo
, 1) < 0) {
1230 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1231 fd_sector(cur_drv
));
1232 /* Sure, image size is too small... */
1233 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1236 switch (fdctrl
->data_dir
) {
1239 DMA_write_memory (nchan
, fdctrl
->fifo
+ rel_pos
,
1240 fdctrl
->data_pos
, len
);
1243 /* WRITE commands */
1245 /* Handle readonly medium early, no need to do DMA, touch the
1246 * LED or attempt any writes. A real floppy doesn't attempt
1247 * to write to readonly media either. */
1248 fdctrl_stop_transfer(fdctrl
,
1249 FD_SR0_ABNTERM
| FD_SR0_SEEK
, FD_SR1_NW
,
1251 goto transfer_error
;
1254 DMA_read_memory (nchan
, fdctrl
->fifo
+ rel_pos
,
1255 fdctrl
->data_pos
, len
);
1256 if (bdrv_write(cur_drv
->bs
, fd_sector(cur_drv
),
1257 fdctrl
->fifo
, 1) < 0) {
1258 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv
));
1259 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1260 goto transfer_error
;
1266 uint8_t tmpbuf
[FD_SECTOR_LEN
];
1268 DMA_read_memory (nchan
, tmpbuf
, fdctrl
->data_pos
, len
);
1269 ret
= memcmp(tmpbuf
, fdctrl
->fifo
+ rel_pos
, len
);
1271 status2
= FD_SR2_SEH
;
1274 if ((ret
< 0 && fdctrl
->data_dir
== FD_DIR_SCANL
) ||
1275 (ret
> 0 && fdctrl
->data_dir
== FD_DIR_SCANH
)) {
1282 fdctrl
->data_pos
+= len
;
1283 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1285 /* Seek to next sector */
1286 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
))
1291 len
= fdctrl
->data_pos
- start_pos
;
1292 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1293 fdctrl
->data_pos
, len
, fdctrl
->data_len
);
1294 if (fdctrl
->data_dir
== FD_DIR_SCANE
||
1295 fdctrl
->data_dir
== FD_DIR_SCANL
||
1296 fdctrl
->data_dir
== FD_DIR_SCANH
)
1297 status2
= FD_SR2_SEH
;
1298 if (FD_DID_SEEK(fdctrl
->data_state
))
1299 status0
|= FD_SR0_SEEK
;
1300 fdctrl
->data_len
-= len
;
1301 fdctrl_stop_transfer(fdctrl
, status0
, status1
, status2
);
1307 /* Data register : 0x05 */
1308 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
)
1311 uint32_t retval
= 0;
1314 cur_drv
= get_cur_drv(fdctrl
);
1315 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1316 if (!(fdctrl
->msr
& FD_MSR_RQM
) || !(fdctrl
->msr
& FD_MSR_DIO
)) {
1317 FLOPPY_ERROR("controller not ready for reading\n");
1320 pos
= fdctrl
->data_pos
;
1321 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
1322 pos
%= FD_SECTOR_LEN
;
1324 if (fdctrl
->data_pos
!= 0)
1325 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
1326 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1327 fd_sector(cur_drv
));
1330 if (bdrv_read(cur_drv
->bs
, fd_sector(cur_drv
), fdctrl
->fifo
, 1) < 0) {
1331 FLOPPY_DPRINTF("error getting sector %d\n",
1332 fd_sector(cur_drv
));
1333 /* Sure, image size is too small... */
1334 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1338 retval
= fdctrl
->fifo
[pos
];
1339 if (++fdctrl
->data_pos
== fdctrl
->data_len
) {
1340 fdctrl
->data_pos
= 0;
1341 /* Switch from transfer mode to status mode
1342 * then from status mode to command mode
1344 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
1345 fdctrl_stop_transfer(fdctrl
, FD_SR0_SEEK
, 0x00, 0x00);
1347 fdctrl_reset_fifo(fdctrl
);
1348 fdctrl_reset_irq(fdctrl
);
1351 FLOPPY_DPRINTF("data register: 0x%02x\n", retval
);
1356 static void fdctrl_format_sector(FDCtrl
*fdctrl
)
1361 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1362 cur_drv
= get_cur_drv(fdctrl
);
1363 kt
= fdctrl
->fifo
[6];
1364 kh
= fdctrl
->fifo
[7];
1365 ks
= fdctrl
->fifo
[8];
1366 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1367 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1368 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
,
1369 NUM_SIDES(cur_drv
)));
1370 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1373 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1374 fdctrl
->fifo
[3] = kt
;
1375 fdctrl
->fifo
[4] = kh
;
1376 fdctrl
->fifo
[5] = ks
;
1380 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1381 fdctrl
->fifo
[3] = kt
;
1382 fdctrl
->fifo
[4] = kh
;
1383 fdctrl
->fifo
[5] = ks
;
1386 /* No seek enabled */
1387 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1388 fdctrl
->fifo
[3] = kt
;
1389 fdctrl
->fifo
[4] = kh
;
1390 fdctrl
->fifo
[5] = ks
;
1393 fdctrl
->data_state
|= FD_STATE_SEEK
;
1398 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1399 if (cur_drv
->bs
== NULL
||
1400 bdrv_write(cur_drv
->bs
, fd_sector(cur_drv
), fdctrl
->fifo
, 1) < 0) {
1401 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv
));
1402 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1404 if (cur_drv
->sect
== cur_drv
->last_sect
) {
1405 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1406 /* Last sector done */
1407 if (FD_DID_SEEK(fdctrl
->data_state
))
1408 fdctrl_stop_transfer(fdctrl
, FD_SR0_SEEK
, 0x00, 0x00);
1410 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1413 fdctrl
->data_pos
= 0;
1414 fdctrl
->data_len
= 4;
1419 static void fdctrl_handle_lock(FDCtrl
*fdctrl
, int direction
)
1421 fdctrl
->lock
= (fdctrl
->fifo
[0] & 0x80) ? 1 : 0;
1422 fdctrl
->fifo
[0] = fdctrl
->lock
<< 4;
1423 fdctrl_set_fifo(fdctrl
, 1, 0);
1426 static void fdctrl_handle_dumpreg(FDCtrl
*fdctrl
, int direction
)
1428 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1430 /* Drives position */
1431 fdctrl
->fifo
[0] = drv0(fdctrl
)->track
;
1432 fdctrl
->fifo
[1] = drv1(fdctrl
)->track
;
1434 fdctrl
->fifo
[2] = drv2(fdctrl
)->track
;
1435 fdctrl
->fifo
[3] = drv3(fdctrl
)->track
;
1437 fdctrl
->fifo
[2] = 0;
1438 fdctrl
->fifo
[3] = 0;
1441 fdctrl
->fifo
[4] = fdctrl
->timer0
;
1442 fdctrl
->fifo
[5] = (fdctrl
->timer1
<< 1) | (fdctrl
->dor
& FD_DOR_DMAEN
? 1 : 0);
1443 fdctrl
->fifo
[6] = cur_drv
->last_sect
;
1444 fdctrl
->fifo
[7] = (fdctrl
->lock
<< 7) |
1445 (cur_drv
->perpendicular
<< 2);
1446 fdctrl
->fifo
[8] = fdctrl
->config
;
1447 fdctrl
->fifo
[9] = fdctrl
->precomp_trk
;
1448 fdctrl_set_fifo(fdctrl
, 10, 0);
1451 static void fdctrl_handle_version(FDCtrl
*fdctrl
, int direction
)
1453 /* Controller's version */
1454 fdctrl
->fifo
[0] = fdctrl
->version
;
1455 fdctrl_set_fifo(fdctrl
, 1, 0);
1458 static void fdctrl_handle_partid(FDCtrl
*fdctrl
, int direction
)
1460 fdctrl
->fifo
[0] = 0x41; /* Stepping 1 */
1461 fdctrl_set_fifo(fdctrl
, 1, 0);
1464 static void fdctrl_handle_restore(FDCtrl
*fdctrl
, int direction
)
1466 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1468 /* Drives position */
1469 drv0(fdctrl
)->track
= fdctrl
->fifo
[3];
1470 drv1(fdctrl
)->track
= fdctrl
->fifo
[4];
1472 drv2(fdctrl
)->track
= fdctrl
->fifo
[5];
1473 drv3(fdctrl
)->track
= fdctrl
->fifo
[6];
1476 fdctrl
->timer0
= fdctrl
->fifo
[7];
1477 fdctrl
->timer1
= fdctrl
->fifo
[8];
1478 cur_drv
->last_sect
= fdctrl
->fifo
[9];
1479 fdctrl
->lock
= fdctrl
->fifo
[10] >> 7;
1480 cur_drv
->perpendicular
= (fdctrl
->fifo
[10] >> 2) & 0xF;
1481 fdctrl
->config
= fdctrl
->fifo
[11];
1482 fdctrl
->precomp_trk
= fdctrl
->fifo
[12];
1483 fdctrl
->pwrd
= fdctrl
->fifo
[13];
1484 fdctrl_reset_fifo(fdctrl
);
1487 static void fdctrl_handle_save(FDCtrl
*fdctrl
, int direction
)
1489 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1491 fdctrl
->fifo
[0] = 0;
1492 fdctrl
->fifo
[1] = 0;
1493 /* Drives position */
1494 fdctrl
->fifo
[2] = drv0(fdctrl
)->track
;
1495 fdctrl
->fifo
[3] = drv1(fdctrl
)->track
;
1497 fdctrl
->fifo
[4] = drv2(fdctrl
)->track
;
1498 fdctrl
->fifo
[5] = drv3(fdctrl
)->track
;
1500 fdctrl
->fifo
[4] = 0;
1501 fdctrl
->fifo
[5] = 0;
1504 fdctrl
->fifo
[6] = fdctrl
->timer0
;
1505 fdctrl
->fifo
[7] = fdctrl
->timer1
;
1506 fdctrl
->fifo
[8] = cur_drv
->last_sect
;
1507 fdctrl
->fifo
[9] = (fdctrl
->lock
<< 7) |
1508 (cur_drv
->perpendicular
<< 2);
1509 fdctrl
->fifo
[10] = fdctrl
->config
;
1510 fdctrl
->fifo
[11] = fdctrl
->precomp_trk
;
1511 fdctrl
->fifo
[12] = fdctrl
->pwrd
;
1512 fdctrl
->fifo
[13] = 0;
1513 fdctrl
->fifo
[14] = 0;
1514 fdctrl_set_fifo(fdctrl
, 15, 0);
1517 static void fdctrl_handle_readid(FDCtrl
*fdctrl
, int direction
)
1519 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1521 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
1522 qemu_mod_timer(fdctrl
->result_timer
,
1523 qemu_get_clock_ns(vm_clock
) + (get_ticks_per_sec() / 50));
1526 static void fdctrl_handle_format_track(FDCtrl
*fdctrl
, int direction
)
1530 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1531 cur_drv
= get_cur_drv(fdctrl
);
1532 fdctrl
->data_state
|= FD_STATE_FORMAT
;
1533 if (fdctrl
->fifo
[0] & 0x80)
1534 fdctrl
->data_state
|= FD_STATE_MULTI
;
1536 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1537 fdctrl
->data_state
&= ~FD_STATE_SEEK
;
1539 fdctrl
->fifo
[2] > 7 ? 16384 : 128 << fdctrl
->fifo
[2];
1541 cur_drv
->last_sect
=
1542 cur_drv
->flags
& FDISK_DBL_SIDES
? fdctrl
->fifo
[3] :
1543 fdctrl
->fifo
[3] / 2;
1545 cur_drv
->last_sect
= fdctrl
->fifo
[3];
1547 /* TODO: implement format using DMA expected by the Bochs BIOS
1548 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1549 * the sector with the specified fill byte
1551 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1552 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1555 static void fdctrl_handle_specify(FDCtrl
*fdctrl
, int direction
)
1557 fdctrl
->timer0
= (fdctrl
->fifo
[1] >> 4) & 0xF;
1558 fdctrl
->timer1
= fdctrl
->fifo
[2] >> 1;
1559 if (fdctrl
->fifo
[2] & 1)
1560 fdctrl
->dor
&= ~FD_DOR_DMAEN
;
1562 fdctrl
->dor
|= FD_DOR_DMAEN
;
1563 /* No result back */
1564 fdctrl_reset_fifo(fdctrl
);
1567 static void fdctrl_handle_sense_drive_status(FDCtrl
*fdctrl
, int direction
)
1571 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1572 cur_drv
= get_cur_drv(fdctrl
);
1573 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
1574 /* 1 Byte status back */
1575 fdctrl
->fifo
[0] = (cur_drv
->ro
<< 6) |
1576 (cur_drv
->track
== 0 ? 0x10 : 0x00) |
1577 (cur_drv
->head
<< 2) |
1578 GET_CUR_DRV(fdctrl
) |
1580 fdctrl_set_fifo(fdctrl
, 1, 0);
1583 static void fdctrl_handle_recalibrate(FDCtrl
*fdctrl
, int direction
)
1587 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1588 cur_drv
= get_cur_drv(fdctrl
);
1589 fd_recalibrate(cur_drv
);
1590 fdctrl_reset_fifo(fdctrl
);
1591 /* Raise Interrupt */
1592 fdctrl_raise_irq(fdctrl
, FD_SR0_SEEK
);
1595 static void fdctrl_handle_sense_interrupt_status(FDCtrl
*fdctrl
, int direction
)
1597 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1599 if(fdctrl
->reset_sensei
> 0) {
1601 FD_SR0_RDYCHG
+ FD_RESET_SENSEI_COUNT
- fdctrl
->reset_sensei
;
1602 fdctrl
->reset_sensei
--;
1604 /* XXX: status0 handling is broken for read/write
1605 commands, so we do this hack. It should be suppressed
1608 FD_SR0_SEEK
| (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
);
1611 fdctrl
->fifo
[1] = cur_drv
->track
;
1612 fdctrl_set_fifo(fdctrl
, 2, 0);
1613 fdctrl_reset_irq(fdctrl
);
1614 fdctrl
->status0
= FD_SR0_RDYCHG
;
1617 static void fdctrl_handle_seek(FDCtrl
*fdctrl
, int direction
)
1621 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1622 cur_drv
= get_cur_drv(fdctrl
);
1623 fdctrl_reset_fifo(fdctrl
);
1624 /* The seek command just sends step pulses to the drive and doesn't care if
1625 * there is a medium inserted of if it's banging the head against the drive.
1627 if (fdctrl
->fifo
[2] > cur_drv
->max_track
) {
1628 cur_drv
->track
= cur_drv
->max_track
;
1630 cur_drv
->track
= fdctrl
->fifo
[2];
1632 /* Raise Interrupt */
1633 fdctrl_raise_irq(fdctrl
, FD_SR0_SEEK
);
1636 static void fdctrl_handle_perpendicular_mode(FDCtrl
*fdctrl
, int direction
)
1638 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1640 if (fdctrl
->fifo
[1] & 0x80)
1641 cur_drv
->perpendicular
= fdctrl
->fifo
[1] & 0x7;
1642 /* No result back */
1643 fdctrl_reset_fifo(fdctrl
);
1646 static void fdctrl_handle_configure(FDCtrl
*fdctrl
, int direction
)
1648 fdctrl
->config
= fdctrl
->fifo
[2];
1649 fdctrl
->precomp_trk
= fdctrl
->fifo
[3];
1650 /* No result back */
1651 fdctrl_reset_fifo(fdctrl
);
1654 static void fdctrl_handle_powerdown_mode(FDCtrl
*fdctrl
, int direction
)
1656 fdctrl
->pwrd
= fdctrl
->fifo
[1];
1657 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
1658 fdctrl_set_fifo(fdctrl
, 1, 0);
1661 static void fdctrl_handle_option(FDCtrl
*fdctrl
, int direction
)
1663 /* No result back */
1664 fdctrl_reset_fifo(fdctrl
);
1667 static void fdctrl_handle_drive_specification_command(FDCtrl
*fdctrl
, int direction
)
1669 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1671 if (fdctrl
->fifo
[fdctrl
->data_pos
- 1] & 0x80) {
1672 /* Command parameters done */
1673 if (fdctrl
->fifo
[fdctrl
->data_pos
- 1] & 0x40) {
1674 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
1675 fdctrl
->fifo
[2] = 0;
1676 fdctrl
->fifo
[3] = 0;
1677 fdctrl_set_fifo(fdctrl
, 4, 0);
1679 fdctrl_reset_fifo(fdctrl
);
1681 } else if (fdctrl
->data_len
> 7) {
1683 fdctrl
->fifo
[0] = 0x80 |
1684 (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
);
1685 fdctrl_set_fifo(fdctrl
, 1, 0);
1689 static void fdctrl_handle_relative_seek_out(FDCtrl
*fdctrl
, int direction
)
1693 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1694 cur_drv
= get_cur_drv(fdctrl
);
1695 if (fdctrl
->fifo
[2] + cur_drv
->track
>= cur_drv
->max_track
) {
1696 cur_drv
->track
= cur_drv
->max_track
- 1;
1698 cur_drv
->track
+= fdctrl
->fifo
[2];
1700 fdctrl_reset_fifo(fdctrl
);
1701 /* Raise Interrupt */
1702 fdctrl_raise_irq(fdctrl
, FD_SR0_SEEK
);
1705 static void fdctrl_handle_relative_seek_in(FDCtrl
*fdctrl
, int direction
)
1709 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1710 cur_drv
= get_cur_drv(fdctrl
);
1711 if (fdctrl
->fifo
[2] > cur_drv
->track
) {
1714 cur_drv
->track
-= fdctrl
->fifo
[2];
1716 fdctrl_reset_fifo(fdctrl
);
1717 /* Raise Interrupt */
1718 fdctrl_raise_irq(fdctrl
, FD_SR0_SEEK
);
1721 static const struct {
1726 void (*handler
)(FDCtrl
*fdctrl
, int direction
);
1729 { FD_CMD_READ
, 0x1f, "READ", 8, fdctrl_start_transfer
, FD_DIR_READ
},
1730 { FD_CMD_WRITE
, 0x3f, "WRITE", 8, fdctrl_start_transfer
, FD_DIR_WRITE
},
1731 { FD_CMD_SEEK
, 0xff, "SEEK", 2, fdctrl_handle_seek
},
1732 { FD_CMD_SENSE_INTERRUPT_STATUS
, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status
},
1733 { FD_CMD_RECALIBRATE
, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate
},
1734 { FD_CMD_FORMAT_TRACK
, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track
},
1735 { FD_CMD_READ_TRACK
, 0xbf, "READ TRACK", 8, fdctrl_start_transfer
, FD_DIR_READ
},
1736 { FD_CMD_RESTORE
, 0xff, "RESTORE", 17, fdctrl_handle_restore
}, /* part of READ DELETED DATA */
1737 { FD_CMD_SAVE
, 0xff, "SAVE", 0, fdctrl_handle_save
}, /* part of READ DELETED DATA */
1738 { FD_CMD_READ_DELETED
, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_READ
},
1739 { FD_CMD_SCAN_EQUAL
, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANE
},
1740 { FD_CMD_VERIFY
, 0x1f, "VERIFY", 8, fdctrl_unimplemented
},
1741 { FD_CMD_SCAN_LOW_OR_EQUAL
, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANL
},
1742 { FD_CMD_SCAN_HIGH_OR_EQUAL
, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANH
},
1743 { FD_CMD_WRITE_DELETED
, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_WRITE
},
1744 { FD_CMD_READ_ID
, 0xbf, "READ ID", 1, fdctrl_handle_readid
},
1745 { FD_CMD_SPECIFY
, 0xff, "SPECIFY", 2, fdctrl_handle_specify
},
1746 { FD_CMD_SENSE_DRIVE_STATUS
, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status
},
1747 { FD_CMD_PERPENDICULAR_MODE
, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode
},
1748 { FD_CMD_CONFIGURE
, 0xff, "CONFIGURE", 3, fdctrl_handle_configure
},
1749 { FD_CMD_POWERDOWN_MODE
, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode
},
1750 { FD_CMD_OPTION
, 0xff, "OPTION", 1, fdctrl_handle_option
},
1751 { FD_CMD_DRIVE_SPECIFICATION_COMMAND
, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command
},
1752 { FD_CMD_RELATIVE_SEEK_OUT
, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out
},
1753 { FD_CMD_FORMAT_AND_WRITE
, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented
},
1754 { FD_CMD_RELATIVE_SEEK_IN
, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in
},
1755 { FD_CMD_LOCK
, 0x7f, "LOCK", 0, fdctrl_handle_lock
},
1756 { FD_CMD_DUMPREG
, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg
},
1757 { FD_CMD_VERSION
, 0xff, "VERSION", 0, fdctrl_handle_version
},
1758 { FD_CMD_PART_ID
, 0xff, "PART ID", 0, fdctrl_handle_partid
},
1759 { FD_CMD_WRITE
, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer
, FD_DIR_WRITE
}, /* not in specification ; BeOS 4.5 bug */
1760 { 0, 0, "unknown", 0, fdctrl_unimplemented
}, /* default handler */
1762 /* Associate command to an index in the 'handlers' array */
1763 static uint8_t command_to_handler
[256];
1765 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
)
1771 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1772 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1775 if (!(fdctrl
->msr
& FD_MSR_RQM
) || (fdctrl
->msr
& FD_MSR_DIO
)) {
1776 FLOPPY_ERROR("controller not ready for writing\n");
1779 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1780 /* Is it write command time ? */
1781 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
1782 /* FIFO data write */
1783 pos
= fdctrl
->data_pos
++;
1784 pos
%= FD_SECTOR_LEN
;
1785 fdctrl
->fifo
[pos
] = value
;
1786 if (pos
== FD_SECTOR_LEN
- 1 ||
1787 fdctrl
->data_pos
== fdctrl
->data_len
) {
1788 cur_drv
= get_cur_drv(fdctrl
);
1789 if (bdrv_write(cur_drv
->bs
, fd_sector(cur_drv
), fdctrl
->fifo
, 1) < 0) {
1790 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv
));
1793 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
1794 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1795 fd_sector(cur_drv
));
1799 /* Switch from transfer mode to status mode
1800 * then from status mode to command mode
1802 if (fdctrl
->data_pos
== fdctrl
->data_len
)
1803 fdctrl_stop_transfer(fdctrl
, FD_SR0_SEEK
, 0x00, 0x00);
1806 if (fdctrl
->data_pos
== 0) {
1808 pos
= command_to_handler
[value
& 0xff];
1809 FLOPPY_DPRINTF("%s command\n", handlers
[pos
].name
);
1810 fdctrl
->data_len
= handlers
[pos
].parameters
+ 1;
1811 fdctrl
->msr
|= FD_MSR_CMDBUSY
;
1814 FLOPPY_DPRINTF("%s: %02x\n", __func__
, value
);
1815 fdctrl
->fifo
[fdctrl
->data_pos
++] = value
;
1816 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
1817 /* We now have all parameters
1818 * and will be able to treat the command
1820 if (fdctrl
->data_state
& FD_STATE_FORMAT
) {
1821 fdctrl_format_sector(fdctrl
);
1825 pos
= command_to_handler
[fdctrl
->fifo
[0] & 0xff];
1826 FLOPPY_DPRINTF("treat %s command\n", handlers
[pos
].name
);
1827 (*handlers
[pos
].handler
)(fdctrl
, handlers
[pos
].direction
);
1831 static void fdctrl_result_timer(void *opaque
)
1833 FDCtrl
*fdctrl
= opaque
;
1834 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1836 /* Pretend we are spinning.
1837 * This is needed for Coherent, which uses READ ID to check for
1838 * sector interleaving.
1840 if (cur_drv
->last_sect
!= 0) {
1841 cur_drv
->sect
= (cur_drv
->sect
% cur_drv
->last_sect
) + 1;
1843 /* READ_ID can't automatically succeed! */
1844 if (fdctrl
->check_media_rate
&&
1845 (fdctrl
->dsr
& FD_DSR_DRATEMASK
) != cur_drv
->media_rate
) {
1846 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
1847 fdctrl
->dsr
& FD_DSR_DRATEMASK
, cur_drv
->media_rate
);
1848 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_MA
, 0x00);
1850 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1854 static void fdctrl_change_cb(void *opaque
, bool load
)
1856 FDrive
*drive
= opaque
;
1858 drive
->media_changed
= 1;
1861 static const BlockDevOps fdctrl_block_ops
= {
1862 .change_media_cb
= fdctrl_change_cb
,
1865 /* Init functions */
1866 static int fdctrl_connect_drives(FDCtrl
*fdctrl
)
1871 for (i
= 0; i
< MAX_FD
; i
++) {
1872 drive
= &fdctrl
->drives
[i
];
1873 drive
->fdctrl
= fdctrl
;
1876 if (bdrv_get_on_error(drive
->bs
, 0) != BLOCK_ERR_STOP_ENOSPC
) {
1877 error_report("fdc doesn't support drive option werror");
1880 if (bdrv_get_on_error(drive
->bs
, 1) != BLOCK_ERR_REPORT
) {
1881 error_report("fdc doesn't support drive option rerror");
1887 fd_revalidate(drive
);
1889 drive
->media_changed
= 1;
1890 bdrv_set_dev_ops(drive
->bs
, &fdctrl_block_ops
, drive
);
1896 void fdctrl_init_sysbus(qemu_irq irq
, int dma_chann
,
1897 target_phys_addr_t mmio_base
, DriveInfo
**fds
)
1903 dev
= qdev_create(NULL
, "sysbus-fdc");
1904 sys
= DO_UPCAST(FDCtrlSysBus
, busdev
.qdev
, dev
);
1905 fdctrl
= &sys
->state
;
1906 fdctrl
->dma_chann
= dma_chann
; /* FIXME */
1908 qdev_prop_set_drive_nofail(dev
, "driveA", fds
[0]->bdrv
);
1911 qdev_prop_set_drive_nofail(dev
, "driveB", fds
[1]->bdrv
);
1913 qdev_init_nofail(dev
);
1914 sysbus_connect_irq(&sys
->busdev
, 0, irq
);
1915 sysbus_mmio_map(&sys
->busdev
, 0, mmio_base
);
1918 void sun4m_fdctrl_init(qemu_irq irq
, target_phys_addr_t io_base
,
1919 DriveInfo
**fds
, qemu_irq
*fdc_tc
)
1924 dev
= qdev_create(NULL
, "SUNW,fdtwo");
1926 qdev_prop_set_drive_nofail(dev
, "drive", fds
[0]->bdrv
);
1928 qdev_init_nofail(dev
);
1929 sys
= DO_UPCAST(FDCtrlSysBus
, busdev
.qdev
, dev
);
1930 sysbus_connect_irq(&sys
->busdev
, 0, irq
);
1931 sysbus_mmio_map(&sys
->busdev
, 0, io_base
);
1932 *fdc_tc
= qdev_get_gpio_in(dev
, 0);
1935 static int fdctrl_init_common(FDCtrl
*fdctrl
)
1938 static int command_tables_inited
= 0;
1940 /* Fill 'command_to_handler' lookup table */
1941 if (!command_tables_inited
) {
1942 command_tables_inited
= 1;
1943 for (i
= ARRAY_SIZE(handlers
) - 1; i
>= 0; i
--) {
1944 for (j
= 0; j
< sizeof(command_to_handler
); j
++) {
1945 if ((j
& handlers
[i
].mask
) == handlers
[i
].value
) {
1946 command_to_handler
[j
] = i
;
1952 FLOPPY_DPRINTF("init controller\n");
1953 fdctrl
->fifo
= qemu_memalign(512, FD_SECTOR_LEN
);
1954 fdctrl
->fifo_size
= 512;
1955 fdctrl
->result_timer
= qemu_new_timer_ns(vm_clock
,
1956 fdctrl_result_timer
, fdctrl
);
1958 fdctrl
->version
= 0x90; /* Intel 82078 controller */
1959 fdctrl
->config
= FD_CONFIG_EIS
| FD_CONFIG_EFIFO
; /* Implicit seek, polling & FIFO enabled */
1960 fdctrl
->num_floppies
= MAX_FD
;
1962 if (fdctrl
->dma_chann
!= -1)
1963 DMA_register_channel(fdctrl
->dma_chann
, &fdctrl_transfer_handler
, fdctrl
);
1964 return fdctrl_connect_drives(fdctrl
);
1967 static const MemoryRegionPortio fdc_portio_list
[] = {
1968 { 1, 5, 1, .read
= fdctrl_read
, .write
= fdctrl_write
},
1969 { 7, 1, 1, .read
= fdctrl_read
, .write
= fdctrl_write
},
1970 PORTIO_END_OF_LIST(),
1973 static int isabus_fdc_init1(ISADevice
*dev
)
1975 FDCtrlISABus
*isa
= DO_UPCAST(FDCtrlISABus
, busdev
, dev
);
1976 FDCtrl
*fdctrl
= &isa
->state
;
1979 isa_register_portio_list(dev
, isa
->iobase
, fdc_portio_list
, fdctrl
, "fdc");
1981 isa_init_irq(&isa
->busdev
, &fdctrl
->irq
, isa
->irq
);
1982 fdctrl
->dma_chann
= isa
->dma
;
1984 qdev_set_legacy_instance_id(&dev
->qdev
, isa
->iobase
, 2);
1985 ret
= fdctrl_init_common(fdctrl
);
1987 add_boot_device_path(isa
->bootindexA
, &dev
->qdev
, "/floppy@0");
1988 add_boot_device_path(isa
->bootindexB
, &dev
->qdev
, "/floppy@1");
1993 static int sysbus_fdc_init1(SysBusDevice
*dev
)
1995 FDCtrlSysBus
*sys
= DO_UPCAST(FDCtrlSysBus
, busdev
, dev
);
1996 FDCtrl
*fdctrl
= &sys
->state
;
1999 memory_region_init_io(&fdctrl
->iomem
, &fdctrl_mem_ops
, fdctrl
, "fdc", 0x08);
2000 sysbus_init_mmio(dev
, &fdctrl
->iomem
);
2001 sysbus_init_irq(dev
, &fdctrl
->irq
);
2002 qdev_init_gpio_in(&dev
->qdev
, fdctrl_handle_tc
, 1);
2003 fdctrl
->dma_chann
= -1;
2005 qdev_set_legacy_instance_id(&dev
->qdev
, 0 /* io */, 2); /* FIXME */
2006 ret
= fdctrl_init_common(fdctrl
);
2011 static int sun4m_fdc_init1(SysBusDevice
*dev
)
2013 FDCtrl
*fdctrl
= &(FROM_SYSBUS(FDCtrlSysBus
, dev
)->state
);
2015 memory_region_init_io(&fdctrl
->iomem
, &fdctrl_mem_strict_ops
, fdctrl
,
2017 sysbus_init_mmio(dev
, &fdctrl
->iomem
);
2018 sysbus_init_irq(dev
, &fdctrl
->irq
);
2019 qdev_init_gpio_in(&dev
->qdev
, fdctrl_handle_tc
, 1);
2022 qdev_set_legacy_instance_id(&dev
->qdev
, 0 /* io */, 2); /* FIXME */
2023 return fdctrl_init_common(fdctrl
);
2026 void fdc_get_bs(BlockDriverState
*bs
[], ISADevice
*dev
)
2028 FDCtrlISABus
*isa
= DO_UPCAST(FDCtrlISABus
, busdev
, dev
);
2029 FDCtrl
*fdctrl
= &isa
->state
;
2032 for (i
= 0; i
< MAX_FD
; i
++) {
2033 bs
[i
] = fdctrl
->drives
[i
].bs
;
2038 static const VMStateDescription vmstate_isa_fdc
={
2041 .minimum_version_id
= 2,
2042 .fields
= (VMStateField
[]) {
2043 VMSTATE_STRUCT(state
, FDCtrlISABus
, 0, vmstate_fdc
, FDCtrl
),
2044 VMSTATE_END_OF_LIST()
2048 static Property isa_fdc_properties
[] = {
2049 DEFINE_PROP_HEX32("iobase", FDCtrlISABus
, iobase
, 0x3f0),
2050 DEFINE_PROP_UINT32("irq", FDCtrlISABus
, irq
, 6),
2051 DEFINE_PROP_UINT32("dma", FDCtrlISABus
, dma
, 2),
2052 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus
, state
.drives
[0].bs
),
2053 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus
, state
.drives
[1].bs
),
2054 DEFINE_PROP_INT32("bootindexA", FDCtrlISABus
, bootindexA
, -1),
2055 DEFINE_PROP_INT32("bootindexB", FDCtrlISABus
, bootindexB
, -1),
2056 DEFINE_PROP_BIT("check_media_rate", FDCtrlISABus
, state
.check_media_rate
,
2058 DEFINE_PROP_END_OF_LIST(),
2061 static void isabus_fdc_class_init1(ObjectClass
*klass
, void *data
)
2063 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2064 ISADeviceClass
*ic
= ISA_DEVICE_CLASS(klass
);
2065 ic
->init
= isabus_fdc_init1
;
2066 dc
->fw_name
= "fdc";
2068 dc
->reset
= fdctrl_external_reset_isa
;
2069 dc
->vmsd
= &vmstate_isa_fdc
;
2070 dc
->props
= isa_fdc_properties
;
2073 static TypeInfo isa_fdc_info
= {
2075 .parent
= TYPE_ISA_DEVICE
,
2076 .instance_size
= sizeof(FDCtrlISABus
),
2077 .class_init
= isabus_fdc_class_init1
,
2080 static const VMStateDescription vmstate_sysbus_fdc
={
2083 .minimum_version_id
= 2,
2084 .fields
= (VMStateField
[]) {
2085 VMSTATE_STRUCT(state
, FDCtrlSysBus
, 0, vmstate_fdc
, FDCtrl
),
2086 VMSTATE_END_OF_LIST()
2090 static Property sysbus_fdc_properties
[] = {
2091 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus
, state
.drives
[0].bs
),
2092 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus
, state
.drives
[1].bs
),
2093 DEFINE_PROP_END_OF_LIST(),
2096 static void sysbus_fdc_class_init(ObjectClass
*klass
, void *data
)
2098 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2099 SysBusDeviceClass
*k
= SYS_BUS_DEVICE_CLASS(klass
);
2101 k
->init
= sysbus_fdc_init1
;
2102 dc
->reset
= fdctrl_external_reset_sysbus
;
2103 dc
->vmsd
= &vmstate_sysbus_fdc
;
2104 dc
->props
= sysbus_fdc_properties
;
2107 static TypeInfo sysbus_fdc_info
= {
2108 .name
= "sysbus-fdc",
2109 .parent
= TYPE_SYS_BUS_DEVICE
,
2110 .instance_size
= sizeof(FDCtrlSysBus
),
2111 .class_init
= sysbus_fdc_class_init
,
2114 static Property sun4m_fdc_properties
[] = {
2115 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus
, state
.drives
[0].bs
),
2116 DEFINE_PROP_END_OF_LIST(),
2119 static void sun4m_fdc_class_init(ObjectClass
*klass
, void *data
)
2121 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2122 SysBusDeviceClass
*k
= SYS_BUS_DEVICE_CLASS(klass
);
2124 k
->init
= sun4m_fdc_init1
;
2125 dc
->reset
= fdctrl_external_reset_sysbus
;
2126 dc
->vmsd
= &vmstate_sysbus_fdc
;
2127 dc
->props
= sun4m_fdc_properties
;
2130 static TypeInfo sun4m_fdc_info
= {
2131 .name
= "SUNW,fdtwo",
2132 .parent
= TYPE_SYS_BUS_DEVICE
,
2133 .instance_size
= sizeof(FDCtrlSysBus
),
2134 .class_init
= sun4m_fdc_class_init
,
2137 static void fdc_register_types(void)
2139 type_register_static(&isa_fdc_info
);
2140 type_register_static(&sysbus_fdc_info
);
2141 type_register_static(&sun4m_fdc_info
);
2144 type_init(fdc_register_types
)