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Merge remote-tracking branch 'aneesh/for-upstream-6' into staging
[qemu.git] / hw / fdc.c
1 /*
2 * QEMU Floppy disk emulator (Intel 82078)
3 *
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 /*
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
28 */
29
30 #include "hw.h"
31 #include "fdc.h"
32 #include "qemu-error.h"
33 #include "qemu-timer.h"
34 #include "isa.h"
35 #include "sysbus.h"
36 #include "qdev-addr.h"
37 #include "blockdev.h"
38 #include "sysemu.h"
39
40 /********************************************************/
41 /* debug Floppy devices */
42 //#define DEBUG_FLOPPY
43
44 #ifdef DEBUG_FLOPPY
45 #define FLOPPY_DPRINTF(fmt, ...) \
46 do { printf("FLOPPY: " fmt , ## __VA_ARGS__); } while (0)
47 #else
48 #define FLOPPY_DPRINTF(fmt, ...)
49 #endif
50
51 #define FLOPPY_ERROR(fmt, ...) \
52 do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
53
54 /********************************************************/
55 /* Floppy drive emulation */
56
57 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
58 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
59
60 /* Will always be a fixed parameter for us */
61 #define FD_SECTOR_LEN 512
62 #define FD_SECTOR_SC 2 /* Sector size code */
63 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
64
65 /* Floppy disk drive emulation */
66 typedef enum FDiskFlags {
67 FDISK_DBL_SIDES = 0x01,
68 } FDiskFlags;
69
70 typedef struct FDrive {
71 BlockDriverState *bs;
72 /* Drive status */
73 FDriveType drive;
74 uint8_t perpendicular; /* 2.88 MB access mode */
75 /* Position */
76 uint8_t head;
77 uint8_t track;
78 uint8_t sect;
79 /* Media */
80 FDiskFlags flags;
81 uint8_t last_sect; /* Nb sector per track */
82 uint8_t max_track; /* Nb of tracks */
83 uint16_t bps; /* Bytes per sector */
84 uint8_t ro; /* Is read-only */
85 uint8_t media_changed; /* Is media changed */
86 } FDrive;
87
88 static void fd_init(FDrive *drv)
89 {
90 /* Drive */
91 drv->drive = FDRIVE_DRV_NONE;
92 drv->perpendicular = 0;
93 /* Disk */
94 drv->last_sect = 0;
95 drv->max_track = 0;
96 }
97
98 static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
99 uint8_t last_sect)
100 {
101 return (((track * 2) + head) * last_sect) + sect - 1;
102 }
103
104 /* Returns current position, in sectors, for given drive */
105 static int fd_sector(FDrive *drv)
106 {
107 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect);
108 }
109
110 /* Seek to a new position:
111 * returns 0 if already on right track
112 * returns 1 if track changed
113 * returns 2 if track is invalid
114 * returns 3 if sector is invalid
115 * returns 4 if seek is disabled
116 */
117 static int fd_seek(FDrive *drv, uint8_t head, uint8_t track, uint8_t sect,
118 int enable_seek)
119 {
120 uint32_t sector;
121 int ret;
122
123 if (track > drv->max_track ||
124 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
125 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
126 head, track, sect, 1,
127 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
128 drv->max_track, drv->last_sect);
129 return 2;
130 }
131 if (sect > drv->last_sect) {
132 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
133 head, track, sect, 1,
134 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
135 drv->max_track, drv->last_sect);
136 return 3;
137 }
138 sector = fd_sector_calc(head, track, sect, drv->last_sect);
139 ret = 0;
140 if (sector != fd_sector(drv)) {
141 #if 0
142 if (!enable_seek) {
143 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
144 head, track, sect, 1, drv->max_track, drv->last_sect);
145 return 4;
146 }
147 #endif
148 drv->head = head;
149 if (drv->track != track)
150 ret = 1;
151 drv->track = track;
152 drv->sect = sect;
153 }
154
155 return ret;
156 }
157
158 /* Set drive back to track 0 */
159 static void fd_recalibrate(FDrive *drv)
160 {
161 FLOPPY_DPRINTF("recalibrate\n");
162 drv->head = 0;
163 drv->track = 0;
164 drv->sect = 1;
165 }
166
167 /* Revalidate a disk drive after a disk change */
168 static void fd_revalidate(FDrive *drv)
169 {
170 int nb_heads, max_track, last_sect, ro;
171 FDriveType drive;
172
173 FLOPPY_DPRINTF("revalidate\n");
174 if (drv->bs != NULL && bdrv_is_inserted(drv->bs)) {
175 ro = bdrv_is_read_only(drv->bs);
176 bdrv_get_floppy_geometry_hint(drv->bs, &nb_heads, &max_track,
177 &last_sect, drv->drive, &drive);
178 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
179 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
180 nb_heads - 1, max_track, last_sect);
181 } else {
182 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n", nb_heads,
183 max_track, last_sect, ro ? "ro" : "rw");
184 }
185 if (nb_heads == 1) {
186 drv->flags &= ~FDISK_DBL_SIDES;
187 } else {
188 drv->flags |= FDISK_DBL_SIDES;
189 }
190 drv->max_track = max_track;
191 drv->last_sect = last_sect;
192 drv->ro = ro;
193 drv->drive = drive;
194 } else {
195 FLOPPY_DPRINTF("No disk in drive\n");
196 drv->last_sect = 0;
197 drv->max_track = 0;
198 drv->flags &= ~FDISK_DBL_SIDES;
199 }
200 }
201
202 /********************************************************/
203 /* Intel 82078 floppy disk controller emulation */
204
205 typedef struct FDCtrl FDCtrl;
206
207 static void fdctrl_reset(FDCtrl *fdctrl, int do_irq);
208 static void fdctrl_reset_fifo(FDCtrl *fdctrl);
209 static int fdctrl_transfer_handler (void *opaque, int nchan,
210 int dma_pos, int dma_len);
211 static void fdctrl_raise_irq(FDCtrl *fdctrl, uint8_t status0);
212
213 static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl);
214 static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl);
215 static uint32_t fdctrl_read_dor(FDCtrl *fdctrl);
216 static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value);
217 static uint32_t fdctrl_read_tape(FDCtrl *fdctrl);
218 static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value);
219 static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl);
220 static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value);
221 static uint32_t fdctrl_read_data(FDCtrl *fdctrl);
222 static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value);
223 static uint32_t fdctrl_read_dir(FDCtrl *fdctrl);
224
225 enum {
226 FD_DIR_WRITE = 0,
227 FD_DIR_READ = 1,
228 FD_DIR_SCANE = 2,
229 FD_DIR_SCANL = 3,
230 FD_DIR_SCANH = 4,
231 };
232
233 enum {
234 FD_STATE_MULTI = 0x01, /* multi track flag */
235 FD_STATE_FORMAT = 0x02, /* format flag */
236 FD_STATE_SEEK = 0x04, /* seek flag */
237 };
238
239 enum {
240 FD_REG_SRA = 0x00,
241 FD_REG_SRB = 0x01,
242 FD_REG_DOR = 0x02,
243 FD_REG_TDR = 0x03,
244 FD_REG_MSR = 0x04,
245 FD_REG_DSR = 0x04,
246 FD_REG_FIFO = 0x05,
247 FD_REG_DIR = 0x07,
248 };
249
250 enum {
251 FD_CMD_READ_TRACK = 0x02,
252 FD_CMD_SPECIFY = 0x03,
253 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
254 FD_CMD_WRITE = 0x05,
255 FD_CMD_READ = 0x06,
256 FD_CMD_RECALIBRATE = 0x07,
257 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
258 FD_CMD_WRITE_DELETED = 0x09,
259 FD_CMD_READ_ID = 0x0a,
260 FD_CMD_READ_DELETED = 0x0c,
261 FD_CMD_FORMAT_TRACK = 0x0d,
262 FD_CMD_DUMPREG = 0x0e,
263 FD_CMD_SEEK = 0x0f,
264 FD_CMD_VERSION = 0x10,
265 FD_CMD_SCAN_EQUAL = 0x11,
266 FD_CMD_PERPENDICULAR_MODE = 0x12,
267 FD_CMD_CONFIGURE = 0x13,
268 FD_CMD_LOCK = 0x14,
269 FD_CMD_VERIFY = 0x16,
270 FD_CMD_POWERDOWN_MODE = 0x17,
271 FD_CMD_PART_ID = 0x18,
272 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
273 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
274 FD_CMD_SAVE = 0x2e,
275 FD_CMD_OPTION = 0x33,
276 FD_CMD_RESTORE = 0x4e,
277 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
278 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
279 FD_CMD_FORMAT_AND_WRITE = 0xcd,
280 FD_CMD_RELATIVE_SEEK_IN = 0xcf,
281 };
282
283 enum {
284 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
285 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
286 FD_CONFIG_POLL = 0x10, /* Poll enabled */
287 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
288 FD_CONFIG_EIS = 0x40, /* No implied seeks */
289 };
290
291 enum {
292 FD_SR0_EQPMT = 0x10,
293 FD_SR0_SEEK = 0x20,
294 FD_SR0_ABNTERM = 0x40,
295 FD_SR0_INVCMD = 0x80,
296 FD_SR0_RDYCHG = 0xc0,
297 };
298
299 enum {
300 FD_SR1_EC = 0x80, /* End of cylinder */
301 };
302
303 enum {
304 FD_SR2_SNS = 0x04, /* Scan not satisfied */
305 FD_SR2_SEH = 0x08, /* Scan equal hit */
306 };
307
308 enum {
309 FD_SRA_DIR = 0x01,
310 FD_SRA_nWP = 0x02,
311 FD_SRA_nINDX = 0x04,
312 FD_SRA_HDSEL = 0x08,
313 FD_SRA_nTRK0 = 0x10,
314 FD_SRA_STEP = 0x20,
315 FD_SRA_nDRV2 = 0x40,
316 FD_SRA_INTPEND = 0x80,
317 };
318
319 enum {
320 FD_SRB_MTR0 = 0x01,
321 FD_SRB_MTR1 = 0x02,
322 FD_SRB_WGATE = 0x04,
323 FD_SRB_RDATA = 0x08,
324 FD_SRB_WDATA = 0x10,
325 FD_SRB_DR0 = 0x20,
326 };
327
328 enum {
329 #if MAX_FD == 4
330 FD_DOR_SELMASK = 0x03,
331 #else
332 FD_DOR_SELMASK = 0x01,
333 #endif
334 FD_DOR_nRESET = 0x04,
335 FD_DOR_DMAEN = 0x08,
336 FD_DOR_MOTEN0 = 0x10,
337 FD_DOR_MOTEN1 = 0x20,
338 FD_DOR_MOTEN2 = 0x40,
339 FD_DOR_MOTEN3 = 0x80,
340 };
341
342 enum {
343 #if MAX_FD == 4
344 FD_TDR_BOOTSEL = 0x0c,
345 #else
346 FD_TDR_BOOTSEL = 0x04,
347 #endif
348 };
349
350 enum {
351 FD_DSR_DRATEMASK= 0x03,
352 FD_DSR_PWRDOWN = 0x40,
353 FD_DSR_SWRESET = 0x80,
354 };
355
356 enum {
357 FD_MSR_DRV0BUSY = 0x01,
358 FD_MSR_DRV1BUSY = 0x02,
359 FD_MSR_DRV2BUSY = 0x04,
360 FD_MSR_DRV3BUSY = 0x08,
361 FD_MSR_CMDBUSY = 0x10,
362 FD_MSR_NONDMA = 0x20,
363 FD_MSR_DIO = 0x40,
364 FD_MSR_RQM = 0x80,
365 };
366
367 enum {
368 FD_DIR_DSKCHG = 0x80,
369 };
370
371 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
372 #define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
373 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
374
375 struct FDCtrl {
376 qemu_irq irq;
377 /* Controller state */
378 QEMUTimer *result_timer;
379 int dma_chann;
380 /* Controller's identification */
381 uint8_t version;
382 /* HW */
383 uint8_t sra;
384 uint8_t srb;
385 uint8_t dor;
386 uint8_t dor_vmstate; /* only used as temp during vmstate */
387 uint8_t tdr;
388 uint8_t dsr;
389 uint8_t msr;
390 uint8_t cur_drv;
391 uint8_t status0;
392 uint8_t status1;
393 uint8_t status2;
394 /* Command FIFO */
395 uint8_t *fifo;
396 int32_t fifo_size;
397 uint32_t data_pos;
398 uint32_t data_len;
399 uint8_t data_state;
400 uint8_t data_dir;
401 uint8_t eot; /* last wanted sector */
402 /* States kept only to be returned back */
403 /* precompensation */
404 uint8_t precomp_trk;
405 uint8_t config;
406 uint8_t lock;
407 /* Power down config (also with status regB access mode */
408 uint8_t pwrd;
409 /* Floppy drives */
410 uint8_t num_floppies;
411 /* Sun4m quirks? */
412 int sun4m;
413 FDrive drives[MAX_FD];
414 int reset_sensei;
415 /* Timers state */
416 uint8_t timer0;
417 uint8_t timer1;
418 };
419
420 typedef struct FDCtrlSysBus {
421 SysBusDevice busdev;
422 struct FDCtrl state;
423 } FDCtrlSysBus;
424
425 typedef struct FDCtrlISABus {
426 ISADevice busdev;
427 struct FDCtrl state;
428 int32_t bootindexA;
429 int32_t bootindexB;
430 } FDCtrlISABus;
431
432 static uint32_t fdctrl_read (void *opaque, uint32_t reg)
433 {
434 FDCtrl *fdctrl = opaque;
435 uint32_t retval;
436
437 switch (reg) {
438 case FD_REG_SRA:
439 retval = fdctrl_read_statusA(fdctrl);
440 break;
441 case FD_REG_SRB:
442 retval = fdctrl_read_statusB(fdctrl);
443 break;
444 case FD_REG_DOR:
445 retval = fdctrl_read_dor(fdctrl);
446 break;
447 case FD_REG_TDR:
448 retval = fdctrl_read_tape(fdctrl);
449 break;
450 case FD_REG_MSR:
451 retval = fdctrl_read_main_status(fdctrl);
452 break;
453 case FD_REG_FIFO:
454 retval = fdctrl_read_data(fdctrl);
455 break;
456 case FD_REG_DIR:
457 retval = fdctrl_read_dir(fdctrl);
458 break;
459 default:
460 retval = (uint32_t)(-1);
461 break;
462 }
463 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
464
465 return retval;
466 }
467
468 static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
469 {
470 FDCtrl *fdctrl = opaque;
471
472 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
473
474 switch (reg) {
475 case FD_REG_DOR:
476 fdctrl_write_dor(fdctrl, value);
477 break;
478 case FD_REG_TDR:
479 fdctrl_write_tape(fdctrl, value);
480 break;
481 case FD_REG_DSR:
482 fdctrl_write_rate(fdctrl, value);
483 break;
484 case FD_REG_FIFO:
485 fdctrl_write_data(fdctrl, value);
486 break;
487 default:
488 break;
489 }
490 }
491
492 static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg)
493 {
494 return fdctrl_read(opaque, (uint32_t)reg);
495 }
496
497 static void fdctrl_write_mem (void *opaque,
498 target_phys_addr_t reg, uint32_t value)
499 {
500 fdctrl_write(opaque, (uint32_t)reg, value);
501 }
502
503 static CPUReadMemoryFunc * const fdctrl_mem_read[3] = {
504 fdctrl_read_mem,
505 fdctrl_read_mem,
506 fdctrl_read_mem,
507 };
508
509 static CPUWriteMemoryFunc * const fdctrl_mem_write[3] = {
510 fdctrl_write_mem,
511 fdctrl_write_mem,
512 fdctrl_write_mem,
513 };
514
515 static CPUReadMemoryFunc * const fdctrl_mem_read_strict[3] = {
516 fdctrl_read_mem,
517 NULL,
518 NULL,
519 };
520
521 static CPUWriteMemoryFunc * const fdctrl_mem_write_strict[3] = {
522 fdctrl_write_mem,
523 NULL,
524 NULL,
525 };
526
527 static bool fdrive_media_changed_needed(void *opaque)
528 {
529 FDrive *drive = opaque;
530
531 return (drive->bs != NULL && drive->media_changed != 1);
532 }
533
534 static const VMStateDescription vmstate_fdrive_media_changed = {
535 .name = "fdrive/media_changed",
536 .version_id = 1,
537 .minimum_version_id = 1,
538 .minimum_version_id_old = 1,
539 .fields = (VMStateField[]) {
540 VMSTATE_UINT8(media_changed, FDrive),
541 VMSTATE_END_OF_LIST()
542 }
543 };
544
545 static const VMStateDescription vmstate_fdrive = {
546 .name = "fdrive",
547 .version_id = 1,
548 .minimum_version_id = 1,
549 .minimum_version_id_old = 1,
550 .fields = (VMStateField[]) {
551 VMSTATE_UINT8(head, FDrive),
552 VMSTATE_UINT8(track, FDrive),
553 VMSTATE_UINT8(sect, FDrive),
554 VMSTATE_END_OF_LIST()
555 },
556 .subsections = (VMStateSubsection[]) {
557 {
558 .vmsd = &vmstate_fdrive_media_changed,
559 .needed = &fdrive_media_changed_needed,
560 } , {
561 /* empty */
562 }
563 }
564 };
565
566 static void fdc_pre_save(void *opaque)
567 {
568 FDCtrl *s = opaque;
569
570 s->dor_vmstate = s->dor | GET_CUR_DRV(s);
571 }
572
573 static int fdc_post_load(void *opaque, int version_id)
574 {
575 FDCtrl *s = opaque;
576
577 SET_CUR_DRV(s, s->dor_vmstate & FD_DOR_SELMASK);
578 s->dor = s->dor_vmstate & ~FD_DOR_SELMASK;
579 return 0;
580 }
581
582 static const VMStateDescription vmstate_fdc = {
583 .name = "fdc",
584 .version_id = 2,
585 .minimum_version_id = 2,
586 .minimum_version_id_old = 2,
587 .pre_save = fdc_pre_save,
588 .post_load = fdc_post_load,
589 .fields = (VMStateField []) {
590 /* Controller State */
591 VMSTATE_UINT8(sra, FDCtrl),
592 VMSTATE_UINT8(srb, FDCtrl),
593 VMSTATE_UINT8(dor_vmstate, FDCtrl),
594 VMSTATE_UINT8(tdr, FDCtrl),
595 VMSTATE_UINT8(dsr, FDCtrl),
596 VMSTATE_UINT8(msr, FDCtrl),
597 VMSTATE_UINT8(status0, FDCtrl),
598 VMSTATE_UINT8(status1, FDCtrl),
599 VMSTATE_UINT8(status2, FDCtrl),
600 /* Command FIFO */
601 VMSTATE_VARRAY_INT32(fifo, FDCtrl, fifo_size, 0, vmstate_info_uint8,
602 uint8_t),
603 VMSTATE_UINT32(data_pos, FDCtrl),
604 VMSTATE_UINT32(data_len, FDCtrl),
605 VMSTATE_UINT8(data_state, FDCtrl),
606 VMSTATE_UINT8(data_dir, FDCtrl),
607 VMSTATE_UINT8(eot, FDCtrl),
608 /* States kept only to be returned back */
609 VMSTATE_UINT8(timer0, FDCtrl),
610 VMSTATE_UINT8(timer1, FDCtrl),
611 VMSTATE_UINT8(precomp_trk, FDCtrl),
612 VMSTATE_UINT8(config, FDCtrl),
613 VMSTATE_UINT8(lock, FDCtrl),
614 VMSTATE_UINT8(pwrd, FDCtrl),
615 VMSTATE_UINT8_EQUAL(num_floppies, FDCtrl),
616 VMSTATE_STRUCT_ARRAY(drives, FDCtrl, MAX_FD, 1,
617 vmstate_fdrive, FDrive),
618 VMSTATE_END_OF_LIST()
619 }
620 };
621
622 static void fdctrl_external_reset_sysbus(DeviceState *d)
623 {
624 FDCtrlSysBus *sys = container_of(d, FDCtrlSysBus, busdev.qdev);
625 FDCtrl *s = &sys->state;
626
627 fdctrl_reset(s, 0);
628 }
629
630 static void fdctrl_external_reset_isa(DeviceState *d)
631 {
632 FDCtrlISABus *isa = container_of(d, FDCtrlISABus, busdev.qdev);
633 FDCtrl *s = &isa->state;
634
635 fdctrl_reset(s, 0);
636 }
637
638 static void fdctrl_handle_tc(void *opaque, int irq, int level)
639 {
640 //FDCtrl *s = opaque;
641
642 if (level) {
643 // XXX
644 FLOPPY_DPRINTF("TC pulsed\n");
645 }
646 }
647
648 /* Change IRQ state */
649 static void fdctrl_reset_irq(FDCtrl *fdctrl)
650 {
651 if (!(fdctrl->sra & FD_SRA_INTPEND))
652 return;
653 FLOPPY_DPRINTF("Reset interrupt\n");
654 qemu_set_irq(fdctrl->irq, 0);
655 fdctrl->sra &= ~FD_SRA_INTPEND;
656 }
657
658 static void fdctrl_raise_irq(FDCtrl *fdctrl, uint8_t status0)
659 {
660 /* Sparc mutation */
661 if (fdctrl->sun4m && (fdctrl->msr & FD_MSR_CMDBUSY)) {
662 /* XXX: not sure */
663 fdctrl->msr &= ~FD_MSR_CMDBUSY;
664 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
665 fdctrl->status0 = status0;
666 return;
667 }
668 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
669 qemu_set_irq(fdctrl->irq, 1);
670 fdctrl->sra |= FD_SRA_INTPEND;
671 }
672 fdctrl->reset_sensei = 0;
673 fdctrl->status0 = status0;
674 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
675 }
676
677 /* Reset controller */
678 static void fdctrl_reset(FDCtrl *fdctrl, int do_irq)
679 {
680 int i;
681
682 FLOPPY_DPRINTF("reset controller\n");
683 fdctrl_reset_irq(fdctrl);
684 /* Initialise controller */
685 fdctrl->sra = 0;
686 fdctrl->srb = 0xc0;
687 if (!fdctrl->drives[1].bs)
688 fdctrl->sra |= FD_SRA_nDRV2;
689 fdctrl->cur_drv = 0;
690 fdctrl->dor = FD_DOR_nRESET;
691 fdctrl->dor |= (fdctrl->dma_chann != -1) ? FD_DOR_DMAEN : 0;
692 fdctrl->msr = FD_MSR_RQM;
693 /* FIFO state */
694 fdctrl->data_pos = 0;
695 fdctrl->data_len = 0;
696 fdctrl->data_state = 0;
697 fdctrl->data_dir = FD_DIR_WRITE;
698 for (i = 0; i < MAX_FD; i++)
699 fd_recalibrate(&fdctrl->drives[i]);
700 fdctrl_reset_fifo(fdctrl);
701 if (do_irq) {
702 fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
703 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
704 }
705 }
706
707 static inline FDrive *drv0(FDCtrl *fdctrl)
708 {
709 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
710 }
711
712 static inline FDrive *drv1(FDCtrl *fdctrl)
713 {
714 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
715 return &fdctrl->drives[1];
716 else
717 return &fdctrl->drives[0];
718 }
719
720 #if MAX_FD == 4
721 static inline FDrive *drv2(FDCtrl *fdctrl)
722 {
723 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
724 return &fdctrl->drives[2];
725 else
726 return &fdctrl->drives[1];
727 }
728
729 static inline FDrive *drv3(FDCtrl *fdctrl)
730 {
731 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
732 return &fdctrl->drives[3];
733 else
734 return &fdctrl->drives[2];
735 }
736 #endif
737
738 static FDrive *get_cur_drv(FDCtrl *fdctrl)
739 {
740 switch (fdctrl->cur_drv) {
741 case 0: return drv0(fdctrl);
742 case 1: return drv1(fdctrl);
743 #if MAX_FD == 4
744 case 2: return drv2(fdctrl);
745 case 3: return drv3(fdctrl);
746 #endif
747 default: return NULL;
748 }
749 }
750
751 /* Status A register : 0x00 (read-only) */
752 static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl)
753 {
754 uint32_t retval = fdctrl->sra;
755
756 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
757
758 return retval;
759 }
760
761 /* Status B register : 0x01 (read-only) */
762 static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl)
763 {
764 uint32_t retval = fdctrl->srb;
765
766 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
767
768 return retval;
769 }
770
771 /* Digital output register : 0x02 */
772 static uint32_t fdctrl_read_dor(FDCtrl *fdctrl)
773 {
774 uint32_t retval = fdctrl->dor;
775
776 /* Selected drive */
777 retval |= fdctrl->cur_drv;
778 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
779
780 return retval;
781 }
782
783 static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value)
784 {
785 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
786
787 /* Motors */
788 if (value & FD_DOR_MOTEN0)
789 fdctrl->srb |= FD_SRB_MTR0;
790 else
791 fdctrl->srb &= ~FD_SRB_MTR0;
792 if (value & FD_DOR_MOTEN1)
793 fdctrl->srb |= FD_SRB_MTR1;
794 else
795 fdctrl->srb &= ~FD_SRB_MTR1;
796
797 /* Drive */
798 if (value & 1)
799 fdctrl->srb |= FD_SRB_DR0;
800 else
801 fdctrl->srb &= ~FD_SRB_DR0;
802
803 /* Reset */
804 if (!(value & FD_DOR_nRESET)) {
805 if (fdctrl->dor & FD_DOR_nRESET) {
806 FLOPPY_DPRINTF("controller enter RESET state\n");
807 }
808 } else {
809 if (!(fdctrl->dor & FD_DOR_nRESET)) {
810 FLOPPY_DPRINTF("controller out of RESET state\n");
811 fdctrl_reset(fdctrl, 1);
812 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
813 }
814 }
815 /* Selected drive */
816 fdctrl->cur_drv = value & FD_DOR_SELMASK;
817
818 fdctrl->dor = value;
819 }
820
821 /* Tape drive register : 0x03 */
822 static uint32_t fdctrl_read_tape(FDCtrl *fdctrl)
823 {
824 uint32_t retval = fdctrl->tdr;
825
826 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
827
828 return retval;
829 }
830
831 static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value)
832 {
833 /* Reset mode */
834 if (!(fdctrl->dor & FD_DOR_nRESET)) {
835 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
836 return;
837 }
838 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
839 /* Disk boot selection indicator */
840 fdctrl->tdr = value & FD_TDR_BOOTSEL;
841 /* Tape indicators: never allow */
842 }
843
844 /* Main status register : 0x04 (read) */
845 static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl)
846 {
847 uint32_t retval = fdctrl->msr;
848
849 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
850 fdctrl->dor |= FD_DOR_nRESET;
851
852 /* Sparc mutation */
853 if (fdctrl->sun4m) {
854 retval |= FD_MSR_DIO;
855 fdctrl_reset_irq(fdctrl);
856 };
857
858 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
859
860 return retval;
861 }
862
863 /* Data select rate register : 0x04 (write) */
864 static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value)
865 {
866 /* Reset mode */
867 if (!(fdctrl->dor & FD_DOR_nRESET)) {
868 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
869 return;
870 }
871 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
872 /* Reset: autoclear */
873 if (value & FD_DSR_SWRESET) {
874 fdctrl->dor &= ~FD_DOR_nRESET;
875 fdctrl_reset(fdctrl, 1);
876 fdctrl->dor |= FD_DOR_nRESET;
877 }
878 if (value & FD_DSR_PWRDOWN) {
879 fdctrl_reset(fdctrl, 1);
880 }
881 fdctrl->dsr = value;
882 }
883
884 static int fdctrl_media_changed(FDrive *drv)
885 {
886 int ret;
887
888 if (!drv->bs)
889 return 0;
890 if (drv->media_changed) {
891 drv->media_changed = 0;
892 ret = 1;
893 } else {
894 ret = bdrv_media_changed(drv->bs);
895 if (ret < 0) {
896 ret = 0; /* we don't know, assume no */
897 }
898 }
899 if (ret) {
900 fd_revalidate(drv);
901 }
902 return ret;
903 }
904
905 /* Digital input register : 0x07 (read-only) */
906 static uint32_t fdctrl_read_dir(FDCtrl *fdctrl)
907 {
908 uint32_t retval = 0;
909
910 if (fdctrl_media_changed(drv0(fdctrl))
911 || fdctrl_media_changed(drv1(fdctrl))
912 #if MAX_FD == 4
913 || fdctrl_media_changed(drv2(fdctrl))
914 || fdctrl_media_changed(drv3(fdctrl))
915 #endif
916 )
917 retval |= FD_DIR_DSKCHG;
918 if (retval != 0) {
919 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
920 }
921
922 return retval;
923 }
924
925 /* FIFO state control */
926 static void fdctrl_reset_fifo(FDCtrl *fdctrl)
927 {
928 fdctrl->data_dir = FD_DIR_WRITE;
929 fdctrl->data_pos = 0;
930 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
931 }
932
933 /* Set FIFO status for the host to read */
934 static void fdctrl_set_fifo(FDCtrl *fdctrl, int fifo_len, int do_irq)
935 {
936 fdctrl->data_dir = FD_DIR_READ;
937 fdctrl->data_len = fifo_len;
938 fdctrl->data_pos = 0;
939 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
940 if (do_irq)
941 fdctrl_raise_irq(fdctrl, 0x00);
942 }
943
944 /* Set an error: unimplemented/unknown command */
945 static void fdctrl_unimplemented(FDCtrl *fdctrl, int direction)
946 {
947 FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
948 fdctrl->fifo[0] = FD_SR0_INVCMD;
949 fdctrl_set_fifo(fdctrl, 1, 0);
950 }
951
952 /* Seek to next sector */
953 static int fdctrl_seek_to_next_sect(FDCtrl *fdctrl, FDrive *cur_drv)
954 {
955 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
956 cur_drv->head, cur_drv->track, cur_drv->sect,
957 fd_sector(cur_drv));
958 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
959 error in fact */
960 if (cur_drv->sect >= cur_drv->last_sect ||
961 cur_drv->sect == fdctrl->eot) {
962 cur_drv->sect = 1;
963 if (FD_MULTI_TRACK(fdctrl->data_state)) {
964 if (cur_drv->head == 0 &&
965 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
966 cur_drv->head = 1;
967 } else {
968 cur_drv->head = 0;
969 cur_drv->track++;
970 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
971 return 0;
972 }
973 } else {
974 cur_drv->track++;
975 return 0;
976 }
977 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
978 cur_drv->head, cur_drv->track,
979 cur_drv->sect, fd_sector(cur_drv));
980 } else {
981 cur_drv->sect++;
982 }
983 return 1;
984 }
985
986 /* Callback for transfer end (stop or abort) */
987 static void fdctrl_stop_transfer(FDCtrl *fdctrl, uint8_t status0,
988 uint8_t status1, uint8_t status2)
989 {
990 FDrive *cur_drv;
991
992 cur_drv = get_cur_drv(fdctrl);
993 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
994 status0, status1, status2,
995 status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
996 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
997 fdctrl->fifo[1] = status1;
998 fdctrl->fifo[2] = status2;
999 fdctrl->fifo[3] = cur_drv->track;
1000 fdctrl->fifo[4] = cur_drv->head;
1001 fdctrl->fifo[5] = cur_drv->sect;
1002 fdctrl->fifo[6] = FD_SECTOR_SC;
1003 fdctrl->data_dir = FD_DIR_READ;
1004 if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1005 DMA_release_DREQ(fdctrl->dma_chann);
1006 }
1007 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1008 fdctrl->msr &= ~FD_MSR_NONDMA;
1009 fdctrl_set_fifo(fdctrl, 7, 1);
1010 }
1011
1012 /* Prepare a data transfer (either DMA or FIFO) */
1013 static void fdctrl_start_transfer(FDCtrl *fdctrl, int direction)
1014 {
1015 FDrive *cur_drv;
1016 uint8_t kh, kt, ks;
1017 int did_seek = 0;
1018
1019 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1020 cur_drv = get_cur_drv(fdctrl);
1021 kt = fdctrl->fifo[2];
1022 kh = fdctrl->fifo[3];
1023 ks = fdctrl->fifo[4];
1024 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1025 GET_CUR_DRV(fdctrl), kh, kt, ks,
1026 fd_sector_calc(kh, kt, ks, cur_drv->last_sect));
1027 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1028 case 2:
1029 /* sect too big */
1030 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1031 fdctrl->fifo[3] = kt;
1032 fdctrl->fifo[4] = kh;
1033 fdctrl->fifo[5] = ks;
1034 return;
1035 case 3:
1036 /* track too big */
1037 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1038 fdctrl->fifo[3] = kt;
1039 fdctrl->fifo[4] = kh;
1040 fdctrl->fifo[5] = ks;
1041 return;
1042 case 4:
1043 /* No seek enabled */
1044 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1045 fdctrl->fifo[3] = kt;
1046 fdctrl->fifo[4] = kh;
1047 fdctrl->fifo[5] = ks;
1048 return;
1049 case 1:
1050 did_seek = 1;
1051 break;
1052 default:
1053 break;
1054 }
1055
1056 /* Set the FIFO state */
1057 fdctrl->data_dir = direction;
1058 fdctrl->data_pos = 0;
1059 fdctrl->msr |= FD_MSR_CMDBUSY;
1060 if (fdctrl->fifo[0] & 0x80)
1061 fdctrl->data_state |= FD_STATE_MULTI;
1062 else
1063 fdctrl->data_state &= ~FD_STATE_MULTI;
1064 if (did_seek)
1065 fdctrl->data_state |= FD_STATE_SEEK;
1066 else
1067 fdctrl->data_state &= ~FD_STATE_SEEK;
1068 if (fdctrl->fifo[5] == 00) {
1069 fdctrl->data_len = fdctrl->fifo[8];
1070 } else {
1071 int tmp;
1072 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1073 tmp = (fdctrl->fifo[6] - ks + 1);
1074 if (fdctrl->fifo[0] & 0x80)
1075 tmp += fdctrl->fifo[6];
1076 fdctrl->data_len *= tmp;
1077 }
1078 fdctrl->eot = fdctrl->fifo[6];
1079 if (fdctrl->dor & FD_DOR_DMAEN) {
1080 int dma_mode;
1081 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1082 dma_mode = DMA_get_channel_mode(fdctrl->dma_chann);
1083 dma_mode = (dma_mode >> 2) & 3;
1084 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1085 dma_mode, direction,
1086 (128 << fdctrl->fifo[5]) *
1087 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1088 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1089 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1090 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1091 (direction == FD_DIR_READ && dma_mode == 1)) {
1092 /* No access is allowed until DMA transfer has completed */
1093 fdctrl->msr &= ~FD_MSR_RQM;
1094 /* Now, we just have to wait for the DMA controller to
1095 * recall us...
1096 */
1097 DMA_hold_DREQ(fdctrl->dma_chann);
1098 DMA_schedule(fdctrl->dma_chann);
1099 return;
1100 } else {
1101 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1102 }
1103 }
1104 FLOPPY_DPRINTF("start non-DMA transfer\n");
1105 fdctrl->msr |= FD_MSR_NONDMA;
1106 if (direction != FD_DIR_WRITE)
1107 fdctrl->msr |= FD_MSR_DIO;
1108 /* IO based transfer: calculate len */
1109 fdctrl_raise_irq(fdctrl, 0x00);
1110
1111 return;
1112 }
1113
1114 /* Prepare a transfer of deleted data */
1115 static void fdctrl_start_transfer_del(FDCtrl *fdctrl, int direction)
1116 {
1117 FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1118
1119 /* We don't handle deleted data,
1120 * so we don't return *ANYTHING*
1121 */
1122 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1123 }
1124
1125 /* handlers for DMA transfers */
1126 static int fdctrl_transfer_handler (void *opaque, int nchan,
1127 int dma_pos, int dma_len)
1128 {
1129 FDCtrl *fdctrl;
1130 FDrive *cur_drv;
1131 int len, start_pos, rel_pos;
1132 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1133
1134 fdctrl = opaque;
1135 if (fdctrl->msr & FD_MSR_RQM) {
1136 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1137 return 0;
1138 }
1139 cur_drv = get_cur_drv(fdctrl);
1140 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1141 fdctrl->data_dir == FD_DIR_SCANH)
1142 status2 = FD_SR2_SNS;
1143 if (dma_len > fdctrl->data_len)
1144 dma_len = fdctrl->data_len;
1145 if (cur_drv->bs == NULL) {
1146 if (fdctrl->data_dir == FD_DIR_WRITE)
1147 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1148 else
1149 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1150 len = 0;
1151 goto transfer_error;
1152 }
1153 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1154 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
1155 len = dma_len - fdctrl->data_pos;
1156 if (len + rel_pos > FD_SECTOR_LEN)
1157 len = FD_SECTOR_LEN - rel_pos;
1158 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1159 "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
1160 fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1161 cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
1162 fd_sector(cur_drv) * FD_SECTOR_LEN);
1163 if (fdctrl->data_dir != FD_DIR_WRITE ||
1164 len < FD_SECTOR_LEN || rel_pos != 0) {
1165 /* READ & SCAN commands and realign to a sector for WRITE */
1166 if (bdrv_read(cur_drv->bs, fd_sector(cur_drv),
1167 fdctrl->fifo, 1) < 0) {
1168 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1169 fd_sector(cur_drv));
1170 /* Sure, image size is too small... */
1171 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1172 }
1173 }
1174 switch (fdctrl->data_dir) {
1175 case FD_DIR_READ:
1176 /* READ commands */
1177 DMA_write_memory (nchan, fdctrl->fifo + rel_pos,
1178 fdctrl->data_pos, len);
1179 break;
1180 case FD_DIR_WRITE:
1181 /* WRITE commands */
1182 DMA_read_memory (nchan, fdctrl->fifo + rel_pos,
1183 fdctrl->data_pos, len);
1184 if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
1185 fdctrl->fifo, 1) < 0) {
1186 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1187 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1188 goto transfer_error;
1189 }
1190 break;
1191 default:
1192 /* SCAN commands */
1193 {
1194 uint8_t tmpbuf[FD_SECTOR_LEN];
1195 int ret;
1196 DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len);
1197 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1198 if (ret == 0) {
1199 status2 = FD_SR2_SEH;
1200 goto end_transfer;
1201 }
1202 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1203 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1204 status2 = 0x00;
1205 goto end_transfer;
1206 }
1207 }
1208 break;
1209 }
1210 fdctrl->data_pos += len;
1211 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1212 if (rel_pos == 0) {
1213 /* Seek to next sector */
1214 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1215 break;
1216 }
1217 }
1218 end_transfer:
1219 len = fdctrl->data_pos - start_pos;
1220 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1221 fdctrl->data_pos, len, fdctrl->data_len);
1222 if (fdctrl->data_dir == FD_DIR_SCANE ||
1223 fdctrl->data_dir == FD_DIR_SCANL ||
1224 fdctrl->data_dir == FD_DIR_SCANH)
1225 status2 = FD_SR2_SEH;
1226 if (FD_DID_SEEK(fdctrl->data_state))
1227 status0 |= FD_SR0_SEEK;
1228 fdctrl->data_len -= len;
1229 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1230 transfer_error:
1231
1232 return len;
1233 }
1234
1235 /* Data register : 0x05 */
1236 static uint32_t fdctrl_read_data(FDCtrl *fdctrl)
1237 {
1238 FDrive *cur_drv;
1239 uint32_t retval = 0;
1240 int pos;
1241
1242 cur_drv = get_cur_drv(fdctrl);
1243 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1244 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1245 FLOPPY_ERROR("controller not ready for reading\n");
1246 return 0;
1247 }
1248 pos = fdctrl->data_pos;
1249 if (fdctrl->msr & FD_MSR_NONDMA) {
1250 pos %= FD_SECTOR_LEN;
1251 if (pos == 0) {
1252 if (fdctrl->data_pos != 0)
1253 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1254 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1255 fd_sector(cur_drv));
1256 return 0;
1257 }
1258 if (bdrv_read(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1259 FLOPPY_DPRINTF("error getting sector %d\n",
1260 fd_sector(cur_drv));
1261 /* Sure, image size is too small... */
1262 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1263 }
1264 }
1265 }
1266 retval = fdctrl->fifo[pos];
1267 if (++fdctrl->data_pos == fdctrl->data_len) {
1268 fdctrl->data_pos = 0;
1269 /* Switch from transfer mode to status mode
1270 * then from status mode to command mode
1271 */
1272 if (fdctrl->msr & FD_MSR_NONDMA) {
1273 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1274 } else {
1275 fdctrl_reset_fifo(fdctrl);
1276 fdctrl_reset_irq(fdctrl);
1277 }
1278 }
1279 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1280
1281 return retval;
1282 }
1283
1284 static void fdctrl_format_sector(FDCtrl *fdctrl)
1285 {
1286 FDrive *cur_drv;
1287 uint8_t kh, kt, ks;
1288
1289 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1290 cur_drv = get_cur_drv(fdctrl);
1291 kt = fdctrl->fifo[6];
1292 kh = fdctrl->fifo[7];
1293 ks = fdctrl->fifo[8];
1294 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1295 GET_CUR_DRV(fdctrl), kh, kt, ks,
1296 fd_sector_calc(kh, kt, ks, cur_drv->last_sect));
1297 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1298 case 2:
1299 /* sect too big */
1300 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1301 fdctrl->fifo[3] = kt;
1302 fdctrl->fifo[4] = kh;
1303 fdctrl->fifo[5] = ks;
1304 return;
1305 case 3:
1306 /* track too big */
1307 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1308 fdctrl->fifo[3] = kt;
1309 fdctrl->fifo[4] = kh;
1310 fdctrl->fifo[5] = ks;
1311 return;
1312 case 4:
1313 /* No seek enabled */
1314 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1315 fdctrl->fifo[3] = kt;
1316 fdctrl->fifo[4] = kh;
1317 fdctrl->fifo[5] = ks;
1318 return;
1319 case 1:
1320 fdctrl->data_state |= FD_STATE_SEEK;
1321 break;
1322 default:
1323 break;
1324 }
1325 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1326 if (cur_drv->bs == NULL ||
1327 bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1328 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1329 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1330 } else {
1331 if (cur_drv->sect == cur_drv->last_sect) {
1332 fdctrl->data_state &= ~FD_STATE_FORMAT;
1333 /* Last sector done */
1334 if (FD_DID_SEEK(fdctrl->data_state))
1335 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1336 else
1337 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1338 } else {
1339 /* More to do */
1340 fdctrl->data_pos = 0;
1341 fdctrl->data_len = 4;
1342 }
1343 }
1344 }
1345
1346 static void fdctrl_handle_lock(FDCtrl *fdctrl, int direction)
1347 {
1348 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1349 fdctrl->fifo[0] = fdctrl->lock << 4;
1350 fdctrl_set_fifo(fdctrl, 1, fdctrl->lock);
1351 }
1352
1353 static void fdctrl_handle_dumpreg(FDCtrl *fdctrl, int direction)
1354 {
1355 FDrive *cur_drv = get_cur_drv(fdctrl);
1356
1357 /* Drives position */
1358 fdctrl->fifo[0] = drv0(fdctrl)->track;
1359 fdctrl->fifo[1] = drv1(fdctrl)->track;
1360 #if MAX_FD == 4
1361 fdctrl->fifo[2] = drv2(fdctrl)->track;
1362 fdctrl->fifo[3] = drv3(fdctrl)->track;
1363 #else
1364 fdctrl->fifo[2] = 0;
1365 fdctrl->fifo[3] = 0;
1366 #endif
1367 /* timers */
1368 fdctrl->fifo[4] = fdctrl->timer0;
1369 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1370 fdctrl->fifo[6] = cur_drv->last_sect;
1371 fdctrl->fifo[7] = (fdctrl->lock << 7) |
1372 (cur_drv->perpendicular << 2);
1373 fdctrl->fifo[8] = fdctrl->config;
1374 fdctrl->fifo[9] = fdctrl->precomp_trk;
1375 fdctrl_set_fifo(fdctrl, 10, 0);
1376 }
1377
1378 static void fdctrl_handle_version(FDCtrl *fdctrl, int direction)
1379 {
1380 /* Controller's version */
1381 fdctrl->fifo[0] = fdctrl->version;
1382 fdctrl_set_fifo(fdctrl, 1, 1);
1383 }
1384
1385 static void fdctrl_handle_partid(FDCtrl *fdctrl, int direction)
1386 {
1387 fdctrl->fifo[0] = 0x41; /* Stepping 1 */
1388 fdctrl_set_fifo(fdctrl, 1, 0);
1389 }
1390
1391 static void fdctrl_handle_restore(FDCtrl *fdctrl, int direction)
1392 {
1393 FDrive *cur_drv = get_cur_drv(fdctrl);
1394
1395 /* Drives position */
1396 drv0(fdctrl)->track = fdctrl->fifo[3];
1397 drv1(fdctrl)->track = fdctrl->fifo[4];
1398 #if MAX_FD == 4
1399 drv2(fdctrl)->track = fdctrl->fifo[5];
1400 drv3(fdctrl)->track = fdctrl->fifo[6];
1401 #endif
1402 /* timers */
1403 fdctrl->timer0 = fdctrl->fifo[7];
1404 fdctrl->timer1 = fdctrl->fifo[8];
1405 cur_drv->last_sect = fdctrl->fifo[9];
1406 fdctrl->lock = fdctrl->fifo[10] >> 7;
1407 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1408 fdctrl->config = fdctrl->fifo[11];
1409 fdctrl->precomp_trk = fdctrl->fifo[12];
1410 fdctrl->pwrd = fdctrl->fifo[13];
1411 fdctrl_reset_fifo(fdctrl);
1412 }
1413
1414 static void fdctrl_handle_save(FDCtrl *fdctrl, int direction)
1415 {
1416 FDrive *cur_drv = get_cur_drv(fdctrl);
1417
1418 fdctrl->fifo[0] = 0;
1419 fdctrl->fifo[1] = 0;
1420 /* Drives position */
1421 fdctrl->fifo[2] = drv0(fdctrl)->track;
1422 fdctrl->fifo[3] = drv1(fdctrl)->track;
1423 #if MAX_FD == 4
1424 fdctrl->fifo[4] = drv2(fdctrl)->track;
1425 fdctrl->fifo[5] = drv3(fdctrl)->track;
1426 #else
1427 fdctrl->fifo[4] = 0;
1428 fdctrl->fifo[5] = 0;
1429 #endif
1430 /* timers */
1431 fdctrl->fifo[6] = fdctrl->timer0;
1432 fdctrl->fifo[7] = fdctrl->timer1;
1433 fdctrl->fifo[8] = cur_drv->last_sect;
1434 fdctrl->fifo[9] = (fdctrl->lock << 7) |
1435 (cur_drv->perpendicular << 2);
1436 fdctrl->fifo[10] = fdctrl->config;
1437 fdctrl->fifo[11] = fdctrl->precomp_trk;
1438 fdctrl->fifo[12] = fdctrl->pwrd;
1439 fdctrl->fifo[13] = 0;
1440 fdctrl->fifo[14] = 0;
1441 fdctrl_set_fifo(fdctrl, 15, 1);
1442 }
1443
1444 static void fdctrl_handle_readid(FDCtrl *fdctrl, int direction)
1445 {
1446 FDrive *cur_drv = get_cur_drv(fdctrl);
1447
1448 /* XXX: should set main status register to busy */
1449 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1450 qemu_mod_timer(fdctrl->result_timer,
1451 qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 50));
1452 }
1453
1454 static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction)
1455 {
1456 FDrive *cur_drv;
1457
1458 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1459 cur_drv = get_cur_drv(fdctrl);
1460 fdctrl->data_state |= FD_STATE_FORMAT;
1461 if (fdctrl->fifo[0] & 0x80)
1462 fdctrl->data_state |= FD_STATE_MULTI;
1463 else
1464 fdctrl->data_state &= ~FD_STATE_MULTI;
1465 fdctrl->data_state &= ~FD_STATE_SEEK;
1466 cur_drv->bps =
1467 fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1468 #if 0
1469 cur_drv->last_sect =
1470 cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
1471 fdctrl->fifo[3] / 2;
1472 #else
1473 cur_drv->last_sect = fdctrl->fifo[3];
1474 #endif
1475 /* TODO: implement format using DMA expected by the Bochs BIOS
1476 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1477 * the sector with the specified fill byte
1478 */
1479 fdctrl->data_state &= ~FD_STATE_FORMAT;
1480 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1481 }
1482
1483 static void fdctrl_handle_specify(FDCtrl *fdctrl, int direction)
1484 {
1485 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1486 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1487 if (fdctrl->fifo[2] & 1)
1488 fdctrl->dor &= ~FD_DOR_DMAEN;
1489 else
1490 fdctrl->dor |= FD_DOR_DMAEN;
1491 /* No result back */
1492 fdctrl_reset_fifo(fdctrl);
1493 }
1494
1495 static void fdctrl_handle_sense_drive_status(FDCtrl *fdctrl, int direction)
1496 {
1497 FDrive *cur_drv;
1498
1499 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1500 cur_drv = get_cur_drv(fdctrl);
1501 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1502 /* 1 Byte status back */
1503 fdctrl->fifo[0] = (cur_drv->ro << 6) |
1504 (cur_drv->track == 0 ? 0x10 : 0x00) |
1505 (cur_drv->head << 2) |
1506 GET_CUR_DRV(fdctrl) |
1507 0x28;
1508 fdctrl_set_fifo(fdctrl, 1, 0);
1509 }
1510
1511 static void fdctrl_handle_recalibrate(FDCtrl *fdctrl, int direction)
1512 {
1513 FDrive *cur_drv;
1514
1515 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1516 cur_drv = get_cur_drv(fdctrl);
1517 fd_recalibrate(cur_drv);
1518 fdctrl_reset_fifo(fdctrl);
1519 /* Raise Interrupt */
1520 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1521 }
1522
1523 static void fdctrl_handle_sense_interrupt_status(FDCtrl *fdctrl, int direction)
1524 {
1525 FDrive *cur_drv = get_cur_drv(fdctrl);
1526
1527 if(fdctrl->reset_sensei > 0) {
1528 fdctrl->fifo[0] =
1529 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
1530 fdctrl->reset_sensei--;
1531 } else {
1532 /* XXX: status0 handling is broken for read/write
1533 commands, so we do this hack. It should be suppressed
1534 ASAP */
1535 fdctrl->fifo[0] =
1536 FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1537 }
1538
1539 fdctrl->fifo[1] = cur_drv->track;
1540 fdctrl_set_fifo(fdctrl, 2, 0);
1541 fdctrl_reset_irq(fdctrl);
1542 fdctrl->status0 = FD_SR0_RDYCHG;
1543 }
1544
1545 static void fdctrl_handle_seek(FDCtrl *fdctrl, int direction)
1546 {
1547 FDrive *cur_drv;
1548
1549 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1550 cur_drv = get_cur_drv(fdctrl);
1551 fdctrl_reset_fifo(fdctrl);
1552 if (fdctrl->fifo[2] > cur_drv->max_track) {
1553 fdctrl_raise_irq(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK);
1554 } else {
1555 cur_drv->track = fdctrl->fifo[2];
1556 /* Raise Interrupt */
1557 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1558 }
1559 }
1560
1561 static void fdctrl_handle_perpendicular_mode(FDCtrl *fdctrl, int direction)
1562 {
1563 FDrive *cur_drv = get_cur_drv(fdctrl);
1564
1565 if (fdctrl->fifo[1] & 0x80)
1566 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
1567 /* No result back */
1568 fdctrl_reset_fifo(fdctrl);
1569 }
1570
1571 static void fdctrl_handle_configure(FDCtrl *fdctrl, int direction)
1572 {
1573 fdctrl->config = fdctrl->fifo[2];
1574 fdctrl->precomp_trk = fdctrl->fifo[3];
1575 /* No result back */
1576 fdctrl_reset_fifo(fdctrl);
1577 }
1578
1579 static void fdctrl_handle_powerdown_mode(FDCtrl *fdctrl, int direction)
1580 {
1581 fdctrl->pwrd = fdctrl->fifo[1];
1582 fdctrl->fifo[0] = fdctrl->fifo[1];
1583 fdctrl_set_fifo(fdctrl, 1, 1);
1584 }
1585
1586 static void fdctrl_handle_option(FDCtrl *fdctrl, int direction)
1587 {
1588 /* No result back */
1589 fdctrl_reset_fifo(fdctrl);
1590 }
1591
1592 static void fdctrl_handle_drive_specification_command(FDCtrl *fdctrl, int direction)
1593 {
1594 FDrive *cur_drv = get_cur_drv(fdctrl);
1595
1596 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80) {
1597 /* Command parameters done */
1598 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
1599 fdctrl->fifo[0] = fdctrl->fifo[1];
1600 fdctrl->fifo[2] = 0;
1601 fdctrl->fifo[3] = 0;
1602 fdctrl_set_fifo(fdctrl, 4, 1);
1603 } else {
1604 fdctrl_reset_fifo(fdctrl);
1605 }
1606 } else if (fdctrl->data_len > 7) {
1607 /* ERROR */
1608 fdctrl->fifo[0] = 0x80 |
1609 (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1610 fdctrl_set_fifo(fdctrl, 1, 1);
1611 }
1612 }
1613
1614 static void fdctrl_handle_relative_seek_out(FDCtrl *fdctrl, int direction)
1615 {
1616 FDrive *cur_drv;
1617
1618 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1619 cur_drv = get_cur_drv(fdctrl);
1620 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
1621 cur_drv->track = cur_drv->max_track - 1;
1622 } else {
1623 cur_drv->track += fdctrl->fifo[2];
1624 }
1625 fdctrl_reset_fifo(fdctrl);
1626 /* Raise Interrupt */
1627 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1628 }
1629
1630 static void fdctrl_handle_relative_seek_in(FDCtrl *fdctrl, int direction)
1631 {
1632 FDrive *cur_drv;
1633
1634 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1635 cur_drv = get_cur_drv(fdctrl);
1636 if (fdctrl->fifo[2] > cur_drv->track) {
1637 cur_drv->track = 0;
1638 } else {
1639 cur_drv->track -= fdctrl->fifo[2];
1640 }
1641 fdctrl_reset_fifo(fdctrl);
1642 /* Raise Interrupt */
1643 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1644 }
1645
1646 static const struct {
1647 uint8_t value;
1648 uint8_t mask;
1649 const char* name;
1650 int parameters;
1651 void (*handler)(FDCtrl *fdctrl, int direction);
1652 int direction;
1653 } handlers[] = {
1654 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
1655 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
1656 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
1657 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
1658 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
1659 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
1660 { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
1661 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
1662 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
1663 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
1664 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
1665 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
1666 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
1667 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
1668 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
1669 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
1670 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
1671 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
1672 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
1673 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
1674 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
1675 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
1676 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command },
1677 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
1678 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
1679 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
1680 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
1681 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
1682 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
1683 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
1684 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
1685 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
1686 };
1687 /* Associate command to an index in the 'handlers' array */
1688 static uint8_t command_to_handler[256];
1689
1690 static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value)
1691 {
1692 FDrive *cur_drv;
1693 int pos;
1694
1695 /* Reset mode */
1696 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1697 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1698 return;
1699 }
1700 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
1701 FLOPPY_ERROR("controller not ready for writing\n");
1702 return;
1703 }
1704 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1705 /* Is it write command time ? */
1706 if (fdctrl->msr & FD_MSR_NONDMA) {
1707 /* FIFO data write */
1708 pos = fdctrl->data_pos++;
1709 pos %= FD_SECTOR_LEN;
1710 fdctrl->fifo[pos] = value;
1711 if (pos == FD_SECTOR_LEN - 1 ||
1712 fdctrl->data_pos == fdctrl->data_len) {
1713 cur_drv = get_cur_drv(fdctrl);
1714 if (bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1715 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1716 return;
1717 }
1718 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1719 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1720 fd_sector(cur_drv));
1721 return;
1722 }
1723 }
1724 /* Switch from transfer mode to status mode
1725 * then from status mode to command mode
1726 */
1727 if (fdctrl->data_pos == fdctrl->data_len)
1728 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1729 return;
1730 }
1731 if (fdctrl->data_pos == 0) {
1732 /* Command */
1733 pos = command_to_handler[value & 0xff];
1734 FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
1735 fdctrl->data_len = handlers[pos].parameters + 1;
1736 }
1737
1738 FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
1739 fdctrl->fifo[fdctrl->data_pos++] = value;
1740 if (fdctrl->data_pos == fdctrl->data_len) {
1741 /* We now have all parameters
1742 * and will be able to treat the command
1743 */
1744 if (fdctrl->data_state & FD_STATE_FORMAT) {
1745 fdctrl_format_sector(fdctrl);
1746 return;
1747 }
1748
1749 pos = command_to_handler[fdctrl->fifo[0] & 0xff];
1750 FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
1751 (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
1752 }
1753 }
1754
1755 static void fdctrl_result_timer(void *opaque)
1756 {
1757 FDCtrl *fdctrl = opaque;
1758 FDrive *cur_drv = get_cur_drv(fdctrl);
1759
1760 /* Pretend we are spinning.
1761 * This is needed for Coherent, which uses READ ID to check for
1762 * sector interleaving.
1763 */
1764 if (cur_drv->last_sect != 0) {
1765 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
1766 }
1767 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1768 }
1769
1770 static void fdctrl_change_cb(void *opaque, bool load)
1771 {
1772 FDrive *drive = opaque;
1773
1774 drive->media_changed = 1;
1775 }
1776
1777 static const BlockDevOps fdctrl_block_ops = {
1778 .change_media_cb = fdctrl_change_cb,
1779 };
1780
1781 /* Init functions */
1782 static int fdctrl_connect_drives(FDCtrl *fdctrl)
1783 {
1784 unsigned int i;
1785 FDrive *drive;
1786
1787 for (i = 0; i < MAX_FD; i++) {
1788 drive = &fdctrl->drives[i];
1789
1790 if (drive->bs) {
1791 if (bdrv_get_on_error(drive->bs, 0) != BLOCK_ERR_STOP_ENOSPC) {
1792 error_report("fdc doesn't support drive option werror");
1793 return -1;
1794 }
1795 if (bdrv_get_on_error(drive->bs, 1) != BLOCK_ERR_REPORT) {
1796 error_report("fdc doesn't support drive option rerror");
1797 return -1;
1798 }
1799 }
1800
1801 fd_init(drive);
1802 fd_revalidate(drive);
1803 if (drive->bs) {
1804 drive->media_changed = 1;
1805 bdrv_set_dev_ops(drive->bs, &fdctrl_block_ops, drive);
1806 }
1807 }
1808 return 0;
1809 }
1810
1811 void fdctrl_init_sysbus(qemu_irq irq, int dma_chann,
1812 target_phys_addr_t mmio_base, DriveInfo **fds)
1813 {
1814 FDCtrl *fdctrl;
1815 DeviceState *dev;
1816 FDCtrlSysBus *sys;
1817
1818 dev = qdev_create(NULL, "sysbus-fdc");
1819 sys = DO_UPCAST(FDCtrlSysBus, busdev.qdev, dev);
1820 fdctrl = &sys->state;
1821 fdctrl->dma_chann = dma_chann; /* FIXME */
1822 if (fds[0]) {
1823 qdev_prop_set_drive_nofail(dev, "driveA", fds[0]->bdrv);
1824 }
1825 if (fds[1]) {
1826 qdev_prop_set_drive_nofail(dev, "driveB", fds[1]->bdrv);
1827 }
1828 qdev_init_nofail(dev);
1829 sysbus_connect_irq(&sys->busdev, 0, irq);
1830 sysbus_mmio_map(&sys->busdev, 0, mmio_base);
1831 }
1832
1833 void sun4m_fdctrl_init(qemu_irq irq, target_phys_addr_t io_base,
1834 DriveInfo **fds, qemu_irq *fdc_tc)
1835 {
1836 DeviceState *dev;
1837 FDCtrlSysBus *sys;
1838
1839 dev = qdev_create(NULL, "SUNW,fdtwo");
1840 if (fds[0]) {
1841 qdev_prop_set_drive_nofail(dev, "drive", fds[0]->bdrv);
1842 }
1843 qdev_init_nofail(dev);
1844 sys = DO_UPCAST(FDCtrlSysBus, busdev.qdev, dev);
1845 sysbus_connect_irq(&sys->busdev, 0, irq);
1846 sysbus_mmio_map(&sys->busdev, 0, io_base);
1847 *fdc_tc = qdev_get_gpio_in(dev, 0);
1848 }
1849
1850 static int fdctrl_init_common(FDCtrl *fdctrl)
1851 {
1852 int i, j;
1853 static int command_tables_inited = 0;
1854
1855 /* Fill 'command_to_handler' lookup table */
1856 if (!command_tables_inited) {
1857 command_tables_inited = 1;
1858 for (i = ARRAY_SIZE(handlers) - 1; i >= 0; i--) {
1859 for (j = 0; j < sizeof(command_to_handler); j++) {
1860 if ((j & handlers[i].mask) == handlers[i].value) {
1861 command_to_handler[j] = i;
1862 }
1863 }
1864 }
1865 }
1866
1867 FLOPPY_DPRINTF("init controller\n");
1868 fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
1869 fdctrl->fifo_size = 512;
1870 fdctrl->result_timer = qemu_new_timer_ns(vm_clock,
1871 fdctrl_result_timer, fdctrl);
1872
1873 fdctrl->version = 0x90; /* Intel 82078 controller */
1874 fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
1875 fdctrl->num_floppies = MAX_FD;
1876
1877 if (fdctrl->dma_chann != -1)
1878 DMA_register_channel(fdctrl->dma_chann, &fdctrl_transfer_handler, fdctrl);
1879 return fdctrl_connect_drives(fdctrl);
1880 }
1881
1882 static const MemoryRegionPortio fdc_portio_list[] = {
1883 { 1, 5, 1, .read = fdctrl_read, .write = fdctrl_write },
1884 { 7, 1, 1, .read = fdctrl_read, .write = fdctrl_write },
1885 PORTIO_END_OF_LIST(),
1886 };
1887
1888 static int isabus_fdc_init1(ISADevice *dev)
1889 {
1890 FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
1891 FDCtrl *fdctrl = &isa->state;
1892 int iobase = 0x3f0;
1893 int isairq = 6;
1894 int dma_chann = 2;
1895 int ret;
1896
1897 isa_register_portio_list(dev, iobase, fdc_portio_list, fdctrl, "fdc");
1898
1899 isa_init_irq(&isa->busdev, &fdctrl->irq, isairq);
1900 fdctrl->dma_chann = dma_chann;
1901
1902 qdev_set_legacy_instance_id(&dev->qdev, iobase, 2);
1903 ret = fdctrl_init_common(fdctrl);
1904
1905 add_boot_device_path(isa->bootindexA, &dev->qdev, "/floppy@0");
1906 add_boot_device_path(isa->bootindexB, &dev->qdev, "/floppy@1");
1907
1908 return ret;
1909 }
1910
1911 static int sysbus_fdc_init1(SysBusDevice *dev)
1912 {
1913 FDCtrlSysBus *sys = DO_UPCAST(FDCtrlSysBus, busdev, dev);
1914 FDCtrl *fdctrl = &sys->state;
1915 int io;
1916 int ret;
1917
1918 io = cpu_register_io_memory(fdctrl_mem_read, fdctrl_mem_write, fdctrl,
1919 DEVICE_NATIVE_ENDIAN);
1920 sysbus_init_mmio(dev, 0x08, io);
1921 sysbus_init_irq(dev, &fdctrl->irq);
1922 qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
1923 fdctrl->dma_chann = -1;
1924
1925 qdev_set_legacy_instance_id(&dev->qdev, io, 2);
1926 ret = fdctrl_init_common(fdctrl);
1927
1928 return ret;
1929 }
1930
1931 static int sun4m_fdc_init1(SysBusDevice *dev)
1932 {
1933 FDCtrl *fdctrl = &(FROM_SYSBUS(FDCtrlSysBus, dev)->state);
1934 int io;
1935
1936 io = cpu_register_io_memory(fdctrl_mem_read_strict,
1937 fdctrl_mem_write_strict, fdctrl,
1938 DEVICE_NATIVE_ENDIAN);
1939 sysbus_init_mmio(dev, 0x08, io);
1940 sysbus_init_irq(dev, &fdctrl->irq);
1941 qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
1942
1943 fdctrl->sun4m = 1;
1944 qdev_set_legacy_instance_id(&dev->qdev, io, 2);
1945 return fdctrl_init_common(fdctrl);
1946 }
1947
1948 static const VMStateDescription vmstate_isa_fdc ={
1949 .name = "fdc",
1950 .version_id = 2,
1951 .minimum_version_id = 2,
1952 .fields = (VMStateField []) {
1953 VMSTATE_STRUCT(state, FDCtrlISABus, 0, vmstate_fdc, FDCtrl),
1954 VMSTATE_END_OF_LIST()
1955 }
1956 };
1957
1958 static ISADeviceInfo isa_fdc_info = {
1959 .init = isabus_fdc_init1,
1960 .qdev.name = "isa-fdc",
1961 .qdev.fw_name = "fdc",
1962 .qdev.size = sizeof(FDCtrlISABus),
1963 .qdev.no_user = 1,
1964 .qdev.vmsd = &vmstate_isa_fdc,
1965 .qdev.reset = fdctrl_external_reset_isa,
1966 .qdev.props = (Property[]) {
1967 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.drives[0].bs),
1968 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus, state.drives[1].bs),
1969 DEFINE_PROP_INT32("bootindexA", FDCtrlISABus, bootindexA, -1),
1970 DEFINE_PROP_INT32("bootindexB", FDCtrlISABus, bootindexB, -1),
1971 DEFINE_PROP_END_OF_LIST(),
1972 },
1973 };
1974
1975 static const VMStateDescription vmstate_sysbus_fdc ={
1976 .name = "fdc",
1977 .version_id = 2,
1978 .minimum_version_id = 2,
1979 .fields = (VMStateField []) {
1980 VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl),
1981 VMSTATE_END_OF_LIST()
1982 }
1983 };
1984
1985 static SysBusDeviceInfo sysbus_fdc_info = {
1986 .init = sysbus_fdc_init1,
1987 .qdev.name = "sysbus-fdc",
1988 .qdev.size = sizeof(FDCtrlSysBus),
1989 .qdev.vmsd = &vmstate_sysbus_fdc,
1990 .qdev.reset = fdctrl_external_reset_sysbus,
1991 .qdev.props = (Property[]) {
1992 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus, state.drives[0].bs),
1993 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus, state.drives[1].bs),
1994 DEFINE_PROP_END_OF_LIST(),
1995 },
1996 };
1997
1998 static SysBusDeviceInfo sun4m_fdc_info = {
1999 .init = sun4m_fdc_init1,
2000 .qdev.name = "SUNW,fdtwo",
2001 .qdev.size = sizeof(FDCtrlSysBus),
2002 .qdev.vmsd = &vmstate_sysbus_fdc,
2003 .qdev.reset = fdctrl_external_reset_sysbus,
2004 .qdev.props = (Property[]) {
2005 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus, state.drives[0].bs),
2006 DEFINE_PROP_END_OF_LIST(),
2007 },
2008 };
2009
2010 static void fdc_register_devices(void)
2011 {
2012 isa_qdev_register(&isa_fdc_info);
2013 sysbus_register_withprop(&sysbus_fdc_info);
2014 sysbus_register_withprop(&sun4m_fdc_info);
2015 }
2016
2017 device_init(fdc_register_devices)
Qemu copy for testing