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FDC fix 1/12 (Hervé Poussineau):
[qemu.git] / hw / fdc.c
1 /*
2 * QEMU Floppy disk emulator (Intel 82078)
3 *
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 /*
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
28 */
29 #include "hw.h"
30 #include "fdc.h"
31 #include "block.h"
32 #include "qemu-timer.h"
33 #include "isa.h"
34
35 /********************************************************/
36 /* debug Floppy devices */
37 //#define DEBUG_FLOPPY
38
39 #ifdef DEBUG_FLOPPY
40 #define FLOPPY_DPRINTF(fmt, args...) \
41 do { printf("FLOPPY: " fmt , ##args); } while (0)
42 #else
43 #define FLOPPY_DPRINTF(fmt, args...)
44 #endif
45
46 #define FLOPPY_ERROR(fmt, args...) \
47 do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ##args); } while (0)
48
49 /********************************************************/
50 /* Floppy drive emulation */
51
52 /* Will always be a fixed parameter for us */
53 #define FD_SECTOR_LEN 512
54 #define FD_SECTOR_SC 2 /* Sector size code */
55
56 /* Floppy disk drive emulation */
57 typedef enum fdisk_type_t {
58 FDRIVE_DISK_288 = 0x01, /* 2.88 MB disk */
59 FDRIVE_DISK_144 = 0x02, /* 1.44 MB disk */
60 FDRIVE_DISK_720 = 0x03, /* 720 kB disk */
61 FDRIVE_DISK_USER = 0x04, /* User defined geometry */
62 FDRIVE_DISK_NONE = 0x05, /* No disk */
63 } fdisk_type_t;
64
65 typedef enum fdrive_type_t {
66 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
67 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
68 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
69 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
70 } fdrive_type_t;
71
72 typedef enum fdrive_flags_t {
73 FDRIVE_MOTOR_ON = 0x01, /* motor on/off */
74 } fdrive_flags_t;
75
76 typedef enum fdisk_flags_t {
77 FDISK_DBL_SIDES = 0x01,
78 } fdisk_flags_t;
79
80 typedef struct fdrive_t {
81 BlockDriverState *bs;
82 /* Drive status */
83 fdrive_type_t drive;
84 fdrive_flags_t drflags;
85 uint8_t perpendicular; /* 2.88 MB access mode */
86 /* Position */
87 uint8_t head;
88 uint8_t track;
89 uint8_t sect;
90 /* Last operation status */
91 uint8_t dir; /* Direction */
92 uint8_t rw; /* Read/write */
93 /* Media */
94 fdisk_flags_t flags;
95 uint8_t last_sect; /* Nb sector per track */
96 uint8_t max_track; /* Nb of tracks */
97 uint16_t bps; /* Bytes per sector */
98 uint8_t ro; /* Is read-only */
99 } fdrive_t;
100
101 static void fd_init (fdrive_t *drv, BlockDriverState *bs)
102 {
103 /* Drive */
104 drv->bs = bs;
105 drv->drive = FDRIVE_DRV_NONE;
106 drv->drflags = 0;
107 drv->perpendicular = 0;
108 /* Disk */
109 drv->last_sect = 0;
110 drv->max_track = 0;
111 }
112
113 static int _fd_sector (uint8_t head, uint8_t track,
114 uint8_t sect, uint8_t last_sect)
115 {
116 return (((track * 2) + head) * last_sect) + sect - 1;
117 }
118
119 /* Returns current position, in sectors, for given drive */
120 static int fd_sector (fdrive_t *drv)
121 {
122 return _fd_sector(drv->head, drv->track, drv->sect, drv->last_sect);
123 }
124
125 static int fd_seek (fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
126 int enable_seek)
127 {
128 uint32_t sector;
129 int ret;
130
131 if (track > drv->max_track ||
132 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
133 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
134 head, track, sect, 1,
135 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
136 drv->max_track, drv->last_sect);
137 return 2;
138 }
139 if (sect > drv->last_sect) {
140 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
141 head, track, sect, 1,
142 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
143 drv->max_track, drv->last_sect);
144 return 3;
145 }
146 sector = _fd_sector(head, track, sect, drv->last_sect);
147 ret = 0;
148 if (sector != fd_sector(drv)) {
149 #if 0
150 if (!enable_seek) {
151 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
152 head, track, sect, 1, drv->max_track, drv->last_sect);
153 return 4;
154 }
155 #endif
156 drv->head = head;
157 if (drv->track != track)
158 ret = 1;
159 drv->track = track;
160 drv->sect = sect;
161 }
162
163 return ret;
164 }
165
166 /* Set drive back to track 0 */
167 static void fd_recalibrate (fdrive_t *drv)
168 {
169 FLOPPY_DPRINTF("recalibrate\n");
170 drv->head = 0;
171 drv->track = 0;
172 drv->sect = 1;
173 drv->dir = 1;
174 drv->rw = 0;
175 }
176
177 /* Recognize floppy formats */
178 typedef struct fd_format_t {
179 fdrive_type_t drive;
180 fdisk_type_t disk;
181 uint8_t last_sect;
182 uint8_t max_track;
183 uint8_t max_head;
184 const char *str;
185 } fd_format_t;
186
187 static const fd_format_t fd_formats[] = {
188 /* First entry is default format */
189 /* 1.44 MB 3"1/2 floppy disks */
190 { FDRIVE_DRV_144, FDRIVE_DISK_144, 18, 80, 1, "1.44 MB 3\"1/2", },
191 { FDRIVE_DRV_144, FDRIVE_DISK_144, 20, 80, 1, "1.6 MB 3\"1/2", },
192 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 80, 1, "1.68 MB 3\"1/2", },
193 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 82, 1, "1.72 MB 3\"1/2", },
194 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 83, 1, "1.74 MB 3\"1/2", },
195 { FDRIVE_DRV_144, FDRIVE_DISK_144, 22, 80, 1, "1.76 MB 3\"1/2", },
196 { FDRIVE_DRV_144, FDRIVE_DISK_144, 23, 80, 1, "1.84 MB 3\"1/2", },
197 { FDRIVE_DRV_144, FDRIVE_DISK_144, 24, 80, 1, "1.92 MB 3\"1/2", },
198 /* 2.88 MB 3"1/2 floppy disks */
199 { FDRIVE_DRV_288, FDRIVE_DISK_288, 36, 80, 1, "2.88 MB 3\"1/2", },
200 { FDRIVE_DRV_288, FDRIVE_DISK_288, 39, 80, 1, "3.12 MB 3\"1/2", },
201 { FDRIVE_DRV_288, FDRIVE_DISK_288, 40, 80, 1, "3.2 MB 3\"1/2", },
202 { FDRIVE_DRV_288, FDRIVE_DISK_288, 44, 80, 1, "3.52 MB 3\"1/2", },
203 { FDRIVE_DRV_288, FDRIVE_DISK_288, 48, 80, 1, "3.84 MB 3\"1/2", },
204 /* 720 kB 3"1/2 floppy disks */
205 { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 1, "720 kB 3\"1/2", },
206 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 80, 1, "800 kB 3\"1/2", },
207 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 82, 1, "820 kB 3\"1/2", },
208 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 83, 1, "830 kB 3\"1/2", },
209 { FDRIVE_DRV_144, FDRIVE_DISK_720, 13, 80, 1, "1.04 MB 3\"1/2", },
210 { FDRIVE_DRV_144, FDRIVE_DISK_720, 14, 80, 1, "1.12 MB 3\"1/2", },
211 /* 1.2 MB 5"1/4 floppy disks */
212 { FDRIVE_DRV_120, FDRIVE_DISK_288, 15, 80, 1, "1.2 kB 5\"1/4", },
213 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 80, 1, "1.44 MB 5\"1/4", },
214 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 82, 1, "1.48 MB 5\"1/4", },
215 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 83, 1, "1.49 MB 5\"1/4", },
216 { FDRIVE_DRV_120, FDRIVE_DISK_288, 20, 80, 1, "1.6 MB 5\"1/4", },
217 /* 720 kB 5"1/4 floppy disks */
218 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 80, 1, "720 kB 5\"1/4", },
219 { FDRIVE_DRV_120, FDRIVE_DISK_288, 11, 80, 1, "880 kB 5\"1/4", },
220 /* 360 kB 5"1/4 floppy disks */
221 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 1, "360 kB 5\"1/4", },
222 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 0, "180 kB 5\"1/4", },
223 { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 41, 1, "410 kB 5\"1/4", },
224 { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 42, 1, "420 kB 5\"1/4", },
225 /* 320 kB 5"1/4 floppy disks */
226 { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 1, "320 kB 5\"1/4", },
227 { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 0, "160 kB 5\"1/4", },
228 /* 360 kB must match 5"1/4 better than 3"1/2... */
229 { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 0, "360 kB 3\"1/2", },
230 /* end */
231 { FDRIVE_DRV_NONE, FDRIVE_DISK_NONE, -1, -1, 0, NULL, },
232 };
233
234 /* Revalidate a disk drive after a disk change */
235 static void fd_revalidate (fdrive_t *drv)
236 {
237 const fd_format_t *parse;
238 uint64_t nb_sectors, size;
239 int i, first_match, match;
240 int nb_heads, max_track, last_sect, ro;
241
242 FLOPPY_DPRINTF("revalidate\n");
243 if (drv->bs != NULL && bdrv_is_inserted(drv->bs)) {
244 ro = bdrv_is_read_only(drv->bs);
245 bdrv_get_geometry_hint(drv->bs, &nb_heads, &max_track, &last_sect);
246 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
247 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
248 nb_heads - 1, max_track, last_sect);
249 } else {
250 bdrv_get_geometry(drv->bs, &nb_sectors);
251 match = -1;
252 first_match = -1;
253 for (i = 0;; i++) {
254 parse = &fd_formats[i];
255 if (parse->drive == FDRIVE_DRV_NONE)
256 break;
257 if (drv->drive == parse->drive ||
258 drv->drive == FDRIVE_DRV_NONE) {
259 size = (parse->max_head + 1) * parse->max_track *
260 parse->last_sect;
261 if (nb_sectors == size) {
262 match = i;
263 break;
264 }
265 if (first_match == -1)
266 first_match = i;
267 }
268 }
269 if (match == -1) {
270 if (first_match == -1)
271 match = 1;
272 else
273 match = first_match;
274 parse = &fd_formats[match];
275 }
276 nb_heads = parse->max_head + 1;
277 max_track = parse->max_track;
278 last_sect = parse->last_sect;
279 drv->drive = parse->drive;
280 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
281 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
282 }
283 if (nb_heads == 1) {
284 drv->flags &= ~FDISK_DBL_SIDES;
285 } else {
286 drv->flags |= FDISK_DBL_SIDES;
287 }
288 drv->max_track = max_track;
289 drv->last_sect = last_sect;
290 drv->ro = ro;
291 } else {
292 FLOPPY_DPRINTF("No disk in drive\n");
293 drv->last_sect = 0;
294 drv->max_track = 0;
295 drv->flags &= ~FDISK_DBL_SIDES;
296 }
297 }
298
299 /* Motor control */
300 static void fd_start (fdrive_t *drv)
301 {
302 drv->drflags |= FDRIVE_MOTOR_ON;
303 }
304
305 static void fd_stop (fdrive_t *drv)
306 {
307 drv->drflags &= ~FDRIVE_MOTOR_ON;
308 }
309
310 /* Re-initialise a drives (motor off, repositioned) */
311 static void fd_reset (fdrive_t *drv)
312 {
313 fd_stop(drv);
314 fd_recalibrate(drv);
315 }
316
317 /********************************************************/
318 /* Intel 82078 floppy disk controller emulation */
319
320 static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq);
321 static void fdctrl_reset_fifo (fdctrl_t *fdctrl);
322 static int fdctrl_transfer_handler (void *opaque, int nchan,
323 int dma_pos, int dma_len);
324 static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status);
325
326 static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl);
327 static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl);
328 static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value);
329 static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl);
330 static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value);
331 static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl);
332 static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value);
333 static uint32_t fdctrl_read_data (fdctrl_t *fdctrl);
334 static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value);
335 static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl);
336
337 enum {
338 FD_CTRL_ACTIVE = 0x01, /* XXX: suppress that */
339 FD_CTRL_RESET = 0x02,
340 FD_CTRL_SLEEP = 0x04, /* XXX: suppress that */
341 FD_CTRL_BUSY = 0x08, /* dma transfer in progress */
342 FD_CTRL_INTR = 0x10,
343 };
344
345 enum {
346 FD_DIR_WRITE = 0,
347 FD_DIR_READ = 1,
348 FD_DIR_SCANE = 2,
349 FD_DIR_SCANL = 3,
350 FD_DIR_SCANH = 4,
351 };
352
353 enum {
354 FD_STATE_CMD = 0x00,
355 FD_STATE_STATUS = 0x01,
356 FD_STATE_DATA = 0x02,
357 FD_STATE_STATE = 0x03,
358 FD_STATE_MULTI = 0x10,
359 FD_STATE_SEEK = 0x20,
360 FD_STATE_FORMAT = 0x40,
361 };
362
363 enum {
364 FD_REG_0 = 0x00,
365 FD_REG_STATUSB = 0x01,
366 FD_REG_DOR = 0x02,
367 FD_REG_TDR = 0x03,
368 FD_REG_MSR = 0x04,
369 FD_REG_DSR = 0x04,
370 FD_REG_FIFO = 0x05,
371 FD_REG_DIR = 0x07,
372 };
373
374 enum {
375 FD_CMD_READ_TRACK = 0x02,
376 FD_CMD_SPECIFY = 0x03,
377 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
378 FD_CMD_WRITE = 0x05,
379 FD_CMD_READ = 0x06,
380 FD_CMD_RECALIBRATE = 0x07,
381 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
382 FD_CMD_WRITE_DELETED = 0x09,
383 FD_CMD_READ_ID = 0x0a,
384 FD_CMD_READ_DELETED = 0x0c,
385 FD_CMD_FORMAT_TRACK = 0x0d,
386 FD_CMD_DUMPREG = 0x0e,
387 FD_CMD_SEEK = 0x0f,
388 FD_CMD_VERSION = 0x10,
389 FD_CMD_SCAN_EQUAL = 0x11,
390 FD_CMD_PERPENDICULAR_MODE = 0x12,
391 FD_CMD_CONFIGURE = 0x13,
392 FD_CMD_LOCK = 0x14,
393 FD_CMD_VERIFY = 0x16,
394 FD_CMD_POWERDOWN_MODE = 0x17,
395 FD_CMD_PART_ID = 0x18,
396 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
397 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
398 FD_CMD_SAVE = 0x2c,
399 FD_CMD_OPTION = 0x33,
400 FD_CMD_RESTORE = 0x4c,
401 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
402 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
403 FD_CMD_FORMAT_AND_WRITE = 0xcd,
404 FD_CMD_RELATIVE_SEEK_IN = 0xcf,
405 };
406
407 enum {
408 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
409 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
410 FD_CONFIG_POLL = 0x10, /* Poll enabled */
411 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
412 FD_CONFIG_EIS = 0x40, /* No implied seeks */
413 };
414
415 enum {
416 FD_SR0_EQPMT = 0x10,
417 FD_SR0_SEEK = 0x20,
418 FD_SR0_ABNTERM = 0x40,
419 FD_SR0_INVCMD = 0x80,
420 FD_SR0_RDYCHG = 0xc0,
421 };
422
423 enum {
424 FD_DOR_SELMASK = 0x01,
425 FD_DOR_nRESET = 0x04,
426 FD_DOR_DMAEN = 0x08,
427 FD_DOR_MOTEN0 = 0x10,
428 FD_DOR_MOTEN1 = 0x20,
429 FD_DOR_MOTEN2 = 0x40,
430 FD_DOR_MOTEN3 = 0x80,
431 };
432
433 enum {
434 FD_TDR_BOOTSEL = 0x0c,
435 };
436
437 enum {
438 FD_DSR_DRATEMASK= 0x03,
439 FD_DSR_PWRDOWN = 0x40,
440 FD_DSR_SWRESET = 0x80,
441 };
442
443 enum {
444 FD_MSR_DRV0BUSY = 0x01,
445 FD_MSR_DRV1BUSY = 0x02,
446 FD_MSR_DRV2BUSY = 0x04,
447 FD_MSR_DRV3BUSY = 0x08,
448 FD_MSR_CMDBUSY = 0x10,
449 FD_MSR_NONDMA = 0x20,
450 FD_MSR_DIO = 0x40,
451 FD_MSR_RQM = 0x80,
452 };
453
454 enum {
455 FD_DIR_DSKCHG = 0x80,
456 };
457
458 #define FD_STATE(state) ((state) & FD_STATE_STATE)
459 #define FD_SET_STATE(state, new_state) \
460 do { (state) = ((state) & ~FD_STATE_STATE) | (new_state); } while (0)
461 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
462 #define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
463 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
464
465 struct fdctrl_t {
466 fdctrl_t *fdctrl;
467 /* Controller's identification */
468 uint8_t version;
469 /* HW */
470 qemu_irq irq;
471 int dma_chann;
472 target_phys_addr_t io_base;
473 /* Controller state */
474 QEMUTimer *result_timer;
475 uint8_t state;
476 uint8_t dma_en;
477 uint8_t cur_drv;
478 uint8_t bootsel;
479 /* Command FIFO */
480 uint8_t *fifo;
481 uint32_t data_pos;
482 uint32_t data_len;
483 uint8_t data_state;
484 uint8_t data_dir;
485 uint8_t int_status;
486 uint8_t eot; /* last wanted sector */
487 /* States kept only to be returned back */
488 /* Timers state */
489 uint8_t timer0;
490 uint8_t timer1;
491 /* precompensation */
492 uint8_t precomp_trk;
493 uint8_t config;
494 uint8_t lock;
495 /* Power down config (also with status regB access mode */
496 uint8_t pwrd;
497 /* Sun4m quirks? */
498 int sun4m;
499 /* Floppy drives */
500 fdrive_t drives[2];
501 };
502
503 static uint32_t fdctrl_read (void *opaque, uint32_t reg)
504 {
505 fdctrl_t *fdctrl = opaque;
506 uint32_t retval;
507
508 switch (reg & 0x07) {
509 case FD_REG_0:
510 if (fdctrl->sun4m) {
511 // Identify to Linux as S82078B
512 retval = fdctrl_read_statusB(fdctrl);
513 } else {
514 retval = (uint32_t)(-1);
515 }
516 break;
517 case FD_REG_STATUSB:
518 retval = fdctrl_read_statusB(fdctrl);
519 break;
520 case FD_REG_DOR:
521 retval = fdctrl_read_dor(fdctrl);
522 break;
523 case FD_REG_TDR:
524 retval = fdctrl_read_tape(fdctrl);
525 break;
526 case FD_REG_MSR:
527 retval = fdctrl_read_main_status(fdctrl);
528 break;
529 case FD_REG_FIFO:
530 retval = fdctrl_read_data(fdctrl);
531 break;
532 case FD_REG_DIR:
533 retval = fdctrl_read_dir(fdctrl);
534 break;
535 default:
536 retval = (uint32_t)(-1);
537 break;
538 }
539 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
540
541 return retval;
542 }
543
544 static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
545 {
546 fdctrl_t *fdctrl = opaque;
547
548 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
549
550 switch (reg & 0x07) {
551 case FD_REG_DOR:
552 fdctrl_write_dor(fdctrl, value);
553 break;
554 case FD_REG_TDR:
555 fdctrl_write_tape(fdctrl, value);
556 break;
557 case FD_REG_DSR:
558 fdctrl_write_rate(fdctrl, value);
559 break;
560 case FD_REG_FIFO:
561 fdctrl_write_data(fdctrl, value);
562 break;
563 default:
564 break;
565 }
566 }
567
568 static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg)
569 {
570 return fdctrl_read(opaque, (uint32_t)reg);
571 }
572
573 static void fdctrl_write_mem (void *opaque,
574 target_phys_addr_t reg, uint32_t value)
575 {
576 fdctrl_write(opaque, (uint32_t)reg, value);
577 }
578
579 static CPUReadMemoryFunc *fdctrl_mem_read[3] = {
580 fdctrl_read_mem,
581 fdctrl_read_mem,
582 fdctrl_read_mem,
583 };
584
585 static CPUWriteMemoryFunc *fdctrl_mem_write[3] = {
586 fdctrl_write_mem,
587 fdctrl_write_mem,
588 fdctrl_write_mem,
589 };
590
591 static CPUReadMemoryFunc *fdctrl_mem_read_strict[3] = {
592 fdctrl_read_mem,
593 NULL,
594 NULL,
595 };
596
597 static CPUWriteMemoryFunc *fdctrl_mem_write_strict[3] = {
598 fdctrl_write_mem,
599 NULL,
600 NULL,
601 };
602
603 static void fd_save (QEMUFile *f, fdrive_t *fd)
604 {
605 uint8_t tmp;
606
607 tmp = fd->drflags;
608 qemu_put_8s(f, &tmp);
609 qemu_put_8s(f, &fd->head);
610 qemu_put_8s(f, &fd->track);
611 qemu_put_8s(f, &fd->sect);
612 qemu_put_8s(f, &fd->dir);
613 qemu_put_8s(f, &fd->rw);
614 }
615
616 static void fdc_save (QEMUFile *f, void *opaque)
617 {
618 fdctrl_t *s = opaque;
619
620 qemu_put_8s(f, &s->state);
621 qemu_put_8s(f, &s->dma_en);
622 qemu_put_8s(f, &s->cur_drv);
623 qemu_put_8s(f, &s->bootsel);
624 qemu_put_buffer(f, s->fifo, FD_SECTOR_LEN);
625 qemu_put_be32s(f, &s->data_pos);
626 qemu_put_be32s(f, &s->data_len);
627 qemu_put_8s(f, &s->data_state);
628 qemu_put_8s(f, &s->data_dir);
629 qemu_put_8s(f, &s->int_status);
630 qemu_put_8s(f, &s->eot);
631 qemu_put_8s(f, &s->timer0);
632 qemu_put_8s(f, &s->timer1);
633 qemu_put_8s(f, &s->precomp_trk);
634 qemu_put_8s(f, &s->config);
635 qemu_put_8s(f, &s->lock);
636 qemu_put_8s(f, &s->pwrd);
637 fd_save(f, &s->drives[0]);
638 fd_save(f, &s->drives[1]);
639 }
640
641 static int fd_load (QEMUFile *f, fdrive_t *fd)
642 {
643 uint8_t tmp;
644
645 qemu_get_8s(f, &tmp);
646 fd->drflags = tmp;
647 qemu_get_8s(f, &fd->head);
648 qemu_get_8s(f, &fd->track);
649 qemu_get_8s(f, &fd->sect);
650 qemu_get_8s(f, &fd->dir);
651 qemu_get_8s(f, &fd->rw);
652
653 return 0;
654 }
655
656 static int fdc_load (QEMUFile *f, void *opaque, int version_id)
657 {
658 fdctrl_t *s = opaque;
659 int ret;
660
661 if (version_id != 1)
662 return -EINVAL;
663
664 qemu_get_8s(f, &s->state);
665 qemu_get_8s(f, &s->dma_en);
666 qemu_get_8s(f, &s->cur_drv);
667 qemu_get_8s(f, &s->bootsel);
668 qemu_get_buffer(f, s->fifo, FD_SECTOR_LEN);
669 qemu_get_be32s(f, &s->data_pos);
670 qemu_get_be32s(f, &s->data_len);
671 qemu_get_8s(f, &s->data_state);
672 qemu_get_8s(f, &s->data_dir);
673 qemu_get_8s(f, &s->int_status);
674 qemu_get_8s(f, &s->eot);
675 qemu_get_8s(f, &s->timer0);
676 qemu_get_8s(f, &s->timer1);
677 qemu_get_8s(f, &s->precomp_trk);
678 qemu_get_8s(f, &s->config);
679 qemu_get_8s(f, &s->lock);
680 qemu_get_8s(f, &s->pwrd);
681
682 ret = fd_load(f, &s->drives[0]);
683 if (ret == 0)
684 ret = fd_load(f, &s->drives[1]);
685
686 return ret;
687 }
688
689 static void fdctrl_external_reset(void *opaque)
690 {
691 fdctrl_t *s = opaque;
692
693 fdctrl_reset(s, 0);
694 }
695
696 static void fdctrl_handle_tc(void *opaque, int irq, int level)
697 {
698 //fdctrl_t *s = opaque;
699
700 if (level) {
701 // XXX
702 FLOPPY_DPRINTF("TC pulsed\n");
703 }
704 }
705
706 /* XXX: may change if moved to bdrv */
707 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num)
708 {
709 return fdctrl->drives[drive_num].drive;
710 }
711
712 /* Change IRQ state */
713 static void fdctrl_reset_irq (fdctrl_t *fdctrl)
714 {
715 FLOPPY_DPRINTF("Reset interrupt\n");
716 qemu_set_irq(fdctrl->irq, 0);
717 fdctrl->state &= ~FD_CTRL_INTR;
718 }
719
720 static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status)
721 {
722 // Sparc mutation
723 if (fdctrl->sun4m && !fdctrl->dma_en) {
724 fdctrl->state &= ~FD_CTRL_BUSY;
725 fdctrl->int_status = status;
726 return;
727 }
728 if (~(fdctrl->state & FD_CTRL_INTR)) {
729 qemu_set_irq(fdctrl->irq, 1);
730 fdctrl->state |= FD_CTRL_INTR;
731 }
732 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", status);
733 fdctrl->int_status = status;
734 }
735
736 /* Reset controller */
737 static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq)
738 {
739 int i;
740
741 FLOPPY_DPRINTF("reset controller\n");
742 fdctrl_reset_irq(fdctrl);
743 /* Initialise controller */
744 fdctrl->cur_drv = 0;
745 /* FIFO state */
746 fdctrl->data_pos = 0;
747 fdctrl->data_len = 0;
748 fdctrl->data_state = FD_STATE_CMD;
749 fdctrl->data_dir = FD_DIR_WRITE;
750 for (i = 0; i < MAX_FD; i++)
751 fd_reset(&fdctrl->drives[i]);
752 fdctrl_reset_fifo(fdctrl);
753 if (do_irq)
754 fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
755 }
756
757 static inline fdrive_t *drv0 (fdctrl_t *fdctrl)
758 {
759 return &fdctrl->drives[fdctrl->bootsel];
760 }
761
762 static inline fdrive_t *drv1 (fdctrl_t *fdctrl)
763 {
764 return &fdctrl->drives[1 - fdctrl->bootsel];
765 }
766
767 static fdrive_t *get_cur_drv (fdctrl_t *fdctrl)
768 {
769 return fdctrl->cur_drv == 0 ? drv0(fdctrl) : drv1(fdctrl);
770 }
771
772 /* Status B register : 0x01 (read-only) */
773 static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl)
774 {
775 FLOPPY_DPRINTF("status register: 0x00\n");
776 return 0;
777 }
778
779 /* Digital output register : 0x02 */
780 static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl)
781 {
782 uint32_t retval = 0;
783
784 /* Drive motors state indicators */
785 if (drv0(fdctrl)->drflags & FDRIVE_MOTOR_ON)
786 retval |= FD_DOR_MOTEN0;
787 if (drv1(fdctrl)->drflags & FDRIVE_MOTOR_ON)
788 retval |= FD_DOR_MOTEN1;
789 /* DMA enable */
790 if (fdctrl->dma_en)
791 retval |= FD_DOR_DMAEN;
792 /* Reset indicator */
793 if (!(fdctrl->state & FD_CTRL_RESET))
794 retval |= FD_DOR_nRESET;
795 /* Selected drive */
796 retval |= fdctrl->cur_drv;
797 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
798
799 return retval;
800 }
801
802 static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value)
803 {
804 /* Reset mode */
805 if (fdctrl->state & FD_CTRL_RESET) {
806 if (!(value & FD_DOR_nRESET)) {
807 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
808 return;
809 }
810 }
811 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
812 /* Drive motors state indicators */
813 if (value & FD_DOR_MOTEN1)
814 fd_start(drv1(fdctrl));
815 else
816 fd_stop(drv1(fdctrl));
817 if (value & FD_DOR_MOTEN0)
818 fd_start(drv0(fdctrl));
819 else
820 fd_stop(drv0(fdctrl));
821 /* DMA enable */
822 #if 0
823 if (fdctrl->dma_chann != -1)
824 fdctrl->dma_en = value & FD_DOR_DMAEN ? 1 : 0;
825 #endif
826 /* Reset */
827 if (!(value & FD_DOR_nRESET)) {
828 if (!(fdctrl->state & FD_CTRL_RESET)) {
829 FLOPPY_DPRINTF("controller enter RESET state\n");
830 fdctrl->state |= FD_CTRL_RESET;
831 }
832 } else {
833 if (fdctrl->state & FD_CTRL_RESET) {
834 FLOPPY_DPRINTF("controller out of RESET state\n");
835 fdctrl_reset(fdctrl, 1);
836 fdctrl->state &= ~(FD_CTRL_RESET | FD_CTRL_SLEEP);
837 }
838 }
839 /* Selected drive */
840 fdctrl->cur_drv = value & FD_DOR_SELMASK;
841 }
842
843 /* Tape drive register : 0x03 */
844 static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl)
845 {
846 uint32_t retval = 0;
847
848 /* Disk boot selection indicator */
849 retval |= fdctrl->bootsel << 2;
850 /* Tape indicators: never allowed */
851 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
852
853 return retval;
854 }
855
856 static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value)
857 {
858 /* Reset mode */
859 if (fdctrl->state & FD_CTRL_RESET) {
860 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
861 return;
862 }
863 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
864 /* Disk boot selection indicator */
865 fdctrl->bootsel = (value & FD_TDR_BOOTSEL) >> 2;
866 /* Tape indicators: never allow */
867 }
868
869 /* Main status register : 0x04 (read) */
870 static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl)
871 {
872 uint32_t retval = 0;
873
874 fdctrl->state &= ~(FD_CTRL_SLEEP | FD_CTRL_RESET);
875 if (!(fdctrl->state & FD_CTRL_BUSY)) {
876 /* Data transfer allowed */
877 retval |= FD_MSR_RQM;
878 /* Data transfer direction indicator */
879 if (fdctrl->data_dir == FD_DIR_READ)
880 retval |= FD_MSR_DIO;
881 }
882 /* Should handle FD_MSR_NONDMA for SPECIFY command */
883 /* Command busy indicator */
884 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA ||
885 FD_STATE(fdctrl->data_state) == FD_STATE_STATUS)
886 retval |= FD_MSR_CMDBUSY;
887 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
888
889 return retval;
890 }
891
892 /* Data select rate register : 0x04 (write) */
893 static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value)
894 {
895 /* Reset mode */
896 if (fdctrl->state & FD_CTRL_RESET) {
897 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
898 return;
899 }
900 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
901 /* Reset: autoclear */
902 if (value & FD_DSR_SWRESET) {
903 fdctrl->state |= FD_CTRL_RESET;
904 fdctrl_reset(fdctrl, 1);
905 fdctrl->state &= ~FD_CTRL_RESET;
906 }
907 if (value & FD_DSR_PWRDOWN) {
908 fdctrl->state |= FD_CTRL_SLEEP;
909 fdctrl_reset(fdctrl, 1);
910 }
911 }
912
913 static int fdctrl_media_changed(fdrive_t *drv)
914 {
915 int ret;
916
917 if (!drv->bs)
918 return 0;
919 ret = bdrv_media_changed(drv->bs);
920 if (ret) {
921 fd_revalidate(drv);
922 }
923 return ret;
924 }
925
926 /* Digital input register : 0x07 (read-only) */
927 static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl)
928 {
929 uint32_t retval = 0;
930
931 if (fdctrl_media_changed(drv0(fdctrl)) ||
932 fdctrl_media_changed(drv1(fdctrl)))
933 retval |= FD_DIR_DSKCHG;
934 if (retval != 0)
935 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
936
937 return retval;
938 }
939
940 /* FIFO state control */
941 static void fdctrl_reset_fifo (fdctrl_t *fdctrl)
942 {
943 fdctrl->data_dir = FD_DIR_WRITE;
944 fdctrl->data_pos = 0;
945 FD_SET_STATE(fdctrl->data_state, FD_STATE_CMD);
946 }
947
948 /* Set FIFO status for the host to read */
949 static void fdctrl_set_fifo (fdctrl_t *fdctrl, int fifo_len, int do_irq)
950 {
951 fdctrl->data_dir = FD_DIR_READ;
952 fdctrl->data_len = fifo_len;
953 fdctrl->data_pos = 0;
954 FD_SET_STATE(fdctrl->data_state, FD_STATE_STATUS);
955 if (do_irq)
956 fdctrl_raise_irq(fdctrl, 0x00);
957 }
958
959 /* Set an error: unimplemented/unknown command */
960 static void fdctrl_unimplemented (fdctrl_t *fdctrl, int direction)
961 {
962 #if 0
963 fdrive_t *cur_drv;
964
965 cur_drv = get_cur_drv(fdctrl);
966 fdctrl->fifo[0] = FD_SR0_ABNTERM | FD_SR0_SEEK | (cur_drv->head << 2) | fdctrl->cur_drv;
967 fdctrl->fifo[1] = 0x00;
968 fdctrl->fifo[2] = 0x00;
969 fdctrl_set_fifo(fdctrl, 3, 1);
970 #else
971 // fdctrl_reset_fifo(fdctrl);
972 fdctrl->fifo[0] = FD_SR0_INVCMD;
973 fdctrl_set_fifo(fdctrl, 1, 0);
974 #endif
975 }
976
977 /* Callback for transfer end (stop or abort) */
978 static void fdctrl_stop_transfer (fdctrl_t *fdctrl, uint8_t status0,
979 uint8_t status1, uint8_t status2)
980 {
981 fdrive_t *cur_drv;
982
983 cur_drv = get_cur_drv(fdctrl);
984 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
985 status0, status1, status2,
986 status0 | (cur_drv->head << 2) | fdctrl->cur_drv);
987 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | fdctrl->cur_drv;
988 fdctrl->fifo[1] = status1;
989 fdctrl->fifo[2] = status2;
990 fdctrl->fifo[3] = cur_drv->track;
991 fdctrl->fifo[4] = cur_drv->head;
992 fdctrl->fifo[5] = cur_drv->sect;
993 fdctrl->fifo[6] = FD_SECTOR_SC;
994 fdctrl->data_dir = FD_DIR_READ;
995 if (fdctrl->state & FD_CTRL_BUSY) {
996 DMA_release_DREQ(fdctrl->dma_chann);
997 fdctrl->state &= ~FD_CTRL_BUSY;
998 }
999 fdctrl_set_fifo(fdctrl, 7, 1);
1000 }
1001
1002 /* Prepare a data transfer (either DMA or FIFO) */
1003 static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction)
1004 {
1005 fdrive_t *cur_drv;
1006 uint8_t kh, kt, ks;
1007 int did_seek;
1008
1009 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1010 cur_drv = get_cur_drv(fdctrl);
1011 kt = fdctrl->fifo[2];
1012 kh = fdctrl->fifo[3];
1013 ks = fdctrl->fifo[4];
1014 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1015 fdctrl->cur_drv, kh, kt, ks,
1016 _fd_sector(kh, kt, ks, cur_drv->last_sect));
1017 did_seek = 0;
1018 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & 0x40)) {
1019 case 2:
1020 /* sect too big */
1021 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1022 fdctrl->fifo[3] = kt;
1023 fdctrl->fifo[4] = kh;
1024 fdctrl->fifo[5] = ks;
1025 return;
1026 case 3:
1027 /* track too big */
1028 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x80, 0x00);
1029 fdctrl->fifo[3] = kt;
1030 fdctrl->fifo[4] = kh;
1031 fdctrl->fifo[5] = ks;
1032 return;
1033 case 4:
1034 /* No seek enabled */
1035 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1036 fdctrl->fifo[3] = kt;
1037 fdctrl->fifo[4] = kh;
1038 fdctrl->fifo[5] = ks;
1039 return;
1040 case 1:
1041 did_seek = 1;
1042 break;
1043 default:
1044 break;
1045 }
1046 /* Set the FIFO state */
1047 fdctrl->data_dir = direction;
1048 fdctrl->data_pos = 0;
1049 FD_SET_STATE(fdctrl->data_state, FD_STATE_DATA); /* FIFO ready for data */
1050 if (fdctrl->fifo[0] & 0x80)
1051 fdctrl->data_state |= FD_STATE_MULTI;
1052 else
1053 fdctrl->data_state &= ~FD_STATE_MULTI;
1054 if (did_seek)
1055 fdctrl->data_state |= FD_STATE_SEEK;
1056 else
1057 fdctrl->data_state &= ~FD_STATE_SEEK;
1058 if (fdctrl->fifo[5] == 00) {
1059 fdctrl->data_len = fdctrl->fifo[8];
1060 } else {
1061 int tmp;
1062 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1063 tmp = (cur_drv->last_sect - ks + 1);
1064 if (fdctrl->fifo[0] & 0x80)
1065 tmp += cur_drv->last_sect;
1066 fdctrl->data_len *= tmp;
1067 }
1068 fdctrl->eot = fdctrl->fifo[6];
1069 if (fdctrl->dma_en) {
1070 int dma_mode;
1071 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1072 dma_mode = DMA_get_channel_mode(fdctrl->dma_chann);
1073 dma_mode = (dma_mode >> 2) & 3;
1074 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1075 dma_mode, direction,
1076 (128 << fdctrl->fifo[5]) *
1077 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1078 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1079 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1080 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1081 (direction == FD_DIR_READ && dma_mode == 1)) {
1082 /* No access is allowed until DMA transfer has completed */
1083 fdctrl->state |= FD_CTRL_BUSY;
1084 /* Now, we just have to wait for the DMA controller to
1085 * recall us...
1086 */
1087 DMA_hold_DREQ(fdctrl->dma_chann);
1088 DMA_schedule(fdctrl->dma_chann);
1089 return;
1090 } else {
1091 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1092 }
1093 }
1094 FLOPPY_DPRINTF("start non-DMA transfer\n");
1095 /* IO based transfer: calculate len */
1096 fdctrl_raise_irq(fdctrl, 0x00);
1097
1098 return;
1099 }
1100
1101 /* Prepare a transfer of deleted data */
1102 static void fdctrl_start_transfer_del (fdctrl_t *fdctrl, int direction)
1103 {
1104 /* We don't handle deleted data,
1105 * so we don't return *ANYTHING*
1106 */
1107 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1108 }
1109
1110 /* handlers for DMA transfers */
1111 static int fdctrl_transfer_handler (void *opaque, int nchan,
1112 int dma_pos, int dma_len)
1113 {
1114 fdctrl_t *fdctrl;
1115 fdrive_t *cur_drv;
1116 int len, start_pos, rel_pos;
1117 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1118
1119 fdctrl = opaque;
1120 if (!(fdctrl->state & FD_CTRL_BUSY)) {
1121 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1122 return 0;
1123 }
1124 cur_drv = get_cur_drv(fdctrl);
1125 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1126 fdctrl->data_dir == FD_DIR_SCANH)
1127 status2 = 0x04;
1128 if (dma_len > fdctrl->data_len)
1129 dma_len = fdctrl->data_len;
1130 if (cur_drv->bs == NULL) {
1131 if (fdctrl->data_dir == FD_DIR_WRITE)
1132 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1133 else
1134 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1135 len = 0;
1136 goto transfer_error;
1137 }
1138 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1139 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
1140 len = dma_len - fdctrl->data_pos;
1141 if (len + rel_pos > FD_SECTOR_LEN)
1142 len = FD_SECTOR_LEN - rel_pos;
1143 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1144 "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
1145 fdctrl->data_len, fdctrl->cur_drv, cur_drv->head,
1146 cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
1147 fd_sector(cur_drv) * FD_SECTOR_LEN);
1148 if (fdctrl->data_dir != FD_DIR_WRITE ||
1149 len < FD_SECTOR_LEN || rel_pos != 0) {
1150 /* READ & SCAN commands and realign to a sector for WRITE */
1151 if (bdrv_read(cur_drv->bs, fd_sector(cur_drv),
1152 fdctrl->fifo, 1) < 0) {
1153 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1154 fd_sector(cur_drv));
1155 /* Sure, image size is too small... */
1156 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1157 }
1158 }
1159 switch (fdctrl->data_dir) {
1160 case FD_DIR_READ:
1161 /* READ commands */
1162 DMA_write_memory (nchan, fdctrl->fifo + rel_pos,
1163 fdctrl->data_pos, len);
1164 break;
1165 case FD_DIR_WRITE:
1166 /* WRITE commands */
1167 DMA_read_memory (nchan, fdctrl->fifo + rel_pos,
1168 fdctrl->data_pos, len);
1169 if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
1170 fdctrl->fifo, 1) < 0) {
1171 FLOPPY_ERROR("writting sector %d\n", fd_sector(cur_drv));
1172 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1173 goto transfer_error;
1174 }
1175 break;
1176 default:
1177 /* SCAN commands */
1178 {
1179 uint8_t tmpbuf[FD_SECTOR_LEN];
1180 int ret;
1181 DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len);
1182 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1183 if (ret == 0) {
1184 status2 = 0x08;
1185 goto end_transfer;
1186 }
1187 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1188 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1189 status2 = 0x00;
1190 goto end_transfer;
1191 }
1192 }
1193 break;
1194 }
1195 fdctrl->data_pos += len;
1196 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1197 if (rel_pos == 0) {
1198 /* Seek to next sector */
1199 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d) (%d)\n",
1200 cur_drv->head, cur_drv->track, cur_drv->sect,
1201 fd_sector(cur_drv),
1202 fdctrl->data_pos - len);
1203 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1204 error in fact */
1205 if (cur_drv->sect >= cur_drv->last_sect ||
1206 cur_drv->sect == fdctrl->eot) {
1207 cur_drv->sect = 1;
1208 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1209 if (cur_drv->head == 0 &&
1210 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1211 cur_drv->head = 1;
1212 } else {
1213 cur_drv->head = 0;
1214 cur_drv->track++;
1215 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1216 break;
1217 }
1218 } else {
1219 cur_drv->track++;
1220 break;
1221 }
1222 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1223 cur_drv->head, cur_drv->track,
1224 cur_drv->sect, fd_sector(cur_drv));
1225 } else {
1226 cur_drv->sect++;
1227 }
1228 }
1229 }
1230 end_transfer:
1231 len = fdctrl->data_pos - start_pos;
1232 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1233 fdctrl->data_pos, len, fdctrl->data_len);
1234 if (fdctrl->data_dir == FD_DIR_SCANE ||
1235 fdctrl->data_dir == FD_DIR_SCANL ||
1236 fdctrl->data_dir == FD_DIR_SCANH)
1237 status2 = 0x08;
1238 if (FD_DID_SEEK(fdctrl->data_state))
1239 status0 |= FD_SR0_SEEK;
1240 fdctrl->data_len -= len;
1241 // if (fdctrl->data_len == 0)
1242 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1243 transfer_error:
1244
1245 return len;
1246 }
1247
1248 /* Data register : 0x05 */
1249 static uint32_t fdctrl_read_data (fdctrl_t *fdctrl)
1250 {
1251 fdrive_t *cur_drv;
1252 uint32_t retval = 0;
1253 int pos, len;
1254
1255 cur_drv = get_cur_drv(fdctrl);
1256 fdctrl->state &= ~FD_CTRL_SLEEP;
1257 if (FD_STATE(fdctrl->data_state) == FD_STATE_CMD) {
1258 FLOPPY_ERROR("can't read data in CMD state\n");
1259 return 0;
1260 }
1261 pos = fdctrl->data_pos;
1262 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
1263 pos %= FD_SECTOR_LEN;
1264 if (pos == 0) {
1265 len = fdctrl->data_len - fdctrl->data_pos;
1266 if (len > FD_SECTOR_LEN)
1267 len = FD_SECTOR_LEN;
1268 bdrv_read(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1);
1269 }
1270 }
1271 retval = fdctrl->fifo[pos];
1272 if (++fdctrl->data_pos == fdctrl->data_len) {
1273 fdctrl->data_pos = 0;
1274 /* Switch from transfer mode to status mode
1275 * then from status mode to command mode
1276 */
1277 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
1278 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1279 } else {
1280 fdctrl_reset_fifo(fdctrl);
1281 fdctrl_reset_irq(fdctrl);
1282 }
1283 }
1284 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1285
1286 return retval;
1287 }
1288
1289 static void fdctrl_format_sector (fdctrl_t *fdctrl)
1290 {
1291 fdrive_t *cur_drv;
1292 uint8_t kh, kt, ks;
1293 int did_seek;
1294
1295 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1296 cur_drv = get_cur_drv(fdctrl);
1297 kt = fdctrl->fifo[6];
1298 kh = fdctrl->fifo[7];
1299 ks = fdctrl->fifo[8];
1300 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1301 fdctrl->cur_drv, kh, kt, ks,
1302 _fd_sector(kh, kt, ks, cur_drv->last_sect));
1303 did_seek = 0;
1304 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1305 case 2:
1306 /* sect too big */
1307 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1308 fdctrl->fifo[3] = kt;
1309 fdctrl->fifo[4] = kh;
1310 fdctrl->fifo[5] = ks;
1311 return;
1312 case 3:
1313 /* track too big */
1314 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x80, 0x00);
1315 fdctrl->fifo[3] = kt;
1316 fdctrl->fifo[4] = kh;
1317 fdctrl->fifo[5] = ks;
1318 return;
1319 case 4:
1320 /* No seek enabled */
1321 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1322 fdctrl->fifo[3] = kt;
1323 fdctrl->fifo[4] = kh;
1324 fdctrl->fifo[5] = ks;
1325 return;
1326 case 1:
1327 did_seek = 1;
1328 fdctrl->data_state |= FD_STATE_SEEK;
1329 break;
1330 default:
1331 break;
1332 }
1333 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1334 if (cur_drv->bs == NULL ||
1335 bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1336 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1337 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1338 } else {
1339 if (cur_drv->sect == cur_drv->last_sect) {
1340 fdctrl->data_state &= ~FD_STATE_FORMAT;
1341 /* Last sector done */
1342 if (FD_DID_SEEK(fdctrl->data_state))
1343 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1344 else
1345 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1346 } else {
1347 /* More to do */
1348 fdctrl->data_pos = 0;
1349 fdctrl->data_len = 4;
1350 }
1351 }
1352 }
1353
1354 static void fdctrl_handle_lock (fdctrl_t *fdctrl, int direction)
1355 {
1356 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1357 fdctrl->fifo[0] = fdctrl->lock << 4;
1358 fdctrl_set_fifo(fdctrl, 1, fdctrl->lock);
1359 }
1360
1361 static void fdctrl_handle_dumpreg (fdctrl_t *fdctrl, int direction)
1362 {
1363 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1364
1365 /* Drives position */
1366 fdctrl->fifo[0] = drv0(fdctrl)->track;
1367 fdctrl->fifo[1] = drv1(fdctrl)->track;
1368 fdctrl->fifo[2] = 0;
1369 fdctrl->fifo[3] = 0;
1370 /* timers */
1371 fdctrl->fifo[4] = fdctrl->timer0;
1372 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | fdctrl->dma_en;
1373 fdctrl->fifo[6] = cur_drv->last_sect;
1374 fdctrl->fifo[7] = (fdctrl->lock << 7) |
1375 (cur_drv->perpendicular << 2);
1376 fdctrl->fifo[8] = fdctrl->config;
1377 fdctrl->fifo[9] = fdctrl->precomp_trk;
1378 fdctrl_set_fifo(fdctrl, 10, 0);
1379 }
1380
1381 static void fdctrl_handle_version (fdctrl_t *fdctrl, int direction)
1382 {
1383 /* Controller's version */
1384 fdctrl->fifo[0] = fdctrl->version;
1385 fdctrl_set_fifo(fdctrl, 1, 1);
1386 }
1387
1388 static void fdctrl_handle_partid (fdctrl_t *fdctrl, int direction)
1389 {
1390 fdctrl->fifo[0] = 0x41; /* Stepping 1 */
1391 fdctrl_set_fifo(fdctrl, 1, 0);
1392 }
1393
1394 static void fdctrl_handle_restore (fdctrl_t *fdctrl, int direction)
1395 {
1396 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1397
1398 /* Drives position */
1399 drv0(fdctrl)->track = fdctrl->fifo[3];
1400 drv1(fdctrl)->track = fdctrl->fifo[4];
1401 /* timers */
1402 fdctrl->timer0 = fdctrl->fifo[7];
1403 fdctrl->timer1 = fdctrl->fifo[8];
1404 cur_drv->last_sect = fdctrl->fifo[9];
1405 fdctrl->lock = fdctrl->fifo[10] >> 7;
1406 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1407 fdctrl->config = fdctrl->fifo[11];
1408 fdctrl->precomp_trk = fdctrl->fifo[12];
1409 fdctrl->pwrd = fdctrl->fifo[13];
1410 fdctrl_reset_fifo(fdctrl);
1411 }
1412
1413 static void fdctrl_handle_save (fdctrl_t *fdctrl, int direction)
1414 {
1415 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1416
1417 fdctrl->fifo[0] = 0;
1418 fdctrl->fifo[1] = 0;
1419 /* Drives position */
1420 fdctrl->fifo[2] = drv0(fdctrl)->track;
1421 fdctrl->fifo[3] = drv1(fdctrl)->track;
1422 fdctrl->fifo[4] = 0;
1423 fdctrl->fifo[5] = 0;
1424 /* timers */
1425 fdctrl->fifo[6] = fdctrl->timer0;
1426 fdctrl->fifo[7] = fdctrl->timer1;
1427 fdctrl->fifo[8] = cur_drv->last_sect;
1428 fdctrl->fifo[9] = (fdctrl->lock << 7) |
1429 (cur_drv->perpendicular << 2);
1430 fdctrl->fifo[10] = fdctrl->config;
1431 fdctrl->fifo[11] = fdctrl->precomp_trk;
1432 fdctrl->fifo[12] = fdctrl->pwrd;
1433 fdctrl->fifo[13] = 0;
1434 fdctrl->fifo[14] = 0;
1435 fdctrl_set_fifo(fdctrl, 15, 1);
1436 }
1437
1438 static void fdctrl_handle_readid (fdctrl_t *fdctrl, int direction)
1439 {
1440 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1441
1442 /* XXX: should set main status register to busy */
1443 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1444 qemu_mod_timer(fdctrl->result_timer,
1445 qemu_get_clock(vm_clock) + (ticks_per_sec / 50));
1446 }
1447
1448 static void fdctrl_handle_format_track (fdctrl_t *fdctrl, int direction)
1449 {
1450 fdrive_t *cur_drv;
1451
1452 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1453 cur_drv = get_cur_drv(fdctrl);
1454 fdctrl->data_state |= FD_STATE_FORMAT;
1455 if (fdctrl->fifo[0] & 0x80)
1456 fdctrl->data_state |= FD_STATE_MULTI;
1457 else
1458 fdctrl->data_state &= ~FD_STATE_MULTI;
1459 fdctrl->data_state &= ~FD_STATE_SEEK;
1460 cur_drv->bps =
1461 fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1462 #if 0
1463 cur_drv->last_sect =
1464 cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
1465 fdctrl->fifo[3] / 2;
1466 #else
1467 cur_drv->last_sect = fdctrl->fifo[3];
1468 #endif
1469 /* TODO: implement format using DMA expected by the Bochs BIOS
1470 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1471 * the sector with the specified fill byte
1472 */
1473 fdctrl->data_state &= ~FD_STATE_FORMAT;
1474 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1475 }
1476
1477 static void fdctrl_handle_specify (fdctrl_t *fdctrl, int direction)
1478 {
1479 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1480 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1481 fdctrl->dma_en = 1 - (fdctrl->fifo[2] & 1) ;
1482 /* No result back */
1483 fdctrl_reset_fifo(fdctrl);
1484 }
1485
1486 static void fdctrl_handle_sense_drive_status (fdctrl_t *fdctrl, int direction)
1487 {
1488 fdrive_t *cur_drv;
1489
1490 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1491 cur_drv = get_cur_drv(fdctrl);
1492 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1493 /* 1 Byte status back */
1494 fdctrl->fifo[0] = (cur_drv->ro << 6) |
1495 (cur_drv->track == 0 ? 0x10 : 0x00) |
1496 (cur_drv->head << 2) |
1497 fdctrl->cur_drv |
1498 0x28;
1499 fdctrl_set_fifo(fdctrl, 1, 0);
1500 }
1501
1502 static void fdctrl_handle_recalibrate (fdctrl_t *fdctrl, int direction)
1503 {
1504 fdrive_t *cur_drv;
1505
1506 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1507 cur_drv = get_cur_drv(fdctrl);
1508 fd_recalibrate(cur_drv);
1509 fdctrl_reset_fifo(fdctrl);
1510 /* Raise Interrupt */
1511 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1512 }
1513
1514 static void fdctrl_handle_sense_interrupt_status (fdctrl_t *fdctrl, int direction)
1515 {
1516 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1517
1518 #if 0
1519 fdctrl->fifo[0] =
1520 fdctrl->int_status | (cur_drv->head << 2) | fdctrl->cur_drv;
1521 #else
1522 /* XXX: int_status handling is broken for read/write
1523 commands, so we do this hack. It should be suppressed
1524 ASAP */
1525 fdctrl->fifo[0] =
1526 0x20 | (cur_drv->head << 2) | fdctrl->cur_drv;
1527 #endif
1528 fdctrl->fifo[1] = cur_drv->track;
1529 fdctrl_set_fifo(fdctrl, 2, 0);
1530 fdctrl_reset_irq(fdctrl);
1531 fdctrl->int_status = FD_SR0_RDYCHG;
1532 }
1533
1534 static void fdctrl_handle_seek (fdctrl_t *fdctrl, int direction)
1535 {
1536 fdrive_t *cur_drv;
1537
1538 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1539 cur_drv = get_cur_drv(fdctrl);
1540 fd_start(cur_drv);
1541 if (fdctrl->fifo[2] <= cur_drv->track)
1542 cur_drv->dir = 1;
1543 else
1544 cur_drv->dir = 0;
1545 fdctrl_reset_fifo(fdctrl);
1546 if (fdctrl->fifo[2] > cur_drv->max_track) {
1547 fdctrl_raise_irq(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK);
1548 } else {
1549 cur_drv->track = fdctrl->fifo[2];
1550 /* Raise Interrupt */
1551 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1552 }
1553 }
1554
1555 static void fdctrl_handle_perpendicular_mode (fdctrl_t *fdctrl, int direction)
1556 {
1557 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1558
1559 if (fdctrl->fifo[1] & 0x80)
1560 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
1561 /* No result back */
1562 fdctrl_reset_fifo(fdctrl);
1563 }
1564
1565 static void fdctrl_handle_configure (fdctrl_t *fdctrl, int direction)
1566 {
1567 fdctrl->config = fdctrl->fifo[2];
1568 fdctrl->precomp_trk = fdctrl->fifo[3];
1569 /* No result back */
1570 fdctrl_reset_fifo(fdctrl);
1571 }
1572
1573 static void fdctrl_handle_powerdown_mode (fdctrl_t *fdctrl, int direction)
1574 {
1575 fdctrl->pwrd = fdctrl->fifo[1];
1576 fdctrl->fifo[0] = fdctrl->fifo[1];
1577 fdctrl_set_fifo(fdctrl, 1, 1);
1578 }
1579
1580 static void fdctrl_handle_option (fdctrl_t *fdctrl, int direction)
1581 {
1582 /* No result back */
1583 fdctrl_reset_fifo(fdctrl);
1584 }
1585
1586 static void fdctrl_handle_drive_specification_command (fdctrl_t *fdctrl, int direction)
1587 {
1588 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1589
1590 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80) {
1591 /* Command parameters done */
1592 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
1593 fdctrl->fifo[0] = fdctrl->fifo[1];
1594 fdctrl->fifo[2] = 0;
1595 fdctrl->fifo[3] = 0;
1596 fdctrl_set_fifo(fdctrl, 4, 1);
1597 } else {
1598 fdctrl_reset_fifo(fdctrl);
1599 }
1600 } else if (fdctrl->data_len > 7) {
1601 /* ERROR */
1602 fdctrl->fifo[0] = 0x80 |
1603 (cur_drv->head << 2) | fdctrl->cur_drv;
1604 fdctrl_set_fifo(fdctrl, 1, 1);
1605 }
1606 }
1607
1608 static void fdctrl_handle_relative_seek_out (fdctrl_t *fdctrl, int direction)
1609 {
1610 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1611
1612 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1613 cur_drv = get_cur_drv(fdctrl);
1614 fd_start(cur_drv);
1615 cur_drv->dir = 0;
1616 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
1617 cur_drv->track = cur_drv->max_track - 1;
1618 } else {
1619 cur_drv->track += fdctrl->fifo[2];
1620 }
1621 fdctrl_reset_fifo(fdctrl);
1622 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1623 }
1624
1625 static void fdctrl_handle_relative_seek_in (fdctrl_t *fdctrl, int direction)
1626 {
1627 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1628
1629 fdctrl->cur_drv = fdctrl->fifo[1] & FD_DOR_SELMASK;
1630 cur_drv = get_cur_drv(fdctrl);
1631 fd_start(cur_drv);
1632 cur_drv->dir = 1;
1633 if (fdctrl->fifo[2] > cur_drv->track) {
1634 cur_drv->track = 0;
1635 } else {
1636 cur_drv->track -= fdctrl->fifo[2];
1637 }
1638 fdctrl_reset_fifo(fdctrl);
1639 /* Raise Interrupt */
1640 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1641 }
1642
1643 static const struct {
1644 uint8_t value;
1645 uint8_t mask;
1646 const char* name;
1647 int parameters;
1648 void (*handler)(fdctrl_t *fdctrl, int direction);
1649 int direction;
1650 } handlers[] = {
1651 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
1652 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
1653 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
1654 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
1655 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
1656 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
1657 { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
1658 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
1659 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
1660 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
1661 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
1662 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
1663 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
1664 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
1665 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
1666 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
1667 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
1668 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
1669 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
1670 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
1671 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
1672 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
1673 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command },
1674 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
1675 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
1676 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
1677 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
1678 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
1679 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
1680 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
1681 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
1682 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
1683 };
1684 /* Associate command to an index in the 'handlers' array */
1685 static uint8_t command_to_handler[256];
1686
1687 static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value)
1688 {
1689 fdrive_t *cur_drv;
1690 int pos;
1691
1692 cur_drv = get_cur_drv(fdctrl);
1693 /* Reset mode */
1694 if (fdctrl->state & FD_CTRL_RESET) {
1695 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1696 return;
1697 }
1698 fdctrl->state &= ~FD_CTRL_SLEEP;
1699 if (FD_STATE(fdctrl->data_state) == FD_STATE_STATUS) {
1700 FLOPPY_ERROR("can't write data in status mode\n");
1701 return;
1702 }
1703 /* Is it write command time ? */
1704 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
1705 /* FIFO data write */
1706 fdctrl->fifo[fdctrl->data_pos++] = value;
1707 if (fdctrl->data_pos % FD_SECTOR_LEN == (FD_SECTOR_LEN - 1) ||
1708 fdctrl->data_pos == fdctrl->data_len) {
1709 bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1);
1710 }
1711 /* Switch from transfer mode to status mode
1712 * then from status mode to command mode
1713 */
1714 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA)
1715 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1716 return;
1717 }
1718 if (fdctrl->data_pos == 0) {
1719 /* Command */
1720 pos = command_to_handler[value & 0xff];
1721 FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
1722 fdctrl->data_len = handlers[pos].parameters + 1;
1723 }
1724
1725 FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
1726 fdctrl->fifo[fdctrl->data_pos] = value;
1727 if (++fdctrl->data_pos == fdctrl->data_len) {
1728 /* We now have all parameters
1729 * and will be able to treat the command
1730 */
1731 if (fdctrl->data_state & FD_STATE_FORMAT) {
1732 fdctrl_format_sector(fdctrl);
1733 return;
1734 }
1735
1736 pos = command_to_handler[fdctrl->fifo[0] & 0xff];
1737 FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
1738 (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
1739 }
1740 }
1741
1742 static void fdctrl_result_timer(void *opaque)
1743 {
1744 fdctrl_t *fdctrl = opaque;
1745 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1746
1747 /* Pretend we are spinning.
1748 * This is needed for Coherent, which uses READ ID to check for
1749 * sector interleaving.
1750 */
1751 if (cur_drv->last_sect != 0) {
1752 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
1753 }
1754 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1755 }
1756
1757 /* Init functions */
1758 static fdctrl_t *fdctrl_init_common (qemu_irq irq, int dma_chann,
1759 target_phys_addr_t io_base,
1760 BlockDriverState **fds)
1761 {
1762 fdctrl_t *fdctrl;
1763 int i, j;
1764
1765 /* Fill 'command_to_handler' lookup table */
1766 for (i = sizeof(handlers)/sizeof(handlers[0]) - 1; i >= 0; i--) {
1767 for (j = 0; j < sizeof(command_to_handler); j++) {
1768 if ((j & handlers[i].mask) == handlers[i].value)
1769 command_to_handler[j] = i;
1770 }
1771 }
1772
1773 FLOPPY_DPRINTF("init controller\n");
1774 fdctrl = qemu_mallocz(sizeof(fdctrl_t));
1775 if (!fdctrl)
1776 return NULL;
1777 fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
1778 if (fdctrl->fifo == NULL) {
1779 qemu_free(fdctrl);
1780 return NULL;
1781 }
1782 fdctrl->result_timer = qemu_new_timer(vm_clock,
1783 fdctrl_result_timer, fdctrl);
1784
1785 fdctrl->version = 0x90; /* Intel 82078 controller */
1786 fdctrl->irq = irq;
1787 fdctrl->dma_chann = dma_chann;
1788 fdctrl->io_base = io_base;
1789 fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
1790 if (fdctrl->dma_chann != -1) {
1791 fdctrl->dma_en = 1;
1792 DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl);
1793 } else {
1794 fdctrl->dma_en = 0;
1795 }
1796 for (i = 0; i < MAX_FD; i++) {
1797 fd_init(&fdctrl->drives[i], fds[i]);
1798 }
1799 fdctrl_reset(fdctrl, 0);
1800 fdctrl->state = FD_CTRL_ACTIVE;
1801 register_savevm("fdc", io_base, 1, fdc_save, fdc_load, fdctrl);
1802 qemu_register_reset(fdctrl_external_reset, fdctrl);
1803 for (i = 0; i < MAX_FD; i++) {
1804 fd_revalidate(&fdctrl->drives[i]);
1805 }
1806
1807 return fdctrl;
1808 }
1809
1810 fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
1811 target_phys_addr_t io_base,
1812 BlockDriverState **fds)
1813 {
1814 fdctrl_t *fdctrl;
1815 int io_mem;
1816
1817 fdctrl = fdctrl_init_common(irq, dma_chann, io_base, fds);
1818
1819 fdctrl->sun4m = 0;
1820 if (mem_mapped) {
1821 io_mem = cpu_register_io_memory(0, fdctrl_mem_read, fdctrl_mem_write,
1822 fdctrl);
1823 cpu_register_physical_memory(io_base, 0x08, io_mem);
1824 } else {
1825 register_ioport_read((uint32_t)io_base + 0x01, 5, 1, &fdctrl_read,
1826 fdctrl);
1827 register_ioport_read((uint32_t)io_base + 0x07, 1, 1, &fdctrl_read,
1828 fdctrl);
1829 register_ioport_write((uint32_t)io_base + 0x01, 5, 1, &fdctrl_write,
1830 fdctrl);
1831 register_ioport_write((uint32_t)io_base + 0x07, 1, 1, &fdctrl_write,
1832 fdctrl);
1833 }
1834
1835 return fdctrl;
1836 }
1837
1838 fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
1839 BlockDriverState **fds, qemu_irq *fdc_tc)
1840 {
1841 fdctrl_t *fdctrl;
1842 int io_mem;
1843
1844 fdctrl = fdctrl_init_common(irq, 0, io_base, fds);
1845 fdctrl->sun4m = 1;
1846 io_mem = cpu_register_io_memory(0, fdctrl_mem_read_strict,
1847 fdctrl_mem_write_strict,
1848 fdctrl);
1849 cpu_register_physical_memory(io_base, 0x08, io_mem);
1850 *fdc_tc = *qemu_allocate_irqs(fdctrl_handle_tc, fdctrl, 1);
1851
1852 return fdctrl;
1853 }
Qemu copy for testing