2 * QEMU IDE disk and CD/DVD-ROM Emulator
4 * Copyright (c) 2003 Fabrice Bellard
5 * Copyright (c) 2006 Openedhand Ltd.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "qemu-error.h"
30 #include "qemu-timer.h"
35 #include <hw/ide/internal.h>
37 /* These values were based on a Seagate ST3500418AS but have been modified
38 to make more sense in QEMU */
39 static const int smart_attributes
[][12] = {
40 /* id, flags, hflags, val, wrst, raw (6 bytes), threshold */
41 /* raw read error rate*/
42 { 0x01, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06},
44 { 0x03, 0x03, 0x00, 0x64, 0x64, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
45 /* start stop count */
46 { 0x04, 0x02, 0x00, 0x64, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14},
47 /* remapped sectors */
48 { 0x05, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24},
50 { 0x09, 0x03, 0x00, 0x64, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
51 /* power cycle count */
52 { 0x0c, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
53 /* airflow-temperature-celsius */
54 { 190, 0x03, 0x00, 0x45, 0x45, 0x1f, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x32},
56 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
59 static int ide_handle_rw_error(IDEState
*s
, int error
, int op
);
60 static void ide_dummy_transfer_stop(IDEState
*s
);
62 static void padstr(char *str
, const char *src
, int len
)
65 for(i
= 0; i
< len
; i
++) {
74 static void put_le16(uint16_t *p
, unsigned int v
)
79 static void ide_identify(IDEState
*s
)
83 IDEDevice
*dev
= s
->unit
? s
->bus
->slave
: s
->bus
->master
;
85 if (s
->identify_set
) {
86 memcpy(s
->io_buffer
, s
->identify_data
, sizeof(s
->identify_data
));
90 memset(s
->io_buffer
, 0, 512);
91 p
= (uint16_t *)s
->io_buffer
;
92 put_le16(p
+ 0, 0x0040);
93 put_le16(p
+ 1, s
->cylinders
);
94 put_le16(p
+ 3, s
->heads
);
95 put_le16(p
+ 4, 512 * s
->sectors
); /* XXX: retired, remove ? */
96 put_le16(p
+ 5, 512); /* XXX: retired, remove ? */
97 put_le16(p
+ 6, s
->sectors
);
98 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
99 put_le16(p
+ 20, 3); /* XXX: retired, remove ? */
100 put_le16(p
+ 21, 512); /* cache size in sectors */
101 put_le16(p
+ 22, 4); /* ecc bytes */
102 padstr((char *)(p
+ 23), s
->version
, 8); /* firmware version */
103 padstr((char *)(p
+ 27), s
->drive_model_str
, 40); /* model */
104 #if MAX_MULT_SECTORS > 1
105 put_le16(p
+ 47, 0x8000 | MAX_MULT_SECTORS
);
107 put_le16(p
+ 48, 1); /* dword I/O */
108 put_le16(p
+ 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */
109 put_le16(p
+ 51, 0x200); /* PIO transfer cycle */
110 put_le16(p
+ 52, 0x200); /* DMA transfer cycle */
111 put_le16(p
+ 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */
112 put_le16(p
+ 54, s
->cylinders
);
113 put_le16(p
+ 55, s
->heads
);
114 put_le16(p
+ 56, s
->sectors
);
115 oldsize
= s
->cylinders
* s
->heads
* s
->sectors
;
116 put_le16(p
+ 57, oldsize
);
117 put_le16(p
+ 58, oldsize
>> 16);
119 put_le16(p
+ 59, 0x100 | s
->mult_sectors
);
120 put_le16(p
+ 60, s
->nb_sectors
);
121 put_le16(p
+ 61, s
->nb_sectors
>> 16);
122 put_le16(p
+ 62, 0x07); /* single word dma0-2 supported */
123 put_le16(p
+ 63, 0x07); /* mdma0-2 supported */
124 put_le16(p
+ 64, 0x03); /* pio3-4 supported */
125 put_le16(p
+ 65, 120);
126 put_le16(p
+ 66, 120);
127 put_le16(p
+ 67, 120);
128 put_le16(p
+ 68, 120);
129 if (dev
&& dev
->conf
.discard_granularity
) {
130 put_le16(p
+ 69, (1 << 14)); /* determinate TRIM behavior */
134 put_le16(p
+ 75, s
->ncq_queues
- 1);
136 put_le16(p
+ 76, (1 << 8));
139 put_le16(p
+ 80, 0xf0); /* ata3 -> ata6 supported */
140 put_le16(p
+ 81, 0x16); /* conforms to ata5 */
141 /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
142 put_le16(p
+ 82, (1 << 14) | (1 << 5) | 1);
143 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
144 put_le16(p
+ 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
145 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
147 put_le16(p
+ 84, (1 << 14) | (1 << 8) | 0);
149 put_le16(p
+ 84, (1 << 14) | 0);
151 /* 14 = NOP supported, 5=WCACHE enabled, 0=SMART feature set enabled */
152 if (bdrv_enable_write_cache(s
->bs
))
153 put_le16(p
+ 85, (1 << 14) | (1 << 5) | 1);
155 put_le16(p
+ 85, (1 << 14) | 1);
156 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
157 put_le16(p
+ 86, (1 << 13) | (1 <<12) | (1 << 10));
158 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
160 put_le16(p
+ 87, (1 << 14) | (1 << 8) | 0);
162 put_le16(p
+ 87, (1 << 14) | 0);
164 put_le16(p
+ 88, 0x3f | (1 << 13)); /* udma5 set and supported */
165 put_le16(p
+ 93, 1 | (1 << 14) | 0x2000);
166 put_le16(p
+ 100, s
->nb_sectors
);
167 put_le16(p
+ 101, s
->nb_sectors
>> 16);
168 put_le16(p
+ 102, s
->nb_sectors
>> 32);
169 put_le16(p
+ 103, s
->nb_sectors
>> 48);
171 if (dev
&& dev
->conf
.physical_block_size
)
172 put_le16(p
+ 106, 0x6000 | get_physical_block_exp(&dev
->conf
));
174 /* LE 16-bit words 111-108 contain 64-bit World Wide Name */
175 put_le16(p
+ 108, s
->wwn
>> 48);
176 put_le16(p
+ 109, s
->wwn
>> 32);
177 put_le16(p
+ 110, s
->wwn
>> 16);
178 put_le16(p
+ 111, s
->wwn
);
180 if (dev
&& dev
->conf
.discard_granularity
) {
181 put_le16(p
+ 169, 1); /* TRIM support */
184 memcpy(s
->identify_data
, p
, sizeof(s
->identify_data
));
188 static void ide_atapi_identify(IDEState
*s
)
192 if (s
->identify_set
) {
193 memcpy(s
->io_buffer
, s
->identify_data
, sizeof(s
->identify_data
));
197 memset(s
->io_buffer
, 0, 512);
198 p
= (uint16_t *)s
->io_buffer
;
199 /* Removable CDROM, 50us response, 12 byte packets */
200 put_le16(p
+ 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
201 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
202 put_le16(p
+ 20, 3); /* buffer type */
203 put_le16(p
+ 21, 512); /* cache size in sectors */
204 put_le16(p
+ 22, 4); /* ecc bytes */
205 padstr((char *)(p
+ 23), s
->version
, 8); /* firmware version */
206 padstr((char *)(p
+ 27), s
->drive_model_str
, 40); /* model */
207 put_le16(p
+ 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
209 put_le16(p
+ 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
210 put_le16(p
+ 53, 7); /* words 64-70, 54-58, 88 valid */
211 put_le16(p
+ 62, 7); /* single word dma0-2 supported */
212 put_le16(p
+ 63, 7); /* mdma0-2 supported */
214 put_le16(p
+ 49, 1 << 9); /* LBA supported, no DMA */
215 put_le16(p
+ 53, 3); /* words 64-70, 54-58 valid */
216 put_le16(p
+ 63, 0x103); /* DMA modes XXX: may be incorrect */
218 put_le16(p
+ 64, 3); /* pio3-4 supported */
219 put_le16(p
+ 65, 0xb4); /* minimum DMA multiword tx cycle time */
220 put_le16(p
+ 66, 0xb4); /* recommended DMA multiword tx cycle time */
221 put_le16(p
+ 67, 0x12c); /* minimum PIO cycle time without flow control */
222 put_le16(p
+ 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
224 put_le16(p
+ 71, 30); /* in ns */
225 put_le16(p
+ 72, 30); /* in ns */
228 put_le16(p
+ 75, s
->ncq_queues
- 1);
230 put_le16(p
+ 76, (1 << 8));
233 put_le16(p
+ 80, 0x1e); /* support up to ATA/ATAPI-4 */
235 put_le16(p
+ 88, 0x3f | (1 << 13)); /* udma5 set and supported */
237 memcpy(s
->identify_data
, p
, sizeof(s
->identify_data
));
241 static void ide_cfata_identify(IDEState
*s
)
246 p
= (uint16_t *) s
->identify_data
;
250 memset(p
, 0, sizeof(s
->identify_data
));
252 cur_sec
= s
->cylinders
* s
->heads
* s
->sectors
;
254 put_le16(p
+ 0, 0x848a); /* CF Storage Card signature */
255 put_le16(p
+ 1, s
->cylinders
); /* Default cylinders */
256 put_le16(p
+ 3, s
->heads
); /* Default heads */
257 put_le16(p
+ 6, s
->sectors
); /* Default sectors per track */
258 put_le16(p
+ 7, s
->nb_sectors
>> 16); /* Sectors per card */
259 put_le16(p
+ 8, s
->nb_sectors
); /* Sectors per card */
260 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
261 put_le16(p
+ 22, 0x0004); /* ECC bytes */
262 padstr((char *) (p
+ 23), s
->version
, 8); /* Firmware Revision */
263 padstr((char *) (p
+ 27), s
->drive_model_str
, 40);/* Model number */
264 #if MAX_MULT_SECTORS > 1
265 put_le16(p
+ 47, 0x8000 | MAX_MULT_SECTORS
);
267 put_le16(p
+ 47, 0x0000);
269 put_le16(p
+ 49, 0x0f00); /* Capabilities */
270 put_le16(p
+ 51, 0x0002); /* PIO cycle timing mode */
271 put_le16(p
+ 52, 0x0001); /* DMA cycle timing mode */
272 put_le16(p
+ 53, 0x0003); /* Translation params valid */
273 put_le16(p
+ 54, s
->cylinders
); /* Current cylinders */
274 put_le16(p
+ 55, s
->heads
); /* Current heads */
275 put_le16(p
+ 56, s
->sectors
); /* Current sectors */
276 put_le16(p
+ 57, cur_sec
); /* Current capacity */
277 put_le16(p
+ 58, cur_sec
>> 16); /* Current capacity */
278 if (s
->mult_sectors
) /* Multiple sector setting */
279 put_le16(p
+ 59, 0x100 | s
->mult_sectors
);
280 put_le16(p
+ 60, s
->nb_sectors
); /* Total LBA sectors */
281 put_le16(p
+ 61, s
->nb_sectors
>> 16); /* Total LBA sectors */
282 put_le16(p
+ 63, 0x0203); /* Multiword DMA capability */
283 put_le16(p
+ 64, 0x0001); /* Flow Control PIO support */
284 put_le16(p
+ 65, 0x0096); /* Min. Multiword DMA cycle */
285 put_le16(p
+ 66, 0x0096); /* Rec. Multiword DMA cycle */
286 put_le16(p
+ 68, 0x00b4); /* Min. PIO cycle time */
287 put_le16(p
+ 82, 0x400c); /* Command Set supported */
288 put_le16(p
+ 83, 0x7068); /* Command Set supported */
289 put_le16(p
+ 84, 0x4000); /* Features supported */
290 put_le16(p
+ 85, 0x000c); /* Command Set enabled */
291 put_le16(p
+ 86, 0x7044); /* Command Set enabled */
292 put_le16(p
+ 87, 0x4000); /* Features enabled */
293 put_le16(p
+ 91, 0x4060); /* Current APM level */
294 put_le16(p
+ 129, 0x0002); /* Current features option */
295 put_le16(p
+ 130, 0x0005); /* Reassigned sectors */
296 put_le16(p
+ 131, 0x0001); /* Initial power mode */
297 put_le16(p
+ 132, 0x0000); /* User signature */
298 put_le16(p
+ 160, 0x8100); /* Power requirement */
299 put_le16(p
+ 161, 0x8001); /* CF command set */
304 memcpy(s
->io_buffer
, p
, sizeof(s
->identify_data
));
307 static void ide_set_signature(IDEState
*s
)
309 s
->select
&= 0xf0; /* clear head */
313 if (s
->drive_kind
== IDE_CD
) {
325 typedef struct TrimAIOCB
{
326 BlockDriverAIOCB common
;
331 static void trim_aio_cancel(BlockDriverAIOCB
*acb
)
333 TrimAIOCB
*iocb
= container_of(acb
, TrimAIOCB
, common
);
335 qemu_bh_delete(iocb
->bh
);
337 qemu_aio_release(iocb
);
340 static AIOPool trim_aio_pool
= {
341 .aiocb_size
= sizeof(TrimAIOCB
),
342 .cancel
= trim_aio_cancel
,
345 static void ide_trim_bh_cb(void *opaque
)
347 TrimAIOCB
*iocb
= opaque
;
349 iocb
->common
.cb(iocb
->common
.opaque
, iocb
->ret
);
351 qemu_bh_delete(iocb
->bh
);
354 qemu_aio_release(iocb
);
357 BlockDriverAIOCB
*ide_issue_trim(BlockDriverState
*bs
,
358 int64_t sector_num
, QEMUIOVector
*qiov
, int nb_sectors
,
359 BlockDriverCompletionFunc
*cb
, void *opaque
)
364 iocb
= qemu_aio_get(&trim_aio_pool
, bs
, cb
, opaque
);
365 iocb
->bh
= qemu_bh_new(ide_trim_bh_cb
, iocb
);
368 for (j
= 0; j
< qiov
->niov
; j
++) {
369 uint64_t *buffer
= qiov
->iov
[j
].iov_base
;
371 for (i
= 0; i
< qiov
->iov
[j
].iov_len
/ 8; i
++) {
372 /* 6-byte LBA + 2-byte range per entry */
373 uint64_t entry
= le64_to_cpu(buffer
[i
]);
374 uint64_t sector
= entry
& 0x0000ffffffffffffULL
;
375 uint16_t count
= entry
>> 48;
381 ret
= bdrv_discard(bs
, sector
, count
);
388 qemu_bh_schedule(iocb
->bh
);
390 return &iocb
->common
;
393 static inline void ide_abort_command(IDEState
*s
)
395 s
->status
= READY_STAT
| ERR_STAT
;
399 /* prepare data transfer and tell what to do after */
400 void ide_transfer_start(IDEState
*s
, uint8_t *buf
, int size
,
401 EndTransferFunc
*end_transfer_func
)
403 s
->end_transfer_func
= end_transfer_func
;
405 s
->data_end
= buf
+ size
;
406 if (!(s
->status
& ERR_STAT
)) {
407 s
->status
|= DRQ_STAT
;
409 s
->bus
->dma
->ops
->start_transfer(s
->bus
->dma
);
412 void ide_transfer_stop(IDEState
*s
)
414 s
->end_transfer_func
= ide_transfer_stop
;
415 s
->data_ptr
= s
->io_buffer
;
416 s
->data_end
= s
->io_buffer
;
417 s
->status
&= ~DRQ_STAT
;
420 int64_t ide_get_sector(IDEState
*s
)
423 if (s
->select
& 0x40) {
426 sector_num
= ((s
->select
& 0x0f) << 24) | (s
->hcyl
<< 16) |
427 (s
->lcyl
<< 8) | s
->sector
;
429 sector_num
= ((int64_t)s
->hob_hcyl
<< 40) |
430 ((int64_t) s
->hob_lcyl
<< 32) |
431 ((int64_t) s
->hob_sector
<< 24) |
432 ((int64_t) s
->hcyl
<< 16) |
433 ((int64_t) s
->lcyl
<< 8) | s
->sector
;
436 sector_num
= ((s
->hcyl
<< 8) | s
->lcyl
) * s
->heads
* s
->sectors
+
437 (s
->select
& 0x0f) * s
->sectors
+ (s
->sector
- 1);
442 void ide_set_sector(IDEState
*s
, int64_t sector_num
)
445 if (s
->select
& 0x40) {
447 s
->select
= (s
->select
& 0xf0) | (sector_num
>> 24);
448 s
->hcyl
= (sector_num
>> 16);
449 s
->lcyl
= (sector_num
>> 8);
450 s
->sector
= (sector_num
);
452 s
->sector
= sector_num
;
453 s
->lcyl
= sector_num
>> 8;
454 s
->hcyl
= sector_num
>> 16;
455 s
->hob_sector
= sector_num
>> 24;
456 s
->hob_lcyl
= sector_num
>> 32;
457 s
->hob_hcyl
= sector_num
>> 40;
460 cyl
= sector_num
/ (s
->heads
* s
->sectors
);
461 r
= sector_num
% (s
->heads
* s
->sectors
);
464 s
->select
= (s
->select
& 0xf0) | ((r
/ s
->sectors
) & 0x0f);
465 s
->sector
= (r
% s
->sectors
) + 1;
469 static void ide_rw_error(IDEState
*s
) {
470 ide_abort_command(s
);
474 static void ide_sector_read_cb(void *opaque
, int ret
)
476 IDEState
*s
= opaque
;
480 s
->status
&= ~BUSY_STAT
;
482 bdrv_acct_done(s
->bs
, &s
->acct
);
484 if (ide_handle_rw_error(s
, -ret
, BM_STATUS_PIO_RETRY
|
485 BM_STATUS_RETRY_READ
)) {
491 if (n
> s
->req_nb_sectors
) {
492 n
= s
->req_nb_sectors
;
495 /* Allow the guest to read the io_buffer */
496 ide_transfer_start(s
, s
->io_buffer
, n
* BDRV_SECTOR_SIZE
, ide_sector_read
);
500 ide_set_sector(s
, ide_get_sector(s
) + n
);
504 void ide_sector_read(IDEState
*s
)
509 s
->status
= READY_STAT
| SEEK_STAT
;
510 s
->error
= 0; /* not needed by IDE spec, but needed by Windows */
511 sector_num
= ide_get_sector(s
);
515 ide_transfer_stop(s
);
519 s
->status
|= BUSY_STAT
;
521 if (n
> s
->req_nb_sectors
) {
522 n
= s
->req_nb_sectors
;
525 #if defined(DEBUG_IDE)
526 printf("sector=%" PRId64
"\n", sector_num
);
529 s
->iov
.iov_base
= s
->io_buffer
;
530 s
->iov
.iov_len
= n
* BDRV_SECTOR_SIZE
;
531 qemu_iovec_init_external(&s
->qiov
, &s
->iov
, 1);
533 bdrv_acct_start(s
->bs
, &s
->acct
, n
* BDRV_SECTOR_SIZE
, BDRV_ACCT_READ
);
534 s
->pio_aiocb
= bdrv_aio_readv(s
->bs
, sector_num
, &s
->qiov
, n
,
535 ide_sector_read_cb
, s
);
538 static void dma_buf_commit(IDEState
*s
)
540 qemu_sglist_destroy(&s
->sg
);
543 void ide_set_inactive(IDEState
*s
)
545 s
->bus
->dma
->aiocb
= NULL
;
546 s
->bus
->dma
->ops
->set_inactive(s
->bus
->dma
);
549 void ide_dma_error(IDEState
*s
)
551 ide_transfer_stop(s
);
553 s
->status
= READY_STAT
| ERR_STAT
;
558 static int ide_handle_rw_error(IDEState
*s
, int error
, int op
)
560 int is_read
= (op
& BM_STATUS_RETRY_READ
);
561 BlockErrorAction action
= bdrv_get_on_error(s
->bs
, is_read
);
563 if (action
== BLOCK_ERR_IGNORE
) {
564 bdrv_emit_qmp_error_event(s
->bs
, BDRV_ACTION_IGNORE
, is_read
);
568 if ((error
== ENOSPC
&& action
== BLOCK_ERR_STOP_ENOSPC
)
569 || action
== BLOCK_ERR_STOP_ANY
) {
570 s
->bus
->dma
->ops
->set_unit(s
->bus
->dma
, s
->unit
);
571 s
->bus
->error_status
= op
;
572 bdrv_emit_qmp_error_event(s
->bs
, BDRV_ACTION_STOP
, is_read
);
573 vm_stop(RUN_STATE_IO_ERROR
);
574 bdrv_iostatus_set_err(s
->bs
, error
);
576 if (op
& BM_STATUS_DMA_RETRY
) {
582 bdrv_emit_qmp_error_event(s
->bs
, BDRV_ACTION_REPORT
, is_read
);
588 void ide_dma_cb(void *opaque
, int ret
)
590 IDEState
*s
= opaque
;
595 int op
= BM_STATUS_DMA_RETRY
;
597 if (s
->dma_cmd
== IDE_DMA_READ
)
598 op
|= BM_STATUS_RETRY_READ
;
599 else if (s
->dma_cmd
== IDE_DMA_TRIM
)
600 op
|= BM_STATUS_RETRY_TRIM
;
602 if (ide_handle_rw_error(s
, -ret
, op
)) {
607 n
= s
->io_buffer_size
>> 9;
608 sector_num
= ide_get_sector(s
);
612 ide_set_sector(s
, sector_num
);
616 /* end of transfer ? */
617 if (s
->nsector
== 0) {
618 s
->status
= READY_STAT
| SEEK_STAT
;
623 /* launch next transfer */
625 s
->io_buffer_index
= 0;
626 s
->io_buffer_size
= n
* 512;
627 if (s
->bus
->dma
->ops
->prepare_buf(s
->bus
->dma
, ide_cmd_is_read(s
)) == 0) {
628 /* The PRDs were too short. Reset the Active bit, but don't raise an
634 printf("ide_dma_cb: sector_num=%" PRId64
" n=%d, cmd_cmd=%d\n",
635 sector_num
, n
, s
->dma_cmd
);
638 switch (s
->dma_cmd
) {
640 s
->bus
->dma
->aiocb
= dma_bdrv_read(s
->bs
, &s
->sg
, sector_num
,
644 s
->bus
->dma
->aiocb
= dma_bdrv_write(s
->bs
, &s
->sg
, sector_num
,
648 s
->bus
->dma
->aiocb
= dma_bdrv_io(s
->bs
, &s
->sg
, sector_num
,
649 ide_issue_trim
, ide_dma_cb
, s
,
650 DMA_DIRECTION_TO_DEVICE
);
656 if (s
->dma_cmd
== IDE_DMA_READ
|| s
->dma_cmd
== IDE_DMA_WRITE
) {
657 bdrv_acct_done(s
->bs
, &s
->acct
);
662 static void ide_sector_start_dma(IDEState
*s
, enum ide_dma_cmd dma_cmd
)
664 s
->status
= READY_STAT
| SEEK_STAT
| DRQ_STAT
| BUSY_STAT
;
665 s
->io_buffer_index
= 0;
666 s
->io_buffer_size
= 0;
667 s
->dma_cmd
= dma_cmd
;
671 bdrv_acct_start(s
->bs
, &s
->acct
, s
->nsector
* BDRV_SECTOR_SIZE
,
675 bdrv_acct_start(s
->bs
, &s
->acct
, s
->nsector
* BDRV_SECTOR_SIZE
,
682 s
->bus
->dma
->ops
->start_dma(s
->bus
->dma
, s
, ide_dma_cb
);
685 static void ide_sector_write_timer_cb(void *opaque
)
687 IDEState
*s
= opaque
;
691 static void ide_sector_write_cb(void *opaque
, int ret
)
693 IDEState
*s
= opaque
;
696 bdrv_acct_done(s
->bs
, &s
->acct
);
699 s
->status
&= ~BUSY_STAT
;
702 if (ide_handle_rw_error(s
, -ret
, BM_STATUS_PIO_RETRY
)) {
708 if (n
> s
->req_nb_sectors
) {
709 n
= s
->req_nb_sectors
;
712 if (s
->nsector
== 0) {
713 /* no more sectors to write */
714 ide_transfer_stop(s
);
717 if (n1
> s
->req_nb_sectors
) {
718 n1
= s
->req_nb_sectors
;
720 ide_transfer_start(s
, s
->io_buffer
, n1
* BDRV_SECTOR_SIZE
,
723 ide_set_sector(s
, ide_get_sector(s
) + n
);
725 if (win2k_install_hack
&& ((++s
->irq_count
% 16) == 0)) {
726 /* It seems there is a bug in the Windows 2000 installer HDD
727 IDE driver which fills the disk with empty logs when the
728 IDE write IRQ comes too early. This hack tries to correct
729 that at the expense of slower write performances. Use this
730 option _only_ to install Windows 2000. You must disable it
732 qemu_mod_timer(s
->sector_write_timer
,
733 qemu_get_clock_ns(vm_clock
) + (get_ticks_per_sec() / 1000));
739 void ide_sector_write(IDEState
*s
)
744 s
->status
= READY_STAT
| SEEK_STAT
| BUSY_STAT
;
745 sector_num
= ide_get_sector(s
);
746 #if defined(DEBUG_IDE)
747 printf("sector=%" PRId64
"\n", sector_num
);
750 if (n
> s
->req_nb_sectors
) {
751 n
= s
->req_nb_sectors
;
754 s
->iov
.iov_base
= s
->io_buffer
;
755 s
->iov
.iov_len
= n
* BDRV_SECTOR_SIZE
;
756 qemu_iovec_init_external(&s
->qiov
, &s
->iov
, 1);
758 bdrv_acct_start(s
->bs
, &s
->acct
, n
* BDRV_SECTOR_SIZE
, BDRV_ACCT_READ
);
759 s
->pio_aiocb
= bdrv_aio_writev(s
->bs
, sector_num
, &s
->qiov
, n
,
760 ide_sector_write_cb
, s
);
763 static void ide_flush_cb(void *opaque
, int ret
)
765 IDEState
*s
= opaque
;
768 /* XXX: What sector number to set here? */
769 if (ide_handle_rw_error(s
, -ret
, BM_STATUS_RETRY_FLUSH
)) {
774 bdrv_acct_done(s
->bs
, &s
->acct
);
775 s
->status
= READY_STAT
| SEEK_STAT
;
779 void ide_flush_cache(IDEState
*s
)
786 bdrv_acct_start(s
->bs
, &s
->acct
, 0, BDRV_ACCT_FLUSH
);
787 bdrv_aio_flush(s
->bs
, ide_flush_cb
, s
);
790 static void ide_cfata_metadata_inquiry(IDEState
*s
)
795 p
= (uint16_t *) s
->io_buffer
;
797 spd
= ((s
->mdata_size
- 1) >> 9) + 1;
799 put_le16(p
+ 0, 0x0001); /* Data format revision */
800 put_le16(p
+ 1, 0x0000); /* Media property: silicon */
801 put_le16(p
+ 2, s
->media_changed
); /* Media status */
802 put_le16(p
+ 3, s
->mdata_size
& 0xffff); /* Capacity in bytes (low) */
803 put_le16(p
+ 4, s
->mdata_size
>> 16); /* Capacity in bytes (high) */
804 put_le16(p
+ 5, spd
& 0xffff); /* Sectors per device (low) */
805 put_le16(p
+ 6, spd
>> 16); /* Sectors per device (high) */
808 static void ide_cfata_metadata_read(IDEState
*s
)
812 if (((s
->hcyl
<< 16) | s
->lcyl
) << 9 > s
->mdata_size
+ 2) {
813 s
->status
= ERR_STAT
;
818 p
= (uint16_t *) s
->io_buffer
;
821 put_le16(p
+ 0, s
->media_changed
); /* Media status */
822 memcpy(p
+ 1, s
->mdata_storage
+ (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
823 MIN(MIN(s
->mdata_size
- (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
824 s
->nsector
<< 9), 0x200 - 2));
827 static void ide_cfata_metadata_write(IDEState
*s
)
829 if (((s
->hcyl
<< 16) | s
->lcyl
) << 9 > s
->mdata_size
+ 2) {
830 s
->status
= ERR_STAT
;
835 s
->media_changed
= 0;
837 memcpy(s
->mdata_storage
+ (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
839 MIN(MIN(s
->mdata_size
- (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
840 s
->nsector
<< 9), 0x200 - 2));
843 /* called when the inserted state of the media has changed */
844 static void ide_cd_change_cb(void *opaque
, bool load
)
846 IDEState
*s
= opaque
;
849 s
->tray_open
= !load
;
850 bdrv_get_geometry(s
->bs
, &nb_sectors
);
851 s
->nb_sectors
= nb_sectors
;
854 * First indicate to the guest that a CD has been removed. That's
855 * done on the next command the guest sends us.
857 * Then we set UNIT_ATTENTION, by which the guest will
858 * detect a new CD in the drive. See ide_atapi_cmd() for details.
860 s
->cdrom_changed
= 1;
861 s
->events
.new_media
= true;
862 s
->events
.eject_request
= false;
866 static void ide_cd_eject_request_cb(void *opaque
, bool force
)
868 IDEState
*s
= opaque
;
870 s
->events
.eject_request
= true;
872 s
->tray_locked
= false;
877 static void ide_cmd_lba48_transform(IDEState
*s
, int lba48
)
881 /* handle the 'magic' 0 nsector count conversion here. to avoid
882 * fiddling with the rest of the read logic, we just store the
883 * full sector count in ->nsector and ignore ->hob_nsector from now
889 if (!s
->nsector
&& !s
->hob_nsector
)
893 int hi
= s
->hob_nsector
;
895 s
->nsector
= (hi
<< 8) | lo
;
900 static void ide_clear_hob(IDEBus
*bus
)
902 /* any write clears HOB high bit of device control register */
903 bus
->ifs
[0].select
&= ~(1 << 7);
904 bus
->ifs
[1].select
&= ~(1 << 7);
907 void ide_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
)
909 IDEBus
*bus
= opaque
;
912 printf("IDE: write addr=0x%x val=0x%02x\n", addr
, val
);
917 /* ignore writes to command block while busy with previous command */
918 if (addr
!= 7 && (idebus_active_if(bus
)->status
& (BUSY_STAT
|DRQ_STAT
)))
926 /* NOTE: data is written to the two drives */
927 bus
->ifs
[0].hob_feature
= bus
->ifs
[0].feature
;
928 bus
->ifs
[1].hob_feature
= bus
->ifs
[1].feature
;
929 bus
->ifs
[0].feature
= val
;
930 bus
->ifs
[1].feature
= val
;
934 bus
->ifs
[0].hob_nsector
= bus
->ifs
[0].nsector
;
935 bus
->ifs
[1].hob_nsector
= bus
->ifs
[1].nsector
;
936 bus
->ifs
[0].nsector
= val
;
937 bus
->ifs
[1].nsector
= val
;
941 bus
->ifs
[0].hob_sector
= bus
->ifs
[0].sector
;
942 bus
->ifs
[1].hob_sector
= bus
->ifs
[1].sector
;
943 bus
->ifs
[0].sector
= val
;
944 bus
->ifs
[1].sector
= val
;
948 bus
->ifs
[0].hob_lcyl
= bus
->ifs
[0].lcyl
;
949 bus
->ifs
[1].hob_lcyl
= bus
->ifs
[1].lcyl
;
950 bus
->ifs
[0].lcyl
= val
;
951 bus
->ifs
[1].lcyl
= val
;
955 bus
->ifs
[0].hob_hcyl
= bus
->ifs
[0].hcyl
;
956 bus
->ifs
[1].hob_hcyl
= bus
->ifs
[1].hcyl
;
957 bus
->ifs
[0].hcyl
= val
;
958 bus
->ifs
[1].hcyl
= val
;
961 /* FIXME: HOB readback uses bit 7 */
962 bus
->ifs
[0].select
= (val
& ~0x10) | 0xa0;
963 bus
->ifs
[1].select
= (val
| 0x10) | 0xa0;
965 bus
->unit
= (val
>> 4) & 1;
970 ide_exec_cmd(bus
, val
);
975 #define HD_OK (1u << IDE_HD)
976 #define CD_OK (1u << IDE_CD)
977 #define CFA_OK (1u << IDE_CFATA)
978 #define HD_CFA_OK (HD_OK | CFA_OK)
979 #define ALL_OK (HD_OK | CD_OK | CFA_OK)
981 /* See ACS-2 T13/2015-D Table B.2 Command codes */
982 static const uint8_t ide_cmd_table
[0x100] = {
983 /* NOP not implemented, mandatory for CD */
984 [CFA_REQ_EXT_ERROR_CODE
] = CFA_OK
,
986 [WIN_DEVICE_RESET
] = CD_OK
,
987 [WIN_RECAL
] = HD_CFA_OK
,
989 [WIN_READ_ONCE
] = ALL_OK
,
990 [WIN_READ_EXT
] = HD_CFA_OK
,
991 [WIN_READDMA_EXT
] = HD_CFA_OK
,
992 [WIN_READ_NATIVE_MAX_EXT
] = HD_CFA_OK
,
993 [WIN_MULTREAD_EXT
] = HD_CFA_OK
,
994 [WIN_WRITE
] = HD_CFA_OK
,
995 [WIN_WRITE_ONCE
] = HD_CFA_OK
,
996 [WIN_WRITE_EXT
] = HD_CFA_OK
,
997 [WIN_WRITEDMA_EXT
] = HD_CFA_OK
,
998 [CFA_WRITE_SECT_WO_ERASE
] = CFA_OK
,
999 [WIN_MULTWRITE_EXT
] = HD_CFA_OK
,
1000 [WIN_WRITE_VERIFY
] = HD_CFA_OK
,
1001 [WIN_VERIFY
] = HD_CFA_OK
,
1002 [WIN_VERIFY_ONCE
] = HD_CFA_OK
,
1003 [WIN_VERIFY_EXT
] = HD_CFA_OK
,
1004 [WIN_SEEK
] = HD_CFA_OK
,
1005 [CFA_TRANSLATE_SECTOR
] = CFA_OK
,
1006 [WIN_DIAGNOSE
] = ALL_OK
,
1007 [WIN_SPECIFY
] = HD_CFA_OK
,
1008 [WIN_STANDBYNOW2
] = ALL_OK
,
1009 [WIN_IDLEIMMEDIATE2
] = ALL_OK
,
1010 [WIN_STANDBY2
] = ALL_OK
,
1011 [WIN_SETIDLE2
] = ALL_OK
,
1012 [WIN_CHECKPOWERMODE2
] = ALL_OK
,
1013 [WIN_SLEEPNOW2
] = ALL_OK
,
1014 [WIN_PACKETCMD
] = CD_OK
,
1015 [WIN_PIDENTIFY
] = CD_OK
,
1016 [WIN_SMART
] = HD_CFA_OK
,
1017 [CFA_ACCESS_METADATA_STORAGE
] = CFA_OK
,
1018 [CFA_ERASE_SECTORS
] = CFA_OK
,
1019 [WIN_MULTREAD
] = HD_CFA_OK
,
1020 [WIN_MULTWRITE
] = HD_CFA_OK
,
1021 [WIN_SETMULT
] = HD_CFA_OK
,
1022 [WIN_READDMA
] = HD_CFA_OK
,
1023 [WIN_READDMA_ONCE
] = HD_CFA_OK
,
1024 [WIN_WRITEDMA
] = HD_CFA_OK
,
1025 [WIN_WRITEDMA_ONCE
] = HD_CFA_OK
,
1026 [CFA_WRITE_MULTI_WO_ERASE
] = CFA_OK
,
1027 [WIN_STANDBYNOW1
] = ALL_OK
,
1028 [WIN_IDLEIMMEDIATE
] = ALL_OK
,
1029 [WIN_STANDBY
] = ALL_OK
,
1030 [WIN_SETIDLE1
] = ALL_OK
,
1031 [WIN_CHECKPOWERMODE1
] = ALL_OK
,
1032 [WIN_SLEEPNOW1
] = ALL_OK
,
1033 [WIN_FLUSH_CACHE
] = ALL_OK
,
1034 [WIN_FLUSH_CACHE_EXT
] = HD_CFA_OK
,
1035 [WIN_IDENTIFY
] = ALL_OK
,
1036 [WIN_SETFEATURES
] = ALL_OK
,
1037 [IBM_SENSE_CONDITION
] = CFA_OK
,
1038 [CFA_WEAR_LEVEL
] = CFA_OK
,
1039 [WIN_READ_NATIVE_MAX
] = ALL_OK
,
1042 static bool ide_cmd_permitted(IDEState
*s
, uint32_t cmd
)
1044 return cmd
< ARRAY_SIZE(ide_cmd_table
)
1045 && (ide_cmd_table
[cmd
] & (1u << s
->drive_kind
));
1048 void ide_exec_cmd(IDEBus
*bus
, uint32_t val
)
1054 #if defined(DEBUG_IDE)
1055 printf("ide: CMD=%02x\n", val
);
1057 s
= idebus_active_if(bus
);
1058 /* ignore commands to non existent slave */
1059 if (s
!= bus
->ifs
&& !s
->bs
)
1062 /* Only DEVICE RESET is allowed while BSY or/and DRQ are set */
1063 if ((s
->status
& (BUSY_STAT
|DRQ_STAT
)) && val
!= WIN_DEVICE_RESET
)
1066 if (!ide_cmd_permitted(s
, val
)) {
1072 switch (s
->feature
) {
1077 ide_sector_start_dma(s
, IDE_DMA_TRIM
);
1084 if (s
->bs
&& s
->drive_kind
!= IDE_CD
) {
1085 if (s
->drive_kind
!= IDE_CFATA
)
1088 ide_cfata_identify(s
);
1089 s
->status
= READY_STAT
| SEEK_STAT
;
1090 ide_transfer_start(s
, s
->io_buffer
, 512, ide_transfer_stop
);
1092 if (s
->drive_kind
== IDE_CD
) {
1093 ide_set_signature(s
);
1095 ide_abort_command(s
);
1097 ide_set_irq(s
->bus
);
1102 s
->status
= READY_STAT
| SEEK_STAT
;
1103 ide_set_irq(s
->bus
);
1106 if (s
->drive_kind
== IDE_CFATA
&& s
->nsector
== 0) {
1107 /* Disable Read and Write Multiple */
1108 s
->mult_sectors
= 0;
1109 s
->status
= READY_STAT
| SEEK_STAT
;
1110 } else if ((s
->nsector
& 0xff) != 0 &&
1111 ((s
->nsector
& 0xff) > MAX_MULT_SECTORS
||
1112 (s
->nsector
& (s
->nsector
- 1)) != 0)) {
1113 ide_abort_command(s
);
1115 s
->mult_sectors
= s
->nsector
& 0xff;
1116 s
->status
= READY_STAT
| SEEK_STAT
;
1118 ide_set_irq(s
->bus
);
1120 case WIN_VERIFY_EXT
:
1123 case WIN_VERIFY_ONCE
:
1124 /* do sector number check ? */
1125 ide_cmd_lba48_transform(s
, lba48
);
1126 s
->status
= READY_STAT
| SEEK_STAT
;
1127 ide_set_irq(s
->bus
);
1133 if (s
->drive_kind
== IDE_CD
) {
1134 ide_set_signature(s
); /* odd, but ATA4 8.27.5.2 requires it */
1140 ide_cmd_lba48_transform(s
, lba48
);
1141 s
->req_nb_sectors
= 1;
1147 case WIN_WRITE_ONCE
:
1148 case CFA_WRITE_SECT_WO_ERASE
:
1149 case WIN_WRITE_VERIFY
:
1153 ide_cmd_lba48_transform(s
, lba48
);
1155 s
->status
= SEEK_STAT
| READY_STAT
;
1156 s
->req_nb_sectors
= 1;
1157 ide_transfer_start(s
, s
->io_buffer
, 512, ide_sector_write
);
1158 s
->media_changed
= 1;
1160 case WIN_MULTREAD_EXT
:
1166 if (!s
->mult_sectors
) {
1169 ide_cmd_lba48_transform(s
, lba48
);
1170 s
->req_nb_sectors
= s
->mult_sectors
;
1173 case WIN_MULTWRITE_EXT
:
1176 case CFA_WRITE_MULTI_WO_ERASE
:
1180 if (!s
->mult_sectors
) {
1183 ide_cmd_lba48_transform(s
, lba48
);
1185 s
->status
= SEEK_STAT
| READY_STAT
;
1186 s
->req_nb_sectors
= s
->mult_sectors
;
1188 if (n
> s
->req_nb_sectors
)
1189 n
= s
->req_nb_sectors
;
1190 ide_transfer_start(s
, s
->io_buffer
, 512 * n
, ide_sector_write
);
1191 s
->media_changed
= 1;
1193 case WIN_READDMA_EXT
:
1196 case WIN_READDMA_ONCE
:
1200 ide_cmd_lba48_transform(s
, lba48
);
1201 ide_sector_start_dma(s
, IDE_DMA_READ
);
1203 case WIN_WRITEDMA_EXT
:
1206 case WIN_WRITEDMA_ONCE
:
1210 ide_cmd_lba48_transform(s
, lba48
);
1211 ide_sector_start_dma(s
, IDE_DMA_WRITE
);
1212 s
->media_changed
= 1;
1214 case WIN_READ_NATIVE_MAX_EXT
:
1216 case WIN_READ_NATIVE_MAX
:
1217 ide_cmd_lba48_transform(s
, lba48
);
1218 ide_set_sector(s
, s
->nb_sectors
- 1);
1219 s
->status
= READY_STAT
| SEEK_STAT
;
1220 ide_set_irq(s
->bus
);
1222 case WIN_CHECKPOWERMODE1
:
1223 case WIN_CHECKPOWERMODE2
:
1225 s
->nsector
= 0xff; /* device active or idle */
1226 s
->status
= READY_STAT
| SEEK_STAT
;
1227 ide_set_irq(s
->bus
);
1229 case WIN_SETFEATURES
:
1232 /* XXX: valid for CDROM ? */
1233 switch(s
->feature
) {
1234 case 0xcc: /* reverting to power-on defaults enable */
1235 case 0x66: /* reverting to power-on defaults disable */
1236 case 0x02: /* write cache enable */
1237 case 0x82: /* write cache disable */
1238 case 0xaa: /* read look-ahead enable */
1239 case 0x55: /* read look-ahead disable */
1240 case 0x05: /* set advanced power management mode */
1241 case 0x85: /* disable advanced power management mode */
1242 case 0x69: /* NOP */
1243 case 0x67: /* NOP */
1244 case 0x96: /* NOP */
1245 case 0x9a: /* NOP */
1246 case 0x42: /* enable Automatic Acoustic Mode */
1247 case 0xc2: /* disable Automatic Acoustic Mode */
1248 s
->status
= READY_STAT
| SEEK_STAT
;
1249 ide_set_irq(s
->bus
);
1251 case 0x03: { /* set transfer mode */
1252 uint8_t val
= s
->nsector
& 0x07;
1253 uint16_t *identify_data
= (uint16_t *)s
->identify_data
;
1255 switch (s
->nsector
>> 3) {
1256 case 0x00: /* pio default */
1257 case 0x01: /* pio mode */
1258 put_le16(identify_data
+ 62,0x07);
1259 put_le16(identify_data
+ 63,0x07);
1260 put_le16(identify_data
+ 88,0x3f);
1262 case 0x02: /* sigle word dma mode*/
1263 put_le16(identify_data
+ 62,0x07 | (1 << (val
+ 8)));
1264 put_le16(identify_data
+ 63,0x07);
1265 put_le16(identify_data
+ 88,0x3f);
1267 case 0x04: /* mdma mode */
1268 put_le16(identify_data
+ 62,0x07);
1269 put_le16(identify_data
+ 63,0x07 | (1 << (val
+ 8)));
1270 put_le16(identify_data
+ 88,0x3f);
1272 case 0x08: /* udma mode */
1273 put_le16(identify_data
+ 62,0x07);
1274 put_le16(identify_data
+ 63,0x07);
1275 put_le16(identify_data
+ 88,0x3f | (1 << (val
+ 8)));
1280 s
->status
= READY_STAT
| SEEK_STAT
;
1281 ide_set_irq(s
->bus
);
1288 case WIN_FLUSH_CACHE
:
1289 case WIN_FLUSH_CACHE_EXT
:
1294 case WIN_STANDBYNOW1
:
1295 case WIN_STANDBYNOW2
:
1296 case WIN_IDLEIMMEDIATE
:
1297 case WIN_IDLEIMMEDIATE2
:
1302 s
->status
= READY_STAT
;
1303 ide_set_irq(s
->bus
);
1306 /* XXX: Check that seek is within bounds */
1307 s
->status
= READY_STAT
| SEEK_STAT
;
1308 ide_set_irq(s
->bus
);
1310 /* ATAPI commands */
1312 ide_atapi_identify(s
);
1313 s
->status
= READY_STAT
| SEEK_STAT
;
1314 ide_transfer_start(s
, s
->io_buffer
, 512, ide_transfer_stop
);
1315 ide_set_irq(s
->bus
);
1318 ide_set_signature(s
);
1319 if (s
->drive_kind
== IDE_CD
)
1320 s
->status
= 0; /* ATAPI spec (v6) section 9.10 defines packet
1321 * devices to return a clear status register
1322 * with READY_STAT *not* set. */
1324 s
->status
= READY_STAT
| SEEK_STAT
;
1325 s
->error
= 0x01; /* Device 0 passed, Device 1 passed or not
1328 ide_set_irq(s
->bus
);
1330 case WIN_DEVICE_RESET
:
1331 ide_set_signature(s
);
1332 s
->status
= 0x00; /* NOTE: READY is _not_ set */
1336 /* overlapping commands not supported */
1337 if (s
->feature
& 0x02)
1339 s
->status
= READY_STAT
| SEEK_STAT
;
1340 s
->atapi_dma
= s
->feature
& 1;
1342 ide_transfer_start(s
, s
->io_buffer
, ATAPI_PACKET_SIZE
,
1345 /* CF-ATA commands */
1346 case CFA_REQ_EXT_ERROR_CODE
:
1347 s
->error
= 0x09; /* miscellaneous error */
1348 s
->status
= READY_STAT
| SEEK_STAT
;
1349 ide_set_irq(s
->bus
);
1351 case CFA_ERASE_SECTORS
:
1352 case CFA_WEAR_LEVEL
:
1353 if (val
== CFA_WEAR_LEVEL
)
1355 if (val
== CFA_ERASE_SECTORS
)
1356 s
->media_changed
= 1;
1358 s
->status
= READY_STAT
| SEEK_STAT
;
1359 ide_set_irq(s
->bus
);
1361 case CFA_TRANSLATE_SECTOR
:
1363 s
->status
= READY_STAT
| SEEK_STAT
;
1364 memset(s
->io_buffer
, 0, 0x200);
1365 s
->io_buffer
[0x00] = s
->hcyl
; /* Cyl MSB */
1366 s
->io_buffer
[0x01] = s
->lcyl
; /* Cyl LSB */
1367 s
->io_buffer
[0x02] = s
->select
; /* Head */
1368 s
->io_buffer
[0x03] = s
->sector
; /* Sector */
1369 s
->io_buffer
[0x04] = ide_get_sector(s
) >> 16; /* LBA MSB */
1370 s
->io_buffer
[0x05] = ide_get_sector(s
) >> 8; /* LBA */
1371 s
->io_buffer
[0x06] = ide_get_sector(s
) >> 0; /* LBA LSB */
1372 s
->io_buffer
[0x13] = 0x00; /* Erase flag */
1373 s
->io_buffer
[0x18] = 0x00; /* Hot count */
1374 s
->io_buffer
[0x19] = 0x00; /* Hot count */
1375 s
->io_buffer
[0x1a] = 0x01; /* Hot count */
1376 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1377 ide_set_irq(s
->bus
);
1379 case CFA_ACCESS_METADATA_STORAGE
:
1380 switch (s
->feature
) {
1381 case 0x02: /* Inquiry Metadata Storage */
1382 ide_cfata_metadata_inquiry(s
);
1384 case 0x03: /* Read Metadata Storage */
1385 ide_cfata_metadata_read(s
);
1387 case 0x04: /* Write Metadata Storage */
1388 ide_cfata_metadata_write(s
);
1393 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1394 s
->status
= 0x00; /* NOTE: READY is _not_ set */
1395 ide_set_irq(s
->bus
);
1397 case IBM_SENSE_CONDITION
:
1398 switch (s
->feature
) {
1399 case 0x01: /* sense temperature in device */
1400 s
->nsector
= 0x50; /* +20 C */
1405 s
->status
= READY_STAT
| SEEK_STAT
;
1406 ide_set_irq(s
->bus
);
1410 if (s
->hcyl
!= 0xc2 || s
->lcyl
!= 0x4f)
1412 if (!s
->smart_enabled
&& s
->feature
!= SMART_ENABLE
)
1414 switch (s
->feature
) {
1416 s
->smart_enabled
= 0;
1417 s
->status
= READY_STAT
| SEEK_STAT
;
1418 ide_set_irq(s
->bus
);
1421 s
->smart_enabled
= 1;
1422 s
->status
= READY_STAT
| SEEK_STAT
;
1423 ide_set_irq(s
->bus
);
1425 case SMART_ATTR_AUTOSAVE
:
1426 switch (s
->sector
) {
1428 s
->smart_autosave
= 0;
1431 s
->smart_autosave
= 1;
1436 s
->status
= READY_STAT
| SEEK_STAT
;
1437 ide_set_irq(s
->bus
);
1440 if (!s
->smart_errors
) {
1447 s
->status
= READY_STAT
| SEEK_STAT
;
1448 ide_set_irq(s
->bus
);
1450 case SMART_READ_THRESH
:
1451 memset(s
->io_buffer
, 0, 0x200);
1452 s
->io_buffer
[0] = 0x01; /* smart struct version */
1453 for (n
=0; n
<30; n
++) {
1454 if (smart_attributes
[n
][0] == 0)
1456 s
->io_buffer
[2+0+(n
*12)] = smart_attributes
[n
][0];
1457 s
->io_buffer
[2+1+(n
*12)] = smart_attributes
[n
][11];
1459 for (n
=0; n
<511; n
++) /* checksum */
1460 s
->io_buffer
[511] += s
->io_buffer
[n
];
1461 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1462 s
->status
= READY_STAT
| SEEK_STAT
;
1463 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1464 ide_set_irq(s
->bus
);
1466 case SMART_READ_DATA
:
1467 memset(s
->io_buffer
, 0, 0x200);
1468 s
->io_buffer
[0] = 0x01; /* smart struct version */
1469 for (n
=0; n
<30; n
++) {
1470 if (smart_attributes
[n
][0] == 0) {
1474 for(i
= 0; i
< 11; i
++) {
1475 s
->io_buffer
[2+i
+(n
*12)] = smart_attributes
[n
][i
];
1478 s
->io_buffer
[362] = 0x02 | (s
->smart_autosave
?0x80:0x00);
1479 if (s
->smart_selftest_count
== 0) {
1480 s
->io_buffer
[363] = 0;
1483 s
->smart_selftest_data
[3 +
1484 (s
->smart_selftest_count
- 1) *
1487 s
->io_buffer
[364] = 0x20;
1488 s
->io_buffer
[365] = 0x01;
1489 /* offline data collection capacity: execute + self-test*/
1490 s
->io_buffer
[367] = (1<<4 | 1<<3 | 1);
1491 s
->io_buffer
[368] = 0x03; /* smart capability (1) */
1492 s
->io_buffer
[369] = 0x00; /* smart capability (2) */
1493 s
->io_buffer
[370] = 0x01; /* error logging supported */
1494 s
->io_buffer
[372] = 0x02; /* minutes for poll short test */
1495 s
->io_buffer
[373] = 0x36; /* minutes for poll ext test */
1496 s
->io_buffer
[374] = 0x01; /* minutes for poll conveyance */
1498 for (n
=0; n
<511; n
++)
1499 s
->io_buffer
[511] += s
->io_buffer
[n
];
1500 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1501 s
->status
= READY_STAT
| SEEK_STAT
;
1502 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1503 ide_set_irq(s
->bus
);
1505 case SMART_READ_LOG
:
1506 switch (s
->sector
) {
1507 case 0x01: /* summary smart error log */
1508 memset(s
->io_buffer
, 0, 0x200);
1509 s
->io_buffer
[0] = 0x01;
1510 s
->io_buffer
[1] = 0x00; /* no error entries */
1511 s
->io_buffer
[452] = s
->smart_errors
& 0xff;
1512 s
->io_buffer
[453] = (s
->smart_errors
& 0xff00) >> 8;
1514 for (n
=0; n
<511; n
++)
1515 s
->io_buffer
[511] += s
->io_buffer
[n
];
1516 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1518 case 0x06: /* smart self test log */
1519 memset(s
->io_buffer
, 0, 0x200);
1520 s
->io_buffer
[0] = 0x01;
1521 if (s
->smart_selftest_count
== 0) {
1522 s
->io_buffer
[508] = 0;
1524 s
->io_buffer
[508] = s
->smart_selftest_count
;
1525 for (n
=2; n
<506; n
++)
1526 s
->io_buffer
[n
] = s
->smart_selftest_data
[n
];
1528 for (n
=0; n
<511; n
++)
1529 s
->io_buffer
[511] += s
->io_buffer
[n
];
1530 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1535 s
->status
= READY_STAT
| SEEK_STAT
;
1536 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1537 ide_set_irq(s
->bus
);
1539 case SMART_EXECUTE_OFFLINE
:
1540 switch (s
->sector
) {
1541 case 0: /* off-line routine */
1542 case 1: /* short self test */
1543 case 2: /* extended self test */
1544 s
->smart_selftest_count
++;
1545 if(s
->smart_selftest_count
> 21)
1546 s
->smart_selftest_count
= 0;
1547 n
= 2 + (s
->smart_selftest_count
- 1) * 24;
1548 s
->smart_selftest_data
[n
] = s
->sector
;
1549 s
->smart_selftest_data
[n
+1] = 0x00; /* OK and finished */
1550 s
->smart_selftest_data
[n
+2] = 0x34; /* hour count lsb */
1551 s
->smart_selftest_data
[n
+3] = 0x12; /* hour count msb */
1552 s
->status
= READY_STAT
| SEEK_STAT
;
1553 ide_set_irq(s
->bus
);
1564 /* should not be reachable */
1566 ide_abort_command(s
);
1567 ide_set_irq(s
->bus
);
1572 uint32_t ide_ioport_read(void *opaque
, uint32_t addr1
)
1574 IDEBus
*bus
= opaque
;
1575 IDEState
*s
= idebus_active_if(bus
);
1580 /* FIXME: HOB readback uses bit 7, but it's always set right now */
1581 //hob = s->select & (1 << 7);
1588 if ((!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
) ||
1589 (s
!= bus
->ifs
&& !s
->bs
))
1594 ret
= s
->hob_feature
;
1597 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1600 ret
= s
->nsector
& 0xff;
1602 ret
= s
->hob_nsector
;
1605 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1610 ret
= s
->hob_sector
;
1613 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1621 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1629 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1636 if ((!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
) ||
1637 (s
!= bus
->ifs
&& !s
->bs
))
1641 qemu_irq_lower(bus
->irq
);
1645 printf("ide: read addr=0x%x val=%02x\n", addr1
, ret
);
1650 uint32_t ide_status_read(void *opaque
, uint32_t addr
)
1652 IDEBus
*bus
= opaque
;
1653 IDEState
*s
= idebus_active_if(bus
);
1656 if ((!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
) ||
1657 (s
!= bus
->ifs
&& !s
->bs
))
1662 printf("ide: read status addr=0x%x val=%02x\n", addr
, ret
);
1667 void ide_cmd_write(void *opaque
, uint32_t addr
, uint32_t val
)
1669 IDEBus
*bus
= opaque
;
1674 printf("ide: write control addr=0x%x val=%02x\n", addr
, val
);
1676 /* common for both drives */
1677 if (!(bus
->cmd
& IDE_CMD_RESET
) &&
1678 (val
& IDE_CMD_RESET
)) {
1679 /* reset low to high */
1680 for(i
= 0;i
< 2; i
++) {
1682 s
->status
= BUSY_STAT
| SEEK_STAT
;
1685 } else if ((bus
->cmd
& IDE_CMD_RESET
) &&
1686 !(val
& IDE_CMD_RESET
)) {
1688 for(i
= 0;i
< 2; i
++) {
1690 if (s
->drive_kind
== IDE_CD
)
1691 s
->status
= 0x00; /* NOTE: READY is _not_ set */
1693 s
->status
= READY_STAT
| SEEK_STAT
;
1694 ide_set_signature(s
);
1702 * Returns true if the running PIO transfer is a PIO out (i.e. data is
1703 * transferred from the device to the guest), false if it's a PIO in
1705 static bool ide_is_pio_out(IDEState
*s
)
1707 if (s
->end_transfer_func
== ide_sector_write
||
1708 s
->end_transfer_func
== ide_atapi_cmd
) {
1710 } else if (s
->end_transfer_func
== ide_sector_read
||
1711 s
->end_transfer_func
== ide_transfer_stop
||
1712 s
->end_transfer_func
== ide_atapi_cmd_reply_end
||
1713 s
->end_transfer_func
== ide_dummy_transfer_stop
) {
1720 void ide_data_writew(void *opaque
, uint32_t addr
, uint32_t val
)
1722 IDEBus
*bus
= opaque
;
1723 IDEState
*s
= idebus_active_if(bus
);
1726 /* PIO data access allowed only when DRQ bit is set. The result of a write
1727 * during PIO out is indeterminate, just ignore it. */
1728 if (!(s
->status
& DRQ_STAT
) || ide_is_pio_out(s
)) {
1733 *(uint16_t *)p
= le16_to_cpu(val
);
1736 if (p
>= s
->data_end
)
1737 s
->end_transfer_func(s
);
1740 uint32_t ide_data_readw(void *opaque
, uint32_t addr
)
1742 IDEBus
*bus
= opaque
;
1743 IDEState
*s
= idebus_active_if(bus
);
1747 /* PIO data access allowed only when DRQ bit is set. The result of a read
1748 * during PIO in is indeterminate, return 0 and don't move forward. */
1749 if (!(s
->status
& DRQ_STAT
) || !ide_is_pio_out(s
)) {
1754 ret
= cpu_to_le16(*(uint16_t *)p
);
1757 if (p
>= s
->data_end
)
1758 s
->end_transfer_func(s
);
1762 void ide_data_writel(void *opaque
, uint32_t addr
, uint32_t val
)
1764 IDEBus
*bus
= opaque
;
1765 IDEState
*s
= idebus_active_if(bus
);
1768 /* PIO data access allowed only when DRQ bit is set. The result of a write
1769 * during PIO out is indeterminate, just ignore it. */
1770 if (!(s
->status
& DRQ_STAT
) || ide_is_pio_out(s
)) {
1775 *(uint32_t *)p
= le32_to_cpu(val
);
1778 if (p
>= s
->data_end
)
1779 s
->end_transfer_func(s
);
1782 uint32_t ide_data_readl(void *opaque
, uint32_t addr
)
1784 IDEBus
*bus
= opaque
;
1785 IDEState
*s
= idebus_active_if(bus
);
1789 /* PIO data access allowed only when DRQ bit is set. The result of a read
1790 * during PIO in is indeterminate, return 0 and don't move forward. */
1791 if (!(s
->status
& DRQ_STAT
) || !ide_is_pio_out(s
)) {
1796 ret
= cpu_to_le32(*(uint32_t *)p
);
1799 if (p
>= s
->data_end
)
1800 s
->end_transfer_func(s
);
1804 static void ide_dummy_transfer_stop(IDEState
*s
)
1806 s
->data_ptr
= s
->io_buffer
;
1807 s
->data_end
= s
->io_buffer
;
1808 s
->io_buffer
[0] = 0xff;
1809 s
->io_buffer
[1] = 0xff;
1810 s
->io_buffer
[2] = 0xff;
1811 s
->io_buffer
[3] = 0xff;
1814 static void ide_reset(IDEState
*s
)
1817 printf("ide: reset\n");
1821 bdrv_aio_cancel(s
->pio_aiocb
);
1822 s
->pio_aiocb
= NULL
;
1825 if (s
->drive_kind
== IDE_CFATA
)
1826 s
->mult_sectors
= 0;
1828 s
->mult_sectors
= MAX_MULT_SECTORS
;
1845 s
->status
= READY_STAT
| SEEK_STAT
;
1849 /* ATAPI specific */
1852 s
->cdrom_changed
= 0;
1853 s
->packet_transfer_size
= 0;
1854 s
->elementary_transfer_size
= 0;
1855 s
->io_buffer_index
= 0;
1856 s
->cd_sector_size
= 0;
1859 s
->io_buffer_size
= 0;
1860 s
->req_nb_sectors
= 0;
1862 ide_set_signature(s
);
1863 /* init the transfer handler so that 0xffff is returned on data
1865 s
->end_transfer_func
= ide_dummy_transfer_stop
;
1866 ide_dummy_transfer_stop(s
);
1867 s
->media_changed
= 0;
1870 void ide_bus_reset(IDEBus
*bus
)
1874 ide_reset(&bus
->ifs
[0]);
1875 ide_reset(&bus
->ifs
[1]);
1878 /* pending async DMA */
1879 if (bus
->dma
->aiocb
) {
1881 printf("aio_cancel\n");
1883 bdrv_aio_cancel(bus
->dma
->aiocb
);
1884 bus
->dma
->aiocb
= NULL
;
1887 /* reset dma provider too */
1888 bus
->dma
->ops
->reset(bus
->dma
);
1891 static bool ide_cd_is_tray_open(void *opaque
)
1893 return ((IDEState
*)opaque
)->tray_open
;
1896 static bool ide_cd_is_medium_locked(void *opaque
)
1898 return ((IDEState
*)opaque
)->tray_locked
;
1901 static const BlockDevOps ide_cd_block_ops
= {
1902 .change_media_cb
= ide_cd_change_cb
,
1903 .eject_request_cb
= ide_cd_eject_request_cb
,
1904 .is_tray_open
= ide_cd_is_tray_open
,
1905 .is_medium_locked
= ide_cd_is_medium_locked
,
1908 int ide_init_drive(IDEState
*s
, BlockDriverState
*bs
, IDEDriveKind kind
,
1909 const char *version
, const char *serial
, const char *model
,
1912 int cylinders
, heads
, secs
;
1913 uint64_t nb_sectors
;
1916 s
->drive_kind
= kind
;
1918 bdrv_get_geometry(bs
, &nb_sectors
);
1919 bdrv_guess_geometry(bs
, &cylinders
, &heads
, &secs
);
1920 if (cylinders
< 1 || cylinders
> 16383) {
1921 error_report("cyls must be between 1 and 16383");
1924 if (heads
< 1 || heads
> 16) {
1925 error_report("heads must be between 1 and 16");
1928 if (secs
< 1 || secs
> 63) {
1929 error_report("secs must be between 1 and 63");
1932 s
->cylinders
= cylinders
;
1935 s
->nb_sectors
= nb_sectors
;
1937 /* The SMART values should be preserved across power cycles
1939 s
->smart_enabled
= 1;
1940 s
->smart_autosave
= 1;
1941 s
->smart_errors
= 0;
1942 s
->smart_selftest_count
= 0;
1943 if (kind
== IDE_CD
) {
1944 bdrv_set_dev_ops(bs
, &ide_cd_block_ops
, s
);
1945 bdrv_set_buffer_alignment(bs
, 2048);
1947 if (!bdrv_is_inserted(s
->bs
)) {
1948 error_report("Device needs media, but drive is empty");
1951 if (bdrv_is_read_only(bs
)) {
1952 error_report("Can't use a read-only drive");
1957 pstrcpy(s
->drive_serial_str
, sizeof(s
->drive_serial_str
), serial
);
1959 snprintf(s
->drive_serial_str
, sizeof(s
->drive_serial_str
),
1960 "QM%05d", s
->drive_serial
);
1963 pstrcpy(s
->drive_model_str
, sizeof(s
->drive_model_str
), model
);
1967 strcpy(s
->drive_model_str
, "QEMU DVD-ROM");
1970 strcpy(s
->drive_model_str
, "QEMU MICRODRIVE");
1973 strcpy(s
->drive_model_str
, "QEMU HARDDISK");
1979 pstrcpy(s
->version
, sizeof(s
->version
), version
);
1981 pstrcpy(s
->version
, sizeof(s
->version
), QEMU_VERSION
);
1985 bdrv_iostatus_enable(bs
);
1989 static void ide_init1(IDEBus
*bus
, int unit
)
1991 static int drive_serial
= 1;
1992 IDEState
*s
= &bus
->ifs
[unit
];
1996 s
->drive_serial
= drive_serial
++;
1997 /* we need at least 2k alignment for accessing CDROMs using O_DIRECT */
1998 s
->io_buffer_total_len
= IDE_DMA_BUF_SECTORS
*512 + 4;
1999 s
->io_buffer
= qemu_memalign(2048, s
->io_buffer_total_len
);
2000 memset(s
->io_buffer
, 0, s
->io_buffer_total_len
);
2002 s
->smart_selftest_data
= qemu_blockalign(s
->bs
, 512);
2003 memset(s
->smart_selftest_data
, 0, 512);
2005 s
->sector_write_timer
= qemu_new_timer_ns(vm_clock
,
2006 ide_sector_write_timer_cb
, s
);
2009 static void ide_nop_start(IDEDMA
*dma
, IDEState
*s
,
2010 BlockDriverCompletionFunc
*cb
)
2014 static int ide_nop(IDEDMA
*dma
)
2019 static int ide_nop_int(IDEDMA
*dma
, int x
)
2024 static void ide_nop_restart(void *opaque
, int x
, RunState y
)
2028 static const IDEDMAOps ide_dma_nop_ops
= {
2029 .start_dma
= ide_nop_start
,
2030 .start_transfer
= ide_nop
,
2031 .prepare_buf
= ide_nop_int
,
2032 .rw_buf
= ide_nop_int
,
2033 .set_unit
= ide_nop_int
,
2034 .add_status
= ide_nop_int
,
2035 .set_inactive
= ide_nop
,
2036 .restart_cb
= ide_nop_restart
,
2040 static IDEDMA ide_dma_nop
= {
2041 .ops
= &ide_dma_nop_ops
,
2045 void ide_init2(IDEBus
*bus
, qemu_irq irq
)
2049 for(i
= 0; i
< 2; i
++) {
2051 ide_reset(&bus
->ifs
[i
]);
2054 bus
->dma
= &ide_dma_nop
;
2057 /* TODO convert users to qdev and remove */
2058 void ide_init2_with_non_qdev_drives(IDEBus
*bus
, DriveInfo
*hd0
,
2059 DriveInfo
*hd1
, qemu_irq irq
)
2064 for(i
= 0; i
< 2; i
++) {
2065 dinfo
= i
== 0 ? hd0
: hd1
;
2068 if (ide_init_drive(&bus
->ifs
[i
], dinfo
->bdrv
,
2069 dinfo
->media_cd
? IDE_CD
: IDE_HD
, NULL
,
2070 *dinfo
->serial
? dinfo
->serial
: NULL
,
2072 error_report("Can't set up IDE drive %s", dinfo
->id
);
2075 bdrv_attach_dev_nofail(dinfo
->bdrv
, &bus
->ifs
[i
]);
2077 ide_reset(&bus
->ifs
[i
]);
2081 bus
->dma
= &ide_dma_nop
;
2084 static const MemoryRegionPortio ide_portio_list
[] = {
2085 { 0, 8, 1, .read
= ide_ioport_read
, .write
= ide_ioport_write
},
2086 { 0, 2, 2, .read
= ide_data_readw
, .write
= ide_data_writew
},
2087 { 0, 4, 4, .read
= ide_data_readl
, .write
= ide_data_writel
},
2088 PORTIO_END_OF_LIST(),
2091 static const MemoryRegionPortio ide_portio2_list
[] = {
2092 { 0, 1, 1, .read
= ide_status_read
, .write
= ide_cmd_write
},
2093 PORTIO_END_OF_LIST(),
2096 void ide_init_ioport(IDEBus
*bus
, ISADevice
*dev
, int iobase
, int iobase2
)
2098 /* ??? Assume only ISA and PCI configurations, and that the PCI-ISA
2099 bridge has been setup properly to always register with ISA. */
2100 isa_register_portio_list(dev
, iobase
, ide_portio_list
, bus
, "ide");
2103 isa_register_portio_list(dev
, iobase2
, ide_portio2_list
, bus
, "ide");
2107 static bool is_identify_set(void *opaque
, int version_id
)
2109 IDEState
*s
= opaque
;
2111 return s
->identify_set
!= 0;
2114 static EndTransferFunc
* transfer_end_table
[] = {
2118 ide_atapi_cmd_reply_end
,
2120 ide_dummy_transfer_stop
,
2123 static int transfer_end_table_idx(EndTransferFunc
*fn
)
2127 for (i
= 0; i
< ARRAY_SIZE(transfer_end_table
); i
++)
2128 if (transfer_end_table
[i
] == fn
)
2134 static int ide_drive_post_load(void *opaque
, int version_id
)
2136 IDEState
*s
= opaque
;
2138 if (version_id
< 3) {
2139 if (s
->sense_key
== UNIT_ATTENTION
&&
2140 s
->asc
== ASC_MEDIUM_MAY_HAVE_CHANGED
) {
2141 s
->cdrom_changed
= 1;
2147 static int ide_drive_pio_post_load(void *opaque
, int version_id
)
2149 IDEState
*s
= opaque
;
2151 if (s
->end_transfer_fn_idx
>= ARRAY_SIZE(transfer_end_table
)) {
2154 s
->end_transfer_func
= transfer_end_table
[s
->end_transfer_fn_idx
];
2155 s
->data_ptr
= s
->io_buffer
+ s
->cur_io_buffer_offset
;
2156 s
->data_end
= s
->data_ptr
+ s
->cur_io_buffer_len
;
2161 static void ide_drive_pio_pre_save(void *opaque
)
2163 IDEState
*s
= opaque
;
2166 s
->cur_io_buffer_offset
= s
->data_ptr
- s
->io_buffer
;
2167 s
->cur_io_buffer_len
= s
->data_end
- s
->data_ptr
;
2169 idx
= transfer_end_table_idx(s
->end_transfer_func
);
2171 fprintf(stderr
, "%s: invalid end_transfer_func for DRQ_STAT\n",
2173 s
->end_transfer_fn_idx
= 2;
2175 s
->end_transfer_fn_idx
= idx
;
2179 static bool ide_drive_pio_state_needed(void *opaque
)
2181 IDEState
*s
= opaque
;
2183 return ((s
->status
& DRQ_STAT
) != 0)
2184 || (s
->bus
->error_status
& BM_STATUS_PIO_RETRY
);
2187 static bool ide_tray_state_needed(void *opaque
)
2189 IDEState
*s
= opaque
;
2191 return s
->tray_open
|| s
->tray_locked
;
2194 static bool ide_atapi_gesn_needed(void *opaque
)
2196 IDEState
*s
= opaque
;
2198 return s
->events
.new_media
|| s
->events
.eject_request
;
2201 static bool ide_error_needed(void *opaque
)
2203 IDEBus
*bus
= opaque
;
2205 return (bus
->error_status
!= 0);
2208 /* Fields for GET_EVENT_STATUS_NOTIFICATION ATAPI command */
2209 static const VMStateDescription vmstate_ide_atapi_gesn_state
= {
2210 .name
="ide_drive/atapi/gesn_state",
2212 .minimum_version_id
= 1,
2213 .minimum_version_id_old
= 1,
2214 .fields
= (VMStateField
[]) {
2215 VMSTATE_BOOL(events
.new_media
, IDEState
),
2216 VMSTATE_BOOL(events
.eject_request
, IDEState
),
2217 VMSTATE_END_OF_LIST()
2221 static const VMStateDescription vmstate_ide_tray_state
= {
2222 .name
= "ide_drive/tray_state",
2224 .minimum_version_id
= 1,
2225 .minimum_version_id_old
= 1,
2226 .fields
= (VMStateField
[]) {
2227 VMSTATE_BOOL(tray_open
, IDEState
),
2228 VMSTATE_BOOL(tray_locked
, IDEState
),
2229 VMSTATE_END_OF_LIST()
2233 static const VMStateDescription vmstate_ide_drive_pio_state
= {
2234 .name
= "ide_drive/pio_state",
2236 .minimum_version_id
= 1,
2237 .minimum_version_id_old
= 1,
2238 .pre_save
= ide_drive_pio_pre_save
,
2239 .post_load
= ide_drive_pio_post_load
,
2240 .fields
= (VMStateField
[]) {
2241 VMSTATE_INT32(req_nb_sectors
, IDEState
),
2242 VMSTATE_VARRAY_INT32(io_buffer
, IDEState
, io_buffer_total_len
, 1,
2243 vmstate_info_uint8
, uint8_t),
2244 VMSTATE_INT32(cur_io_buffer_offset
, IDEState
),
2245 VMSTATE_INT32(cur_io_buffer_len
, IDEState
),
2246 VMSTATE_UINT8(end_transfer_fn_idx
, IDEState
),
2247 VMSTATE_INT32(elementary_transfer_size
, IDEState
),
2248 VMSTATE_INT32(packet_transfer_size
, IDEState
),
2249 VMSTATE_END_OF_LIST()
2253 const VMStateDescription vmstate_ide_drive
= {
2254 .name
= "ide_drive",
2256 .minimum_version_id
= 0,
2257 .minimum_version_id_old
= 0,
2258 .post_load
= ide_drive_post_load
,
2259 .fields
= (VMStateField
[]) {
2260 VMSTATE_INT32(mult_sectors
, IDEState
),
2261 VMSTATE_INT32(identify_set
, IDEState
),
2262 VMSTATE_BUFFER_TEST(identify_data
, IDEState
, is_identify_set
),
2263 VMSTATE_UINT8(feature
, IDEState
),
2264 VMSTATE_UINT8(error
, IDEState
),
2265 VMSTATE_UINT32(nsector
, IDEState
),
2266 VMSTATE_UINT8(sector
, IDEState
),
2267 VMSTATE_UINT8(lcyl
, IDEState
),
2268 VMSTATE_UINT8(hcyl
, IDEState
),
2269 VMSTATE_UINT8(hob_feature
, IDEState
),
2270 VMSTATE_UINT8(hob_sector
, IDEState
),
2271 VMSTATE_UINT8(hob_nsector
, IDEState
),
2272 VMSTATE_UINT8(hob_lcyl
, IDEState
),
2273 VMSTATE_UINT8(hob_hcyl
, IDEState
),
2274 VMSTATE_UINT8(select
, IDEState
),
2275 VMSTATE_UINT8(status
, IDEState
),
2276 VMSTATE_UINT8(lba48
, IDEState
),
2277 VMSTATE_UINT8(sense_key
, IDEState
),
2278 VMSTATE_UINT8(asc
, IDEState
),
2279 VMSTATE_UINT8_V(cdrom_changed
, IDEState
, 3),
2280 VMSTATE_END_OF_LIST()
2282 .subsections
= (VMStateSubsection
[]) {
2284 .vmsd
= &vmstate_ide_drive_pio_state
,
2285 .needed
= ide_drive_pio_state_needed
,
2287 .vmsd
= &vmstate_ide_tray_state
,
2288 .needed
= ide_tray_state_needed
,
2290 .vmsd
= &vmstate_ide_atapi_gesn_state
,
2291 .needed
= ide_atapi_gesn_needed
,
2298 static const VMStateDescription vmstate_ide_error_status
= {
2299 .name
="ide_bus/error",
2301 .minimum_version_id
= 1,
2302 .minimum_version_id_old
= 1,
2303 .fields
= (VMStateField
[]) {
2304 VMSTATE_INT32(error_status
, IDEBus
),
2305 VMSTATE_END_OF_LIST()
2309 const VMStateDescription vmstate_ide_bus
= {
2312 .minimum_version_id
= 1,
2313 .minimum_version_id_old
= 1,
2314 .fields
= (VMStateField
[]) {
2315 VMSTATE_UINT8(cmd
, IDEBus
),
2316 VMSTATE_UINT8(unit
, IDEBus
),
2317 VMSTATE_END_OF_LIST()
2319 .subsections
= (VMStateSubsection
[]) {
2321 .vmsd
= &vmstate_ide_error_status
,
2322 .needed
= ide_error_needed
,
2329 void ide_drive_get(DriveInfo
**hd
, int max_bus
)
2333 if (drive_get_max_bus(IF_IDE
) >= max_bus
) {
2334 fprintf(stderr
, "qemu: too many IDE bus: %d\n", max_bus
);
2338 for(i
= 0; i
< max_bus
* MAX_IDE_DEVS
; i
++) {
2339 hd
[i
] = drive_get(IF_IDE
, i
/ MAX_IDE_DEVS
, i
% MAX_IDE_DEVS
);