hw/ide/ich.c

   1 #include <hw/hw.h>
   2 #include <hw/msi.h>
   3 #include <hw/pc.h>
   4 #include <hw/pci.h>
   5 #include <hw/isa.h>
   6 #include "block.h"
   7 #include "block_int.h"
   8 #include "sysemu.h"
   9 #include "dma.h"
  10
  11 #include <hw/ide/pci.h>
  12 #include <hw/ide/ahci.h>
  13
  14 static int pci_ich9_ahci_initfn(PCIDevice *dev)
  15 {
  16     struct AHCIPCIState *d;
  17     d = DO_UPCAST(struct AHCIPCIState, card, dev);
  18
  19     pci_config_set_vendor_id(d->card.config, PCI_VENDOR_ID_INTEL);
  20     pci_config_set_device_id(d->card.config, PCI_DEVICE_ID_INTEL_82801IR);
  21
  22     pci_config_set_class(d->card.config, PCI_CLASS_STORAGE_SATA);
  23     pci_config_set_revision(d->card.config, 0x02);
  24     pci_config_set_prog_interface(d->card.config, AHCI_PROGMODE_MAJOR_REV_1);
  25
  26     d->card.config[PCI_CACHE_LINE_SIZE] = 0x08;  /* Cache line size */
  27     d->card.config[PCI_LATENCY_TIMER]   = 0x00;  /* Latency timer */
  28     pci_config_set_interrupt_pin(d->card.config, 1);
  29
  30     /* XXX Software should program this register */
  31     d->card.config[0x90]   = 1 << 6; /* Address Map Register - AHCI mode */
  32
  33     qemu_register_reset(ahci_reset, d);
  34
  35     /* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now */
  36     pci_register_bar(&d->card, 5, 0x1000, PCI_BASE_ADDRESS_SPACE_MEMORY,
  37                      ahci_pci_map);
  38
  39     msi_init(dev, 0x50, 1, true, false);
  40
  41     ahci_init(&d->ahci, &dev->qdev);
  42     d->ahci.irq = d->card.irq[0];
  43
  44     return 0;
  45 }
  46
  47 static PCIDeviceInfo ich_ahci_info[] = {
  48     {
  49         .qdev.name    = "ich9-ahci",
  50         .qdev.size    = sizeof(AHCIPCIState),
  51         .init         = pci_ich9_ahci_initfn,
  52     },{
  53         /* end of list */
  54     }
  55 };
  56
  57 static void ich_ahci_register(void)
  58 {
  59     pci_qdev_register_many(ich_ahci_info);
  60 }
  61 device_init(ich_ahci_register);