hw/mc146818rtc.c

   1 /*
   2  * QEMU MC146818 RTC emulation
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "qemu-timer.h"
  26 #include "sysemu.h"
  27 #include "pc.h"
  28 #include "apic.h"
  29 #include "isa.h"
  30 #include "mc146818rtc.h"
  31
  32 //#define DEBUG_CMOS
  33 //#define DEBUG_COALESCED
  34
  35 #ifdef DEBUG_CMOS
  36 # define CMOS_DPRINTF(format, ...)      printf(format, ## __VA_ARGS__)
  37 #else
  38 # define CMOS_DPRINTF(format, ...)      do { } while (0)
  39 #endif
  40
  41 #ifdef DEBUG_COALESCED
  42 # define DPRINTF_C(format, ...)      printf(format, ## __VA_ARGS__)
  43 #else
  44 # define DPRINTF_C(format, ...)      do { } while (0)
  45 #endif
  46
  47 #define RTC_REINJECT_ON_ACK_COUNT 20
  48
  49 #define RTC_SECONDS             0
  50 #define RTC_SECONDS_ALARM       1
  51 #define RTC_MINUTES             2
  52 #define RTC_MINUTES_ALARM       3
  53 #define RTC_HOURS               4
  54 #define RTC_HOURS_ALARM         5
  55 #define RTC_ALARM_DONT_CARE    0xC0
  56
  57 #define RTC_DAY_OF_WEEK         6
  58 #define RTC_DAY_OF_MONTH        7
  59 #define RTC_MONTH               8
  60 #define RTC_YEAR                9
  61
  62 #define RTC_REG_A               10
  63 #define RTC_REG_B               11
  64 #define RTC_REG_C               12
  65 #define RTC_REG_D               13
  66
  67 #define REG_A_UIP 0x80
  68
  69 #define REG_B_SET  0x80
  70 #define REG_B_PIE  0x40
  71 #define REG_B_AIE  0x20
  72 #define REG_B_UIE  0x10
  73 #define REG_B_SQWE 0x08
  74 #define REG_B_DM   0x04
  75 #define REG_B_24H  0x02
  76
  77 #define REG_C_UF   0x10
  78 #define REG_C_IRQF 0x80
  79 #define REG_C_PF   0x40
  80 #define REG_C_AF   0x20
  81
  82 typedef struct RTCState {
  83     ISADevice dev;
  84     MemoryRegion io;
  85     uint8_t cmos_data[128];
  86     uint8_t cmos_index;
  87     struct tm current_tm;
  88     int32_t base_year;
  89     qemu_irq irq;
  90     qemu_irq sqw_irq;
  91     int it_shift;
  92     /* periodic timer */
  93     QEMUTimer *periodic_timer;
  94     int64_t next_periodic_time;
  95     /* second update */
  96     int64_t next_second_time;
  97     uint16_t irq_reinject_on_ack_count;
  98     uint32_t irq_coalesced;
  99     uint32_t period;
 100     QEMUTimer *coalesced_timer;
 101     QEMUTimer *second_timer;
 102     QEMUTimer *second_timer2;
 103     Notifier clock_reset_notifier;
 104     LostTickPolicy lost_tick_policy;
 105     Notifier suspend_notifier;
 106 } RTCState;
 107
 108 static void rtc_set_time(RTCState *s);
 109 static void rtc_copy_date(RTCState *s);
 110
 111 #ifdef TARGET_I386
 112 static void rtc_coalesced_timer_update(RTCState *s)
 113 {
 114     if (s->irq_coalesced == 0) {
 115         qemu_del_timer(s->coalesced_timer);
 116     } else {
 117         /* divide each RTC interval to 2 - 8 smaller intervals */
 118         int c = MIN(s->irq_coalesced, 7) + 1;
 119         int64_t next_clock = qemu_get_clock_ns(rtc_clock) +
 120             muldiv64(s->period / c, get_ticks_per_sec(), 32768);
 121         qemu_mod_timer(s->coalesced_timer, next_clock);
 122     }
 123 }
 124
 125 static void rtc_coalesced_timer(void *opaque)
 126 {
 127     RTCState *s = opaque;
 128
 129     if (s->irq_coalesced != 0) {
 130         apic_reset_irq_delivered();
 131         s->cmos_data[RTC_REG_C] |= 0xc0;
 132         DPRINTF_C("cmos: injecting from timer\n");
 133         qemu_irq_raise(s->irq);
 134         if (apic_get_irq_delivered()) {
 135             s->irq_coalesced--;
 136             DPRINTF_C("cmos: coalesced irqs decreased to %d\n",
 137                       s->irq_coalesced);
 138         }
 139     }
 140
 141     rtc_coalesced_timer_update(s);
 142 }
 143 #endif
 144
 145 static void rtc_timer_update(RTCState *s, int64_t current_time)
 146 {
 147     int period_code, period;
 148     int64_t cur_clock, next_irq_clock;
 149
 150     period_code = s->cmos_data[RTC_REG_A] & 0x0f;
 151     if (period_code != 0
 152         && ((s->cmos_data[RTC_REG_B] & REG_B_PIE)
 153             || ((s->cmos_data[RTC_REG_B] & REG_B_SQWE) && s->sqw_irq))) {
 154         if (period_code <= 2)
 155             period_code += 7;
 156         /* period in 32 Khz cycles */
 157         period = 1 << (period_code - 1);
 158 #ifdef TARGET_I386
 159         if (period != s->period) {
 160             s->irq_coalesced = (s->irq_coalesced * s->period) / period;
 161             DPRINTF_C("cmos: coalesced irqs scaled to %d\n", s->irq_coalesced);
 162         }
 163         s->period = period;
 164 #endif
 165         /* compute 32 khz clock */
 166         cur_clock = muldiv64(current_time, 32768, get_ticks_per_sec());
 167         next_irq_clock = (cur_clock & ~(period - 1)) + period;
 168         s->next_periodic_time =
 169             muldiv64(next_irq_clock, get_ticks_per_sec(), 32768) + 1;
 170         qemu_mod_timer(s->periodic_timer, s->next_periodic_time);
 171     } else {
 172 #ifdef TARGET_I386
 173         s->irq_coalesced = 0;
 174 #endif
 175         qemu_del_timer(s->periodic_timer);
 176     }
 177 }
 178
 179 static void rtc_periodic_timer(void *opaque)
 180 {
 181     RTCState *s = opaque;
 182
 183     rtc_timer_update(s, s->next_periodic_time);
 184     s->cmos_data[RTC_REG_C] |= REG_C_PF;
 185     if (s->cmos_data[RTC_REG_B] & REG_B_PIE) {
 186         s->cmos_data[RTC_REG_C] |= REG_C_IRQF;
 187 #ifdef TARGET_I386
 188         if (s->lost_tick_policy == LOST_TICK_SLEW) {
 189             if (s->irq_reinject_on_ack_count >= RTC_REINJECT_ON_ACK_COUNT)
 190                 s->irq_reinject_on_ack_count = 0;
 191             apic_reset_irq_delivered();
 192             qemu_irq_raise(s->irq);
 193             if (!apic_get_irq_delivered()) {
 194                 s->irq_coalesced++;
 195                 rtc_coalesced_timer_update(s);
 196                 DPRINTF_C("cmos: coalesced irqs increased to %d\n",
 197                           s->irq_coalesced);
 198             }
 199         } else
 200 #endif
 201         qemu_irq_raise(s->irq);
 202     }
 203     if (s->cmos_data[RTC_REG_B] & REG_B_SQWE) {
 204         /* Not square wave at all but we don't want 2048Hz interrupts!
 205            Must be seen as a pulse.  */
 206         qemu_irq_raise(s->sqw_irq);
 207     }
 208 }
 209
 210 static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data)
 211 {
 212     RTCState *s = opaque;
 213
 214     if ((addr & 1) == 0) {
 215         s->cmos_index = data & 0x7f;
 216     } else {
 217         CMOS_DPRINTF("cmos: write index=0x%02x val=0x%02x\n",
 218                      s->cmos_index, data);
 219         switch(s->cmos_index) {
 220         case RTC_SECONDS_ALARM:
 221         case RTC_MINUTES_ALARM:
 222         case RTC_HOURS_ALARM:
 223             s->cmos_data[s->cmos_index] = data;
 224             break;
 225         case RTC_SECONDS:
 226         case RTC_MINUTES:
 227         case RTC_HOURS:
 228         case RTC_DAY_OF_WEEK:
 229         case RTC_DAY_OF_MONTH:
 230         case RTC_MONTH:
 231         case RTC_YEAR:
 232             s->cmos_data[s->cmos_index] = data;
 233             /* if in set mode, do not update the time */
 234             if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
 235                 rtc_set_time(s);
 236             }
 237             break;
 238         case RTC_REG_A:
 239             /* UIP bit is read only */
 240             s->cmos_data[RTC_REG_A] = (data & ~REG_A_UIP) |
 241                 (s->cmos_data[RTC_REG_A] & REG_A_UIP);
 242             rtc_timer_update(s, qemu_get_clock_ns(rtc_clock));
 243             break;
 244         case RTC_REG_B:
 245             if (data & REG_B_SET) {
 246                 /* set mode: reset UIP mode */
 247                 s->cmos_data[RTC_REG_A] &= ~REG_A_UIP;
 248                 data &= ~REG_B_UIE;
 249             } else {
 250                 /* if disabling set mode, update the time */
 251                 if (s->cmos_data[RTC_REG_B] & REG_B_SET) {
 252                     rtc_set_time(s);
 253                 }
 254             }
 255             if (((s->cmos_data[RTC_REG_B] ^ data) & (REG_B_DM | REG_B_24H)) &&
 256                 !(data & REG_B_SET)) {
 257                 /* If the time format has changed and not in set mode,
 258                    update the registers immediately. */
 259                 s->cmos_data[RTC_REG_B] = data;
 260                 rtc_copy_date(s);
 261             } else {
 262                 s->cmos_data[RTC_REG_B] = data;
 263             }
 264             rtc_timer_update(s, qemu_get_clock_ns(rtc_clock));
 265             break;
 266         case RTC_REG_C:
 267         case RTC_REG_D:
 268             /* cannot write to them */
 269             break;
 270         default:
 271             s->cmos_data[s->cmos_index] = data;
 272             break;
 273         }
 274     }
 275 }
 276
 277 static inline int rtc_to_bcd(RTCState *s, int a)
 278 {
 279     if (s->cmos_data[RTC_REG_B] & REG_B_DM) {
 280         return a;
 281     } else {
 282         return ((a / 10) << 4) | (a % 10);
 283     }
 284 }
 285
 286 static inline int rtc_from_bcd(RTCState *s, int a)
 287 {
 288     if (s->cmos_data[RTC_REG_B] & REG_B_DM) {
 289         return a;
 290     } else {
 291         return ((a >> 4) * 10) + (a & 0x0f);
 292     }
 293 }
 294
 295 static void rtc_set_time(RTCState *s)
 296 {
 297     struct tm *tm = &s->current_tm;
 298
 299     tm->tm_sec = rtc_from_bcd(s, s->cmos_data[RTC_SECONDS]);
 300     tm->tm_min = rtc_from_bcd(s, s->cmos_data[RTC_MINUTES]);
 301     tm->tm_hour = rtc_from_bcd(s, s->cmos_data[RTC_HOURS] & 0x7f);
 302     if (!(s->cmos_data[RTC_REG_B] & REG_B_24H)) {
 303         tm->tm_hour %= 12;
 304         if (s->cmos_data[RTC_HOURS] & 0x80) {
 305             tm->tm_hour += 12;
 306         }
 307     }
 308     tm->tm_wday = rtc_from_bcd(s, s->cmos_data[RTC_DAY_OF_WEEK]) - 1;
 309     tm->tm_mday = rtc_from_bcd(s, s->cmos_data[RTC_DAY_OF_MONTH]);
 310     tm->tm_mon = rtc_from_bcd(s, s->cmos_data[RTC_MONTH]) - 1;
 311     tm->tm_year = rtc_from_bcd(s, s->cmos_data[RTC_YEAR]) + s->base_year - 1900;
 312
 313     rtc_change_mon_event(tm);
 314 }
 315
 316 static void rtc_copy_date(RTCState *s)
 317 {
 318     const struct tm *tm = &s->current_tm;
 319     int year;
 320
 321     s->cmos_data[RTC_SECONDS] = rtc_to_bcd(s, tm->tm_sec);
 322     s->cmos_data[RTC_MINUTES] = rtc_to_bcd(s, tm->tm_min);
 323     if (s->cmos_data[RTC_REG_B] & REG_B_24H) {
 324         /* 24 hour format */
 325         s->cmos_data[RTC_HOURS] = rtc_to_bcd(s, tm->tm_hour);
 326     } else {
 327         /* 12 hour format */
 328         int h = (tm->tm_hour % 12) ? tm->tm_hour % 12 : 12;
 329         s->cmos_data[RTC_HOURS] = rtc_to_bcd(s, h);
 330         if (tm->tm_hour >= 12)
 331             s->cmos_data[RTC_HOURS] |= 0x80;
 332     }
 333     s->cmos_data[RTC_DAY_OF_WEEK] = rtc_to_bcd(s, tm->tm_wday + 1);
 334     s->cmos_data[RTC_DAY_OF_MONTH] = rtc_to_bcd(s, tm->tm_mday);
 335     s->cmos_data[RTC_MONTH] = rtc_to_bcd(s, tm->tm_mon + 1);
 336     year = (tm->tm_year - s->base_year) % 100;
 337     if (year < 0)
 338         year += 100;
 339     s->cmos_data[RTC_YEAR] = rtc_to_bcd(s, year);
 340 }
 341
 342 /* month is between 0 and 11. */
 343 static int get_days_in_month(int month, int year)
 344 {
 345     static const int days_tab[12] = {
 346         31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
 347     };
 348     int d;
 349     if ((unsigned )month >= 12)
 350         return 31;
 351     d = days_tab[month];
 352     if (month == 1) {
 353         if ((year % 4) == 0 && ((year % 100) != 0 || (year % 400) == 0))
 354             d++;
 355     }
 356     return d;
 357 }
 358
 359 /* update 'tm' to the next second */
 360 static void rtc_next_second(struct tm *tm)
 361 {
 362     int days_in_month;
 363
 364     tm->tm_sec++;
 365     if ((unsigned)tm->tm_sec >= 60) {
 366         tm->tm_sec = 0;
 367         tm->tm_min++;
 368         if ((unsigned)tm->tm_min >= 60) {
 369             tm->tm_min = 0;
 370             tm->tm_hour++;
 371             if ((unsigned)tm->tm_hour >= 24) {
 372                 tm->tm_hour = 0;
 373                 /* next day */
 374                 tm->tm_wday++;
 375                 if ((unsigned)tm->tm_wday >= 7)
 376                     tm->tm_wday = 0;
 377                 days_in_month = get_days_in_month(tm->tm_mon,
 378                                                   tm->tm_year + 1900);
 379                 tm->tm_mday++;
 380                 if (tm->tm_mday < 1) {
 381                     tm->tm_mday = 1;
 382                 } else if (tm->tm_mday > days_in_month) {
 383                     tm->tm_mday = 1;
 384                     tm->tm_mon++;
 385                     if (tm->tm_mon >= 12) {
 386                         tm->tm_mon = 0;
 387                         tm->tm_year++;
 388                     }
 389                 }
 390             }
 391         }
 392     }
 393 }
 394
 395
 396 static void rtc_update_second(void *opaque)
 397 {
 398     RTCState *s = opaque;
 399     int64_t delay;
 400
 401     /* if the oscillator is not in normal operation, we do not update */
 402     if ((s->cmos_data[RTC_REG_A] & 0x70) != 0x20) {
 403         s->next_second_time += get_ticks_per_sec();
 404         qemu_mod_timer(s->second_timer, s->next_second_time);
 405     } else {
 406         rtc_next_second(&s->current_tm);
 407
 408         if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
 409             /* update in progress bit */
 410             s->cmos_data[RTC_REG_A] |= REG_A_UIP;
 411         }
 412         /* should be 244 us = 8 / 32768 seconds, but currently the
 413            timers do not have the necessary resolution. */
 414         delay = (get_ticks_per_sec() * 1) / 100;
 415         if (delay < 1)
 416             delay = 1;
 417         qemu_mod_timer(s->second_timer2,
 418                        s->next_second_time + delay);
 419     }
 420 }
 421
 422 static void rtc_update_second2(void *opaque)
 423 {
 424     RTCState *s = opaque;
 425
 426     if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
 427         rtc_copy_date(s);
 428     }
 429
 430     /* check alarm */
 431     if (((s->cmos_data[RTC_SECONDS_ALARM] & 0xc0) == 0xc0 ||
 432          rtc_from_bcd(s, s->cmos_data[RTC_SECONDS_ALARM]) == s->current_tm.tm_sec) &&
 433         ((s->cmos_data[RTC_MINUTES_ALARM] & 0xc0) == 0xc0 ||
 434          rtc_from_bcd(s, s->cmos_data[RTC_MINUTES_ALARM]) == s->current_tm.tm_min) &&
 435         ((s->cmos_data[RTC_HOURS_ALARM] & 0xc0) == 0xc0 ||
 436          rtc_from_bcd(s, s->cmos_data[RTC_HOURS_ALARM]) == s->current_tm.tm_hour)) {
 437
 438         s->cmos_data[RTC_REG_C] |= REG_C_AF;
 439         if (s->cmos_data[RTC_REG_B] & REG_B_AIE) {
 440             qemu_system_wakeup_request(QEMU_WAKEUP_REASON_RTC);
 441             qemu_irq_raise(s->irq);
 442             s->cmos_data[RTC_REG_C] |= REG_C_IRQF;
 443         }
 444     }
 445
 446     /* update ended interrupt */
 447     s->cmos_data[RTC_REG_C] |= REG_C_UF;
 448     if (s->cmos_data[RTC_REG_B] & REG_B_UIE) {
 449         s->cmos_data[RTC_REG_C] |= REG_C_IRQF;
 450         qemu_irq_raise(s->irq);
 451     }
 452
 453     /* clear update in progress bit */
 454     s->cmos_data[RTC_REG_A] &= ~REG_A_UIP;
 455
 456     s->next_second_time += get_ticks_per_sec();
 457     qemu_mod_timer(s->second_timer, s->next_second_time);
 458 }
 459
 460 static uint32_t cmos_ioport_read(void *opaque, uint32_t addr)
 461 {
 462     RTCState *s = opaque;
 463     int ret;
 464     if ((addr & 1) == 0) {
 465         return 0xff;
 466     } else {
 467         switch(s->cmos_index) {
 468         case RTC_SECONDS:
 469         case RTC_MINUTES:
 470         case RTC_HOURS:
 471         case RTC_DAY_OF_WEEK:
 472         case RTC_DAY_OF_MONTH:
 473         case RTC_MONTH:
 474         case RTC_YEAR:
 475             ret = s->cmos_data[s->cmos_index];
 476             break;
 477         case RTC_REG_A:
 478             ret = s->cmos_data[s->cmos_index];
 479             break;
 480         case RTC_REG_C:
 481             ret = s->cmos_data[s->cmos_index];
 482             qemu_irq_lower(s->irq);
 483             s->cmos_data[RTC_REG_C] = 0x00;
 484 #ifdef TARGET_I386
 485             if(s->irq_coalesced &&
 486                     (s->cmos_data[RTC_REG_B] & REG_B_PIE) &&
 487                     s->irq_reinject_on_ack_count < RTC_REINJECT_ON_ACK_COUNT) {
 488                 s->irq_reinject_on_ack_count++;
 489                 s->cmos_data[RTC_REG_C] |= REG_C_IRQF | REG_C_PF;
 490                 apic_reset_irq_delivered();
 491                 DPRINTF_C("cmos: injecting on ack\n");
 492                 qemu_irq_raise(s->irq);
 493                 if (apic_get_irq_delivered()) {
 494                     s->irq_coalesced--;
 495                     DPRINTF_C("cmos: coalesced irqs decreased to %d\n",
 496                               s->irq_coalesced);
 497                 }
 498             }
 499 #endif
 500             break;
 501         default:
 502             ret = s->cmos_data[s->cmos_index];
 503             break;
 504         }
 505         CMOS_DPRINTF("cmos: read index=0x%02x val=0x%02x\n",
 506                      s->cmos_index, ret);
 507         return ret;
 508     }
 509 }
 510
 511 void rtc_set_memory(ISADevice *dev, int addr, int val)
 512 {
 513     RTCState *s = DO_UPCAST(RTCState, dev, dev);
 514     if (addr >= 0 && addr <= 127)
 515         s->cmos_data[addr] = val;
 516 }
 517
 518 void rtc_set_date(ISADevice *dev, const struct tm *tm)
 519 {
 520     RTCState *s = DO_UPCAST(RTCState, dev, dev);
 521     s->current_tm = *tm;
 522     rtc_copy_date(s);
 523 }
 524
 525 /* PC cmos mappings */
 526 #define REG_IBM_CENTURY_BYTE        0x32
 527 #define REG_IBM_PS2_CENTURY_BYTE    0x37
 528
 529 static void rtc_set_date_from_host(ISADevice *dev)
 530 {
 531     RTCState *s = DO_UPCAST(RTCState, dev, dev);
 532     struct tm tm;
 533     int val;
 534
 535     /* set the CMOS date */
 536     qemu_get_timedate(&tm, 0);
 537     rtc_set_date(dev, &tm);
 538
 539     val = rtc_to_bcd(s, (tm.tm_year / 100) + 19);
 540     rtc_set_memory(dev, REG_IBM_CENTURY_BYTE, val);
 541     rtc_set_memory(dev, REG_IBM_PS2_CENTURY_BYTE, val);
 542 }
 543
 544 static int rtc_post_load(void *opaque, int version_id)
 545 {
 546 #ifdef TARGET_I386
 547     RTCState *s = opaque;
 548
 549     if (version_id >= 2) {
 550         if (s->lost_tick_policy == LOST_TICK_SLEW) {
 551             rtc_coalesced_timer_update(s);
 552         }
 553     }
 554 #endif
 555     return 0;
 556 }
 557
 558 static const VMStateDescription vmstate_rtc = {
 559     .name = "mc146818rtc",
 560     .version_id = 2,
 561     .minimum_version_id = 1,
 562     .minimum_version_id_old = 1,
 563     .post_load = rtc_post_load,
 564     .fields      = (VMStateField []) {
 565         VMSTATE_BUFFER(cmos_data, RTCState),
 566         VMSTATE_UINT8(cmos_index, RTCState),
 567         VMSTATE_INT32(current_tm.tm_sec, RTCState),
 568         VMSTATE_INT32(current_tm.tm_min, RTCState),
 569         VMSTATE_INT32(current_tm.tm_hour, RTCState),
 570         VMSTATE_INT32(current_tm.tm_wday, RTCState),
 571         VMSTATE_INT32(current_tm.tm_mday, RTCState),
 572         VMSTATE_INT32(current_tm.tm_mon, RTCState),
 573         VMSTATE_INT32(current_tm.tm_year, RTCState),
 574         VMSTATE_TIMER(periodic_timer, RTCState),
 575         VMSTATE_INT64(next_periodic_time, RTCState),
 576         VMSTATE_INT64(next_second_time, RTCState),
 577         VMSTATE_TIMER(second_timer, RTCState),
 578         VMSTATE_TIMER(second_timer2, RTCState),
 579         VMSTATE_UINT32_V(irq_coalesced, RTCState, 2),
 580         VMSTATE_UINT32_V(period, RTCState, 2),
 581         VMSTATE_END_OF_LIST()
 582     }
 583 };
 584
 585 static void rtc_notify_clock_reset(Notifier *notifier, void *data)
 586 {
 587     RTCState *s = container_of(notifier, RTCState, clock_reset_notifier);
 588     int64_t now = *(int64_t *)data;
 589
 590     rtc_set_date_from_host(&s->dev);
 591     s->next_second_time = now + (get_ticks_per_sec() * 99) / 100;
 592     qemu_mod_timer(s->second_timer2, s->next_second_time);
 593     rtc_timer_update(s, now);
 594 #ifdef TARGET_I386
 595     if (s->lost_tick_policy == LOST_TICK_SLEW) {
 596         rtc_coalesced_timer_update(s);
 597     }
 598 #endif
 599 }
 600
 601 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
 602    BIOS will read it and start S3 resume at POST Entry */
 603 static void rtc_notify_suspend(Notifier *notifier, void *data)
 604 {
 605     RTCState *s = container_of(notifier, RTCState, suspend_notifier);
 606     rtc_set_memory(&s->dev, 0xF, 0xFE);
 607 }
 608
 609 static void rtc_reset(void *opaque)
 610 {
 611     RTCState *s = opaque;
 612
 613     s->cmos_data[RTC_REG_B] &= ~(REG_B_PIE | REG_B_AIE | REG_B_SQWE);
 614     s->cmos_data[RTC_REG_C] &= ~(REG_C_UF | REG_C_IRQF | REG_C_PF | REG_C_AF);
 615
 616     qemu_irq_lower(s->irq);
 617
 618 #ifdef TARGET_I386
 619     if (s->lost_tick_policy == LOST_TICK_SLEW) {
 620         s->irq_coalesced = 0;
 621     }
 622 #endif
 623 }
 624
 625 static const MemoryRegionPortio cmos_portio[] = {
 626     {0, 2, 1, .read = cmos_ioport_read, .write = cmos_ioport_write },
 627     PORTIO_END_OF_LIST(),
 628 };
 629
 630 static const MemoryRegionOps cmos_ops = {
 631     .old_portio = cmos_portio
 632 };
 633
 634 // FIXME add int32 visitor
 635 static void visit_type_int32(Visitor *v, int *value, const char *name, Error **errp)
 636 {
 637     int64_t val = *value;
 638     visit_type_int(v, &val, name, errp);
 639 }
 640
 641 static void rtc_get_date(Object *obj, Visitor *v, void *opaque,
 642                          const char *name, Error **errp)
 643 {
 644     ISADevice *isa = ISA_DEVICE(obj);
 645     RTCState *s = DO_UPCAST(RTCState, dev, isa);
 646
 647     visit_start_struct(v, NULL, "struct tm", name, 0, errp);
 648     visit_type_int32(v, &s->current_tm.tm_year, "tm_year", errp);
 649     visit_type_int32(v, &s->current_tm.tm_mon, "tm_mon", errp);
 650     visit_type_int32(v, &s->current_tm.tm_mday, "tm_mday", errp);
 651     visit_type_int32(v, &s->current_tm.tm_hour, "tm_hour", errp);
 652     visit_type_int32(v, &s->current_tm.tm_min, "tm_min", errp);
 653     visit_type_int32(v, &s->current_tm.tm_sec, "tm_sec", errp);
 654     visit_end_struct(v, errp);
 655 }
 656
 657 static int rtc_initfn(ISADevice *dev)
 658 {
 659     RTCState *s = DO_UPCAST(RTCState, dev, dev);
 660     int base = 0x70;
 661
 662     s->cmos_data[RTC_REG_A] = 0x26;
 663     s->cmos_data[RTC_REG_B] = 0x02;
 664     s->cmos_data[RTC_REG_C] = 0x00;
 665     s->cmos_data[RTC_REG_D] = 0x80;
 666
 667     rtc_set_date_from_host(dev);
 668
 669 #ifdef TARGET_I386
 670     switch (s->lost_tick_policy) {
 671     case LOST_TICK_SLEW:
 672         s->coalesced_timer =
 673             qemu_new_timer_ns(rtc_clock, rtc_coalesced_timer, s);
 674         break;
 675     case LOST_TICK_DISCARD:
 676         break;
 677     default:
 678         return -EINVAL;
 679     }
 680 #endif
 681
 682     s->periodic_timer = qemu_new_timer_ns(rtc_clock, rtc_periodic_timer, s);
 683     s->second_timer = qemu_new_timer_ns(rtc_clock, rtc_update_second, s);
 684     s->second_timer2 = qemu_new_timer_ns(rtc_clock, rtc_update_second2, s);
 685
 686     s->clock_reset_notifier.notify = rtc_notify_clock_reset;
 687     qemu_register_clock_reset_notifier(rtc_clock, &s->clock_reset_notifier);
 688
 689     s->suspend_notifier.notify = rtc_notify_suspend;
 690     qemu_register_suspend_notifier(&s->suspend_notifier);
 691
 692     s->next_second_time =
 693         qemu_get_clock_ns(rtc_clock) + (get_ticks_per_sec() * 99) / 100;
 694     qemu_mod_timer(s->second_timer2, s->next_second_time);
 695
 696     memory_region_init_io(&s->io, &cmos_ops, s, "rtc", 2);
 697     isa_register_ioport(dev, &s->io, base);
 698
 699     qdev_set_legacy_instance_id(&dev->qdev, base, 2);
 700     qemu_register_reset(rtc_reset, s);
 701
 702     object_property_add(OBJECT(s), "date", "struct tm",
 703                         rtc_get_date, NULL, NULL, s, NULL);
 704
 705     return 0;
 706 }
 707
 708 ISADevice *rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq)
 709 {
 710     ISADevice *dev;
 711     RTCState *s;
 712
 713     dev = isa_create(bus, "mc146818rtc");
 714     s = DO_UPCAST(RTCState, dev, dev);
 715     qdev_prop_set_int32(&dev->qdev, "base_year", base_year);
 716     qdev_init_nofail(&dev->qdev);
 717     if (intercept_irq) {
 718         s->irq = intercept_irq;
 719     } else {
 720         isa_init_irq(dev, &s->irq, RTC_ISA_IRQ);
 721     }
 722     return dev;
 723 }
 724
 725 static Property mc146818rtc_properties[] = {
 726     DEFINE_PROP_INT32("base_year", RTCState, base_year, 1980),
 727     DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", RTCState,
 728                                lost_tick_policy, LOST_TICK_DISCARD),
 729     DEFINE_PROP_END_OF_LIST(),
 730 };
 731
 732 static void rtc_class_initfn(ObjectClass *klass, void *data)
 733 {
 734     DeviceClass *dc = DEVICE_CLASS(klass);
 735     ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
 736     ic->init = rtc_initfn;
 737     dc->no_user = 1;
 738     dc->vmsd = &vmstate_rtc;
 739     dc->props = mc146818rtc_properties;
 740 }
 741
 742 static TypeInfo mc146818rtc_info = {
 743     .name          = "mc146818rtc",
 744     .parent        = TYPE_ISA_DEVICE,
 745     .instance_size = sizeof(RTCState),
 746     .class_init    = rtc_class_initfn,
 747 };
 748
 749 static void mc146818rtc_register_types(void)
 750 {
 751     type_register_static(&mc146818rtc_info);
 752 }
 753
 754 type_init(mc146818rtc_register_types)