2 * QEMU model of the Milkymist System Controller.
4 * Copyright (c) 2010 Michael Walle <michael@walle.cc>
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 * Specification available at:
21 * http://www.milkymist.org/socdoc/sysctl.pdf
28 #include "qemu-timer.h"
29 #include "qemu-error.h"
33 CTRL_AUTORESTART
= (1<<1),
60 struct MilkymistSysctlState
{
65 ptimer_state
*ptimer0
;
66 ptimer_state
*ptimer1
;
69 uint32_t capabilities
;
79 typedef struct MilkymistSysctlState MilkymistSysctlState
;
81 static void sysctl_icap_write(MilkymistSysctlState
*s
, uint32_t value
)
83 trace_milkymist_sysctl_icap_write(value
);
84 switch (value
& 0xffff) {
86 qemu_system_shutdown_request();
91 static uint32_t sysctl_read(void *opaque
, target_phys_addr_t addr
)
93 MilkymistSysctlState
*s
= opaque
;
98 case R_TIMER0_COUNTER
:
99 r
= (uint32_t)ptimer_get_count(s
->ptimer0
);
100 /* milkymist timer counts up */
101 r
= s
->regs
[R_TIMER0_COMPARE
] - r
;
103 case R_TIMER1_COUNTER
:
104 r
= (uint32_t)ptimer_get_count(s
->ptimer1
);
105 /* milkymist timer counts up */
106 r
= s
->regs
[R_TIMER1_COMPARE
] - r
;
111 case R_TIMER0_CONTROL
:
112 case R_TIMER0_COMPARE
:
113 case R_TIMER1_CONTROL
:
114 case R_TIMER1_COMPARE
:
122 error_report("milkymist_sysctl: read access to unkown register 0x"
123 TARGET_FMT_plx
, addr
<< 2);
127 trace_milkymist_sysctl_memory_read(addr
<< 2, r
);
132 static void sysctl_write(void *opaque
, target_phys_addr_t addr
, uint32_t value
)
134 MilkymistSysctlState
*s
= opaque
;
136 trace_milkymist_sysctl_memory_write(addr
, value
);
142 case R_TIMER0_COUNTER
:
143 if (value
> s
->regs
[R_TIMER0_COUNTER
]) {
144 value
= s
->regs
[R_TIMER0_COUNTER
];
145 error_report("milkymist_sysctl: timer0: trying to write a "
146 "value greater than the limit. Clipping.");
148 /* milkymist timer counts up */
149 value
= s
->regs
[R_TIMER0_COUNTER
] - value
;
150 ptimer_set_count(s
->ptimer0
, value
);
152 case R_TIMER1_COUNTER
:
153 if (value
> s
->regs
[R_TIMER1_COUNTER
]) {
154 value
= s
->regs
[R_TIMER1_COUNTER
];
155 error_report("milkymist_sysctl: timer1: trying to write a "
156 "value greater than the limit. Clipping.");
158 /* milkymist timer counts up */
159 value
= s
->regs
[R_TIMER1_COUNTER
] - value
;
160 ptimer_set_count(s
->ptimer1
, value
);
162 case R_TIMER0_COMPARE
:
163 ptimer_set_limit(s
->ptimer0
, value
, 0);
164 s
->regs
[addr
] = value
;
166 case R_TIMER1_COMPARE
:
167 ptimer_set_limit(s
->ptimer1
, value
, 0);
168 s
->regs
[addr
] = value
;
170 case R_TIMER0_CONTROL
:
171 s
->regs
[addr
] = value
;
172 if (s
->regs
[R_TIMER0_CONTROL
] & CTRL_ENABLE
) {
173 trace_milkymist_sysctl_start_timer1();
174 ptimer_run(s
->ptimer0
, 0);
176 trace_milkymist_sysctl_stop_timer1();
177 ptimer_stop(s
->ptimer0
);
180 case R_TIMER1_CONTROL
:
181 s
->regs
[addr
] = value
;
182 if (s
->regs
[R_TIMER1_CONTROL
] & CTRL_ENABLE
) {
183 trace_milkymist_sysctl_start_timer1();
184 ptimer_run(s
->ptimer1
, 0);
186 trace_milkymist_sysctl_stop_timer1();
187 ptimer_stop(s
->ptimer1
);
191 sysctl_icap_write(s
, value
);
194 qemu_system_reset_request();
199 error_report("milkymist_sysctl: write to read-only register 0x"
200 TARGET_FMT_plx
, addr
<< 2);
204 error_report("milkymist_sysctl: write access to unkown register 0x"
205 TARGET_FMT_plx
, addr
<< 2);
210 static CPUReadMemoryFunc
* const sysctl_read_fn
[] = {
216 static CPUWriteMemoryFunc
* const sysctl_write_fn
[] = {
222 static void timer0_hit(void *opaque
)
224 MilkymistSysctlState
*s
= opaque
;
226 if (!(s
->regs
[R_TIMER0_CONTROL
] & CTRL_AUTORESTART
)) {
227 s
->regs
[R_TIMER0_CONTROL
] &= ~CTRL_ENABLE
;
228 trace_milkymist_sysctl_stop_timer0();
229 ptimer_stop(s
->ptimer0
);
232 trace_milkymist_sysctl_pulse_irq_timer0();
233 qemu_irq_pulse(s
->timer0_irq
);
236 static void timer1_hit(void *opaque
)
238 MilkymistSysctlState
*s
= opaque
;
240 if (!(s
->regs
[R_TIMER1_CONTROL
] & CTRL_AUTORESTART
)) {
241 s
->regs
[R_TIMER1_CONTROL
] &= ~CTRL_ENABLE
;
242 trace_milkymist_sysctl_stop_timer1();
243 ptimer_stop(s
->ptimer1
);
246 trace_milkymist_sysctl_pulse_irq_timer1();
247 qemu_irq_pulse(s
->timer1_irq
);
250 static void milkymist_sysctl_reset(DeviceState
*d
)
252 MilkymistSysctlState
*s
=
253 container_of(d
, MilkymistSysctlState
, busdev
.qdev
);
256 for (i
= 0; i
< R_MAX
; i
++) {
260 ptimer_stop(s
->ptimer0
);
261 ptimer_stop(s
->ptimer1
);
264 s
->regs
[R_ICAP
] = ICAP_READY
;
265 s
->regs
[R_SYSTEM_ID
] = s
->systemid
;
266 s
->regs
[R_CAPABILITIES
] = s
->capabilities
;
267 s
->regs
[R_GPIO_IN
] = s
->strappings
;
270 static int milkymist_sysctl_init(SysBusDevice
*dev
)
272 MilkymistSysctlState
*s
= FROM_SYSBUS(typeof(*s
), dev
);
275 sysbus_init_irq(dev
, &s
->gpio_irq
);
276 sysbus_init_irq(dev
, &s
->timer0_irq
);
277 sysbus_init_irq(dev
, &s
->timer1_irq
);
279 s
->bh0
= qemu_bh_new(timer0_hit
, s
);
280 s
->bh1
= qemu_bh_new(timer1_hit
, s
);
281 s
->ptimer0
= ptimer_init(s
->bh0
);
282 s
->ptimer1
= ptimer_init(s
->bh1
);
283 ptimer_set_freq(s
->ptimer0
, s
->freq_hz
);
284 ptimer_set_freq(s
->ptimer1
, s
->freq_hz
);
286 sysctl_regs
= cpu_register_io_memory(sysctl_read_fn
, sysctl_write_fn
, s
,
287 DEVICE_NATIVE_ENDIAN
);
288 sysbus_init_mmio(dev
, R_MAX
* 4, sysctl_regs
);
293 static const VMStateDescription vmstate_milkymist_sysctl
= {
294 .name
= "milkymist-sysctl",
296 .minimum_version_id
= 1,
297 .minimum_version_id_old
= 1,
298 .fields
= (VMStateField
[]) {
299 VMSTATE_UINT32_ARRAY(regs
, MilkymistSysctlState
, R_MAX
),
300 VMSTATE_PTIMER(ptimer0
, MilkymistSysctlState
),
301 VMSTATE_PTIMER(ptimer1
, MilkymistSysctlState
),
302 VMSTATE_END_OF_LIST()
306 static SysBusDeviceInfo milkymist_sysctl_info
= {
307 .init
= milkymist_sysctl_init
,
308 .qdev
.name
= "milkymist-sysctl",
309 .qdev
.size
= sizeof(MilkymistSysctlState
),
310 .qdev
.vmsd
= &vmstate_milkymist_sysctl
,
311 .qdev
.reset
= milkymist_sysctl_reset
,
312 .qdev
.props
= (Property
[]) {
313 DEFINE_PROP_UINT32("frequency", MilkymistSysctlState
,
315 DEFINE_PROP_UINT32("capabilities", MilkymistSysctlState
,
316 capabilities
, 0x00000000),
317 DEFINE_PROP_UINT32("systemid", MilkymistSysctlState
,
318 systemid
, 0x10014d31),
319 DEFINE_PROP_UINT32("gpio_strappings", MilkymistSysctlState
,
320 strappings
, 0x00000001),
321 DEFINE_PROP_END_OF_LIST(),
325 static void milkymist_sysctl_register(void)
327 sysbus_register_withprop(&milkymist_sysctl_info
);
330 device_init(milkymist_sysctl_register
)