hw/mips.h

   1 #ifndef HW_MIPS_H
   2 #define HW_MIPS_H
   3 /* Definitions for mips board emulation.  */
   4
   5 #include "memory.h"
   6
   7 /* gt64xxx.c */
   8 PCIBus *gt64120_register(qemu_irq *pic);
   9
  10 /* bonito.c */
  11 PCIBus *bonito_init(qemu_irq *pic);
  12
  13 /* g364fb.c */
  14 int g364fb_mm_init(MemoryRegion *system_memory, target_phys_addr_t vram_base,
  15                    target_phys_addr_t ctrl_base, int it_shift,
  16                    qemu_irq irq);
  17
  18 /* mipsnet.c */
  19 void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
  20
  21 /* jazz_led.c */
  22 void jazz_led_init(target_phys_addr_t base);
  23
  24 /* rc4030.c */
  25 typedef struct rc4030DMAState *rc4030_dma;
  26 void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
  27 void rc4030_dma_read(void *dma, uint8_t *buf, int len);
  28 void rc4030_dma_write(void *dma, uint8_t *buf, int len);
  29
  30 void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
  31                   qemu_irq **irqs, rc4030_dma **dmas);
  32
  33 /* dp8393x.c */
  34 void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
  35                   qemu_irq irq, void* mem_opaque,
  36                   void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write));
  37
  38 #endif