hw/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9 */
  10 #include "vl.h"
  11
  12 #ifdef TARGET_WORDS_BIGENDIAN
  13 #define BIOS_FILENAME "mips_bios.bin"
  14 #else
  15 #define BIOS_FILENAME "mipsel_bios.bin"
  16 #endif
  17
  18 #ifdef TARGET_MIPS64
  19 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL)
  20 #else
  21 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffU)
  22 #endif
  23
  24 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
  25
  26 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  27 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  28 static const int ide_irq[2] = { 14, 15 };
  29
  30 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
  31 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
  32
  33 extern FILE *logfile;
  34
  35 static PITState *pit; /* PIT i8254 */
  36
  37 /*i8254 PIT is attached to the IRQ0 at PIC i8259 */
  38 /*The PIC is attached to the MIPS CPU INT0 pin */
  39 static void pic_irq_request(void *opaque, int level)
  40 {
  41     cpu_mips_irq_request(opaque, 2, level);
  42 }
  43
  44 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
  45                               uint32_t val)
  46 {
  47     if ((addr & 0xffff) == 0 && val == 42)
  48         qemu_system_reset_request ();
  49     else if ((addr & 0xffff) == 4 && val == 42)
  50         qemu_system_shutdown_request ();
  51 }
  52
  53 static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
  54 {
  55     return 0;
  56 }
  57
  58 static CPUWriteMemoryFunc *mips_qemu_write[] = {
  59     &mips_qemu_writel,
  60     &mips_qemu_writel,
  61     &mips_qemu_writel,
  62 };
  63
  64 static CPUReadMemoryFunc *mips_qemu_read[] = {
  65     &mips_qemu_readl,
  66     &mips_qemu_readl,
  67     &mips_qemu_readl,
  68 };
  69
  70 static int mips_qemu_iomemtype = 0;
  71
  72 void load_kernel (CPUState *env, int ram_size, const char *kernel_filename,
  73                   const char *kernel_cmdline,
  74                   const char *initrd_filename)
  75 {
  76     int64_t entry, kernel_low, kernel_high;
  77     long kernel_size, initrd_size;
  78     ram_addr_t initrd_offset;
  79
  80     kernel_size = load_elf(kernel_filename, VIRT_TO_PHYS_ADDEND,
  81                            &entry, &kernel_low, &kernel_high);
  82     if (kernel_size >= 0) {
  83         if ((entry & ~0x7fffffffULL) == 0x80000000)
  84             entry = (int32_t)entry;
  85         env->PC = entry;
  86     } else {
  87         fprintf(stderr, "qemu: could not load kernel '%s'\n",
  88                 kernel_filename);
  89         exit(1);
  90     }
  91
  92     /* load initrd */
  93     initrd_size = 0;
  94     initrd_offset = 0;
  95     if (initrd_filename) {
  96         initrd_size = get_image_size (initrd_filename);
  97         if (initrd_size > 0) {
  98             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
  99             if (initrd_offset + initrd_size > ram_size) {
 100                 fprintf(stderr,
 101                         "qemu: memory too small for initial ram disk '%s'\n",
 102                         initrd_filename);
 103                 exit(1);
 104             }
 105             initrd_size = load_image(initrd_filename,
 106                                      phys_ram_base + initrd_offset);
 107         }
 108         if (initrd_size == (target_ulong) -1) {
 109             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 110                     initrd_filename);
 111             exit(1);
 112         }
 113     }
 114
 115     /* Store command line.  */
 116     if (initrd_size > 0) {
 117         int ret;
 118         ret = sprintf(phys_ram_base + (16 << 20) - 256,
 119                       "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
 120                       PHYS_TO_VIRT((uint32_t)initrd_offset),
 121                       initrd_size);
 122         strcpy (phys_ram_base + (16 << 20) - 256 + ret, kernel_cmdline);
 123     }
 124     else {
 125         strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
 126     }
 127
 128     *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
 129     *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
 130 }
 131
 132 static void main_cpu_reset(void *opaque)
 133 {
 134     CPUState *env = opaque;
 135     cpu_reset(env);
 136
 137     if (env->kernel_filename)
 138         load_kernel (env, env->ram_size, env->kernel_filename,
 139                      env->kernel_cmdline, env->initrd_filename);
 140 }
 141
 142 static
 143 void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
 144                     DisplayState *ds, const char **fd_filename, int snapshot,
 145                     const char *kernel_filename, const char *kernel_cmdline,
 146                     const char *initrd_filename, const char *cpu_model)
 147 {
 148     char buf[1024];
 149     unsigned long bios_offset;
 150     int bios_size;
 151     CPUState *env;
 152     RTCState *rtc_state;
 153     int i;
 154     mips_def_t *def;
 155
 156     /* init CPUs */
 157     if (cpu_model == NULL) {
 158 #ifdef TARGET_MIPS64
 159         cpu_model = "R4000";
 160 #else
 161         cpu_model = "4KEc";
 162 #endif
 163     }
 164     if (mips_find_by_name(cpu_model, &def) != 0)
 165         def = NULL;
 166     env = cpu_init();
 167     cpu_mips_register(env, def);
 168     register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
 169     qemu_register_reset(main_cpu_reset, env);
 170
 171     /* allocate RAM */
 172     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 173
 174     if (!mips_qemu_iomemtype) {
 175         mips_qemu_iomemtype = cpu_register_io_memory(0, mips_qemu_read,
 176                                                      mips_qemu_write, NULL);
 177     }
 178     cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype);
 179
 180     /* Try to load a BIOS image. If this fails, we continue regardless,
 181        but initialize the hardware ourselves. When a kernel gets
 182        preloaded we also initialize the hardware, since the BIOS wasn't
 183        run. */
 184     bios_offset = ram_size + vga_ram_size;
 185     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
 186     bios_size = load_image(buf, phys_ram_base + bios_offset);
 187     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 188         cpu_register_physical_memory(0x1fc00000,
 189                                      BIOS_SIZE, bios_offset | IO_MEM_ROM);
 190     } else {
 191         /* not fatal */
 192         fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
 193                 buf);
 194     }
 195
 196     if (kernel_filename) {
 197         load_kernel (env, ram_size, kernel_filename, kernel_cmdline,
 198                      initrd_filename);
 199         env->ram_size = ram_size;
 200         env->kernel_filename = kernel_filename;
 201         env->kernel_cmdline = kernel_cmdline;
 202         env->initrd_filename = initrd_filename;
 203     }
 204
 205     /* Init CPU internal devices */
 206     cpu_mips_clock_init(env);
 207     cpu_mips_irqctrl_init();
 208
 209     rtc_state = rtc_init(0x70, 8);
 210
 211     /* Register 64 KB of ISA IO space at 0x14000000 */
 212     isa_mmio_init(0x14000000, 0x00010000);
 213     isa_mem_base = 0x10000000;
 214
 215     isa_pic = pic_init(pic_irq_request, env);
 216     pit = pit_init(0x40, 0);
 217
 218     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 219         if (serial_hds[i]) {
 220             serial_init(&pic_set_irq_new, isa_pic,
 221                         serial_io[i], serial_irq[i], serial_hds[i]);
 222         }
 223     }
 224
 225     isa_vga_init(ds, phys_ram_base + ram_size, ram_size,
 226                  vga_ram_size);
 227
 228     if (nd_table[0].vlan) {
 229         if (nd_table[0].model == NULL
 230             || strcmp(nd_table[0].model, "ne2k_isa") == 0) {
 231             isa_ne2000_init(0x300, 9, &nd_table[0]);
 232         } else {
 233             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
 234             exit (1);
 235         }
 236     }
 237
 238     for(i = 0; i < 2; i++)
 239         isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 240                      bs_table[2 * i], bs_table[2 * i + 1]);
 241
 242     kbd_init();
 243     ds1225y_init(0x9000, "nvram");
 244 }
 245
 246 QEMUMachine mips_machine = {
 247     "mips",
 248     "mips r4k platform",
 249     mips_r4k_init,
 250 };