]>
git.proxmox.com Git - qemu.git/blob - hw/mips_r4k.c
2 * QEMU/MIPS pseudo-board
4 * emulates a simple machine with ISA-like bus.
5 * ISA IO space mapped to the 0x14000000 (PHYS) and
6 * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
7 * All peripherial devices are attached to this "bus" with
8 * the standard PC ISA addresses.
12 #ifdef TARGET_WORDS_BIGENDIAN
13 #define BIOS_FILENAME "mips_bios.bin"
15 #define BIOS_FILENAME "mipsel_bios.bin"
18 #define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)
20 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
22 static const int ide_iobase
[2] = { 0x1f0, 0x170 };
23 static const int ide_iobase2
[2] = { 0x3f6, 0x376 };
24 static const int ide_irq
[2] = { 14, 15 };
26 static int serial_io
[MAX_SERIAL_PORTS
] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
27 static int serial_irq
[MAX_SERIAL_PORTS
] = { 4, 3, 4, 3 };
31 static PITState
*pit
; /* PIT i8254 */
33 /*i8254 PIT is attached to the IRQ0 at PIC i8259 */
35 static struct _loaderparams
{
37 const char *kernel_filename
;
38 const char *kernel_cmdline
;
39 const char *initrd_filename
;
42 static void mips_qemu_writel (void *opaque
, target_phys_addr_t addr
,
45 if ((addr
& 0xffff) == 0 && val
== 42)
46 qemu_system_reset_request ();
47 else if ((addr
& 0xffff) == 4 && val
== 42)
48 qemu_system_shutdown_request ();
51 static uint32_t mips_qemu_readl (void *opaque
, target_phys_addr_t addr
)
56 static CPUWriteMemoryFunc
*mips_qemu_write
[] = {
62 static CPUReadMemoryFunc
*mips_qemu_read
[] = {
68 static int mips_qemu_iomemtype
= 0;
70 static void load_kernel (CPUState
*env
)
72 int64_t entry
, kernel_low
, kernel_high
;
73 long kernel_size
, initrd_size
;
74 ram_addr_t initrd_offset
;
76 kernel_size
= load_elf(loaderparams
.kernel_filename
, VIRT_TO_PHYS_ADDEND
,
77 &entry
, &kernel_low
, &kernel_high
);
78 if (kernel_size
>= 0) {
79 if ((entry
& ~0x7fffffffULL
) == 0x80000000)
80 entry
= (int32_t)entry
;
81 env
->PC
[env
->current_tc
] = entry
;
83 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
84 loaderparams
.kernel_filename
);
91 if (loaderparams
.initrd_filename
) {
92 initrd_size
= get_image_size (loaderparams
.initrd_filename
);
93 if (initrd_size
> 0) {
94 initrd_offset
= (kernel_high
+ ~TARGET_PAGE_MASK
) & TARGET_PAGE_MASK
;
95 if (initrd_offset
+ initrd_size
> ram_size
) {
97 "qemu: memory too small for initial ram disk '%s'\n",
98 loaderparams
.initrd_filename
);
101 initrd_size
= load_image(loaderparams
.initrd_filename
,
102 phys_ram_base
+ initrd_offset
);
104 if (initrd_size
== (target_ulong
) -1) {
105 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
106 loaderparams
.initrd_filename
);
111 /* Store command line. */
112 if (initrd_size
> 0) {
114 ret
= sprintf(phys_ram_base
+ (16 << 20) - 256,
115 "rd_start=0x" TARGET_FMT_lx
" rd_size=%li ",
116 PHYS_TO_VIRT((uint32_t)initrd_offset
),
118 strcpy (phys_ram_base
+ (16 << 20) - 256 + ret
,
119 loaderparams
.kernel_cmdline
);
122 strcpy (phys_ram_base
+ (16 << 20) - 256,
123 loaderparams
.kernel_cmdline
);
126 *(int32_t *)(phys_ram_base
+ (16 << 20) - 260) = tswap32 (0x12345678);
127 *(int32_t *)(phys_ram_base
+ (16 << 20) - 264) = tswap32 (ram_size
);
130 static void main_cpu_reset(void *opaque
)
132 CPUState
*env
= opaque
;
135 if (loaderparams
.kernel_filename
)
140 void mips_r4k_init (int ram_size
, int vga_ram_size
, const char *boot_device
,
141 DisplayState
*ds
, const char **fd_filename
, int snapshot
,
142 const char *kernel_filename
, const char *kernel_cmdline
,
143 const char *initrd_filename
, const char *cpu_model
)
146 unsigned long bios_offset
;
154 if (cpu_model
== NULL
) {
161 env
= cpu_init(cpu_model
);
163 fprintf(stderr
, "Unable to find CPU definition\n");
166 register_savevm("cpu", 0, 3, cpu_save
, cpu_load
, env
);
167 qemu_register_reset(main_cpu_reset
, env
);
170 cpu_register_physical_memory(0, ram_size
, IO_MEM_RAM
);
172 if (!mips_qemu_iomemtype
) {
173 mips_qemu_iomemtype
= cpu_register_io_memory(0, mips_qemu_read
,
174 mips_qemu_write
, NULL
);
176 cpu_register_physical_memory(0x1fbf0000, 0x10000, mips_qemu_iomemtype
);
178 /* Try to load a BIOS image. If this fails, we continue regardless,
179 but initialize the hardware ourselves. When a kernel gets
180 preloaded we also initialize the hardware, since the BIOS wasn't
182 bios_offset
= ram_size
+ vga_ram_size
;
183 if (bios_name
== NULL
)
184 bios_name
= BIOS_FILENAME
;
185 snprintf(buf
, sizeof(buf
), "%s/%s", bios_dir
, bios_name
);
186 bios_size
= load_image(buf
, phys_ram_base
+ bios_offset
);
187 if ((bios_size
> 0) && (bios_size
<= BIOS_SIZE
)) {
188 cpu_register_physical_memory(0x1fc00000,
189 BIOS_SIZE
, bios_offset
| IO_MEM_ROM
);
192 fprintf(stderr
, "qemu: Warning, could not load MIPS bios '%s'\n",
196 if (kernel_filename
) {
197 loaderparams
.ram_size
= ram_size
;
198 loaderparams
.kernel_filename
= kernel_filename
;
199 loaderparams
.kernel_cmdline
= kernel_cmdline
;
200 loaderparams
.initrd_filename
= initrd_filename
;
204 /* Init CPU internal devices */
205 cpu_mips_irq_init_cpu(env
);
206 cpu_mips_clock_init(env
);
207 cpu_mips_irqctrl_init();
209 /* The PIC is attached to the MIPS CPU INT0 pin */
210 i8259
= i8259_init(env
->irq
[2]);
212 rtc_state
= rtc_init(0x70, i8259
[8]);
214 /* Register 64 KB of ISA IO space at 0x14000000 */
215 isa_mmio_init(0x14000000, 0x00010000);
216 isa_mem_base
= 0x10000000;
218 pit
= pit_init(0x40, i8259
[0]);
220 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
222 serial_init(serial_io
[i
], i8259
[serial_irq
[i
]], serial_hds
[i
]);
226 isa_vga_init(ds
, phys_ram_base
+ ram_size
, ram_size
,
229 if (nd_table
[0].vlan
) {
230 if (nd_table
[0].model
== NULL
231 || strcmp(nd_table
[0].model
, "ne2k_isa") == 0) {
232 isa_ne2000_init(0x300, i8259
[9], &nd_table
[0]);
233 } else if (strcmp(nd_table
[0].model
, "?") == 0) {
234 fprintf(stderr
, "qemu: Supported NICs: ne2k_isa\n");
237 fprintf(stderr
, "qemu: Unsupported NIC: %s\n", nd_table
[0].model
);
242 for(i
= 0; i
< 2; i
++)
243 isa_ide_init(ide_iobase
[i
], ide_iobase2
[i
], i8259
[ide_irq
[i
]],
244 bs_table
[2 * i
], bs_table
[2 * i
+ 1]);
246 i8042_init(i8259
[1], i8259
[12], 0x60);
247 ds1225y_init(0x9000, "nvram");
250 QEMUMachine mips_machine
= {