hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "block.h"
  29 #include "sysemu.h"
  30 #include "audio/audio.h"
  31 #include "net.h"
  32 #include "smbus.h"
  33 #include "boards.h"
  34 #include "console.h"
  35 #include "fw_cfg.h"
  36 #include "virtio-blk.h"
  37 #include "virtio-balloon.h"
  38 #include "virtio-console.h"
  39 #include "hpet_emul.h"
  40
  41 /* output Bochs bios info messages */
  42 //#define DEBUG_BIOS
  43
  44 #define BIOS_FILENAME "bios.bin"
  45 #define VGABIOS_FILENAME "vgabios.bin"
  46 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  47
  48 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  49
  50 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  51 #define ACPI_DATA_SIZE       0x10000
  52 #define BIOS_CFG_IOPORT 0x510
  53 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
  54
  55 #define MAX_IDE_BUS 2
  56
  57 extern uint8_t *acpi_tables;
  58 extern size_t acpi_tables_len;
  59
  60 static fdctrl_t *floppy_controller;
  61 static RTCState *rtc_state;
  62 static PITState *pit;
  63 static IOAPICState *ioapic;
  64 static PCIDevice *i440fx_state;
  65
  66 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  67 {
  68 }
  69
  70 /* MSDOS compatibility mode FPU exception support */
  71 static qemu_irq ferr_irq;
  72 /* XXX: add IGNNE support */
  73 void cpu_set_ferr(CPUX86State *s)
  74 {
  75     qemu_irq_raise(ferr_irq);
  76 }
  77
  78 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  79 {
  80     qemu_irq_lower(ferr_irq);
  81 }
  82
  83 /* TSC handling */
  84 uint64_t cpu_get_tsc(CPUX86State *env)
  85 {
  86     /* Note: when using kqemu, it is more logical to return the host TSC
  87        because kqemu does not trap the RDTSC instruction for
  88        performance reasons */
  89 #ifdef USE_KQEMU
  90     if (env->kqemu_enabled) {
  91         return cpu_get_real_ticks();
  92     } else
  93 #endif
  94     {
  95         return cpu_get_ticks();
  96     }
  97 }
  98
  99 /* SMM support */
 100 void cpu_smm_update(CPUState *env)
 101 {
 102     if (i440fx_state && env == first_cpu)
 103         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
 104 }
 105
 106
 107 /* IRQ handling */
 108 int cpu_get_pic_interrupt(CPUState *env)
 109 {
 110     int intno;
 111
 112     intno = apic_get_interrupt(env);
 113     if (intno >= 0) {
 114         /* set irq request if a PIC irq is still pending */
 115         /* XXX: improve that */
 116         pic_update_irq(isa_pic);
 117         return intno;
 118     }
 119     /* read the irq from the PIC */
 120     if (!apic_accept_pic_intr(env))
 121         return -1;
 122
 123     intno = pic_read_irq(isa_pic);
 124     return intno;
 125 }
 126
 127 static void pic_irq_request(void *opaque, int irq, int level)
 128 {
 129     CPUState *env = first_cpu;
 130
 131     if (env->apic_state) {
 132         while (env) {
 133             if (apic_accept_pic_intr(env))
 134                 apic_deliver_pic_intr(env, level);
 135             env = env->next_cpu;
 136         }
 137     } else {
 138         if (level)
 139             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 140         else
 141             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 142     }
 143 }
 144
 145 /* PC cmos mappings */
 146
 147 #define REG_EQUIPMENT_BYTE          0x14
 148
 149 static int cmos_get_fd_drive_type(int fd0)
 150 {
 151     int val;
 152
 153     switch (fd0) {
 154     case 0:
 155         /* 1.44 Mb 3"5 drive */
 156         val = 4;
 157         break;
 158     case 1:
 159         /* 2.88 Mb 3"5 drive */
 160         val = 5;
 161         break;
 162     case 2:
 163         /* 1.2 Mb 5"5 drive */
 164         val = 2;
 165         break;
 166     default:
 167         val = 0;
 168         break;
 169     }
 170     return val;
 171 }
 172
 173 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 174 {
 175     RTCState *s = rtc_state;
 176     int cylinders, heads, sectors;
 177     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 178     rtc_set_memory(s, type_ofs, 47);
 179     rtc_set_memory(s, info_ofs, cylinders);
 180     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 181     rtc_set_memory(s, info_ofs + 2, heads);
 182     rtc_set_memory(s, info_ofs + 3, 0xff);
 183     rtc_set_memory(s, info_ofs + 4, 0xff);
 184     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 185     rtc_set_memory(s, info_ofs + 6, cylinders);
 186     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 187     rtc_set_memory(s, info_ofs + 8, sectors);
 188 }
 189
 190 /* convert boot_device letter to something recognizable by the bios */
 191 static int boot_device2nibble(char boot_device)
 192 {
 193     switch(boot_device) {
 194     case 'a':
 195     case 'b':
 196         return 0x01; /* floppy boot */
 197     case 'c':
 198         return 0x02; /* hard drive boot */
 199     case 'd':
 200         return 0x03; /* CD-ROM boot */
 201     case 'n':
 202         return 0x04; /* Network boot */
 203     }
 204     return 0;
 205 }
 206
 207 /* copy/pasted from cmos_init, should be made a general function
 208  and used there as well */
 209 static int pc_boot_set(void *opaque, const char *boot_device)
 210 {
 211 #define PC_MAX_BOOT_DEVICES 3
 212     RTCState *s = (RTCState *)opaque;
 213     int nbds, bds[3] = { 0, };
 214     int i;
 215
 216     nbds = strlen(boot_device);
 217     if (nbds > PC_MAX_BOOT_DEVICES) {
 218         term_printf("Too many boot devices for PC\n");
 219         return(1);
 220     }
 221     for (i = 0; i < nbds; i++) {
 222         bds[i] = boot_device2nibble(boot_device[i]);
 223         if (bds[i] == 0) {
 224             term_printf("Invalid boot device for PC: '%c'\n",
 225                     boot_device[i]);
 226             return(1);
 227         }
 228     }
 229     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 230     rtc_set_memory(s, 0x38, (bds[2] << 4));
 231     return(0);
 232 }
 233
 234 /* hd_table must contain 4 block drivers */
 235 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 236                       const char *boot_device, BlockDriverState **hd_table)
 237 {
 238     RTCState *s = rtc_state;
 239     int nbds, bds[3] = { 0, };
 240     int val;
 241     int fd0, fd1, nb;
 242     int i;
 243
 244     /* various important CMOS locations needed by PC/Bochs bios */
 245
 246     /* memory size */
 247     val = 640; /* base memory in K */
 248     rtc_set_memory(s, 0x15, val);
 249     rtc_set_memory(s, 0x16, val >> 8);
 250
 251     val = (ram_size / 1024) - 1024;
 252     if (val > 65535)
 253         val = 65535;
 254     rtc_set_memory(s, 0x17, val);
 255     rtc_set_memory(s, 0x18, val >> 8);
 256     rtc_set_memory(s, 0x30, val);
 257     rtc_set_memory(s, 0x31, val >> 8);
 258
 259     if (above_4g_mem_size) {
 260         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 261         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 262         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 263     }
 264
 265     if (ram_size > (16 * 1024 * 1024))
 266         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 267     else
 268         val = 0;
 269     if (val > 65535)
 270         val = 65535;
 271     rtc_set_memory(s, 0x34, val);
 272     rtc_set_memory(s, 0x35, val >> 8);
 273
 274     /* set the number of CPU */
 275     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 276
 277     /* set boot devices, and disable floppy signature check if requested */
 278 #define PC_MAX_BOOT_DEVICES 3
 279     nbds = strlen(boot_device);
 280     if (nbds > PC_MAX_BOOT_DEVICES) {
 281         fprintf(stderr, "Too many boot devices for PC\n");
 282         exit(1);
 283     }
 284     for (i = 0; i < nbds; i++) {
 285         bds[i] = boot_device2nibble(boot_device[i]);
 286         if (bds[i] == 0) {
 287             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 288                     boot_device[i]);
 289             exit(1);
 290         }
 291     }
 292     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 293     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 294
 295     /* floppy type */
 296
 297     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 298     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 299
 300     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 301     rtc_set_memory(s, 0x10, val);
 302
 303     val = 0;
 304     nb = 0;
 305     if (fd0 < 3)
 306         nb++;
 307     if (fd1 < 3)
 308         nb++;
 309     switch (nb) {
 310     case 0:
 311         break;
 312     case 1:
 313         val |= 0x01; /* 1 drive, ready for boot */
 314         break;
 315     case 2:
 316         val |= 0x41; /* 2 drives, ready for boot */
 317         break;
 318     }
 319     val |= 0x02; /* FPU is there */
 320     val |= 0x04; /* PS/2 mouse installed */
 321     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 322
 323     /* hard drives */
 324
 325     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 326     if (hd_table[0])
 327         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 328     if (hd_table[1])
 329         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 330
 331     val = 0;
 332     for (i = 0; i < 4; i++) {
 333         if (hd_table[i]) {
 334             int cylinders, heads, sectors, translation;
 335             /* NOTE: bdrv_get_geometry_hint() returns the physical
 336                 geometry.  It is always such that: 1 <= sects <= 63, 1
 337                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 338                 geometry can be different if a translation is done. */
 339             translation = bdrv_get_translation_hint(hd_table[i]);
 340             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 341                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 342                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 343                     /* No translation. */
 344                     translation = 0;
 345                 } else {
 346                     /* LBA translation. */
 347                     translation = 1;
 348                 }
 349             } else {
 350                 translation--;
 351             }
 352             val |= translation << (i * 2);
 353         }
 354     }
 355     rtc_set_memory(s, 0x39, val);
 356 }
 357
 358 void ioport_set_a20(int enable)
 359 {
 360     /* XXX: send to all CPUs ? */
 361     cpu_x86_set_a20(first_cpu, enable);
 362 }
 363
 364 int ioport_get_a20(void)
 365 {
 366     return ((first_cpu->a20_mask >> 20) & 1);
 367 }
 368
 369 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 370 {
 371     ioport_set_a20((val >> 1) & 1);
 372     /* XXX: bit 0 is fast reset */
 373 }
 374
 375 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 376 {
 377     return ioport_get_a20() << 1;
 378 }
 379
 380 /***********************************************************/
 381 /* Bochs BIOS debug ports */
 382
 383 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 384 {
 385     static const char shutdown_str[8] = "Shutdown";
 386     static int shutdown_index = 0;
 387
 388     switch(addr) {
 389         /* Bochs BIOS messages */
 390     case 0x400:
 391     case 0x401:
 392         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 393         exit(1);
 394     case 0x402:
 395     case 0x403:
 396 #ifdef DEBUG_BIOS
 397         fprintf(stderr, "%c", val);
 398 #endif
 399         break;
 400     case 0x8900:
 401         /* same as Bochs power off */
 402         if (val == shutdown_str[shutdown_index]) {
 403             shutdown_index++;
 404             if (shutdown_index == 8) {
 405                 shutdown_index = 0;
 406                 qemu_system_shutdown_request();
 407             }
 408         } else {
 409             shutdown_index = 0;
 410         }
 411         break;
 412
 413         /* LGPL'ed VGA BIOS messages */
 414     case 0x501:
 415     case 0x502:
 416         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 417         exit(1);
 418     case 0x500:
 419     case 0x503:
 420 #ifdef DEBUG_BIOS
 421         fprintf(stderr, "%c", val);
 422 #endif
 423         break;
 424     }
 425 }
 426
 427 static void bochs_bios_init(void)
 428 {
 429     void *fw_cfg;
 430
 431     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 432     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 433     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 434     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 435     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 436
 437     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 438     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 439     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 440     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 441
 442     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 443     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 444     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 445     fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, acpi_tables, acpi_tables_len);
 446 }
 447
 448 /* Generate an initial boot sector which sets state and jump to
 449    a specified vector */
 450 static void generate_bootsect(uint8_t *option_rom,
 451                               uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
 452 {
 453     uint8_t rom[512], *p, *reloc;
 454     uint8_t sum;
 455     int i;
 456
 457     memset(rom, 0, sizeof(rom));
 458
 459     p = rom;
 460     /* Make sure we have an option rom signature */
 461     *p++ = 0x55;
 462     *p++ = 0xaa;
 463
 464     /* ROM size in sectors*/
 465     *p++ = 1;
 466
 467     /* Hook int19 */
 468
 469     *p++ = 0x50;                /* push ax */
 470     *p++ = 0x1e;                /* push ds */
 471     *p++ = 0x31; *p++ = 0xc0;   /* xor ax, ax */
 472     *p++ = 0x8e; *p++ = 0xd8;   /* mov ax, ds */
 473
 474     *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
 475     *p++ = 0x64; *p++ = 0x00;
 476     reloc = p;
 477     *p++ = 0x00; *p++ = 0x00;
 478
 479     *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
 480     *p++ = 0x66; *p++ = 0x00;
 481
 482     *p++ = 0x1f;                /* pop ds */
 483     *p++ = 0x58;                /* pop ax */
 484     *p++ = 0xcb;                /* lret */
 485
 486     /* Actual code */
 487     *reloc = (p - rom);
 488
 489     *p++ = 0xfa;                /* CLI */
 490     *p++ = 0xfc;                /* CLD */
 491
 492     for (i = 0; i < 6; i++) {
 493         if (i == 1)             /* Skip CS */
 494             continue;
 495
 496         *p++ = 0xb8;            /* MOV AX,imm16 */
 497         *p++ = segs[i];
 498         *p++ = segs[i] >> 8;
 499         *p++ = 0x8e;            /* MOV <seg>,AX */
 500         *p++ = 0xc0 + (i << 3);
 501     }
 502
 503     for (i = 0; i < 8; i++) {
 504         *p++ = 0x66;            /* 32-bit operand size */
 505         *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
 506         *p++ = gpr[i];
 507         *p++ = gpr[i] >> 8;
 508         *p++ = gpr[i] >> 16;
 509         *p++ = gpr[i] >> 24;
 510     }
 511
 512     *p++ = 0xea;                /* JMP FAR */
 513     *p++ = ip;                  /* IP */
 514     *p++ = ip >> 8;
 515     *p++ = segs[1];             /* CS */
 516     *p++ = segs[1] >> 8;
 517
 518     /* sign rom */
 519     sum = 0;
 520     for (i = 0; i < (sizeof(rom) - 1); i++)
 521         sum += rom[i];
 522     rom[sizeof(rom) - 1] = -sum;
 523
 524     memcpy(option_rom, rom, sizeof(rom));
 525 }
 526
 527 static long get_file_size(FILE *f)
 528 {
 529     long where, size;
 530
 531     /* XXX: on Unix systems, using fstat() probably makes more sense */
 532
 533     where = ftell(f);
 534     fseek(f, 0, SEEK_END);
 535     size = ftell(f);
 536     fseek(f, where, SEEK_SET);
 537
 538     return size;
 539 }
 540
 541 static void load_linux(uint8_t *option_rom,
 542                        const char *kernel_filename,
 543                        const char *initrd_filename,
 544                        const char *kernel_cmdline)
 545 {
 546     uint16_t protocol;
 547     uint32_t gpr[8];
 548     uint16_t seg[6];
 549     uint16_t real_seg;
 550     int setup_size, kernel_size, initrd_size, cmdline_size;
 551     uint32_t initrd_max;
 552     uint8_t header[1024];
 553     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
 554     FILE *f, *fi;
 555
 556     /* Align to 16 bytes as a paranoia measure */
 557     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 558
 559     /* load the kernel header */
 560     f = fopen(kernel_filename, "rb");
 561     if (!f || !(kernel_size = get_file_size(f)) ||
 562         fread(header, 1, 1024, f) != 1024) {
 563         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 564                 kernel_filename);
 565         exit(1);
 566     }
 567
 568     /* kernel protocol version */
 569 #if 0
 570     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 571 #endif
 572     if (ldl_p(header+0x202) == 0x53726448)
 573         protocol = lduw_p(header+0x206);
 574     else
 575         protocol = 0;
 576
 577     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 578         /* Low kernel */
 579         real_addr    = 0x90000;
 580         cmdline_addr = 0x9a000 - cmdline_size;
 581         prot_addr    = 0x10000;
 582     } else if (protocol < 0x202) {
 583         /* High but ancient kernel */
 584         real_addr    = 0x90000;
 585         cmdline_addr = 0x9a000 - cmdline_size;
 586         prot_addr    = 0x100000;
 587     } else {
 588         /* High and recent kernel */
 589         real_addr    = 0x10000;
 590         cmdline_addr = 0x20000;
 591         prot_addr    = 0x100000;
 592     }
 593
 594 #if 0
 595     fprintf(stderr,
 596             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 597             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 598             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 599             real_addr,
 600             cmdline_addr,
 601             prot_addr);
 602 #endif
 603
 604     /* highest address for loading the initrd */
 605     if (protocol >= 0x203)
 606         initrd_max = ldl_p(header+0x22c);
 607     else
 608         initrd_max = 0x37ffffff;
 609
 610     if (initrd_max >= ram_size-ACPI_DATA_SIZE)
 611         initrd_max = ram_size-ACPI_DATA_SIZE-1;
 612
 613     /* kernel command line */
 614     pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
 615
 616     if (protocol >= 0x202) {
 617         stl_p(header+0x228, cmdline_addr);
 618     } else {
 619         stw_p(header+0x20, 0xA33F);
 620         stw_p(header+0x22, cmdline_addr-real_addr);
 621     }
 622
 623     /* loader type */
 624     /* High nybble = B reserved for Qemu; low nybble is revision number.
 625        If this code is substantially changed, you may want to consider
 626        incrementing the revision. */
 627     if (protocol >= 0x200)
 628         header[0x210] = 0xB0;
 629
 630     /* heap */
 631     if (protocol >= 0x201) {
 632         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 633         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 634     }
 635
 636     /* load initrd */
 637     if (initrd_filename) {
 638         if (protocol < 0x200) {
 639             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 640             exit(1);
 641         }
 642
 643         fi = fopen(initrd_filename, "rb");
 644         if (!fi) {
 645             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 646                     initrd_filename);
 647             exit(1);
 648         }
 649
 650         initrd_size = get_file_size(fi);
 651         initrd_addr = (initrd_max-initrd_size) & ~4095;
 652
 653         fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
 654                 "\n", initrd_size, initrd_addr);
 655
 656         if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
 657             fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
 658                     initrd_filename);
 659             exit(1);
 660         }
 661         fclose(fi);
 662
 663         stl_p(header+0x218, initrd_addr);
 664         stl_p(header+0x21c, initrd_size);
 665     }
 666
 667     /* store the finalized header and load the rest of the kernel */
 668     cpu_physical_memory_write(real_addr, header, 1024);
 669
 670     setup_size = header[0x1f1];
 671     if (setup_size == 0)
 672         setup_size = 4;
 673
 674     setup_size = (setup_size+1)*512;
 675     kernel_size -= setup_size;  /* Size of protected-mode code */
 676
 677     if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
 678         !fread_targphys_ok(prot_addr, kernel_size, f)) {
 679         fprintf(stderr, "qemu: read error on kernel '%s'\n",
 680                 kernel_filename);
 681         exit(1);
 682     }
 683     fclose(f);
 684
 685     /* generate bootsector to set up the initial register state */
 686     real_seg = real_addr >> 4;
 687     seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
 688     seg[1] = real_seg+0x20;     /* CS */
 689     memset(gpr, 0, sizeof gpr);
 690     gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
 691
 692     generate_bootsect(option_rom, gpr, seg, 0);
 693 }
 694
 695 static void main_cpu_reset(void *opaque)
 696 {
 697     CPUState *env = opaque;
 698     cpu_reset(env);
 699 }
 700
 701 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 702 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 703 static const int ide_irq[2] = { 14, 15 };
 704
 705 #define NE2000_NB_MAX 6
 706
 707 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 708 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 709
 710 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 711 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 712
 713 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 714 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 715
 716 #ifdef HAS_AUDIO
 717 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 718 {
 719     struct soundhw *c;
 720     int audio_enabled = 0;
 721
 722     for (c = soundhw; !audio_enabled && c->name; ++c) {
 723         audio_enabled = c->enabled;
 724     }
 725
 726     if (audio_enabled) {
 727         AudioState *s;
 728
 729         s = AUD_init ();
 730         if (s) {
 731             for (c = soundhw; c->name; ++c) {
 732                 if (c->enabled) {
 733                     if (c->isa) {
 734                         c->init.init_isa (s, pic);
 735                     }
 736                     else {
 737                         if (pci_bus) {
 738                             c->init.init_pci (pci_bus, s);
 739                         }
 740                     }
 741                 }
 742             }
 743         }
 744     }
 745 }
 746 #endif
 747
 748 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 749 {
 750     static int nb_ne2k = 0;
 751
 752     if (nb_ne2k == NE2000_NB_MAX)
 753         return;
 754     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 755     nb_ne2k++;
 756 }
 757
 758 /* PC hardware initialisation */
 759 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
 760                      const char *boot_device,
 761                      const char *kernel_filename, const char *kernel_cmdline,
 762                      const char *initrd_filename,
 763                      int pci_enabled, const char *cpu_model)
 764 {
 765     char buf[1024];
 766     int ret, linux_boot, i;
 767     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
 768     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 769     int bios_size, isa_bios_size, vga_bios_size;
 770     PCIBus *pci_bus;
 771     int piix3_devfn = -1;
 772     CPUState *env;
 773     qemu_irq *cpu_irq;
 774     qemu_irq *i8259;
 775     int index;
 776     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 777     BlockDriverState *fd[MAX_FD];
 778
 779     if (ram_size >= 0xe0000000 ) {
 780         above_4g_mem_size = ram_size - 0xe0000000;
 781         below_4g_mem_size = 0xe0000000;
 782     } else {
 783         below_4g_mem_size = ram_size;
 784     }
 785
 786     linux_boot = (kernel_filename != NULL);
 787
 788     /* init CPUs */
 789     if (cpu_model == NULL) {
 790 #ifdef TARGET_X86_64
 791         cpu_model = "qemu64";
 792 #else
 793         cpu_model = "qemu32";
 794 #endif
 795     }
 796
 797     for(i = 0; i < smp_cpus; i++) {
 798         env = cpu_init(cpu_model);
 799         if (!env) {
 800             fprintf(stderr, "Unable to find x86 CPU definition\n");
 801             exit(1);
 802         }
 803         if (i != 0)
 804             env->halted = 1;
 805         if (smp_cpus > 1) {
 806             /* XXX: enable it in all cases */
 807             env->cpuid_features |= CPUID_APIC;
 808         }
 809         qemu_register_reset(main_cpu_reset, env);
 810         if (pci_enabled) {
 811             apic_init(env);
 812         }
 813     }
 814
 815     vmport_init();
 816
 817     /* allocate RAM */
 818     ram_addr = qemu_ram_alloc(0xa0000);
 819     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 820
 821     /* Allocate, even though we won't register, so we don't break the
 822      * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
 823      * and some bios areas, which will be registered later
 824      */
 825     ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
 826     ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
 827     cpu_register_physical_memory(0x100000,
 828                  below_4g_mem_size - 0x100000,
 829                  ram_addr);
 830
 831     /* above 4giga memory allocation */
 832     if (above_4g_mem_size > 0) {
 833         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 834         cpu_register_physical_memory(0x100000000ULL,
 835                                      above_4g_mem_size,
 836                                      ram_addr);
 837     }
 838
 839
 840     /* allocate VGA RAM */
 841     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 842
 843     /* BIOS load */
 844     if (bios_name == NULL)
 845         bios_name = BIOS_FILENAME;
 846     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 847     bios_size = get_image_size(buf);
 848     if (bios_size <= 0 ||
 849         (bios_size % 65536) != 0) {
 850         goto bios_error;
 851     }
 852     bios_offset = qemu_ram_alloc(bios_size);
 853     ret = load_image(buf, phys_ram_base + bios_offset);
 854     if (ret != bios_size) {
 855     bios_error:
 856         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 857         exit(1);
 858     }
 859
 860     if (cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled) {
 861         /* VGA BIOS load */
 862         if (cirrus_vga_enabled) {
 863             snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 864         } else {
 865             snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 866         }
 867         vga_bios_size = get_image_size(buf);
 868         if (vga_bios_size <= 0 || vga_bios_size > 65536)
 869             goto vga_bios_error;
 870         vga_bios_offset = qemu_ram_alloc(65536);
 871
 872         ret = load_image(buf, phys_ram_base + vga_bios_offset);
 873         if (ret != vga_bios_size) {
 874 vga_bios_error:
 875             fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
 876             exit(1);
 877         }
 878
 879         /* setup basic memory access */
 880         cpu_register_physical_memory(0xc0000, 0x10000,
 881                                      vga_bios_offset | IO_MEM_ROM);
 882     }
 883
 884     /* map the last 128KB of the BIOS in ISA space */
 885     isa_bios_size = bios_size;
 886     if (isa_bios_size > (128 * 1024))
 887         isa_bios_size = 128 * 1024;
 888     cpu_register_physical_memory(0x100000 - isa_bios_size,
 889                                  isa_bios_size,
 890                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 891
 892     {
 893         ram_addr_t option_rom_offset;
 894         int size, offset;
 895
 896         offset = 0;
 897         if (linux_boot) {
 898             option_rom_offset = qemu_ram_alloc(TARGET_PAGE_SIZE);
 899             load_linux(phys_ram_base + option_rom_offset,
 900                        kernel_filename, initrd_filename, kernel_cmdline);
 901             cpu_register_physical_memory(0xd0000, TARGET_PAGE_SIZE,
 902                                          option_rom_offset | IO_MEM_ROM);
 903             offset = TARGET_PAGE_SIZE;
 904         }
 905
 906         for (i = 0; i < nb_option_roms; i++) {
 907             size = get_image_size(option_rom[i]);
 908             if (size < 0) {
 909                 fprintf(stderr, "Could not load option rom '%s'\n",
 910                         option_rom[i]);
 911                 exit(1);
 912             }
 913             if (size > (0x10000 - offset))
 914                 goto option_rom_error;
 915             option_rom_offset = qemu_ram_alloc(size);
 916             ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
 917             if (ret != size) {
 918             option_rom_error:
 919                 fprintf(stderr, "Too many option ROMS\n");
 920                 exit(1);
 921             }
 922             size = (size + 4095) & ~4095;
 923             cpu_register_physical_memory(0xd0000 + offset,
 924                                          size, option_rom_offset | IO_MEM_ROM);
 925             offset += size;
 926         }
 927     }
 928
 929     /* map all the bios at the top of memory */
 930     cpu_register_physical_memory((uint32_t)(-bios_size),
 931                                  bios_size, bios_offset | IO_MEM_ROM);
 932
 933     bochs_bios_init();
 934
 935     cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
 936     i8259 = i8259_init(cpu_irq[0]);
 937     ferr_irq = i8259[13];
 938
 939     if (pci_enabled) {
 940         pci_bus = i440fx_init(&i440fx_state, i8259);
 941         piix3_devfn = piix3_init(pci_bus, -1);
 942     } else {
 943         pci_bus = NULL;
 944     }
 945
 946     /* init basic PC hardware */
 947     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 948
 949     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 950
 951     if (cirrus_vga_enabled) {
 952         if (pci_enabled) {
 953             pci_cirrus_vga_init(pci_bus,
 954                                 phys_ram_base + vga_ram_addr,
 955                                 vga_ram_addr, vga_ram_size);
 956         } else {
 957             isa_cirrus_vga_init(phys_ram_base + vga_ram_addr,
 958                                 vga_ram_addr, vga_ram_size);
 959         }
 960     } else if (vmsvga_enabled) {
 961         if (pci_enabled)
 962             pci_vmsvga_init(pci_bus, phys_ram_base + vga_ram_addr,
 963                             vga_ram_addr, vga_ram_size);
 964         else
 965             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 966     } else if (std_vga_enabled) {
 967         if (pci_enabled) {
 968             pci_vga_init(pci_bus, phys_ram_base + vga_ram_addr,
 969                          vga_ram_addr, vga_ram_size, 0, 0);
 970         } else {
 971             isa_vga_init(phys_ram_base + vga_ram_addr,
 972                          vga_ram_addr, vga_ram_size);
 973         }
 974     }
 975
 976     rtc_state = rtc_init(0x70, i8259[8], 2000);
 977
 978     qemu_register_boot_set(pc_boot_set, rtc_state);
 979
 980     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 981     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 982
 983     if (pci_enabled) {
 984         ioapic = ioapic_init();
 985     }
 986     pit = pit_init(0x40, i8259[0]);
 987     pcspk_init(pit);
 988     if (!no_hpet) {
 989         hpet_init(i8259);
 990     }
 991     if (pci_enabled) {
 992         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 993     }
 994
 995     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 996         if (serial_hds[i]) {
 997             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
 998                         serial_hds[i]);
 999         }
1000     }
1001
1002     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1003         if (parallel_hds[i]) {
1004             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1005                           parallel_hds[i]);
1006         }
1007     }
1008
1009     for(i = 0; i < nb_nics; i++) {
1010         NICInfo *nd = &nd_table[i];
1011
1012         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1013             pc_init_ne2k_isa(nd, i8259);
1014         else
1015             pci_nic_init(pci_bus, nd, -1, "ne2k_pci");
1016     }
1017
1018     qemu_system_hot_add_init();
1019
1020     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1021         fprintf(stderr, "qemu: too many IDE bus\n");
1022         exit(1);
1023     }
1024
1025     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1026         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1027         if (index != -1)
1028             hd[i] = drives_table[index].bdrv;
1029         else
1030             hd[i] = NULL;
1031     }
1032
1033     if (pci_enabled) {
1034         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1035     } else {
1036         for(i = 0; i < MAX_IDE_BUS; i++) {
1037             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1038                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1039         }
1040     }
1041
1042     i8042_init(i8259[1], i8259[12], 0x60);
1043     DMA_init(0);
1044 #ifdef HAS_AUDIO
1045     audio_init(pci_enabled ? pci_bus : NULL, i8259);
1046 #endif
1047
1048     for(i = 0; i < MAX_FD; i++) {
1049         index = drive_get_index(IF_FLOPPY, 0, i);
1050         if (index != -1)
1051             fd[i] = drives_table[index].bdrv;
1052         else
1053             fd[i] = NULL;
1054     }
1055     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1056
1057     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1058
1059     if (pci_enabled && usb_enabled) {
1060         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1061     }
1062
1063     if (pci_enabled && acpi_enabled) {
1064         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1065         i2c_bus *smbus;
1066
1067         /* TODO: Populate SPD eeprom data.  */
1068         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1069         for (i = 0; i < 8; i++) {
1070             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1071         }
1072     }
1073
1074     if (i440fx_state) {
1075         i440fx_init_memory_mappings(i440fx_state);
1076     }
1077
1078     if (pci_enabled) {
1079         int max_bus;
1080         int bus, unit;
1081         void *scsi;
1082
1083         max_bus = drive_get_max_bus(IF_SCSI);
1084
1085         for (bus = 0; bus <= max_bus; bus++) {
1086             scsi = lsi_scsi_init(pci_bus, -1);
1087             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1088                 index = drive_get_index(IF_SCSI, bus, unit);
1089                 if (index == -1)
1090                     continue;
1091                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1092             }
1093         }
1094     }
1095
1096     /* Add virtio block devices */
1097     if (pci_enabled) {
1098         int index;
1099         int unit_id = 0;
1100
1101         while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1102             virtio_blk_init(pci_bus, drives_table[index].bdrv);
1103             unit_id++;
1104         }
1105     }
1106
1107     /* Add virtio balloon device */
1108     if (pci_enabled)
1109         virtio_balloon_init(pci_bus);
1110
1111     /* Add virtio console devices */
1112     if (pci_enabled) {
1113         for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1114             if (virtcon_hds[i])
1115                 virtio_console_init(pci_bus, virtcon_hds[i]);
1116         }
1117     }
1118 }
1119
1120 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1121                         const char *boot_device,
1122                         const char *kernel_filename,
1123                         const char *kernel_cmdline,
1124                         const char *initrd_filename,
1125                         const char *cpu_model)
1126 {
1127     pc_init1(ram_size, vga_ram_size, boot_device,
1128              kernel_filename, kernel_cmdline,
1129              initrd_filename, 1, cpu_model);
1130 }
1131
1132 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1133                         const char *boot_device,
1134                         const char *kernel_filename,
1135                         const char *kernel_cmdline,
1136                         const char *initrd_filename,
1137                         const char *cpu_model)
1138 {
1139     pc_init1(ram_size, vga_ram_size, boot_device,
1140              kernel_filename, kernel_cmdline,
1141              initrd_filename, 0, cpu_model);
1142 }
1143
1144 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1145    BIOS will read it and start S3 resume at POST Entry */
1146 void cmos_set_s3_resume(void)
1147 {
1148     if (rtc_state)
1149         rtc_set_memory(rtc_state, 0xF, 0xFE);
1150 }
1151
1152 QEMUMachine pc_machine = {
1153     .name = "pc",
1154     .desc = "Standard PC",
1155     .init = pc_init_pci,
1156     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1157     .max_cpus = 255,
1158 };
1159
1160 QEMUMachine isapc_machine = {
1161     .name = "isapc",
1162     .desc = "ISA-only PC",
1163     .init = pc_init_isa,
1164     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1165     .max_cpus = 1,
1166 };