hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "block.h"
  29 #include "sysemu.h"
  30 #include "audio/audio.h"
  31 #include "net.h"
  32 #include "smbus.h"
  33 #include "boards.h"
  34
  35 /* output Bochs bios info messages */
  36 //#define DEBUG_BIOS
  37
  38 #define BIOS_FILENAME "bios.bin"
  39 #define VGABIOS_FILENAME "vgabios.bin"
  40 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  41
  42 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  43 #define ACPI_DATA_SIZE       0x10000
  44
  45 #define MAX_IDE_BUS 2
  46
  47 static fdctrl_t *floppy_controller;
  48 static RTCState *rtc_state;
  49 static PITState *pit;
  50 static IOAPICState *ioapic;
  51 static PCIDevice *i440fx_state;
  52
  53 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  54 {
  55 }
  56
  57 /* MSDOS compatibility mode FPU exception support */
  58 static qemu_irq ferr_irq;
  59 /* XXX: add IGNNE support */
  60 void cpu_set_ferr(CPUX86State *s)
  61 {
  62     qemu_irq_raise(ferr_irq);
  63 }
  64
  65 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  66 {
  67     qemu_irq_lower(ferr_irq);
  68 }
  69
  70 /* TSC handling */
  71 uint64_t cpu_get_tsc(CPUX86State *env)
  72 {
  73     /* Note: when using kqemu, it is more logical to return the host TSC
  74        because kqemu does not trap the RDTSC instruction for
  75        performance reasons */
  76 #if USE_KQEMU
  77     if (env->kqemu_enabled) {
  78         return cpu_get_real_ticks();
  79     } else
  80 #endif
  81     {
  82         return cpu_get_ticks();
  83     }
  84 }
  85
  86 /* SMM support */
  87 void cpu_smm_update(CPUState *env)
  88 {
  89     if (i440fx_state && env == first_cpu)
  90         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
  91 }
  92
  93
  94 /* IRQ handling */
  95 int cpu_get_pic_interrupt(CPUState *env)
  96 {
  97     int intno;
  98
  99     intno = apic_get_interrupt(env);
 100     if (intno >= 0) {
 101         /* set irq request if a PIC irq is still pending */
 102         /* XXX: improve that */
 103         pic_update_irq(isa_pic);
 104         return intno;
 105     }
 106     /* read the irq from the PIC */
 107     if (!apic_accept_pic_intr(env))
 108         return -1;
 109
 110     intno = pic_read_irq(isa_pic);
 111     return intno;
 112 }
 113
 114 static void pic_irq_request(void *opaque, int irq, int level)
 115 {
 116     CPUState *env = opaque;
 117     if (level && apic_accept_pic_intr(env))
 118         cpu_interrupt(env, CPU_INTERRUPT_HARD);
 119 }
 120
 121 /* PC cmos mappings */
 122
 123 #define REG_EQUIPMENT_BYTE          0x14
 124
 125 static int cmos_get_fd_drive_type(int fd0)
 126 {
 127     int val;
 128
 129     switch (fd0) {
 130     case 0:
 131         /* 1.44 Mb 3"5 drive */
 132         val = 4;
 133         break;
 134     case 1:
 135         /* 2.88 Mb 3"5 drive */
 136         val = 5;
 137         break;
 138     case 2:
 139         /* 1.2 Mb 5"5 drive */
 140         val = 2;
 141         break;
 142     default:
 143         val = 0;
 144         break;
 145     }
 146     return val;
 147 }
 148
 149 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 150 {
 151     RTCState *s = rtc_state;
 152     int cylinders, heads, sectors;
 153     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 154     rtc_set_memory(s, type_ofs, 47);
 155     rtc_set_memory(s, info_ofs, cylinders);
 156     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 157     rtc_set_memory(s, info_ofs + 2, heads);
 158     rtc_set_memory(s, info_ofs + 3, 0xff);
 159     rtc_set_memory(s, info_ofs + 4, 0xff);
 160     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 161     rtc_set_memory(s, info_ofs + 6, cylinders);
 162     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 163     rtc_set_memory(s, info_ofs + 8, sectors);
 164 }
 165
 166 /* convert boot_device letter to something recognizable by the bios */
 167 static int boot_device2nibble(char boot_device)
 168 {
 169     switch(boot_device) {
 170     case 'a':
 171     case 'b':
 172         return 0x01; /* floppy boot */
 173     case 'c':
 174         return 0x02; /* hard drive boot */
 175     case 'd':
 176         return 0x03; /* CD-ROM boot */
 177     case 'n':
 178         return 0x04; /* Network boot */
 179     }
 180     return 0;
 181 }
 182
 183 /* hd_table must contain 4 block drivers */
 184 static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **hd_table)
 185 {
 186     RTCState *s = rtc_state;
 187     int nbds, bds[3] = { 0, };
 188     int val;
 189     int fd0, fd1, nb;
 190     int i;
 191
 192     /* various important CMOS locations needed by PC/Bochs bios */
 193
 194     /* memory size */
 195     val = 640; /* base memory in K */
 196     rtc_set_memory(s, 0x15, val);
 197     rtc_set_memory(s, 0x16, val >> 8);
 198
 199     val = (ram_size / 1024) - 1024;
 200     if (val > 65535)
 201         val = 65535;
 202     rtc_set_memory(s, 0x17, val);
 203     rtc_set_memory(s, 0x18, val >> 8);
 204     rtc_set_memory(s, 0x30, val);
 205     rtc_set_memory(s, 0x31, val >> 8);
 206
 207     if (ram_size > (16 * 1024 * 1024))
 208         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 209     else
 210         val = 0;
 211     if (val > 65535)
 212         val = 65535;
 213     rtc_set_memory(s, 0x34, val);
 214     rtc_set_memory(s, 0x35, val >> 8);
 215
 216     /* set boot devices, and disable floppy signature check if requested */
 217 #define PC_MAX_BOOT_DEVICES 3
 218     nbds = strlen(boot_device);
 219     if (nbds > PC_MAX_BOOT_DEVICES) {
 220         fprintf(stderr, "Too many boot devices for PC\n");
 221         exit(1);
 222     }
 223     for (i = 0; i < nbds; i++) {
 224         bds[i] = boot_device2nibble(boot_device[i]);
 225         if (bds[i] == 0) {
 226             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 227                     boot_device[i]);
 228             exit(1);
 229         }
 230     }
 231     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 232     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 233
 234     /* floppy type */
 235
 236     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 237     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 238
 239     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 240     rtc_set_memory(s, 0x10, val);
 241
 242     val = 0;
 243     nb = 0;
 244     if (fd0 < 3)
 245         nb++;
 246     if (fd1 < 3)
 247         nb++;
 248     switch (nb) {
 249     case 0:
 250         break;
 251     case 1:
 252         val |= 0x01; /* 1 drive, ready for boot */
 253         break;
 254     case 2:
 255         val |= 0x41; /* 2 drives, ready for boot */
 256         break;
 257     }
 258     val |= 0x02; /* FPU is there */
 259     val |= 0x04; /* PS/2 mouse installed */
 260     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 261
 262     /* hard drives */
 263
 264     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 265     if (hd_table[0])
 266         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 267     if (hd_table[1])
 268         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 269
 270     val = 0;
 271     for (i = 0; i < 4; i++) {
 272         if (hd_table[i]) {
 273             int cylinders, heads, sectors, translation;
 274             /* NOTE: bdrv_get_geometry_hint() returns the physical
 275                 geometry.  It is always such that: 1 <= sects <= 63, 1
 276                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 277                 geometry can be different if a translation is done. */
 278             translation = bdrv_get_translation_hint(hd_table[i]);
 279             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 280                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 281                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 282                     /* No translation. */
 283                     translation = 0;
 284                 } else {
 285                     /* LBA translation. */
 286                     translation = 1;
 287                 }
 288             } else {
 289                 translation--;
 290             }
 291             val |= translation << (i * 2);
 292         }
 293     }
 294     rtc_set_memory(s, 0x39, val);
 295 }
 296
 297 void ioport_set_a20(int enable)
 298 {
 299     /* XXX: send to all CPUs ? */
 300     cpu_x86_set_a20(first_cpu, enable);
 301 }
 302
 303 int ioport_get_a20(void)
 304 {
 305     return ((first_cpu->a20_mask >> 20) & 1);
 306 }
 307
 308 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 309 {
 310     ioport_set_a20((val >> 1) & 1);
 311     /* XXX: bit 0 is fast reset */
 312 }
 313
 314 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 315 {
 316     return ioport_get_a20() << 1;
 317 }
 318
 319 /***********************************************************/
 320 /* Bochs BIOS debug ports */
 321
 322 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 323 {
 324     static const char shutdown_str[8] = "Shutdown";
 325     static int shutdown_index = 0;
 326
 327     switch(addr) {
 328         /* Bochs BIOS messages */
 329     case 0x400:
 330     case 0x401:
 331         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 332         exit(1);
 333     case 0x402:
 334     case 0x403:
 335 #ifdef DEBUG_BIOS
 336         fprintf(stderr, "%c", val);
 337 #endif
 338         break;
 339     case 0x8900:
 340         /* same as Bochs power off */
 341         if (val == shutdown_str[shutdown_index]) {
 342             shutdown_index++;
 343             if (shutdown_index == 8) {
 344                 shutdown_index = 0;
 345                 qemu_system_shutdown_request();
 346             }
 347         } else {
 348             shutdown_index = 0;
 349         }
 350         break;
 351
 352         /* LGPL'ed VGA BIOS messages */
 353     case 0x501:
 354     case 0x502:
 355         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 356         exit(1);
 357     case 0x500:
 358     case 0x503:
 359 #ifdef DEBUG_BIOS
 360         fprintf(stderr, "%c", val);
 361 #endif
 362         break;
 363     }
 364 }
 365
 366 static void bochs_bios_init(void)
 367 {
 368     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 369     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 370     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 371     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 372     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 373
 374     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 375     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 376     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 377     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 378 }
 379
 380 /* Generate an initial boot sector which sets state and jump to
 381    a specified vector */
 382 static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
 383 {
 384     uint8_t bootsect[512], *p;
 385     int i;
 386     int hda;
 387
 388     hda = drive_get_index(IF_IDE, 0, 0);
 389     if (hda == -1) {
 390         fprintf(stderr, "A disk image must be given for 'hda' when booting "
 391                 "a Linux kernel\n");
 392         exit(1);
 393     }
 394
 395     memset(bootsect, 0, sizeof(bootsect));
 396
 397     /* Copy the MSDOS partition table if possible */
 398     bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1);
 399
 400     /* Make sure we have a partition signature */
 401     bootsect[510] = 0x55;
 402     bootsect[511] = 0xaa;
 403
 404     /* Actual code */
 405     p = bootsect;
 406     *p++ = 0xfa;                /* CLI */
 407     *p++ = 0xfc;                /* CLD */
 408
 409     for (i = 0; i < 6; i++) {
 410         if (i == 1)             /* Skip CS */
 411             continue;
 412
 413         *p++ = 0xb8;            /* MOV AX,imm16 */
 414         *p++ = segs[i];
 415         *p++ = segs[i] >> 8;
 416         *p++ = 0x8e;            /* MOV <seg>,AX */
 417         *p++ = 0xc0 + (i << 3);
 418     }
 419
 420     for (i = 0; i < 8; i++) {
 421         *p++ = 0x66;            /* 32-bit operand size */
 422         *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
 423         *p++ = gpr[i];
 424         *p++ = gpr[i] >> 8;
 425         *p++ = gpr[i] >> 16;
 426         *p++ = gpr[i] >> 24;
 427     }
 428
 429     *p++ = 0xea;                /* JMP FAR */
 430     *p++ = ip;                  /* IP */
 431     *p++ = ip >> 8;
 432     *p++ = segs[1];             /* CS */
 433     *p++ = segs[1] >> 8;
 434
 435     bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect));
 436 }
 437
 438 static int load_kernel(const char *filename, uint8_t *addr,
 439                        uint8_t *real_addr)
 440 {
 441     int fd, size;
 442     int setup_sects;
 443
 444     fd = open(filename, O_RDONLY | O_BINARY);
 445     if (fd < 0)
 446         return -1;
 447
 448     /* load 16 bit code */
 449     if (read(fd, real_addr, 512) != 512)
 450         goto fail;
 451     setup_sects = real_addr[0x1F1];
 452     if (!setup_sects)
 453         setup_sects = 4;
 454     if (read(fd, real_addr + 512, setup_sects * 512) !=
 455         setup_sects * 512)
 456         goto fail;
 457
 458     /* load 32 bit code */
 459     size = read(fd, addr, 16 * 1024 * 1024);
 460     if (size < 0)
 461         goto fail;
 462     close(fd);
 463     return size;
 464  fail:
 465     close(fd);
 466     return -1;
 467 }
 468
 469 static long get_file_size(FILE *f)
 470 {
 471     long where, size;
 472
 473     /* XXX: on Unix systems, using fstat() probably makes more sense */
 474
 475     where = ftell(f);
 476     fseek(f, 0, SEEK_END);
 477     size = ftell(f);
 478     fseek(f, where, SEEK_SET);
 479
 480     return size;
 481 }
 482
 483 static void load_linux(const char *kernel_filename,
 484                        const char *initrd_filename,
 485                        const char *kernel_cmdline)
 486 {
 487     uint16_t protocol;
 488     uint32_t gpr[8];
 489     uint16_t seg[6];
 490     uint16_t real_seg;
 491     int setup_size, kernel_size, initrd_size, cmdline_size;
 492     uint32_t initrd_max;
 493     uint8_t header[1024];
 494     uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr;
 495     FILE *f, *fi;
 496
 497     /* Align to 16 bytes as a paranoia measure */
 498     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 499
 500     /* load the kernel header */
 501     f = fopen(kernel_filename, "rb");
 502     if (!f || !(kernel_size = get_file_size(f)) ||
 503         fread(header, 1, 1024, f) != 1024) {
 504         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 505                 kernel_filename);
 506         exit(1);
 507     }
 508
 509     /* kernel protocol version */
 510 #if 0
 511     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 512 #endif
 513     if (ldl_p(header+0x202) == 0x53726448)
 514         protocol = lduw_p(header+0x206);
 515     else
 516         protocol = 0;
 517
 518     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 519         /* Low kernel */
 520         real_addr    = phys_ram_base + 0x90000;
 521         cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
 522         prot_addr    = phys_ram_base + 0x10000;
 523     } else if (protocol < 0x202) {
 524         /* High but ancient kernel */
 525         real_addr    = phys_ram_base + 0x90000;
 526         cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
 527         prot_addr    = phys_ram_base + 0x100000;
 528     } else {
 529         /* High and recent kernel */
 530         real_addr    = phys_ram_base + 0x10000;
 531         cmdline_addr = phys_ram_base + 0x20000;
 532         prot_addr    = phys_ram_base + 0x100000;
 533     }
 534
 535 #if 0
 536     fprintf(stderr,
 537             "qemu: real_addr     = %#zx\n"
 538             "qemu: cmdline_addr  = %#zx\n"
 539             "qemu: prot_addr     = %#zx\n",
 540             real_addr-phys_ram_base,
 541             cmdline_addr-phys_ram_base,
 542             prot_addr-phys_ram_base);
 543 #endif
 544
 545     /* highest address for loading the initrd */
 546     if (protocol >= 0x203)
 547         initrd_max = ldl_p(header+0x22c);
 548     else
 549         initrd_max = 0x37ffffff;
 550
 551     if (initrd_max >= ram_size-ACPI_DATA_SIZE)
 552         initrd_max = ram_size-ACPI_DATA_SIZE-1;
 553
 554     /* kernel command line */
 555     pstrcpy(cmdline_addr, 4096, kernel_cmdline);
 556
 557     if (protocol >= 0x202) {
 558         stl_p(header+0x228, cmdline_addr-phys_ram_base);
 559     } else {
 560         stw_p(header+0x20, 0xA33F);
 561         stw_p(header+0x22, cmdline_addr-real_addr);
 562     }
 563
 564     /* loader type */
 565     /* High nybble = B reserved for Qemu; low nybble is revision number.
 566        If this code is substantially changed, you may want to consider
 567        incrementing the revision. */
 568     if (protocol >= 0x200)
 569         header[0x210] = 0xB0;
 570
 571     /* heap */
 572     if (protocol >= 0x201) {
 573         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 574         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 575     }
 576
 577     /* load initrd */
 578     if (initrd_filename) {
 579         if (protocol < 0x200) {
 580             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 581             exit(1);
 582         }
 583
 584         fi = fopen(initrd_filename, "rb");
 585         if (!fi) {
 586             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 587                     initrd_filename);
 588             exit(1);
 589         }
 590
 591         initrd_size = get_file_size(fi);
 592         initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095);
 593
 594         fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
 595                 initrd_size, initrd_addr-phys_ram_base);
 596
 597         if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) {
 598             fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
 599                     initrd_filename);
 600             exit(1);
 601         }
 602         fclose(fi);
 603
 604         stl_p(header+0x218, initrd_addr-phys_ram_base);
 605         stl_p(header+0x21c, initrd_size);
 606     }
 607
 608     /* store the finalized header and load the rest of the kernel */
 609     memcpy(real_addr, header, 1024);
 610
 611     setup_size = header[0x1f1];
 612     if (setup_size == 0)
 613         setup_size = 4;
 614
 615     setup_size = (setup_size+1)*512;
 616     kernel_size -= setup_size;  /* Size of protected-mode code */
 617
 618     if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 ||
 619         fread(prot_addr, 1, kernel_size, f) != kernel_size) {
 620         fprintf(stderr, "qemu: read error on kernel '%s'\n",
 621                 kernel_filename);
 622         exit(1);
 623     }
 624     fclose(f);
 625
 626     /* generate bootsector to set up the initial register state */
 627     real_seg = (real_addr-phys_ram_base) >> 4;
 628     seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
 629     seg[1] = real_seg+0x20;     /* CS */
 630     memset(gpr, 0, sizeof gpr);
 631     gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
 632
 633     generate_bootsect(gpr, seg, 0);
 634 }
 635
 636 static void main_cpu_reset(void *opaque)
 637 {
 638     CPUState *env = opaque;
 639     cpu_reset(env);
 640 }
 641
 642 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 643 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 644 static const int ide_irq[2] = { 14, 15 };
 645
 646 #define NE2000_NB_MAX 6
 647
 648 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 649 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 650
 651 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 652 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 653
 654 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 655 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 656
 657 #ifdef HAS_AUDIO
 658 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 659 {
 660     struct soundhw *c;
 661     int audio_enabled = 0;
 662
 663     for (c = soundhw; !audio_enabled && c->name; ++c) {
 664         audio_enabled = c->enabled;
 665     }
 666
 667     if (audio_enabled) {
 668         AudioState *s;
 669
 670         s = AUD_init ();
 671         if (s) {
 672             for (c = soundhw; c->name; ++c) {
 673                 if (c->enabled) {
 674                     if (c->isa) {
 675                         c->init.init_isa (s, pic);
 676                     }
 677                     else {
 678                         if (pci_bus) {
 679                             c->init.init_pci (pci_bus, s);
 680                         }
 681                     }
 682                 }
 683             }
 684         }
 685     }
 686 }
 687 #endif
 688
 689 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 690 {
 691     static int nb_ne2k = 0;
 692
 693     if (nb_ne2k == NE2000_NB_MAX)
 694         return;
 695     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 696     nb_ne2k++;
 697 }
 698
 699 /* PC hardware initialisation */
 700 static void pc_init1(int ram_size, int vga_ram_size,
 701                      const char *boot_device, DisplayState *ds,
 702                      const char *kernel_filename, const char *kernel_cmdline,
 703                      const char *initrd_filename,
 704                      int pci_enabled, const char *cpu_model)
 705 {
 706     char buf[1024];
 707     int ret, linux_boot, i;
 708     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
 709     int bios_size, isa_bios_size, vga_bios_size;
 710     PCIBus *pci_bus;
 711     int piix3_devfn = -1;
 712     CPUState *env;
 713     NICInfo *nd;
 714     qemu_irq *cpu_irq;
 715     qemu_irq *i8259;
 716     int index;
 717     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 718     BlockDriverState *fd[MAX_FD];
 719
 720     linux_boot = (kernel_filename != NULL);
 721
 722     /* init CPUs */
 723     if (cpu_model == NULL) {
 724 #ifdef TARGET_X86_64
 725         cpu_model = "qemu64";
 726 #else
 727         cpu_model = "qemu32";
 728 #endif
 729     }
 730
 731     for(i = 0; i < smp_cpus; i++) {
 732         env = cpu_init(cpu_model);
 733         if (!env) {
 734             fprintf(stderr, "Unable to find x86 CPU definition\n");
 735             exit(1);
 736         }
 737         if (i != 0)
 738             env->hflags |= HF_HALTED_MASK;
 739         if (smp_cpus > 1) {
 740             /* XXX: enable it in all cases */
 741             env->cpuid_features |= CPUID_APIC;
 742         }
 743         register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
 744         qemu_register_reset(main_cpu_reset, env);
 745         if (pci_enabled) {
 746             apic_init(env);
 747         }
 748         vmport_init(env);
 749     }
 750
 751     /* allocate RAM */
 752     ram_addr = qemu_ram_alloc(ram_size);
 753     cpu_register_physical_memory(0, ram_size, ram_addr);
 754
 755     /* allocate VGA RAM */
 756     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 757
 758     /* BIOS load */
 759     if (bios_name == NULL)
 760         bios_name = BIOS_FILENAME;
 761     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 762     bios_size = get_image_size(buf);
 763     if (bios_size <= 0 ||
 764         (bios_size % 65536) != 0) {
 765         goto bios_error;
 766     }
 767     bios_offset = qemu_ram_alloc(bios_size);
 768     ret = load_image(buf, phys_ram_base + bios_offset);
 769     if (ret != bios_size) {
 770     bios_error:
 771         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 772         exit(1);
 773     }
 774
 775     /* VGA BIOS load */
 776     if (cirrus_vga_enabled) {
 777         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 778     } else {
 779         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 780     }
 781     vga_bios_size = get_image_size(buf);
 782     if (vga_bios_size <= 0 || vga_bios_size > 65536)
 783         goto vga_bios_error;
 784     vga_bios_offset = qemu_ram_alloc(65536);
 785
 786     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 787     if (ret != vga_bios_size) {
 788     vga_bios_error:
 789         fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
 790         exit(1);
 791     }
 792
 793     /* setup basic memory access */
 794     cpu_register_physical_memory(0xc0000, 0x10000,
 795                                  vga_bios_offset | IO_MEM_ROM);
 796
 797     /* map the last 128KB of the BIOS in ISA space */
 798     isa_bios_size = bios_size;
 799     if (isa_bios_size > (128 * 1024))
 800         isa_bios_size = 128 * 1024;
 801     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
 802                                  IO_MEM_UNASSIGNED);
 803     cpu_register_physical_memory(0x100000 - isa_bios_size,
 804                                  isa_bios_size,
 805                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 806
 807     {
 808         ram_addr_t option_rom_offset;
 809         int size, offset;
 810
 811         offset = 0;
 812         for (i = 0; i < nb_option_roms; i++) {
 813             size = get_image_size(option_rom[i]);
 814             if (size < 0) {
 815                 fprintf(stderr, "Could not load option rom '%s'\n",
 816                         option_rom[i]);
 817                 exit(1);
 818             }
 819             if (size > (0x10000 - offset))
 820                 goto option_rom_error;
 821             option_rom_offset = qemu_ram_alloc(size);
 822             ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
 823             if (ret != size) {
 824             option_rom_error:
 825                 fprintf(stderr, "Too many option ROMS\n");
 826                 exit(1);
 827             }
 828             size = (size + 4095) & ~4095;
 829             cpu_register_physical_memory(0xd0000 + offset,
 830                                          size, option_rom_offset | IO_MEM_ROM);
 831             offset += size;
 832         }
 833     }
 834
 835     /* map all the bios at the top of memory */
 836     cpu_register_physical_memory((uint32_t)(-bios_size),
 837                                  bios_size, bios_offset | IO_MEM_ROM);
 838
 839     bochs_bios_init();
 840
 841     if (linux_boot)
 842         load_linux(kernel_filename, initrd_filename, kernel_cmdline);
 843
 844     cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
 845     i8259 = i8259_init(cpu_irq[0]);
 846     ferr_irq = i8259[13];
 847
 848     if (pci_enabled) {
 849         pci_bus = i440fx_init(&i440fx_state, i8259);
 850         piix3_devfn = piix3_init(pci_bus, -1);
 851     } else {
 852         pci_bus = NULL;
 853     }
 854
 855     /* init basic PC hardware */
 856     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 857
 858     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 859
 860     if (cirrus_vga_enabled) {
 861         if (pci_enabled) {
 862             pci_cirrus_vga_init(pci_bus,
 863                                 ds, phys_ram_base + vga_ram_addr,
 864                                 vga_ram_addr, vga_ram_size);
 865         } else {
 866             isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
 867                                 vga_ram_addr, vga_ram_size);
 868         }
 869     } else if (vmsvga_enabled) {
 870         if (pci_enabled)
 871             pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size,
 872                             ram_size, vga_ram_size);
 873         else
 874             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 875     } else {
 876         if (pci_enabled) {
 877             pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 878                          vga_ram_addr, vga_ram_size, 0, 0);
 879         } else {
 880             isa_vga_init(ds, phys_ram_base + vga_ram_addr,
 881                          vga_ram_addr, vga_ram_size);
 882         }
 883     }
 884
 885     rtc_state = rtc_init(0x70, i8259[8]);
 886
 887     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
 888     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
 889
 890     if (pci_enabled) {
 891         ioapic = ioapic_init();
 892     }
 893     pit = pit_init(0x40, i8259[0]);
 894     pcspk_init(pit);
 895     if (pci_enabled) {
 896         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
 897     }
 898
 899     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 900         if (serial_hds[i]) {
 901             serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]);
 902         }
 903     }
 904
 905     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 906         if (parallel_hds[i]) {
 907             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
 908                           parallel_hds[i]);
 909         }
 910     }
 911
 912     for(i = 0; i < nb_nics; i++) {
 913         nd = &nd_table[i];
 914         if (!nd->model) {
 915             if (pci_enabled) {
 916                 nd->model = "ne2k_pci";
 917             } else {
 918                 nd->model = "ne2k_isa";
 919             }
 920         }
 921         if (strcmp(nd->model, "ne2k_isa") == 0) {
 922             pc_init_ne2k_isa(nd, i8259);
 923         } else if (pci_enabled) {
 924             if (strcmp(nd->model, "?") == 0)
 925                 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
 926             pci_nic_init(pci_bus, nd, -1);
 927         } else if (strcmp(nd->model, "?") == 0) {
 928             fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
 929             exit(1);
 930         } else {
 931             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
 932             exit(1);
 933         }
 934     }
 935
 936     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 937         fprintf(stderr, "qemu: too many IDE bus\n");
 938         exit(1);
 939     }
 940
 941     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 942         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 943         if (index != -1)
 944             hd[i] = drives_table[index].bdrv;
 945         else
 946             hd[i] = NULL;
 947     }
 948
 949     if (pci_enabled) {
 950         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
 951     } else {
 952         for(i = 0; i < MAX_IDE_BUS; i++) {
 953             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
 954                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
 955         }
 956     }
 957
 958     i8042_init(i8259[1], i8259[12], 0x60);
 959     DMA_init(0);
 960 #ifdef HAS_AUDIO
 961     audio_init(pci_enabled ? pci_bus : NULL, i8259);
 962 #endif
 963
 964     for(i = 0; i < MAX_FD; i++) {
 965         index = drive_get_index(IF_FLOPPY, 0, i);
 966         if (index != -1)
 967             fd[i] = drives_table[index].bdrv;
 968         else
 969             fd[i] = NULL;
 970     }
 971     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
 972
 973     cmos_init(ram_size, boot_device, hd);
 974
 975     if (pci_enabled && usb_enabled) {
 976         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
 977     }
 978
 979     if (pci_enabled && acpi_enabled) {
 980         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
 981         i2c_bus *smbus;
 982
 983         /* TODO: Populate SPD eeprom data.  */
 984         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100);
 985         for (i = 0; i < 8; i++) {
 986             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
 987         }
 988     }
 989
 990     if (i440fx_state) {
 991         i440fx_init_memory_mappings(i440fx_state);
 992     }
 993
 994     if (pci_enabled) {
 995         int max_bus;
 996         int bus, unit;
 997         void *scsi;
 998
 999         max_bus = drive_get_max_bus(IF_SCSI);
1000
1001         for (bus = 0; bus <= max_bus; bus++) {
1002             scsi = lsi_scsi_init(pci_bus, -1);
1003             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1004                 index = drive_get_index(IF_SCSI, bus, unit);
1005                 if (index == -1)
1006                     continue;
1007                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1008             }
1009         }
1010     }
1011 }
1012
1013 static void pc_init_pci(int ram_size, int vga_ram_size,
1014                         const char *boot_device, DisplayState *ds,
1015                         const char *kernel_filename,
1016                         const char *kernel_cmdline,
1017                         const char *initrd_filename,
1018                         const char *cpu_model)
1019 {
1020     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1021              kernel_filename, kernel_cmdline,
1022              initrd_filename, 1, cpu_model);
1023 }
1024
1025 static void pc_init_isa(int ram_size, int vga_ram_size,
1026                         const char *boot_device, DisplayState *ds,
1027                         const char *kernel_filename,
1028                         const char *kernel_cmdline,
1029                         const char *initrd_filename,
1030                         const char *cpu_model)
1031 {
1032     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1033              kernel_filename, kernel_cmdline,
1034              initrd_filename, 0, cpu_model);
1035 }
1036
1037 QEMUMachine pc_machine = {
1038     "pc",
1039     "Standard PC",
1040     pc_init_pci,
1041 };
1042
1043 QEMUMachine isapc_machine = {
1044     "isapc",
1045     "ISA-only PC",
1046     pc_init_isa,
1047 };