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Convert multiboot to fw_cfg backed data storage
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1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #include "hw.h"
25 #include "pc.h"
26 #include "fdc.h"
27 #include "pci.h"
28 #include "block.h"
29 #include "sysemu.h"
30 #include "audio/audio.h"
31 #include "net.h"
32 #include "smbus.h"
33 #include "boards.h"
34 #include "monitor.h"
35 #include "fw_cfg.h"
36 #include "hpet_emul.h"
37 #include "watchdog.h"
38 #include "smbios.h"
39 #include "ide.h"
40 #include "loader.h"
41 #include "elf.h"
42
43 /* output Bochs bios info messages */
44 //#define DEBUG_BIOS
45
46 /* Show multiboot debug output */
47 //#define DEBUG_MULTIBOOT
48
49 #define BIOS_FILENAME "bios.bin"
50
51 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
52
53 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
54 #define ACPI_DATA_SIZE 0x10000
55 #define BIOS_CFG_IOPORT 0x510
56 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
57 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
58 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
59
60 #define MAX_IDE_BUS 2
61
62 static fdctrl_t *floppy_controller;
63 static RTCState *rtc_state;
64 static PITState *pit;
65 static PCII440FXState *i440fx_state;
66
67 typedef struct isa_irq_state {
68 qemu_irq *i8259;
69 qemu_irq *ioapic;
70 } IsaIrqState;
71
72 static void isa_irq_handler(void *opaque, int n, int level)
73 {
74 IsaIrqState *isa = (IsaIrqState *)opaque;
75
76 if (n < 16) {
77 qemu_set_irq(isa->i8259[n], level);
78 }
79 if (isa->ioapic)
80 qemu_set_irq(isa->ioapic[n], level);
81 };
82
83 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
84 {
85 }
86
87 /* MSDOS compatibility mode FPU exception support */
88 static qemu_irq ferr_irq;
89 /* XXX: add IGNNE support */
90 void cpu_set_ferr(CPUX86State *s)
91 {
92 qemu_irq_raise(ferr_irq);
93 }
94
95 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
96 {
97 qemu_irq_lower(ferr_irq);
98 }
99
100 /* TSC handling */
101 uint64_t cpu_get_tsc(CPUX86State *env)
102 {
103 return cpu_get_ticks();
104 }
105
106 /* SMM support */
107 void cpu_smm_update(CPUState *env)
108 {
109 if (i440fx_state && env == first_cpu)
110 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
111 }
112
113
114 /* IRQ handling */
115 int cpu_get_pic_interrupt(CPUState *env)
116 {
117 int intno;
118
119 intno = apic_get_interrupt(env);
120 if (intno >= 0) {
121 /* set irq request if a PIC irq is still pending */
122 /* XXX: improve that */
123 pic_update_irq(isa_pic);
124 return intno;
125 }
126 /* read the irq from the PIC */
127 if (!apic_accept_pic_intr(env))
128 return -1;
129
130 intno = pic_read_irq(isa_pic);
131 return intno;
132 }
133
134 static void pic_irq_request(void *opaque, int irq, int level)
135 {
136 CPUState *env = first_cpu;
137
138 if (env->apic_state) {
139 while (env) {
140 if (apic_accept_pic_intr(env))
141 apic_deliver_pic_intr(env, level);
142 env = env->next_cpu;
143 }
144 } else {
145 if (level)
146 cpu_interrupt(env, CPU_INTERRUPT_HARD);
147 else
148 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
149 }
150 }
151
152 /* PC cmos mappings */
153
154 #define REG_EQUIPMENT_BYTE 0x14
155
156 static int cmos_get_fd_drive_type(int fd0)
157 {
158 int val;
159
160 switch (fd0) {
161 case 0:
162 /* 1.44 Mb 3"5 drive */
163 val = 4;
164 break;
165 case 1:
166 /* 2.88 Mb 3"5 drive */
167 val = 5;
168 break;
169 case 2:
170 /* 1.2 Mb 5"5 drive */
171 val = 2;
172 break;
173 default:
174 val = 0;
175 break;
176 }
177 return val;
178 }
179
180 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
181 {
182 RTCState *s = rtc_state;
183 int cylinders, heads, sectors;
184 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
185 rtc_set_memory(s, type_ofs, 47);
186 rtc_set_memory(s, info_ofs, cylinders);
187 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
188 rtc_set_memory(s, info_ofs + 2, heads);
189 rtc_set_memory(s, info_ofs + 3, 0xff);
190 rtc_set_memory(s, info_ofs + 4, 0xff);
191 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
192 rtc_set_memory(s, info_ofs + 6, cylinders);
193 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
194 rtc_set_memory(s, info_ofs + 8, sectors);
195 }
196
197 /* convert boot_device letter to something recognizable by the bios */
198 static int boot_device2nibble(char boot_device)
199 {
200 switch(boot_device) {
201 case 'a':
202 case 'b':
203 return 0x01; /* floppy boot */
204 case 'c':
205 return 0x02; /* hard drive boot */
206 case 'd':
207 return 0x03; /* CD-ROM boot */
208 case 'n':
209 return 0x04; /* Network boot */
210 }
211 return 0;
212 }
213
214 /* copy/pasted from cmos_init, should be made a general function
215 and used there as well */
216 static int pc_boot_set(void *opaque, const char *boot_device)
217 {
218 Monitor *mon = cur_mon;
219 #define PC_MAX_BOOT_DEVICES 3
220 RTCState *s = (RTCState *)opaque;
221 int nbds, bds[3] = { 0, };
222 int i;
223
224 nbds = strlen(boot_device);
225 if (nbds > PC_MAX_BOOT_DEVICES) {
226 monitor_printf(mon, "Too many boot devices for PC\n");
227 return(1);
228 }
229 for (i = 0; i < nbds; i++) {
230 bds[i] = boot_device2nibble(boot_device[i]);
231 if (bds[i] == 0) {
232 monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
233 boot_device[i]);
234 return(1);
235 }
236 }
237 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
238 rtc_set_memory(s, 0x38, (bds[2] << 4));
239 return(0);
240 }
241
242 /* hd_table must contain 4 block drivers */
243 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
244 const char *boot_device, DriveInfo **hd_table)
245 {
246 RTCState *s = rtc_state;
247 int nbds, bds[3] = { 0, };
248 int val;
249 int fd0, fd1, nb;
250 int i;
251
252 /* various important CMOS locations needed by PC/Bochs bios */
253
254 /* memory size */
255 val = 640; /* base memory in K */
256 rtc_set_memory(s, 0x15, val);
257 rtc_set_memory(s, 0x16, val >> 8);
258
259 val = (ram_size / 1024) - 1024;
260 if (val > 65535)
261 val = 65535;
262 rtc_set_memory(s, 0x17, val);
263 rtc_set_memory(s, 0x18, val >> 8);
264 rtc_set_memory(s, 0x30, val);
265 rtc_set_memory(s, 0x31, val >> 8);
266
267 if (above_4g_mem_size) {
268 rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
269 rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
270 rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
271 }
272
273 if (ram_size > (16 * 1024 * 1024))
274 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
275 else
276 val = 0;
277 if (val > 65535)
278 val = 65535;
279 rtc_set_memory(s, 0x34, val);
280 rtc_set_memory(s, 0x35, val >> 8);
281
282 /* set the number of CPU */
283 rtc_set_memory(s, 0x5f, smp_cpus - 1);
284
285 /* set boot devices, and disable floppy signature check if requested */
286 #define PC_MAX_BOOT_DEVICES 3
287 nbds = strlen(boot_device);
288 if (nbds > PC_MAX_BOOT_DEVICES) {
289 fprintf(stderr, "Too many boot devices for PC\n");
290 exit(1);
291 }
292 for (i = 0; i < nbds; i++) {
293 bds[i] = boot_device2nibble(boot_device[i]);
294 if (bds[i] == 0) {
295 fprintf(stderr, "Invalid boot device for PC: '%c'\n",
296 boot_device[i]);
297 exit(1);
298 }
299 }
300 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
301 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
302
303 /* floppy type */
304
305 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
306 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
307
308 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
309 rtc_set_memory(s, 0x10, val);
310
311 val = 0;
312 nb = 0;
313 if (fd0 < 3)
314 nb++;
315 if (fd1 < 3)
316 nb++;
317 switch (nb) {
318 case 0:
319 break;
320 case 1:
321 val |= 0x01; /* 1 drive, ready for boot */
322 break;
323 case 2:
324 val |= 0x41; /* 2 drives, ready for boot */
325 break;
326 }
327 val |= 0x02; /* FPU is there */
328 val |= 0x04; /* PS/2 mouse installed */
329 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
330
331 /* hard drives */
332
333 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
334 if (hd_table[0])
335 cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
336 if (hd_table[1])
337 cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
338
339 val = 0;
340 for (i = 0; i < 4; i++) {
341 if (hd_table[i]) {
342 int cylinders, heads, sectors, translation;
343 /* NOTE: bdrv_get_geometry_hint() returns the physical
344 geometry. It is always such that: 1 <= sects <= 63, 1
345 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
346 geometry can be different if a translation is done. */
347 translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
348 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
349 bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
350 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
351 /* No translation. */
352 translation = 0;
353 } else {
354 /* LBA translation. */
355 translation = 1;
356 }
357 } else {
358 translation--;
359 }
360 val |= translation << (i * 2);
361 }
362 }
363 rtc_set_memory(s, 0x39, val);
364 }
365
366 void ioport_set_a20(int enable)
367 {
368 /* XXX: send to all CPUs ? */
369 cpu_x86_set_a20(first_cpu, enable);
370 }
371
372 int ioport_get_a20(void)
373 {
374 return ((first_cpu->a20_mask >> 20) & 1);
375 }
376
377 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
378 {
379 ioport_set_a20((val >> 1) & 1);
380 /* XXX: bit 0 is fast reset */
381 }
382
383 static uint32_t ioport92_read(void *opaque, uint32_t addr)
384 {
385 return ioport_get_a20() << 1;
386 }
387
388 /***********************************************************/
389 /* Bochs BIOS debug ports */
390
391 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
392 {
393 static const char shutdown_str[8] = "Shutdown";
394 static int shutdown_index = 0;
395
396 switch(addr) {
397 /* Bochs BIOS messages */
398 case 0x400:
399 case 0x401:
400 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
401 exit(1);
402 case 0x402:
403 case 0x403:
404 #ifdef DEBUG_BIOS
405 fprintf(stderr, "%c", val);
406 #endif
407 break;
408 case 0x8900:
409 /* same as Bochs power off */
410 if (val == shutdown_str[shutdown_index]) {
411 shutdown_index++;
412 if (shutdown_index == 8) {
413 shutdown_index = 0;
414 qemu_system_shutdown_request();
415 }
416 } else {
417 shutdown_index = 0;
418 }
419 break;
420
421 /* LGPL'ed VGA BIOS messages */
422 case 0x501:
423 case 0x502:
424 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
425 exit(1);
426 case 0x500:
427 case 0x503:
428 #ifdef DEBUG_BIOS
429 fprintf(stderr, "%c", val);
430 #endif
431 break;
432 }
433 }
434
435 static void *bochs_bios_init(void)
436 {
437 void *fw_cfg;
438 uint8_t *smbios_table;
439 size_t smbios_len;
440 uint64_t *numa_fw_cfg;
441 int i, j;
442
443 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
444 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
445 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
446 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
447 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
448
449 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
450 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
451 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
452 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
453
454 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
455
456 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
457 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
458 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
459 acpi_tables_len);
460 fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
461
462 smbios_table = smbios_get_table(&smbios_len);
463 if (smbios_table)
464 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
465 smbios_table, smbios_len);
466
467 /* allocate memory for the NUMA channel: one (64bit) word for the number
468 * of nodes, one word for each VCPU->node and one word for each node to
469 * hold the amount of memory.
470 */
471 numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
472 numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
473 for (i = 0; i < smp_cpus; i++) {
474 for (j = 0; j < nb_numa_nodes; j++) {
475 if (node_cpumask[j] & (1 << i)) {
476 numa_fw_cfg[i + 1] = cpu_to_le64(j);
477 break;
478 }
479 }
480 }
481 for (i = 0; i < nb_numa_nodes; i++) {
482 numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
483 }
484 fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
485 (1 + smp_cpus + nb_numa_nodes) * 8);
486
487 return fw_cfg;
488 }
489
490 /* Generate an initial boot sector which sets state and jump to
491 a specified vector */
492 static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
493 {
494 uint8_t rom[512], *p, *reloc;
495 uint8_t sum;
496 int i;
497
498 memset(rom, 0, sizeof(rom));
499
500 p = rom;
501 /* Make sure we have an option rom signature */
502 *p++ = 0x55;
503 *p++ = 0xaa;
504
505 /* ROM size in sectors*/
506 *p++ = 1;
507
508 /* Hook int19 */
509
510 *p++ = 0x50; /* push ax */
511 *p++ = 0x1e; /* push ds */
512 *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */
513 *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */
514
515 *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */
516 *p++ = 0x64; *p++ = 0x00;
517 reloc = p;
518 *p++ = 0x00; *p++ = 0x00;
519
520 *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */
521 *p++ = 0x66; *p++ = 0x00;
522
523 *p++ = 0x1f; /* pop ds */
524 *p++ = 0x58; /* pop ax */
525 *p++ = 0xcb; /* lret */
526
527 /* Actual code */
528 *reloc = (p - rom);
529
530 *p++ = 0xfa; /* CLI */
531 *p++ = 0xfc; /* CLD */
532
533 for (i = 0; i < 6; i++) {
534 if (i == 1) /* Skip CS */
535 continue;
536
537 *p++ = 0xb8; /* MOV AX,imm16 */
538 *p++ = segs[i];
539 *p++ = segs[i] >> 8;
540 *p++ = 0x8e; /* MOV <seg>,AX */
541 *p++ = 0xc0 + (i << 3);
542 }
543
544 for (i = 0; i < 8; i++) {
545 *p++ = 0x66; /* 32-bit operand size */
546 *p++ = 0xb8 + i; /* MOV <reg>,imm32 */
547 *p++ = gpr[i];
548 *p++ = gpr[i] >> 8;
549 *p++ = gpr[i] >> 16;
550 *p++ = gpr[i] >> 24;
551 }
552
553 *p++ = 0xea; /* JMP FAR */
554 *p++ = ip; /* IP */
555 *p++ = ip >> 8;
556 *p++ = segs[1]; /* CS */
557 *p++ = segs[1] >> 8;
558
559 /* sign rom */
560 sum = 0;
561 for (i = 0; i < (sizeof(rom) - 1); i++)
562 sum += rom[i];
563 rom[sizeof(rom) - 1] = -sum;
564
565 rom_add_blob("linux-bootsect", rom, sizeof(rom),
566 PC_ROM_MIN_OPTION, PC_ROM_MAX, PC_ROM_ALIGN);
567 }
568
569 static long get_file_size(FILE *f)
570 {
571 long where, size;
572
573 /* XXX: on Unix systems, using fstat() probably makes more sense */
574
575 where = ftell(f);
576 fseek(f, 0, SEEK_END);
577 size = ftell(f);
578 fseek(f, where, SEEK_SET);
579
580 return size;
581 }
582
583 #define MULTIBOOT_STRUCT_ADDR 0x9000
584
585 #if MULTIBOOT_STRUCT_ADDR > 0xf0000
586 #error multiboot struct needs to fit in 16 bit real mode
587 #endif
588
589 static int load_multiboot(void *fw_cfg,
590 FILE *f,
591 const char *kernel_filename,
592 const char *initrd_filename,
593 const char *kernel_cmdline,
594 uint8_t *header)
595 {
596 int i, is_multiboot = 0;
597 uint32_t flags = 0;
598 uint32_t mh_entry_addr;
599 uint32_t mh_load_addr;
600 uint32_t mb_kernel_size;
601 uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
602 uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
603 uint32_t mb_mod_end;
604 uint8_t bootinfo[0x500];
605 uint32_t cmdline = 0x200;
606 uint8_t *mb_kernel_data;
607 uint8_t *mb_bootinfo_data;
608
609 /* Ok, let's see if it is a multiboot image.
610 The header is 12x32bit long, so the latest entry may be 8192 - 48. */
611 for (i = 0; i < (8192 - 48); i += 4) {
612 if (ldl_p(header+i) == 0x1BADB002) {
613 uint32_t checksum = ldl_p(header+i+8);
614 flags = ldl_p(header+i+4);
615 checksum += flags;
616 checksum += (uint32_t)0x1BADB002;
617 if (!checksum) {
618 is_multiboot = 1;
619 break;
620 }
621 }
622 }
623
624 if (!is_multiboot)
625 return 0; /* no multiboot */
626
627 #ifdef DEBUG_MULTIBOOT
628 fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
629 #endif
630 memset(bootinfo, 0, sizeof(bootinfo));
631
632 if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
633 fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
634 }
635 if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
636 uint64_t elf_entry;
637 int kernel_size;
638 fclose(f);
639 kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL,
640 0, ELF_MACHINE, 0);
641 if (kernel_size < 0) {
642 fprintf(stderr, "Error while loading elf kernel\n");
643 exit(1);
644 }
645 mh_load_addr = mh_entry_addr = elf_entry;
646 mb_kernel_size = kernel_size;
647
648 mb_kernel_data = qemu_malloc(mb_kernel_size);
649 if (rom_copy(mb_kernel_data, elf_entry, kernel_size) != kernel_size) {
650 fprintf(stderr, "Error while fetching elf kernel from rom\n");
651 exit(1);
652 }
653
654 #ifdef DEBUG_MULTIBOOT
655 fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
656 mb_kernel_size, (size_t)mh_entry_addr);
657 #endif
658 } else {
659 /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
660 uint32_t mh_header_addr = ldl_p(header+i+12);
661 mh_load_addr = ldl_p(header+i+16);
662 #ifdef DEBUG_MULTIBOOT
663 uint32_t mh_load_end_addr = ldl_p(header+i+20);
664 uint32_t mh_bss_end_addr = ldl_p(header+i+24);
665 #endif
666 uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
667
668 mh_entry_addr = ldl_p(header+i+28);
669 mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
670
671 /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
672 uint32_t mh_mode_type = ldl_p(header+i+32);
673 uint32_t mh_width = ldl_p(header+i+36);
674 uint32_t mh_height = ldl_p(header+i+40);
675 uint32_t mh_depth = ldl_p(header+i+44); */
676
677 #ifdef DEBUG_MULTIBOOT
678 fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
679 fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
680 fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
681 fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
682 fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
683 mb_kernel_size, mh_load_addr);
684 #endif
685
686 mb_kernel_data = qemu_malloc(mb_kernel_size);
687 fseek(f, mb_kernel_text_offset, SEEK_SET);
688 fread(mb_kernel_data, 1, mb_kernel_size, f);
689 fclose(f);
690 }
691
692 /* blob size is only the kernel for now */
693 mb_mod_end = mh_load_addr + mb_kernel_size;
694
695 /* load modules */
696 stl_p(bootinfo + 20, 0x0); /* mods_count */
697 if (initrd_filename) {
698 uint32_t mb_mod_info = 0x100;
699 uint32_t mb_mod_cmdline = 0x300;
700 uint32_t mb_mod_start = mh_load_addr;
701 uint32_t mb_mod_length = mb_kernel_size;
702 char *next_initrd;
703 char *next_space;
704 int mb_mod_count = 0;
705
706 do {
707 if (mb_mod_info + 16 > mb_mod_cmdline) {
708 printf("WARNING: Too many modules loaded, aborting.\n");
709 break;
710 }
711 next_initrd = strchr(initrd_filename, ',');
712 if (next_initrd)
713 *next_initrd = '\0';
714 /* if a space comes after the module filename, treat everything
715 after that as parameters */
716 pstrcpy((char*)bootinfo + mb_mod_cmdline,
717 sizeof(bootinfo) - mb_mod_cmdline,
718 initrd_filename);
719 stl_p(bootinfo + mb_mod_info + 8, mb_bootinfo + mb_mod_cmdline); /* string */
720 mb_mod_cmdline += strlen(initrd_filename) + 1;
721 if (mb_mod_cmdline > sizeof(bootinfo)) {
722 mb_mod_cmdline = sizeof(bootinfo);
723 printf("WARNING: Too many module cmdlines loaded, aborting.\n");
724 break;
725 }
726 if ((next_space = strchr(initrd_filename, ' ')))
727 *next_space = '\0';
728 #ifdef DEBUG_MULTIBOOT
729 printf("multiboot loading module: %s\n", initrd_filename);
730 #endif
731 mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
732 & (TARGET_PAGE_MASK);
733 mb_mod_length = get_image_size(initrd_filename);
734 if (mb_mod_length < 0) {
735 fprintf(stderr, "failed to get %s image size\n", initrd_filename);
736 exit(1);
737 }
738 mb_mod_end = mb_mod_start + mb_mod_length;
739 mb_mod_count++;
740
741 /* append module data at the end of last module */
742 mb_kernel_data = qemu_realloc(mb_kernel_data,
743 mh_load_addr - mb_mod_end);
744 load_image(initrd_filename,
745 mb_kernel_data + mb_mod_start - mh_load_addr);
746
747 stl_p(bootinfo + mb_mod_info + 0, mb_mod_start);
748 stl_p(bootinfo + mb_mod_info + 4, mb_mod_start + mb_mod_length);
749 stl_p(bootinfo + mb_mod_info + 12, 0x0); /* reserved */
750 #ifdef DEBUG_MULTIBOOT
751 printf("mod_start: %#x\nmod_end: %#x\n", mb_mod_start,
752 mb_mod_start + mb_mod_length);
753 #endif
754 initrd_filename = next_initrd+1;
755 mb_mod_info += 16;
756 } while (next_initrd);
757 stl_p(bootinfo + 20, mb_mod_count); /* mods_count */
758 stl_p(bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
759 }
760
761 /* Commandline support */
762 stl_p(bootinfo + 16, mb_bootinfo + cmdline);
763 snprintf((char*)bootinfo + cmdline, 0x100, "%s %s",
764 kernel_filename, kernel_cmdline);
765
766 /* the kernel is where we want it to be now */
767 #define MULTIBOOT_FLAGS_MEMORY (1 << 0)
768 #define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
769 #define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
770 #define MULTIBOOT_FLAGS_MODULES (1 << 3)
771 #define MULTIBOOT_FLAGS_MMAP (1 << 6)
772 stl_p(bootinfo, MULTIBOOT_FLAGS_MEMORY
773 | MULTIBOOT_FLAGS_BOOT_DEVICE
774 | MULTIBOOT_FLAGS_CMDLINE
775 | MULTIBOOT_FLAGS_MODULES
776 | MULTIBOOT_FLAGS_MMAP);
777 stl_p(bootinfo + 4, 640); /* mem_lower */
778 stl_p(bootinfo + 8, ram_size / 1024); /* mem_upper */
779 stl_p(bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
780 stl_p(bootinfo + 48, mmap_addr); /* mmap_addr */
781
782 #ifdef DEBUG_MULTIBOOT
783 fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
784 #endif
785
786 /* save bootinfo off the stack */
787 mb_bootinfo_data = qemu_malloc(sizeof(bootinfo));
788 memcpy(mb_bootinfo_data, bootinfo, sizeof(bootinfo));
789
790 /* Pass variables to option rom */
791 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ENTRY, mh_entry_addr);
792 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_load_addr);
793 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, mb_mod_end - mh_load_addr);
794 fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, mb_kernel_data,
795 mb_mod_end - mh_load_addr);
796
797 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
798 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, sizeof(bootinfo));
799 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, mb_bootinfo_data,
800 sizeof(bootinfo));
801
802 option_rom[nb_option_roms] = "multiboot.bin";
803 nb_option_roms++;
804
805 return 1; /* yes, we are multiboot */
806 }
807
808 static void load_linux(void *fw_cfg,
809 const char *kernel_filename,
810 const char *initrd_filename,
811 const char *kernel_cmdline,
812 target_phys_addr_t max_ram_size)
813 {
814 uint16_t protocol;
815 uint32_t gpr[8];
816 uint16_t seg[6];
817 uint16_t real_seg;
818 int setup_size, kernel_size, initrd_size = 0, cmdline_size;
819 uint32_t initrd_max;
820 uint8_t header[8192], *setup, *kernel;
821 target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
822 FILE *f;
823 char *vmode;
824
825 /* Align to 16 bytes as a paranoia measure */
826 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
827
828 /* load the kernel header */
829 f = fopen(kernel_filename, "rb");
830 if (!f || !(kernel_size = get_file_size(f)) ||
831 fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
832 MIN(ARRAY_SIZE(header), kernel_size)) {
833 fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
834 kernel_filename, strerror(errno));
835 exit(1);
836 }
837
838 /* kernel protocol version */
839 #if 0
840 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
841 #endif
842 if (ldl_p(header+0x202) == 0x53726448)
843 protocol = lduw_p(header+0x206);
844 else {
845 /* This looks like a multiboot kernel. If it is, let's stop
846 treating it like a Linux kernel. */
847 if (load_multiboot(fw_cfg, f, kernel_filename,
848 initrd_filename, kernel_cmdline, header))
849 return;
850 protocol = 0;
851 }
852
853 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
854 /* Low kernel */
855 real_addr = 0x90000;
856 cmdline_addr = 0x9a000 - cmdline_size;
857 prot_addr = 0x10000;
858 } else if (protocol < 0x202) {
859 /* High but ancient kernel */
860 real_addr = 0x90000;
861 cmdline_addr = 0x9a000 - cmdline_size;
862 prot_addr = 0x100000;
863 } else {
864 /* High and recent kernel */
865 real_addr = 0x10000;
866 cmdline_addr = 0x20000;
867 prot_addr = 0x100000;
868 }
869
870 #if 0
871 fprintf(stderr,
872 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
873 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
874 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
875 real_addr,
876 cmdline_addr,
877 prot_addr);
878 #endif
879
880 /* highest address for loading the initrd */
881 if (protocol >= 0x203)
882 initrd_max = ldl_p(header+0x22c);
883 else
884 initrd_max = 0x37ffffff;
885
886 if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
887 initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
888
889 /* kernel command line */
890 rom_add_blob_fixed("cmdline", kernel_cmdline,
891 strlen(kernel_cmdline)+1, cmdline_addr);
892
893 if (protocol >= 0x202) {
894 stl_p(header+0x228, cmdline_addr);
895 } else {
896 stw_p(header+0x20, 0xA33F);
897 stw_p(header+0x22, cmdline_addr-real_addr);
898 }
899
900 /* handle vga= parameter */
901 vmode = strstr(kernel_cmdline, "vga=");
902 if (vmode) {
903 unsigned int video_mode;
904 /* skip "vga=" */
905 vmode += 4;
906 if (!strncmp(vmode, "normal", 6)) {
907 video_mode = 0xffff;
908 } else if (!strncmp(vmode, "ext", 3)) {
909 video_mode = 0xfffe;
910 } else if (!strncmp(vmode, "ask", 3)) {
911 video_mode = 0xfffd;
912 } else {
913 video_mode = strtol(vmode, NULL, 0);
914 }
915 stw_p(header+0x1fa, video_mode);
916 }
917
918 /* loader type */
919 /* High nybble = B reserved for Qemu; low nybble is revision number.
920 If this code is substantially changed, you may want to consider
921 incrementing the revision. */
922 if (protocol >= 0x200)
923 header[0x210] = 0xB0;
924
925 /* heap */
926 if (protocol >= 0x201) {
927 header[0x211] |= 0x80; /* CAN_USE_HEAP */
928 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
929 }
930
931 /* load initrd */
932 if (initrd_filename) {
933 if (protocol < 0x200) {
934 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
935 exit(1);
936 }
937
938 initrd_size = get_image_size(initrd_filename);
939 initrd_addr = (initrd_max-initrd_size) & ~4095;
940 rom_add_file_fixed(initrd_filename, initrd_addr);
941
942 stl_p(header+0x218, initrd_addr);
943 stl_p(header+0x21c, initrd_size);
944 }
945
946 /* load kernel and setup */
947 setup_size = header[0x1f1];
948 if (setup_size == 0)
949 setup_size = 4;
950 setup_size = (setup_size+1)*512;
951 kernel_size -= setup_size;
952
953 setup = qemu_malloc(setup_size);
954 kernel = qemu_malloc(kernel_size);
955 fseek(f, 0, SEEK_SET);
956 fread(setup, 1, setup_size, f);
957 fread(kernel, 1, kernel_size, f);
958 fclose(f);
959 memcpy(setup, header, MIN(sizeof(header), setup_size));
960 rom_add_blob_fixed("linux-setup", setup,
961 setup_size, real_addr);
962 rom_add_blob_fixed(kernel_filename, kernel,
963 kernel_size, prot_addr);
964 qemu_free(setup);
965 qemu_free(kernel);
966
967 /* generate bootsector to set up the initial register state */
968 real_seg = real_addr >> 4;
969 seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
970 seg[1] = real_seg+0x20; /* CS */
971 memset(gpr, 0, sizeof gpr);
972 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
973
974 generate_bootsect(gpr, seg, 0);
975 }
976
977 static const int ide_iobase[2] = { 0x1f0, 0x170 };
978 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
979 static const int ide_irq[2] = { 14, 15 };
980
981 #define NE2000_NB_MAX 6
982
983 static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
984 0x280, 0x380 };
985 static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
986
987 static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
988 static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
989
990 #ifdef HAS_AUDIO
991 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
992 {
993 struct soundhw *c;
994
995 for (c = soundhw; c->name; ++c) {
996 if (c->enabled) {
997 if (c->isa) {
998 c->init.init_isa(pic);
999 } else {
1000 if (pci_bus) {
1001 c->init.init_pci(pci_bus);
1002 }
1003 }
1004 }
1005 }
1006 }
1007 #endif
1008
1009 static void pc_init_ne2k_isa(NICInfo *nd)
1010 {
1011 static int nb_ne2k = 0;
1012
1013 if (nb_ne2k == NE2000_NB_MAX)
1014 return;
1015 isa_ne2000_init(ne2000_io[nb_ne2k],
1016 ne2000_irq[nb_ne2k], nd);
1017 nb_ne2k++;
1018 }
1019
1020 int cpu_is_bsp(CPUState *env)
1021 {
1022 return env->cpuid_apic_id == 0;
1023 }
1024
1025 static CPUState *pc_new_cpu(const char *cpu_model)
1026 {
1027 CPUState *env;
1028
1029 env = cpu_init(cpu_model);
1030 if (!env) {
1031 fprintf(stderr, "Unable to find x86 CPU definition\n");
1032 exit(1);
1033 }
1034 if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
1035 env->cpuid_apic_id = env->cpu_index;
1036 /* APIC reset callback resets cpu */
1037 apic_init(env);
1038 } else {
1039 qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
1040 }
1041 return env;
1042 }
1043
1044 /* PC hardware initialisation */
1045 static void pc_init1(ram_addr_t ram_size,
1046 const char *boot_device,
1047 const char *kernel_filename,
1048 const char *kernel_cmdline,
1049 const char *initrd_filename,
1050 const char *cpu_model,
1051 int pci_enabled)
1052 {
1053 char *filename;
1054 int ret, linux_boot, i;
1055 ram_addr_t ram_addr, bios_offset, option_rom_offset;
1056 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
1057 int bios_size, isa_bios_size;
1058 PCIBus *pci_bus;
1059 ISADevice *isa_dev;
1060 int piix3_devfn = -1;
1061 CPUState *env;
1062 qemu_irq *cpu_irq;
1063 qemu_irq *isa_irq;
1064 qemu_irq *i8259;
1065 IsaIrqState *isa_irq_state;
1066 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
1067 DriveInfo *fd[MAX_FD];
1068 void *fw_cfg;
1069
1070 if (ram_size >= 0xe0000000 ) {
1071 above_4g_mem_size = ram_size - 0xe0000000;
1072 below_4g_mem_size = 0xe0000000;
1073 } else {
1074 below_4g_mem_size = ram_size;
1075 }
1076
1077 linux_boot = (kernel_filename != NULL);
1078
1079 /* init CPUs */
1080 if (cpu_model == NULL) {
1081 #ifdef TARGET_X86_64
1082 cpu_model = "qemu64";
1083 #else
1084 cpu_model = "qemu32";
1085 #endif
1086 }
1087
1088 for (i = 0; i < smp_cpus; i++) {
1089 env = pc_new_cpu(cpu_model);
1090 }
1091
1092 vmport_init();
1093
1094 /* allocate RAM */
1095 ram_addr = qemu_ram_alloc(0xa0000);
1096 cpu_register_physical_memory(0, 0xa0000, ram_addr);
1097
1098 /* Allocate, even though we won't register, so we don't break the
1099 * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
1100 * and some bios areas, which will be registered later
1101 */
1102 ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
1103 ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
1104 cpu_register_physical_memory(0x100000,
1105 below_4g_mem_size - 0x100000,
1106 ram_addr);
1107
1108 /* above 4giga memory allocation */
1109 if (above_4g_mem_size > 0) {
1110 #if TARGET_PHYS_ADDR_BITS == 32
1111 hw_error("To much RAM for 32-bit physical address");
1112 #else
1113 ram_addr = qemu_ram_alloc(above_4g_mem_size);
1114 cpu_register_physical_memory(0x100000000ULL,
1115 above_4g_mem_size,
1116 ram_addr);
1117 #endif
1118 }
1119
1120
1121 /* BIOS load */
1122 if (bios_name == NULL)
1123 bios_name = BIOS_FILENAME;
1124 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1125 if (filename) {
1126 bios_size = get_image_size(filename);
1127 } else {
1128 bios_size = -1;
1129 }
1130 if (bios_size <= 0 ||
1131 (bios_size % 65536) != 0) {
1132 goto bios_error;
1133 }
1134 bios_offset = qemu_ram_alloc(bios_size);
1135 ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
1136 if (ret != 0) {
1137 bios_error:
1138 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
1139 exit(1);
1140 }
1141 if (filename) {
1142 qemu_free(filename);
1143 }
1144 /* map the last 128KB of the BIOS in ISA space */
1145 isa_bios_size = bios_size;
1146 if (isa_bios_size > (128 * 1024))
1147 isa_bios_size = 128 * 1024;
1148 cpu_register_physical_memory(0x100000 - isa_bios_size,
1149 isa_bios_size,
1150 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
1151
1152
1153
1154 rom_enable_driver_roms = 1;
1155 option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
1156 cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
1157
1158 /* map all the bios at the top of memory */
1159 cpu_register_physical_memory((uint32_t)(-bios_size),
1160 bios_size, bios_offset | IO_MEM_ROM);
1161
1162 fw_cfg = bochs_bios_init();
1163
1164 if (linux_boot) {
1165 load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
1166 }
1167
1168 for (i = 0; i < nb_option_roms; i++) {
1169 rom_add_option(option_rom[i]);
1170 }
1171
1172 cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1173 i8259 = i8259_init(cpu_irq[0]);
1174 isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
1175 isa_irq_state->i8259 = i8259;
1176 isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
1177
1178 if (pci_enabled) {
1179 pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
1180 } else {
1181 pci_bus = NULL;
1182 isa_bus_new(NULL);
1183 }
1184 isa_bus_irqs(isa_irq);
1185
1186 ferr_irq = isa_reserve_irq(13);
1187
1188 /* init basic PC hardware */
1189 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1190
1191 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1192
1193 if (cirrus_vga_enabled) {
1194 if (pci_enabled) {
1195 pci_cirrus_vga_init(pci_bus);
1196 } else {
1197 isa_cirrus_vga_init();
1198 }
1199 } else if (vmsvga_enabled) {
1200 if (pci_enabled)
1201 pci_vmsvga_init(pci_bus);
1202 else
1203 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1204 } else if (std_vga_enabled) {
1205 if (pci_enabled) {
1206 pci_vga_init(pci_bus, 0, 0);
1207 } else {
1208 isa_vga_init();
1209 }
1210 }
1211
1212 rtc_state = rtc_init(2000);
1213
1214 qemu_register_boot_set(pc_boot_set, rtc_state);
1215
1216 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1217 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1218
1219 if (pci_enabled) {
1220 isa_irq_state->ioapic = ioapic_init();
1221 }
1222 pit = pit_init(0x40, isa_reserve_irq(0));
1223 pcspk_init(pit);
1224 if (!no_hpet) {
1225 hpet_init(isa_irq);
1226 }
1227
1228 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1229 if (serial_hds[i]) {
1230 serial_isa_init(i, serial_hds[i]);
1231 }
1232 }
1233
1234 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1235 if (parallel_hds[i]) {
1236 parallel_init(i, parallel_hds[i]);
1237 }
1238 }
1239
1240 for(i = 0; i < nb_nics; i++) {
1241 NICInfo *nd = &nd_table[i];
1242
1243 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1244 pc_init_ne2k_isa(nd);
1245 else
1246 pci_nic_init_nofail(nd, "e1000", NULL);
1247 }
1248
1249 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1250 fprintf(stderr, "qemu: too many IDE bus\n");
1251 exit(1);
1252 }
1253
1254 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1255 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1256 }
1257
1258 if (pci_enabled) {
1259 pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
1260 } else {
1261 for(i = 0; i < MAX_IDE_BUS; i++) {
1262 isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
1263 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1264 }
1265 }
1266
1267 isa_dev = isa_create_simple("i8042");
1268 DMA_init(0);
1269 #ifdef HAS_AUDIO
1270 audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
1271 #endif
1272
1273 for(i = 0; i < MAX_FD; i++) {
1274 fd[i] = drive_get(IF_FLOPPY, 0, i);
1275 }
1276 floppy_controller = fdctrl_init_isa(fd);
1277
1278 cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1279
1280 if (pci_enabled && usb_enabled) {
1281 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1282 }
1283
1284 if (pci_enabled && acpi_enabled) {
1285 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1286 i2c_bus *smbus;
1287
1288 /* TODO: Populate SPD eeprom data. */
1289 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
1290 isa_reserve_irq(9));
1291 for (i = 0; i < 8; i++) {
1292 DeviceState *eeprom;
1293 eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1294 qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
1295 qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1296 qdev_init_nofail(eeprom);
1297 }
1298 piix4_acpi_system_hot_add_init(pci_bus);
1299 }
1300
1301 if (i440fx_state) {
1302 i440fx_init_memory_mappings(i440fx_state);
1303 }
1304
1305 if (pci_enabled) {
1306 int max_bus;
1307 int bus;
1308
1309 max_bus = drive_get_max_bus(IF_SCSI);
1310 for (bus = 0; bus <= max_bus; bus++) {
1311 pci_create_simple(pci_bus, -1, "lsi53c895a");
1312 }
1313 }
1314
1315 /* Add virtio console devices */
1316 if (pci_enabled) {
1317 for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1318 if (virtcon_hds[i]) {
1319 pci_create_simple(pci_bus, -1, "virtio-console-pci");
1320 }
1321 }
1322 }
1323 }
1324
1325 static void pc_init_pci(ram_addr_t ram_size,
1326 const char *boot_device,
1327 const char *kernel_filename,
1328 const char *kernel_cmdline,
1329 const char *initrd_filename,
1330 const char *cpu_model)
1331 {
1332 pc_init1(ram_size, boot_device,
1333 kernel_filename, kernel_cmdline,
1334 initrd_filename, cpu_model, 1);
1335 }
1336
1337 static void pc_init_isa(ram_addr_t ram_size,
1338 const char *boot_device,
1339 const char *kernel_filename,
1340 const char *kernel_cmdline,
1341 const char *initrd_filename,
1342 const char *cpu_model)
1343 {
1344 if (cpu_model == NULL)
1345 cpu_model = "486";
1346 pc_init1(ram_size, boot_device,
1347 kernel_filename, kernel_cmdline,
1348 initrd_filename, cpu_model, 0);
1349 }
1350
1351 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1352 BIOS will read it and start S3 resume at POST Entry */
1353 void cmos_set_s3_resume(void)
1354 {
1355 if (rtc_state)
1356 rtc_set_memory(rtc_state, 0xF, 0xFE);
1357 }
1358
1359 static QEMUMachine pc_machine = {
1360 .name = "pc-0.11",
1361 .alias = "pc",
1362 .desc = "Standard PC",
1363 .init = pc_init_pci,
1364 .max_cpus = 255,
1365 .is_default = 1,
1366 };
1367
1368 static QEMUMachine pc_machine_v0_10 = {
1369 .name = "pc-0.10",
1370 .desc = "Standard PC, qemu 0.10",
1371 .init = pc_init_pci,
1372 .max_cpus = 255,
1373 .compat_props = (CompatProperty[]) {
1374 {
1375 .driver = "virtio-blk-pci",
1376 .property = "class",
1377 .value = stringify(PCI_CLASS_STORAGE_OTHER),
1378 },{
1379 .driver = "virtio-console-pci",
1380 .property = "class",
1381 .value = stringify(PCI_CLASS_DISPLAY_OTHER),
1382 },{
1383 .driver = "virtio-net-pci",
1384 .property = "vectors",
1385 .value = stringify(0),
1386 },{
1387 .driver = "virtio-blk-pci",
1388 .property = "vectors",
1389 .value = stringify(0),
1390 },
1391 { /* end of list */ }
1392 },
1393 };
1394
1395 static QEMUMachine isapc_machine = {
1396 .name = "isapc",
1397 .desc = "ISA-only PC",
1398 .init = pc_init_isa,
1399 .max_cpus = 1,
1400 };
1401
1402 static void pc_machine_init(void)
1403 {
1404 qemu_register_machine(&pc_machine);
1405 qemu_register_machine(&pc_machine_v0_10);
1406 qemu_register_machine(&isapc_machine);
1407 }
1408
1409 machine_init(pc_machine_init);