hw/pc_piix.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw.h"
  26 #include "pc.h"
  27 #include "apic.h"
  28 #include "pci.h"
  29 #include "usb-uhci.h"
  30 #include "usb-ohci.h"
  31 #include "net.h"
  32 #include "boards.h"
  33 #include "ide.h"
  34 #include "kvm.h"
  35 #include "kvmclock.h"
  36 #include "sysemu.h"
  37 #include "sysbus.h"
  38 #include "arch_init.h"
  39 #include "blockdev.h"
  40 #include "smbus.h"
  41
  42 #define MAX_IDE_BUS 2
  43
  44 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
  45 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
  46 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
  47
  48 static void ioapic_init(IsaIrqState *isa_irq_state)
  49 {
  50     DeviceState *dev;
  51     SysBusDevice *d;
  52     unsigned int i;
  53
  54     dev = qdev_create(NULL, "ioapic");
  55     qdev_init_nofail(dev);
  56     d = sysbus_from_qdev(dev);
  57     sysbus_mmio_map(d, 0, 0xfec00000);
  58
  59     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  60         isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
  61     }
  62 }
  63
  64 /* PC hardware initialisation */
  65 static void pc_init1(ram_addr_t ram_size,
  66                      const char *boot_device,
  67                      const char *kernel_filename,
  68                      const char *kernel_cmdline,
  69                      const char *initrd_filename,
  70                      const char *cpu_model,
  71                      int pci_enabled,
  72                      int kvmclock_enabled)
  73 {
  74     int i;
  75     ram_addr_t below_4g_mem_size, above_4g_mem_size;
  76     PCIBus *pci_bus;
  77     PCII440FXState *i440fx_state;
  78     int piix3_devfn = -1;
  79     qemu_irq *cpu_irq;
  80     qemu_irq *isa_irq;
  81     qemu_irq *i8259;
  82     qemu_irq *cmos_s3;
  83     qemu_irq *smi_irq;
  84     IsaIrqState *isa_irq_state;
  85     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  86     BusState *idebus[MAX_IDE_BUS];
  87     ISADevice *rtc_state;
  88
  89     pc_cpus_init(cpu_model);
  90
  91     if (kvmclock_enabled) {
  92         kvmclock_create();
  93     }
  94
  95     /* allocate ram and load rom/bios */
  96     pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
  97                    &below_4g_mem_size, &above_4g_mem_size);
  98
  99     cpu_irq = pc_allocate_cpu_irq();
 100     i8259 = i8259_init(cpu_irq[0]);
 101     isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
 102     isa_irq_state->i8259 = i8259;
 103     if (pci_enabled) {
 104         ioapic_init(isa_irq_state);
 105     }
 106     isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
 107
 108     if (pci_enabled) {
 109         pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
 110     } else {
 111         pci_bus = NULL;
 112         i440fx_state = NULL;
 113         isa_bus_new(NULL);
 114     }
 115     isa_bus_irqs(isa_irq);
 116
 117     pc_register_ferr_irq(isa_get_irq(13));
 118
 119     pc_vga_init(pci_enabled? pci_bus: NULL);
 120
 121     /* init basic PC hardware */
 122     pc_basic_device_init(isa_irq, &rtc_state);
 123
 124     for(i = 0; i < nb_nics; i++) {
 125         NICInfo *nd = &nd_table[i];
 126
 127         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
 128             pc_init_ne2k_isa(nd);
 129         else
 130             pci_nic_init_nofail(nd, "e1000", NULL);
 131     }
 132
 133     ide_drive_get(hd, MAX_IDE_BUS);
 134     if (pci_enabled) {
 135         PCIDevice *dev;
 136         dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
 137         idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
 138         idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
 139     } else {
 140         for(i = 0; i < MAX_IDE_BUS; i++) {
 141             ISADevice *dev;
 142             dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 143                                hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
 144             idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
 145         }
 146     }
 147
 148     audio_init(isa_irq, pci_enabled ? pci_bus : NULL);
 149
 150     pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
 151                  idebus[0], idebus[1], rtc_state);
 152
 153     if (pci_enabled && usb_enabled) {
 154         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
 155     }
 156
 157     if (pci_enabled && acpi_enabled) {
 158         i2c_bus *smbus;
 159
 160         cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
 161         smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
 162         /* TODO: Populate SPD eeprom data.  */
 163         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
 164                               isa_get_irq(9), *cmos_s3, *smi_irq,
 165                               kvm_enabled());
 166         smbus_eeprom_init(smbus, 8, NULL, 0);
 167     }
 168
 169     if (i440fx_state) {
 170         i440fx_init_memory_mappings(i440fx_state);
 171     }
 172
 173     if (pci_enabled) {
 174         pc_pci_device_init(pci_bus);
 175     }
 176 }
 177
 178 static void pc_init_pci(ram_addr_t ram_size,
 179                         const char *boot_device,
 180                         const char *kernel_filename,
 181                         const char *kernel_cmdline,
 182                         const char *initrd_filename,
 183                         const char *cpu_model)
 184 {
 185     pc_init1(ram_size, boot_device,
 186              kernel_filename, kernel_cmdline,
 187              initrd_filename, cpu_model, 1, 1);
 188 }
 189
 190 static void pc_init_pci_no_kvmclock(ram_addr_t ram_size,
 191                                     const char *boot_device,
 192                                     const char *kernel_filename,
 193                                     const char *kernel_cmdline,
 194                                     const char *initrd_filename,
 195                                     const char *cpu_model)
 196 {
 197     pc_init1(ram_size, boot_device,
 198              kernel_filename, kernel_cmdline,
 199              initrd_filename, cpu_model, 1, 0);
 200 }
 201
 202 static void pc_init_isa(ram_addr_t ram_size,
 203                         const char *boot_device,
 204                         const char *kernel_filename,
 205                         const char *kernel_cmdline,
 206                         const char *initrd_filename,
 207                         const char *cpu_model)
 208 {
 209     if (cpu_model == NULL)
 210         cpu_model = "486";
 211     pc_init1(ram_size, boot_device,
 212              kernel_filename, kernel_cmdline,
 213              initrd_filename, cpu_model, 0, 1);
 214 }
 215
 216 static QEMUMachine pc_machine = {
 217     .name = "pc-0.14",
 218     .alias = "pc",
 219     .desc = "Standard PC",
 220     .init = pc_init_pci,
 221     .max_cpus = 255,
 222     .is_default = 1,
 223 };
 224
 225 static QEMUMachine pc_machine_v0_13 = {
 226     .name = "pc-0.13",
 227     .desc = "Standard PC",
 228     .init = pc_init_pci_no_kvmclock,
 229     .max_cpus = 255,
 230     .compat_props = (GlobalProperty[]) {
 231         {
 232             .driver   = "virtio-9p-pci",
 233             .property = "vectors",
 234             .value    = stringify(0),
 235         },{
 236             .driver   = "VGA",
 237             .property = "rombar",
 238             .value    = stringify(0),
 239         },{
 240             .driver   = "vmware-svga",
 241             .property = "rombar",
 242             .value    = stringify(0),
 243         },{
 244             .driver   = "PCI",
 245             .property = "command_serr_enable",
 246             .value    = "off",
 247         },
 248         { /* end of list */ }
 249     },
 250 };
 251
 252 static QEMUMachine pc_machine_v0_12 = {
 253     .name = "pc-0.12",
 254     .desc = "Standard PC",
 255     .init = pc_init_pci_no_kvmclock,
 256     .max_cpus = 255,
 257     .compat_props = (GlobalProperty[]) {
 258         {
 259             .driver   = "virtio-serial-pci",
 260             .property = "max_ports",
 261             .value    = stringify(1),
 262         },{
 263             .driver   = "virtio-serial-pci",
 264             .property = "vectors",
 265             .value    = stringify(0),
 266         },{
 267             .driver   = "VGA",
 268             .property = "rombar",
 269             .value    = stringify(0),
 270         },{
 271             .driver   = "vmware-svga",
 272             .property = "rombar",
 273             .value    = stringify(0),
 274         },{
 275             .driver   = "PCI",
 276             .property = "command_serr_enable",
 277             .value    = "off",
 278         },
 279         { /* end of list */ }
 280     }
 281 };
 282
 283 static QEMUMachine pc_machine_v0_11 = {
 284     .name = "pc-0.11",
 285     .desc = "Standard PC, qemu 0.11",
 286     .init = pc_init_pci_no_kvmclock,
 287     .max_cpus = 255,
 288     .compat_props = (GlobalProperty[]) {
 289         {
 290             .driver   = "virtio-blk-pci",
 291             .property = "vectors",
 292             .value    = stringify(0),
 293         },{
 294             .driver   = "virtio-serial-pci",
 295             .property = "max_ports",
 296             .value    = stringify(1),
 297         },{
 298             .driver   = "virtio-serial-pci",
 299             .property = "vectors",
 300             .value    = stringify(0),
 301         },{
 302             .driver   = "ide-drive",
 303             .property = "ver",
 304             .value    = "0.11",
 305         },{
 306             .driver   = "scsi-disk",
 307             .property = "ver",
 308             .value    = "0.11",
 309         },{
 310             .driver   = "PCI",
 311             .property = "rombar",
 312             .value    = stringify(0),
 313         },{
 314             .driver   = "PCI",
 315             .property = "command_serr_enable",
 316             .value    = "off",
 317         },
 318         { /* end of list */ }
 319     }
 320 };
 321
 322 static QEMUMachine pc_machine_v0_10 = {
 323     .name = "pc-0.10",
 324     .desc = "Standard PC, qemu 0.10",
 325     .init = pc_init_pci_no_kvmclock,
 326     .max_cpus = 255,
 327     .compat_props = (GlobalProperty[]) {
 328         {
 329             .driver   = "virtio-blk-pci",
 330             .property = "class",
 331             .value    = stringify(PCI_CLASS_STORAGE_OTHER),
 332         },{
 333             .driver   = "virtio-serial-pci",
 334             .property = "class",
 335             .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
 336         },{
 337             .driver   = "virtio-serial-pci",
 338             .property = "max_ports",
 339             .value    = stringify(1),
 340         },{
 341             .driver   = "virtio-serial-pci",
 342             .property = "vectors",
 343             .value    = stringify(0),
 344         },{
 345             .driver   = "virtio-net-pci",
 346             .property = "vectors",
 347             .value    = stringify(0),
 348         },{
 349             .driver   = "virtio-blk-pci",
 350             .property = "vectors",
 351             .value    = stringify(0),
 352         },{
 353             .driver   = "ide-drive",
 354             .property = "ver",
 355             .value    = "0.10",
 356         },{
 357             .driver   = "scsi-disk",
 358             .property = "ver",
 359             .value    = "0.10",
 360         },{
 361             .driver   = "PCI",
 362             .property = "rombar",
 363             .value    = stringify(0),
 364         },{
 365             .driver   = "PCI",
 366             .property = "command_serr_enable",
 367             .value    = "off",
 368         },
 369         { /* end of list */ }
 370     },
 371 };
 372
 373 static QEMUMachine isapc_machine = {
 374     .name = "isapc",
 375     .desc = "ISA-only PC",
 376     .init = pc_init_isa,
 377     .max_cpus = 1,
 378 };
 379
 380 static void pc_machine_init(void)
 381 {
 382     qemu_register_machine(&pc_machine);
 383     qemu_register_machine(&pc_machine_v0_13);
 384     qemu_register_machine(&pc_machine_v0_12);
 385     qemu_register_machine(&pc_machine_v0_11);
 386     qemu_register_machine(&pc_machine_v0_10);
 387     qemu_register_machine(&isapc_machine);
 388 }
 389
 390 machine_init(pc_machine_init);