hw/pc_piix.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "hw.h"
  26 #include "pc.h"
  27 #include "apic.h"
  28 #include "pci.h"
  29 #include "usb-uhci.h"
  30 #include "usb-ohci.h"
  31 #include "net.h"
  32 #include "boards.h"
  33 #include "ide.h"
  34 #include "kvm.h"
  35 #include "sysemu.h"
  36 #include "sysbus.h"
  37 #include "blockdev.h"
  38
  39 #define MAX_IDE_BUS 2
  40
  41 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
  42 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
  43 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
  44
  45 static void ioapic_init(IsaIrqState *isa_irq_state)
  46 {
  47     DeviceState *dev;
  48     SysBusDevice *d;
  49     unsigned int i;
  50
  51     dev = qdev_create(NULL, "ioapic");
  52     qdev_init_nofail(dev);
  53     d = sysbus_from_qdev(dev);
  54     sysbus_mmio_map(d, 0, 0xfec00000);
  55
  56     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  57         isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
  58     }
  59 }
  60
  61 /* PC hardware initialisation */
  62 static void pc_init1(ram_addr_t ram_size,
  63                      const char *boot_device,
  64                      const char *kernel_filename,
  65                      const char *kernel_cmdline,
  66                      const char *initrd_filename,
  67                      const char *cpu_model,
  68                      int pci_enabled)
  69 {
  70     int i;
  71     ram_addr_t below_4g_mem_size, above_4g_mem_size;
  72     PCIBus *pci_bus;
  73     PCII440FXState *i440fx_state;
  74     int piix3_devfn = -1;
  75     qemu_irq *cpu_irq;
  76     qemu_irq *isa_irq;
  77     qemu_irq *i8259;
  78     qemu_irq *cmos_s3;
  79     qemu_irq *smi_irq;
  80     IsaIrqState *isa_irq_state;
  81     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  82     FDCtrl *floppy_controller;
  83     BusState *idebus[MAX_IDE_BUS];
  84     ISADevice *rtc_state;
  85
  86     pc_cpus_init(cpu_model);
  87
  88     vmport_init();
  89
  90     /* allocate ram and load rom/bios */
  91     pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
  92                    &below_4g_mem_size, &above_4g_mem_size);
  93
  94     cpu_irq = pc_allocate_cpu_irq();
  95     i8259 = i8259_init(cpu_irq[0]);
  96     isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
  97     isa_irq_state->i8259 = i8259;
  98     if (pci_enabled) {
  99         ioapic_init(isa_irq_state);
 100     }
 101     isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
 102
 103     if (pci_enabled) {
 104         pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
 105     } else {
 106         pci_bus = NULL;
 107         isa_bus_new(NULL);
 108     }
 109     isa_bus_irqs(isa_irq);
 110
 111     pc_register_ferr_irq(isa_reserve_irq(13));
 112
 113     pc_vga_init(pci_enabled? pci_bus: NULL);
 114
 115     /* init basic PC hardware */
 116     pc_basic_device_init(isa_irq, &floppy_controller, &rtc_state);
 117
 118     for(i = 0; i < nb_nics; i++) {
 119         NICInfo *nd = &nd_table[i];
 120
 121         if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
 122             pc_init_ne2k_isa(nd);
 123         else
 124             pci_nic_init_nofail(nd, "e1000", NULL);
 125     }
 126
 127     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 128         fprintf(stderr, "qemu: too many IDE bus\n");
 129         exit(1);
 130     }
 131
 132     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 133         hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 134     }
 135
 136     if (pci_enabled) {
 137         PCIDevice *dev;
 138         dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
 139         idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
 140         idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
 141     } else {
 142         for(i = 0; i < MAX_IDE_BUS; i++) {
 143             ISADevice *dev;
 144             dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
 145                                hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
 146             idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
 147         }
 148     }
 149
 150     pc_audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
 151
 152     pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
 153                  idebus[0], idebus[1], floppy_controller, rtc_state);
 154
 155     if (pci_enabled && usb_enabled) {
 156         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
 157     }
 158
 159     if (pci_enabled && acpi_enabled) {
 160         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
 161         i2c_bus *smbus;
 162
 163         cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
 164         smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
 165         /* TODO: Populate SPD eeprom data.  */
 166         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
 167                               isa_reserve_irq(9), *cmos_s3, *smi_irq,
 168                               kvm_enabled());
 169         for (i = 0; i < 8; i++) {
 170             DeviceState *eeprom;
 171             eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
 172             qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
 173             qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
 174             qdev_init_nofail(eeprom);
 175         }
 176     }
 177
 178     if (i440fx_state) {
 179         i440fx_init_memory_mappings(i440fx_state);
 180     }
 181
 182     if (pci_enabled) {
 183         pc_pci_device_init(pci_bus);
 184     }
 185 }
 186
 187 static void pc_init_pci(ram_addr_t ram_size,
 188                         const char *boot_device,
 189                         const char *kernel_filename,
 190                         const char *kernel_cmdline,
 191                         const char *initrd_filename,
 192                         const char *cpu_model)
 193 {
 194     pc_init1(ram_size, boot_device,
 195              kernel_filename, kernel_cmdline,
 196              initrd_filename, cpu_model, 1);
 197 }
 198
 199 static void pc_init_isa(ram_addr_t ram_size,
 200                         const char *boot_device,
 201                         const char *kernel_filename,
 202                         const char *kernel_cmdline,
 203                         const char *initrd_filename,
 204                         const char *cpu_model)
 205 {
 206     if (cpu_model == NULL)
 207         cpu_model = "486";
 208     pc_init1(ram_size, boot_device,
 209              kernel_filename, kernel_cmdline,
 210              initrd_filename, cpu_model, 0);
 211 }
 212
 213 static QEMUMachine pc_machine = {
 214     .name = "pc-0.13",
 215     .alias = "pc",
 216     .desc = "Standard PC",
 217     .init = pc_init_pci,
 218     .max_cpus = 255,
 219     .is_default = 1,
 220 };
 221
 222 static QEMUMachine pc_machine_v0_12 = {
 223     .name = "pc-0.12",
 224     .desc = "Standard PC",
 225     .init = pc_init_pci,
 226     .max_cpus = 255,
 227     .compat_props = (GlobalProperty[]) {
 228         {
 229             .driver   = "virtio-serial-pci",
 230             .property = "max_ports",
 231             .value    = stringify(1),
 232         },{
 233             .driver   = "virtio-serial-pci",
 234             .property = "vectors",
 235             .value    = stringify(0),
 236         },
 237         { /* end of list */ }
 238     }
 239 };
 240
 241 static QEMUMachine pc_machine_v0_11 = {
 242     .name = "pc-0.11",
 243     .desc = "Standard PC, qemu 0.11",
 244     .init = pc_init_pci,
 245     .max_cpus = 255,
 246     .compat_props = (GlobalProperty[]) {
 247         {
 248             .driver   = "virtio-blk-pci",
 249             .property = "vectors",
 250             .value    = stringify(0),
 251         },{
 252             .driver   = "virtio-serial-pci",
 253             .property = "max_ports",
 254             .value    = stringify(1),
 255         },{
 256             .driver   = "virtio-serial-pci",
 257             .property = "vectors",
 258             .value    = stringify(0),
 259         },{
 260             .driver   = "ide-drive",
 261             .property = "ver",
 262             .value    = "0.11",
 263         },{
 264             .driver   = "scsi-disk",
 265             .property = "ver",
 266             .value    = "0.11",
 267         },{
 268             .driver   = "PCI",
 269             .property = "rombar",
 270             .value    = stringify(0),
 271         },
 272         { /* end of list */ }
 273     }
 274 };
 275
 276 static QEMUMachine pc_machine_v0_10 = {
 277     .name = "pc-0.10",
 278     .desc = "Standard PC, qemu 0.10",
 279     .init = pc_init_pci,
 280     .max_cpus = 255,
 281     .compat_props = (GlobalProperty[]) {
 282         {
 283             .driver   = "virtio-blk-pci",
 284             .property = "class",
 285             .value    = stringify(PCI_CLASS_STORAGE_OTHER),
 286         },{
 287             .driver   = "virtio-serial-pci",
 288             .property = "class",
 289             .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
 290         },{
 291             .driver   = "virtio-serial-pci",
 292             .property = "max_ports",
 293             .value    = stringify(1),
 294         },{
 295             .driver   = "virtio-serial-pci",
 296             .property = "vectors",
 297             .value    = stringify(0),
 298         },{
 299             .driver   = "virtio-net-pci",
 300             .property = "vectors",
 301             .value    = stringify(0),
 302         },{
 303             .driver   = "virtio-blk-pci",
 304             .property = "vectors",
 305             .value    = stringify(0),
 306         },{
 307             .driver   = "ide-drive",
 308             .property = "ver",
 309             .value    = "0.10",
 310         },{
 311             .driver   = "scsi-disk",
 312             .property = "ver",
 313             .value    = "0.10",
 314         },{
 315             .driver   = "PCI",
 316             .property = "rombar",
 317             .value    = stringify(0),
 318         },
 319         { /* end of list */ }
 320     },
 321 };
 322
 323 static QEMUMachine isapc_machine = {
 324     .name = "isapc",
 325     .desc = "ISA-only PC",
 326     .init = pc_init_isa,
 327     .max_cpus = 1,
 328 };
 329
 330 static void pc_machine_init(void)
 331 {
 332     qemu_register_machine(&pc_machine);
 333     qemu_register_machine(&pc_machine_v0_12);
 334     qemu_register_machine(&pc_machine_v0_11);
 335     qemu_register_machine(&pc_machine_v0_10);
 336     qemu_register_machine(&isapc_machine);
 337 }
 338
 339 machine_init(pc_machine_init);