2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "sysemu/sysemu.h"
31 #include "sysemu/blockdev.h"
32 #include "sysemu/cpus.h"
33 #include "sysemu/kvm.h"
35 #include "mmu-hash64.h"
37 #include "hw/boards.h"
38 #include "hw/ppc/ppc.h"
39 #include "hw/loader.h"
41 #include "hw/ppc/spapr.h"
42 #include "hw/ppc/spapr_vio.h"
43 #include "hw/pci-host/spapr.h"
44 #include "hw/ppc/xics.h"
45 #include "hw/pci/msi.h"
47 #include "hw/pci/pci.h"
49 #include "exec/address-spaces.h"
51 #include "qemu/config-file.h"
55 /* SLOF memory layout:
57 * SLOF raw image loaded at 0, copies its romfs right below the flat
58 * device-tree, then position SLOF itself 31M below that
60 * So we set FW_OVERHEAD to 40MB which should account for all of that
63 * We load our kernel at 4M, leaving space for SLOF initial image
65 #define FDT_MAX_SIZE 0x40000
66 #define RTAS_MAX_SIZE 0x10000
67 #define FW_MAX_SIZE 0x400000
68 #define FW_FILE_NAME "slof.bin"
69 #define FW_OVERHEAD 0x2800000
70 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
72 #define MIN_RMA_SLOF 128UL
74 #define TIMEBASE_FREQ 512000000ULL
77 #define XICS_IRQS 1024
79 #define PHANDLE_XICP 0x00001111
81 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
83 sPAPREnvironment
*spapr
;
85 int spapr_allocate_irq(int hint
, bool lsi
)
91 if (hint
>= spapr
->next_irq
) {
92 spapr
->next_irq
= hint
+ 1;
94 /* FIXME: we should probably check for collisions somehow */
96 irq
= spapr
->next_irq
++;
99 /* Configure irq type */
100 if (!xics_get_qirq(spapr
->icp
, irq
)) {
104 xics_set_irq_type(spapr
->icp
, irq
, lsi
);
110 * Allocate block of consequtive IRQs, returns a number of the first.
111 * If msi==true, aligns the first IRQ number to num.
113 int spapr_allocate_irq_block(int num
, bool lsi
, bool msi
)
119 * MSIMesage::data is used for storing VIRQ so
120 * it has to be aligned to num to support multiple
121 * MSI vectors. MSI-X is not affected by this.
122 * The hint is used for the first IRQ, the rest should
123 * be allocated continuously.
126 assert((num
== 1) || (num
== 2) || (num
== 4) ||
127 (num
== 8) || (num
== 16) || (num
== 32));
128 hint
= (spapr
->next_irq
+ num
- 1) & ~(num
- 1);
131 for (i
= 0; i
< num
; ++i
) {
134 irq
= spapr_allocate_irq(hint
, lsi
);
144 /* If the above doesn't create a consecutive block then that's
146 assert(irq
== (first
+ i
));
152 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
157 dev
= qdev_create(NULL
, type
);
158 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
159 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
160 if (qdev_init(dev
) < 0) {
164 return XICS_COMMON(dev
);
167 static XICSState
*xics_system_init(int nr_servers
, int nr_irqs
)
169 XICSState
*icp
= NULL
;
172 QemuOpts
*machine_opts
= qemu_get_machine_opts();
173 bool irqchip_allowed
= qemu_opt_get_bool(machine_opts
,
174 "kernel_irqchip", true);
175 bool irqchip_required
= qemu_opt_get_bool(machine_opts
,
176 "kernel_irqchip", false);
177 if (irqchip_allowed
) {
178 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
);
181 if (irqchip_required
&& !icp
) {
182 perror("Failed to create in-kernel XICS\n");
188 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
);
192 perror("Failed to create XICS\n");
199 static int spapr_fixup_cpu_dt(void *fdt
, sPAPREnvironment
*spapr
)
204 int smt
= kvmppc_smt_threads();
205 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
208 DeviceClass
*dc
= DEVICE_GET_CLASS(cpu
);
209 uint32_t associativity
[] = {cpu_to_be32(0x5),
213 cpu_to_be32(cpu
->numa_node
),
214 cpu_to_be32(cpu
->cpu_index
)};
216 if ((cpu
->cpu_index
% smt
) != 0) {
220 snprintf(cpu_model
, 32, "/cpus/%s@%x", dc
->fw_name
,
223 offset
= fdt_path_offset(fdt
, cpu_model
);
228 if (nb_numa_nodes
> 1) {
229 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
230 sizeof(associativity
));
236 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
237 pft_size_prop
, sizeof(pft_size_prop
));
246 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
249 size_t maxcells
= maxsize
/ sizeof(uint32_t);
253 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
254 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
256 if (!sps
->page_shift
) {
259 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
260 if (sps
->enc
[count
].page_shift
== 0) {
264 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
267 *(p
++) = cpu_to_be32(sps
->page_shift
);
268 *(p
++) = cpu_to_be32(sps
->slb_enc
);
269 *(p
++) = cpu_to_be32(count
);
270 for (j
= 0; j
< count
; j
++) {
271 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
272 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
276 return (p
- prop
) * sizeof(uint32_t);
283 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
284 #exp, fdt_strerror(ret)); \
290 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
294 const char *boot_device
,
295 const char *kernel_cmdline
,
300 uint32_t start_prop
= cpu_to_be32(initrd_base
);
301 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
302 char hypertas_prop
[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
303 "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk\0hcall-set-mode";
304 char qemu_hypertas_prop
[] = "hcall-memop1";
305 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
306 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(smp_cpus
)};
307 int i
, smt
= kvmppc_smt_threads();
308 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
310 fdt
= g_malloc0(FDT_MAX_SIZE
);
311 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
314 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
317 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
319 _FDT((fdt_finish_reservemap(fdt
)));
322 _FDT((fdt_begin_node(fdt
, "")));
323 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
324 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
325 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
327 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
328 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
331 _FDT((fdt_begin_node(fdt
, "chosen")));
333 /* Set Form1_affinity */
334 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
336 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
337 _FDT((fdt_property(fdt
, "linux,initrd-start",
338 &start_prop
, sizeof(start_prop
))));
339 _FDT((fdt_property(fdt
, "linux,initrd-end",
340 &end_prop
, sizeof(end_prop
))));
342 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
343 cpu_to_be64(kernel_size
) };
345 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
347 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
351 _FDT((fdt_property_string(fdt
, "qemu,boot-device", boot_device
)));
353 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
354 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
355 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
357 _FDT((fdt_end_node(fdt
)));
360 _FDT((fdt_begin_node(fdt
, "cpus")));
362 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
363 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
366 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
367 CPUPPCState
*env
= &cpu
->env
;
368 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
369 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
370 int index
= cs
->cpu_index
;
371 uint32_t servers_prop
[smp_threads
];
372 uint32_t gservers_prop
[smp_threads
* 2];
374 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
375 0xffffffff, 0xffffffff};
376 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
377 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
378 uint32_t page_sizes_prop
[64];
379 size_t page_sizes_prop_size
;
381 if ((index
% smt
) != 0) {
385 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
387 _FDT((fdt_begin_node(fdt
, nodename
)));
391 _FDT((fdt_property_cell(fdt
, "reg", index
)));
392 _FDT((fdt_property_string(fdt
, "device_type", "cpu")));
394 _FDT((fdt_property_cell(fdt
, "cpu-version", env
->spr
[SPR_PVR
])));
395 _FDT((fdt_property_cell(fdt
, "d-cache-block-size",
396 env
->dcache_line_size
)));
397 _FDT((fdt_property_cell(fdt
, "d-cache-line-size",
398 env
->dcache_line_size
)));
399 _FDT((fdt_property_cell(fdt
, "i-cache-block-size",
400 env
->icache_line_size
)));
401 _FDT((fdt_property_cell(fdt
, "i-cache-line-size",
402 env
->icache_line_size
)));
404 if (pcc
->l1_dcache_size
) {
405 _FDT((fdt_property_cell(fdt
, "d-cache-size", pcc
->l1_dcache_size
)));
407 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
409 if (pcc
->l1_icache_size
) {
410 _FDT((fdt_property_cell(fdt
, "i-cache-size", pcc
->l1_icache_size
)));
412 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
415 _FDT((fdt_property_cell(fdt
, "timebase-frequency", tbfreq
)));
416 _FDT((fdt_property_cell(fdt
, "clock-frequency", cpufreq
)));
417 _FDT((fdt_property_cell(fdt
, "ibm,slb-size", env
->slb_nr
)));
418 _FDT((fdt_property_string(fdt
, "status", "okay")));
419 _FDT((fdt_property(fdt
, "64-bit", NULL
, 0)));
421 /* Build interrupt servers and gservers properties */
422 for (i
= 0; i
< smp_threads
; i
++) {
423 servers_prop
[i
] = cpu_to_be32(index
+ i
);
424 /* Hack, direct the group queues back to cpu 0 */
425 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
426 gservers_prop
[i
*2 + 1] = 0;
428 _FDT((fdt_property(fdt
, "ibm,ppc-interrupt-server#s",
429 servers_prop
, sizeof(servers_prop
))));
430 _FDT((fdt_property(fdt
, "ibm,ppc-interrupt-gserver#s",
431 gservers_prop
, sizeof(gservers_prop
))));
433 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
434 _FDT((fdt_property(fdt
, "ibm,purr", NULL
, 0)));
437 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
438 _FDT((fdt_property(fdt
, "ibm,processor-segment-sizes",
439 segs
, sizeof(segs
))));
442 /* Advertise VMX/VSX (vector extensions) if available
443 * 0 / no property == no vector extensions
444 * 1 == VMX / Altivec available
445 * 2 == VSX available */
446 if (env
->insns_flags
& PPC_ALTIVEC
) {
447 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
449 _FDT((fdt_property_cell(fdt
, "ibm,vmx", vmx
)));
452 /* Advertise DFP (Decimal Floating Point) if available
453 * 0 / no property == no DFP
454 * 1 == DFP available */
455 if (env
->insns_flags2
& PPC2_DFP
) {
456 _FDT((fdt_property_cell(fdt
, "ibm,dfp", 1)));
459 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
460 sizeof(page_sizes_prop
));
461 if (page_sizes_prop_size
) {
462 _FDT((fdt_property(fdt
, "ibm,segment-page-sizes",
463 page_sizes_prop
, page_sizes_prop_size
)));
466 _FDT((fdt_end_node(fdt
)));
469 _FDT((fdt_end_node(fdt
)));
472 _FDT((fdt_begin_node(fdt
, "rtas")));
474 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas_prop
,
475 sizeof(hypertas_prop
))));
476 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas_prop
,
477 sizeof(qemu_hypertas_prop
))));
479 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
480 refpoints
, sizeof(refpoints
))));
482 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
484 _FDT((fdt_end_node(fdt
)));
486 /* interrupt controller */
487 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
489 _FDT((fdt_property_string(fdt
, "device_type",
490 "PowerPC-External-Interrupt-Presentation")));
491 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
492 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
493 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
494 interrupt_server_ranges_prop
,
495 sizeof(interrupt_server_ranges_prop
))));
496 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
497 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
498 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
500 _FDT((fdt_end_node(fdt
)));
503 _FDT((fdt_begin_node(fdt
, "vdevice")));
505 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
506 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
507 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
508 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
509 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
510 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
512 _FDT((fdt_end_node(fdt
)));
515 spapr_events_fdt_skel(fdt
, epow_irq
);
517 _FDT((fdt_end_node(fdt
))); /* close root node */
518 _FDT((fdt_finish(fdt
)));
523 static int spapr_populate_memory(sPAPREnvironment
*spapr
, void *fdt
)
525 uint32_t associativity
[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
526 cpu_to_be32(0x0), cpu_to_be32(0x0),
529 hwaddr node0_size
, mem_start
;
530 uint64_t mem_reg_property
[2];
534 node0_size
= (nb_numa_nodes
> 1) ? node_mem
[0] : ram_size
;
535 if (spapr
->rma_size
> node0_size
) {
536 spapr
->rma_size
= node0_size
;
540 mem_reg_property
[0] = 0;
541 mem_reg_property
[1] = cpu_to_be64(spapr
->rma_size
);
542 off
= fdt_add_subnode(fdt
, 0, "memory@0");
544 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
545 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
546 sizeof(mem_reg_property
))));
547 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
548 sizeof(associativity
))));
551 if (node0_size
> spapr
->rma_size
) {
552 mem_reg_property
[0] = cpu_to_be64(spapr
->rma_size
);
553 mem_reg_property
[1] = cpu_to_be64(node0_size
- spapr
->rma_size
);
555 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, spapr
->rma_size
);
556 off
= fdt_add_subnode(fdt
, 0, mem_name
);
558 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
559 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
560 sizeof(mem_reg_property
))));
561 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
562 sizeof(associativity
))));
565 /* RAM: Node 1 and beyond */
566 mem_start
= node0_size
;
567 for (i
= 1; i
< nb_numa_nodes
; i
++) {
568 mem_reg_property
[0] = cpu_to_be64(mem_start
);
569 mem_reg_property
[1] = cpu_to_be64(node_mem
[i
]);
570 associativity
[3] = associativity
[4] = cpu_to_be32(i
);
571 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, mem_start
);
572 off
= fdt_add_subnode(fdt
, 0, mem_name
);
574 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
575 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
576 sizeof(mem_reg_property
))));
577 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
578 sizeof(associativity
))));
579 mem_start
+= node_mem
[i
];
585 static void spapr_finalize_fdt(sPAPREnvironment
*spapr
,
594 fdt
= g_malloc(FDT_MAX_SIZE
);
596 /* open out the base tree into a temp buffer for the final tweaks */
597 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
599 ret
= spapr_populate_memory(spapr
, fdt
);
601 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
605 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
607 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
611 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
612 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
616 fprintf(stderr
, "couldn't setup PCI devices in fdt\n");
621 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
623 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
626 /* Advertise NUMA via ibm,associativity */
627 ret
= spapr_fixup_cpu_dt(fdt
, spapr
);
629 fprintf(stderr
, "Couldn't finalize CPU device tree properties\n");
632 if (!spapr
->has_graphics
) {
633 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
636 _FDT((fdt_pack(fdt
)));
638 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
639 hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
640 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
644 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
649 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
651 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
654 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
656 CPUPPCState
*env
= &cpu
->env
;
659 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
660 env
->gpr
[3] = H_PRIVILEGE
;
662 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
666 static void spapr_reset_htab(sPAPREnvironment
*spapr
)
670 /* allocate hash page table. For now we always make this 16mb,
671 * later we should probably make it scale to the size of guest
674 shift
= kvmppc_reset_htab(spapr
->htab_shift
);
677 /* Kernel handles htab, we don't need to allocate one */
678 spapr
->htab_shift
= shift
;
681 /* Allocate an htab if we don't yet have one */
682 spapr
->htab
= qemu_memalign(HTAB_SIZE(spapr
), HTAB_SIZE(spapr
));
686 memset(spapr
->htab
, 0, HTAB_SIZE(spapr
));
689 /* Update the RMA size if necessary */
690 if (spapr
->vrma_adjust
) {
691 spapr
->rma_size
= kvmppc_rma_size(ram_size
, spapr
->htab_shift
);
695 static void ppc_spapr_reset(void)
697 PowerPCCPU
*first_ppc_cpu
;
699 /* Reset the hash table & recalc the RMA */
700 spapr_reset_htab(spapr
);
702 qemu_devices_reset();
705 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
708 /* Set up the entry state */
709 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
710 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
711 first_ppc_cpu
->env
.gpr
[5] = 0;
712 first_cpu
->halted
= 0;
713 first_ppc_cpu
->env
.nip
= spapr
->entry_point
;
717 static void spapr_cpu_reset(void *opaque
)
719 PowerPCCPU
*cpu
= opaque
;
720 CPUState
*cs
= CPU(cpu
);
721 CPUPPCState
*env
= &cpu
->env
;
725 /* All CPUs start halted. CPU0 is unhalted from the machine level
726 * reset code and the rest are explicitly started up by the guest
727 * using an RTAS call */
730 env
->spr
[SPR_HIOR
] = 0;
732 env
->external_htab
= (uint8_t *)spapr
->htab
;
734 env
->htab_mask
= HTAB_SIZE(spapr
) - 1;
735 env
->spr
[SPR_SDR1
] = (target_ulong
)(uintptr_t)spapr
->htab
|
736 (spapr
->htab_shift
- 18);
739 static void spapr_create_nvram(sPAPREnvironment
*spapr
)
741 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
742 const char *drivename
= qemu_opt_get(qemu_get_machine_opts(), "nvram");
745 BlockDriverState
*bs
;
747 bs
= bdrv_find(drivename
);
749 fprintf(stderr
, "No such block device \"%s\" for nvram\n",
753 qdev_prop_set_drive_nofail(dev
, "drive", bs
);
756 qdev_init_nofail(dev
);
758 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
761 /* Returns whether we want to use VGA or not */
762 static int spapr_vga_init(PCIBus
*pci_bus
)
764 switch (vga_interface_type
) {
767 return pci_vga_init(pci_bus
) != NULL
;
769 fprintf(stderr
, "This vga model is not supported,"
770 "currently it only supports -vga std\n");
776 static const VMStateDescription vmstate_spapr
= {
779 .minimum_version_id
= 1,
780 .minimum_version_id_old
= 1,
781 .fields
= (VMStateField
[]) {
782 VMSTATE_UINT32(next_irq
, sPAPREnvironment
),
785 VMSTATE_UINT64(rtc_offset
, sPAPREnvironment
),
787 VMSTATE_END_OF_LIST()
791 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
792 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
793 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
794 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
796 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
798 sPAPREnvironment
*spapr
= opaque
;
800 /* "Iteration" header */
801 qemu_put_be32(f
, spapr
->htab_shift
);
804 spapr
->htab_save_index
= 0;
805 spapr
->htab_first_pass
= true;
807 assert(kvm_enabled());
809 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
810 if (spapr
->htab_fd
< 0) {
811 fprintf(stderr
, "Unable to open fd for reading hash table from KVM: %s\n",
821 static void htab_save_first_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
824 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
825 int index
= spapr
->htab_save_index
;
826 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
828 assert(spapr
->htab_first_pass
);
833 /* Consume invalid HPTEs */
834 while ((index
< htabslots
)
835 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
837 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
840 /* Consume valid HPTEs */
842 while ((index
< htabslots
)
843 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
845 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
848 if (index
> chunkstart
) {
849 int n_valid
= index
- chunkstart
;
851 qemu_put_be32(f
, chunkstart
);
852 qemu_put_be16(f
, n_valid
);
854 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
855 HASH_PTE_SIZE_64
* n_valid
);
857 if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
861 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
863 if (index
>= htabslots
) {
864 assert(index
== htabslots
);
866 spapr
->htab_first_pass
= false;
868 spapr
->htab_save_index
= index
;
871 static int htab_save_later_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
874 bool final
= max_ns
< 0;
875 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
876 int examined
= 0, sent
= 0;
877 int index
= spapr
->htab_save_index
;
878 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
880 assert(!spapr
->htab_first_pass
);
883 int chunkstart
, invalidstart
;
885 /* Consume non-dirty HPTEs */
886 while ((index
< htabslots
)
887 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
893 /* Consume valid dirty HPTEs */
894 while ((index
< htabslots
)
895 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
896 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
897 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
902 invalidstart
= index
;
903 /* Consume invalid dirty HPTEs */
904 while ((index
< htabslots
)
905 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
906 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
907 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
912 if (index
> chunkstart
) {
913 int n_valid
= invalidstart
- chunkstart
;
914 int n_invalid
= index
- invalidstart
;
916 qemu_put_be32(f
, chunkstart
);
917 qemu_put_be16(f
, n_valid
);
918 qemu_put_be16(f
, n_invalid
);
919 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
920 HASH_PTE_SIZE_64
* n_valid
);
921 sent
+= index
- chunkstart
;
923 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
928 if (examined
>= htabslots
) {
932 if (index
>= htabslots
) {
933 assert(index
== htabslots
);
936 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
938 if (index
>= htabslots
) {
939 assert(index
== htabslots
);
943 spapr
->htab_save_index
= index
;
945 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
948 #define MAX_ITERATION_NS 5000000 /* 5 ms */
949 #define MAX_KVM_BUF_SIZE 2048
951 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
953 sPAPREnvironment
*spapr
= opaque
;
956 /* Iteration header */
960 assert(kvm_enabled());
962 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
,
963 MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
967 } else if (spapr
->htab_first_pass
) {
968 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
970 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
981 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
983 sPAPREnvironment
*spapr
= opaque
;
985 /* Iteration header */
991 assert(kvm_enabled());
993 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
, MAX_KVM_BUF_SIZE
, -1);
997 close(spapr
->htab_fd
);
1000 htab_save_later_pass(f
, spapr
, -1);
1004 qemu_put_be32(f
, 0);
1005 qemu_put_be16(f
, 0);
1006 qemu_put_be16(f
, 0);
1011 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1013 sPAPREnvironment
*spapr
= opaque
;
1014 uint32_t section_hdr
;
1017 if (version_id
< 1 || version_id
> 1) {
1018 fprintf(stderr
, "htab_load() bad version\n");
1022 section_hdr
= qemu_get_be32(f
);
1025 /* First section, just the hash shift */
1026 if (spapr
->htab_shift
!= section_hdr
) {
1033 assert(kvm_enabled());
1035 fd
= kvmppc_get_htab_fd(true);
1037 fprintf(stderr
, "Unable to open fd to restore KVM hash table: %s\n",
1044 uint16_t n_valid
, n_invalid
;
1046 index
= qemu_get_be32(f
);
1047 n_valid
= qemu_get_be16(f
);
1048 n_invalid
= qemu_get_be16(f
);
1050 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1055 if ((index
+ n_valid
+ n_invalid
) >
1056 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1057 /* Bad index in stream */
1058 fprintf(stderr
, "htab_load() bad index %d (%hd+%hd entries) "
1059 "in htab stream (htab_shift=%d)\n", index
, n_valid
, n_invalid
,
1066 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1067 HASH_PTE_SIZE_64
* n_valid
);
1070 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1071 HASH_PTE_SIZE_64
* n_invalid
);
1078 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1093 static SaveVMHandlers savevm_htab_handlers
= {
1094 .save_live_setup
= htab_save_setup
,
1095 .save_live_iterate
= htab_save_iterate
,
1096 .save_live_complete
= htab_save_complete
,
1097 .load_state
= htab_load
,
1100 /* pSeries LPAR / sPAPR hardware init */
1101 static void ppc_spapr_init(QEMUMachineInitArgs
*args
)
1103 ram_addr_t ram_size
= args
->ram_size
;
1104 const char *cpu_model
= args
->cpu_model
;
1105 const char *kernel_filename
= args
->kernel_filename
;
1106 const char *kernel_cmdline
= args
->kernel_cmdline
;
1107 const char *initrd_filename
= args
->initrd_filename
;
1108 const char *boot_device
= args
->boot_order
;
1113 MemoryRegion
*sysmem
= get_system_memory();
1114 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1115 hwaddr rma_alloc_size
;
1116 uint32_t initrd_base
= 0;
1117 long kernel_size
= 0, initrd_size
= 0;
1118 long load_limit
, rtas_limit
, fw_size
;
1119 bool kernel_le
= false;
1122 msi_supported
= true;
1124 spapr
= g_malloc0(sizeof(*spapr
));
1125 QLIST_INIT(&spapr
->phbs
);
1127 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1129 /* Allocate RMA if necessary */
1130 rma_alloc_size
= kvmppc_alloc_rma("ppc_spapr.rma", sysmem
);
1132 if (rma_alloc_size
== -1) {
1133 hw_error("qemu: Unable to create RMA\n");
1137 if (rma_alloc_size
&& (rma_alloc_size
< ram_size
)) {
1138 spapr
->rma_size
= rma_alloc_size
;
1140 spapr
->rma_size
= ram_size
;
1142 /* With KVM, we don't actually know whether KVM supports an
1143 * unbounded RMA (PR KVM) or is limited by the hash table size
1144 * (HV KVM using VRMA), so we always assume the latter
1146 * In that case, we also limit the initial allocations for RTAS
1147 * etc... to 256M since we have no way to know what the VRMA size
1148 * is going to be as it depends on the size of the hash table
1149 * isn't determined yet.
1151 if (kvm_enabled()) {
1152 spapr
->vrma_adjust
= 1;
1153 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1157 /* We place the device tree and RTAS just below either the top of the RMA,
1158 * or just below 2GB, whichever is lowere, so that it can be
1159 * processed with 32-bit real mode code if necessary */
1160 rtas_limit
= MIN(spapr
->rma_size
, 0x80000000);
1161 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1162 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
1163 load_limit
= spapr
->fdt_addr
- FW_OVERHEAD
;
1165 /* We aim for a hash table of size 1/128 the size of RAM. The
1166 * normal rule of thumb is 1/64 the size of RAM, but that's much
1167 * more than needed for the Linux guests we support. */
1168 spapr
->htab_shift
= 18; /* Minimum architected size */
1169 while (spapr
->htab_shift
<= 46) {
1170 if ((1ULL << (spapr
->htab_shift
+ 7)) >= ram_size
) {
1173 spapr
->htab_shift
++;
1176 /* Set up Interrupt Controller before we create the VCPUs */
1177 spapr
->icp
= xics_system_init(smp_cpus
* kvmppc_smt_threads() / smp_threads
,
1179 spapr
->next_irq
= XICS_IRQ_BASE
;
1182 if (cpu_model
== NULL
) {
1183 cpu_model
= kvm_enabled() ? "host" : "POWER7";
1185 for (i
= 0; i
< smp_cpus
; i
++) {
1186 cpu
= cpu_ppc_init(cpu_model
);
1188 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
1193 /* Set time-base frequency to 512 MHz */
1194 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1196 /* PAPR always has exception vectors in RAM not ROM. To ensure this,
1197 * MSR[IP] should never be set.
1199 env
->msr_mask
&= ~(1 << 6);
1201 /* Tell KVM that we're in PAPR mode */
1202 if (kvm_enabled()) {
1203 kvmppc_set_papr(cpu
);
1206 xics_cpu_setup(spapr
->icp
, cpu
);
1208 qemu_register_reset(spapr_cpu_reset
, cpu
);
1212 spapr
->ram_limit
= ram_size
;
1213 if (spapr
->ram_limit
> rma_alloc_size
) {
1214 ram_addr_t nonrma_base
= rma_alloc_size
;
1215 ram_addr_t nonrma_size
= spapr
->ram_limit
- rma_alloc_size
;
1217 memory_region_init_ram(ram
, NULL
, "ppc_spapr.ram", nonrma_size
);
1218 vmstate_register_ram_global(ram
);
1219 memory_region_add_subregion(sysmem
, nonrma_base
, ram
);
1222 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1223 spapr
->rtas_size
= load_image_targphys(filename
, spapr
->rtas_addr
,
1224 rtas_limit
- spapr
->rtas_addr
);
1225 if (spapr
->rtas_size
< 0) {
1226 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1229 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1230 hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
1231 spapr
->rtas_size
, RTAS_MAX_SIZE
);
1236 /* Set up EPOW events infrastructure */
1237 spapr_events_init(spapr
);
1239 /* Set up VIO bus */
1240 spapr
->vio_bus
= spapr_vio_bus_init();
1242 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1243 if (serial_hds
[i
]) {
1244 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1248 /* We always have at least the nvram device on VIO */
1249 spapr_create_nvram(spapr
);
1252 spapr_pci_msi_init(spapr
, SPAPR_PCI_MSI_WINDOW
);
1253 spapr_pci_rtas_init();
1255 phb
= spapr_create_phb(spapr
, 0);
1257 for (i
= 0; i
< nb_nics
; i
++) {
1258 NICInfo
*nd
= &nd_table
[i
];
1261 nd
->model
= g_strdup("ibmveth");
1264 if (strcmp(nd
->model
, "ibmveth") == 0) {
1265 spapr_vlan_create(spapr
->vio_bus
, nd
);
1267 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1271 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1272 spapr_vscsi_create(spapr
->vio_bus
);
1276 if (spapr_vga_init(phb
->bus
)) {
1277 spapr
->has_graphics
= true;
1280 if (usb_enabled(spapr
->has_graphics
)) {
1281 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1282 if (spapr
->has_graphics
) {
1283 usbdevice_create("keyboard");
1284 usbdevice_create("mouse");
1288 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1289 fprintf(stderr
, "qemu: pSeries SLOF firmware requires >= "
1290 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF
);
1294 if (kernel_filename
) {
1295 uint64_t lowaddr
= 0;
1297 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1298 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
1299 if (kernel_size
< 0) {
1300 kernel_size
= load_elf(kernel_filename
,
1301 translate_kernel_address
, NULL
,
1302 NULL
, &lowaddr
, NULL
, 0, ELF_MACHINE
, 0);
1303 kernel_le
= kernel_size
> 0;
1305 if (kernel_size
< 0) {
1306 kernel_size
= load_image_targphys(kernel_filename
,
1308 load_limit
- KERNEL_LOAD_ADDR
);
1310 if (kernel_size
< 0) {
1311 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
1317 if (initrd_filename
) {
1318 /* Try to locate the initrd in the gap between the kernel
1319 * and the firmware. Add a bit of space just in case
1321 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1322 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1323 load_limit
- initrd_base
);
1324 if (initrd_size
< 0) {
1325 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
1335 if (bios_name
== NULL
) {
1336 bios_name
= FW_FILE_NAME
;
1338 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1339 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1341 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1346 spapr
->entry_point
= 0x100;
1348 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1349 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1350 &savevm_htab_handlers
, spapr
);
1352 /* Prepare the device tree */
1353 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
1354 kernel_size
, kernel_le
,
1355 boot_device
, kernel_cmdline
,
1357 assert(spapr
->fdt_skel
!= NULL
);
1360 static QEMUMachine spapr_machine
= {
1362 .desc
= "pSeries Logical Partition (PAPR compliant)",
1364 .init
= ppc_spapr_init
,
1365 .reset
= ppc_spapr_reset
,
1366 .block_default_type
= IF_SCSI
,
1367 .max_cpus
= MAX_CPUS
,
1369 .default_boot_order
= NULL
,
1372 static void spapr_machine_init(void)
1374 qemu_register_machine(&spapr_machine
);
1377 machine_init(spapr_machine_init
);