2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "sysemu/sysemu.h"
31 #include "sysemu/blockdev.h"
32 #include "sysemu/cpus.h"
33 #include "sysemu/kvm.h"
35 #include "mmu-hash64.h"
37 #include "hw/boards.h"
38 #include "hw/ppc/ppc.h"
39 #include "hw/loader.h"
41 #include "hw/ppc/spapr.h"
42 #include "hw/ppc/spapr_vio.h"
43 #include "hw/pci-host/spapr.h"
44 #include "hw/ppc/xics.h"
45 #include "hw/pci/msi.h"
47 #include "hw/pci/pci.h"
49 #include "exec/address-spaces.h"
51 #include "qemu/config-file.h"
55 /* SLOF memory layout:
57 * SLOF raw image loaded at 0, copies its romfs right below the flat
58 * device-tree, then position SLOF itself 31M below that
60 * So we set FW_OVERHEAD to 40MB which should account for all of that
63 * We load our kernel at 4M, leaving space for SLOF initial image
65 #define FDT_MAX_SIZE 0x10000
66 #define RTAS_MAX_SIZE 0x10000
67 #define FW_MAX_SIZE 0x400000
68 #define FW_FILE_NAME "slof.bin"
69 #define FW_OVERHEAD 0x2800000
70 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
72 #define MIN_RMA_SLOF 128UL
74 #define TIMEBASE_FREQ 512000000ULL
77 #define XICS_IRQS 1024
79 #define PHANDLE_XICP 0x00001111
81 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
83 sPAPREnvironment
*spapr
;
85 int spapr_allocate_irq(int hint
, bool lsi
)
91 if (hint
>= spapr
->next_irq
) {
92 spapr
->next_irq
= hint
+ 1;
94 /* FIXME: we should probably check for collisions somehow */
96 irq
= spapr
->next_irq
++;
99 /* Configure irq type */
100 if (!xics_get_qirq(spapr
->icp
, irq
)) {
104 xics_set_irq_type(spapr
->icp
, irq
, lsi
);
110 * Allocate block of consequtive IRQs, returns a number of the first.
111 * If msi==true, aligns the first IRQ number to num.
113 int spapr_allocate_irq_block(int num
, bool lsi
, bool msi
)
119 * MSIMesage::data is used for storing VIRQ so
120 * it has to be aligned to num to support multiple
121 * MSI vectors. MSI-X is not affected by this.
122 * The hint is used for the first IRQ, the rest should
123 * be allocated continuously.
126 assert((num
== 1) || (num
== 2) || (num
== 4) ||
127 (num
== 8) || (num
== 16) || (num
== 32));
128 hint
= (spapr
->next_irq
+ num
- 1) & ~(num
- 1);
131 for (i
= 0; i
< num
; ++i
) {
134 irq
= spapr_allocate_irq(hint
, lsi
);
144 /* If the above doesn't create a consecutive block then that's
146 assert(irq
== (first
+ i
));
152 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
157 dev
= qdev_create(NULL
, type
);
158 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
159 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
160 if (qdev_init(dev
) < 0) {
167 static XICSState
*xics_system_init(int nr_servers
, int nr_irqs
)
169 XICSState
*icp
= NULL
;
171 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
);
173 perror("Failed to create XICS\n");
180 static int spapr_fixup_cpu_dt(void *fdt
, sPAPREnvironment
*spapr
)
185 int smt
= kvmppc_smt_threads();
186 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
188 assert(spapr
->cpu_model
);
191 uint32_t associativity
[] = {cpu_to_be32(0x5),
195 cpu_to_be32(cpu
->numa_node
),
196 cpu_to_be32(cpu
->cpu_index
)};
198 if ((cpu
->cpu_index
% smt
) != 0) {
202 snprintf(cpu_model
, 32, "/cpus/%s@%x", spapr
->cpu_model
,
205 offset
= fdt_path_offset(fdt
, cpu_model
);
210 if (nb_numa_nodes
> 1) {
211 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
212 sizeof(associativity
));
218 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
219 pft_size_prop
, sizeof(pft_size_prop
));
228 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
231 size_t maxcells
= maxsize
/ sizeof(uint32_t);
235 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
236 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
238 if (!sps
->page_shift
) {
241 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
242 if (sps
->enc
[count
].page_shift
== 0) {
246 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
249 *(p
++) = cpu_to_be32(sps
->page_shift
);
250 *(p
++) = cpu_to_be32(sps
->slb_enc
);
251 *(p
++) = cpu_to_be32(count
);
252 for (j
= 0; j
< count
; j
++) {
253 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
254 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
258 return (p
- prop
) * sizeof(uint32_t);
265 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
266 #exp, fdt_strerror(ret)); \
272 static void *spapr_create_fdt_skel(const char *cpu_model
,
276 const char *boot_device
,
277 const char *kernel_cmdline
,
282 uint32_t start_prop
= cpu_to_be32(initrd_base
);
283 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
284 char hypertas_prop
[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
285 "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk\0hcall-set-mode";
286 char qemu_hypertas_prop
[] = "hcall-memop1";
287 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
288 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(smp_cpus
)};
290 int i
, smt
= kvmppc_smt_threads();
291 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
293 fdt
= g_malloc0(FDT_MAX_SIZE
);
294 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
297 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
300 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
302 _FDT((fdt_finish_reservemap(fdt
)));
305 _FDT((fdt_begin_node(fdt
, "")));
306 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
307 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
308 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
310 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
311 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
314 _FDT((fdt_begin_node(fdt
, "chosen")));
316 /* Set Form1_affinity */
317 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
319 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
320 _FDT((fdt_property(fdt
, "linux,initrd-start",
321 &start_prop
, sizeof(start_prop
))));
322 _FDT((fdt_property(fdt
, "linux,initrd-end",
323 &end_prop
, sizeof(end_prop
))));
325 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
326 cpu_to_be64(kernel_size
) };
328 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
331 _FDT((fdt_property_string(fdt
, "qemu,boot-device", boot_device
)));
333 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
334 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
335 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
337 _FDT((fdt_end_node(fdt
)));
340 _FDT((fdt_begin_node(fdt
, "cpus")));
342 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
343 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
345 modelname
= g_strdup(cpu_model
);
347 for (i
= 0; i
< strlen(modelname
); i
++) {
348 modelname
[i
] = toupper(modelname
[i
]);
351 /* This is needed during FDT finalization */
352 spapr
->cpu_model
= g_strdup(modelname
);
355 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
356 CPUPPCState
*env
= &cpu
->env
;
357 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
358 int index
= cs
->cpu_index
;
359 uint32_t servers_prop
[smp_threads
];
360 uint32_t gservers_prop
[smp_threads
* 2];
362 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
363 0xffffffff, 0xffffffff};
364 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
365 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
366 uint32_t page_sizes_prop
[64];
367 size_t page_sizes_prop_size
;
369 if ((index
% smt
) != 0) {
373 nodename
= g_strdup_printf("%s@%x", modelname
, index
);
375 _FDT((fdt_begin_node(fdt
, nodename
)));
379 _FDT((fdt_property_cell(fdt
, "reg", index
)));
380 _FDT((fdt_property_string(fdt
, "device_type", "cpu")));
382 _FDT((fdt_property_cell(fdt
, "cpu-version", env
->spr
[SPR_PVR
])));
383 _FDT((fdt_property_cell(fdt
, "d-cache-block-size",
384 env
->dcache_line_size
)));
385 _FDT((fdt_property_cell(fdt
, "d-cache-line-size",
386 env
->dcache_line_size
)));
387 _FDT((fdt_property_cell(fdt
, "i-cache-block-size",
388 env
->icache_line_size
)));
389 _FDT((fdt_property_cell(fdt
, "i-cache-line-size",
390 env
->icache_line_size
)));
392 if (pcc
->l1_dcache_size
) {
393 _FDT((fdt_property_cell(fdt
, "d-cache-size", pcc
->l1_dcache_size
)));
395 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
397 if (pcc
->l1_icache_size
) {
398 _FDT((fdt_property_cell(fdt
, "i-cache-size", pcc
->l1_icache_size
)));
400 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
403 _FDT((fdt_property_cell(fdt
, "timebase-frequency", tbfreq
)));
404 _FDT((fdt_property_cell(fdt
, "clock-frequency", cpufreq
)));
405 _FDT((fdt_property_cell(fdt
, "ibm,slb-size", env
->slb_nr
)));
406 _FDT((fdt_property_string(fdt
, "status", "okay")));
407 _FDT((fdt_property(fdt
, "64-bit", NULL
, 0)));
409 /* Build interrupt servers and gservers properties */
410 for (i
= 0; i
< smp_threads
; i
++) {
411 servers_prop
[i
] = cpu_to_be32(index
+ i
);
412 /* Hack, direct the group queues back to cpu 0 */
413 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
414 gservers_prop
[i
*2 + 1] = 0;
416 _FDT((fdt_property(fdt
, "ibm,ppc-interrupt-server#s",
417 servers_prop
, sizeof(servers_prop
))));
418 _FDT((fdt_property(fdt
, "ibm,ppc-interrupt-gserver#s",
419 gservers_prop
, sizeof(gservers_prop
))));
421 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
422 _FDT((fdt_property(fdt
, "ibm,processor-segment-sizes",
423 segs
, sizeof(segs
))));
426 /* Advertise VMX/VSX (vector extensions) if available
427 * 0 / no property == no vector extensions
428 * 1 == VMX / Altivec available
429 * 2 == VSX available */
430 if (env
->insns_flags
& PPC_ALTIVEC
) {
431 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
433 _FDT((fdt_property_cell(fdt
, "ibm,vmx", vmx
)));
436 /* Advertise DFP (Decimal Floating Point) if available
437 * 0 / no property == no DFP
438 * 1 == DFP available */
439 if (env
->insns_flags2
& PPC2_DFP
) {
440 _FDT((fdt_property_cell(fdt
, "ibm,dfp", 1)));
443 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
444 sizeof(page_sizes_prop
));
445 if (page_sizes_prop_size
) {
446 _FDT((fdt_property(fdt
, "ibm,segment-page-sizes",
447 page_sizes_prop
, page_sizes_prop_size
)));
450 _FDT((fdt_end_node(fdt
)));
455 _FDT((fdt_end_node(fdt
)));
458 _FDT((fdt_begin_node(fdt
, "rtas")));
460 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas_prop
,
461 sizeof(hypertas_prop
))));
462 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas_prop
,
463 sizeof(qemu_hypertas_prop
))));
465 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
466 refpoints
, sizeof(refpoints
))));
468 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
470 _FDT((fdt_end_node(fdt
)));
472 /* interrupt controller */
473 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
475 _FDT((fdt_property_string(fdt
, "device_type",
476 "PowerPC-External-Interrupt-Presentation")));
477 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
478 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
479 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
480 interrupt_server_ranges_prop
,
481 sizeof(interrupt_server_ranges_prop
))));
482 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
483 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
484 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
486 _FDT((fdt_end_node(fdt
)));
489 _FDT((fdt_begin_node(fdt
, "vdevice")));
491 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
492 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
493 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
494 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
495 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
496 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
498 _FDT((fdt_end_node(fdt
)));
501 spapr_events_fdt_skel(fdt
, epow_irq
);
503 _FDT((fdt_end_node(fdt
))); /* close root node */
504 _FDT((fdt_finish(fdt
)));
509 static int spapr_populate_memory(sPAPREnvironment
*spapr
, void *fdt
)
511 uint32_t associativity
[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
512 cpu_to_be32(0x0), cpu_to_be32(0x0),
515 hwaddr node0_size
, mem_start
;
516 uint64_t mem_reg_property
[2];
520 node0_size
= (nb_numa_nodes
> 1) ? node_mem
[0] : ram_size
;
521 if (spapr
->rma_size
> node0_size
) {
522 spapr
->rma_size
= node0_size
;
526 mem_reg_property
[0] = 0;
527 mem_reg_property
[1] = cpu_to_be64(spapr
->rma_size
);
528 off
= fdt_add_subnode(fdt
, 0, "memory@0");
530 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
531 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
532 sizeof(mem_reg_property
))));
533 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
534 sizeof(associativity
))));
537 if (node0_size
> spapr
->rma_size
) {
538 mem_reg_property
[0] = cpu_to_be64(spapr
->rma_size
);
539 mem_reg_property
[1] = cpu_to_be64(node0_size
- spapr
->rma_size
);
541 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, spapr
->rma_size
);
542 off
= fdt_add_subnode(fdt
, 0, mem_name
);
544 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
545 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
546 sizeof(mem_reg_property
))));
547 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
548 sizeof(associativity
))));
551 /* RAM: Node 1 and beyond */
552 mem_start
= node0_size
;
553 for (i
= 1; i
< nb_numa_nodes
; i
++) {
554 mem_reg_property
[0] = cpu_to_be64(mem_start
);
555 mem_reg_property
[1] = cpu_to_be64(node_mem
[i
]);
556 associativity
[3] = associativity
[4] = cpu_to_be32(i
);
557 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, mem_start
);
558 off
= fdt_add_subnode(fdt
, 0, mem_name
);
560 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
561 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
562 sizeof(mem_reg_property
))));
563 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
564 sizeof(associativity
))));
565 mem_start
+= node_mem
[i
];
571 static void spapr_finalize_fdt(sPAPREnvironment
*spapr
,
580 fdt
= g_malloc(FDT_MAX_SIZE
);
582 /* open out the base tree into a temp buffer for the final tweaks */
583 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
585 ret
= spapr_populate_memory(spapr
, fdt
);
587 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
591 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
593 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
597 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
598 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
602 fprintf(stderr
, "couldn't setup PCI devices in fdt\n");
607 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
609 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
612 /* Advertise NUMA via ibm,associativity */
613 ret
= spapr_fixup_cpu_dt(fdt
, spapr
);
615 fprintf(stderr
, "Couldn't finalize CPU device tree properties\n");
618 if (!spapr
->has_graphics
) {
619 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
622 _FDT((fdt_pack(fdt
)));
624 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
625 hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
626 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
630 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
635 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
637 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
640 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
642 CPUPPCState
*env
= &cpu
->env
;
645 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
646 env
->gpr
[3] = H_PRIVILEGE
;
648 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
652 static void spapr_reset_htab(sPAPREnvironment
*spapr
)
656 /* allocate hash page table. For now we always make this 16mb,
657 * later we should probably make it scale to the size of guest
660 shift
= kvmppc_reset_htab(spapr
->htab_shift
);
663 /* Kernel handles htab, we don't need to allocate one */
664 spapr
->htab_shift
= shift
;
667 /* Allocate an htab if we don't yet have one */
668 spapr
->htab
= qemu_memalign(HTAB_SIZE(spapr
), HTAB_SIZE(spapr
));
672 memset(spapr
->htab
, 0, HTAB_SIZE(spapr
));
675 /* Update the RMA size if necessary */
676 if (spapr
->vrma_adjust
) {
677 spapr
->rma_size
= kvmppc_rma_size(ram_size
, spapr
->htab_shift
);
681 static void ppc_spapr_reset(void)
683 PowerPCCPU
*first_ppc_cpu
;
685 /* Reset the hash table & recalc the RMA */
686 spapr_reset_htab(spapr
);
688 qemu_devices_reset();
691 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
694 /* Set up the entry state */
695 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
696 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
697 first_ppc_cpu
->env
.gpr
[5] = 0;
698 first_cpu
->halted
= 0;
699 first_ppc_cpu
->env
.nip
= spapr
->entry_point
;
703 static void spapr_cpu_reset(void *opaque
)
705 PowerPCCPU
*cpu
= opaque
;
706 CPUState
*cs
= CPU(cpu
);
707 CPUPPCState
*env
= &cpu
->env
;
711 /* All CPUs start halted. CPU0 is unhalted from the machine level
712 * reset code and the rest are explicitly started up by the guest
713 * using an RTAS call */
716 env
->spr
[SPR_HIOR
] = 0;
718 env
->external_htab
= (uint8_t *)spapr
->htab
;
720 env
->htab_mask
= HTAB_SIZE(spapr
) - 1;
721 env
->spr
[SPR_SDR1
] = (target_ulong
)(uintptr_t)spapr
->htab
|
722 (spapr
->htab_shift
- 18);
725 static void spapr_create_nvram(sPAPREnvironment
*spapr
)
727 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
728 const char *drivename
= qemu_opt_get(qemu_get_machine_opts(), "nvram");
731 BlockDriverState
*bs
;
733 bs
= bdrv_find(drivename
);
735 fprintf(stderr
, "No such block device \"%s\" for nvram\n",
739 qdev_prop_set_drive_nofail(dev
, "drive", bs
);
742 qdev_init_nofail(dev
);
744 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
747 /* Returns whether we want to use VGA or not */
748 static int spapr_vga_init(PCIBus
*pci_bus
)
750 switch (vga_interface_type
) {
753 return pci_vga_init(pci_bus
) != NULL
;
755 fprintf(stderr
, "This vga model is not supported,"
756 "currently it only supports -vga std\n");
762 static const VMStateDescription vmstate_spapr
= {
765 .minimum_version_id
= 1,
766 .minimum_version_id_old
= 1,
767 .fields
= (VMStateField
[]) {
768 VMSTATE_UINT32(next_irq
, sPAPREnvironment
),
771 VMSTATE_UINT64(rtc_offset
, sPAPREnvironment
),
773 VMSTATE_END_OF_LIST()
777 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
778 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
779 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
780 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
782 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
784 sPAPREnvironment
*spapr
= opaque
;
786 /* "Iteration" header */
787 qemu_put_be32(f
, spapr
->htab_shift
);
790 spapr
->htab_save_index
= 0;
791 spapr
->htab_first_pass
= true;
793 assert(kvm_enabled());
795 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
796 if (spapr
->htab_fd
< 0) {
797 fprintf(stderr
, "Unable to open fd for reading hash table from KVM: %s\n",
807 static void htab_save_first_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
810 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
811 int index
= spapr
->htab_save_index
;
812 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
814 assert(spapr
->htab_first_pass
);
819 /* Consume invalid HPTEs */
820 while ((index
< htabslots
)
821 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
823 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
826 /* Consume valid HPTEs */
828 while ((index
< htabslots
)
829 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
831 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
834 if (index
> chunkstart
) {
835 int n_valid
= index
- chunkstart
;
837 qemu_put_be32(f
, chunkstart
);
838 qemu_put_be16(f
, n_valid
);
840 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
841 HASH_PTE_SIZE_64
* n_valid
);
843 if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
847 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
849 if (index
>= htabslots
) {
850 assert(index
== htabslots
);
852 spapr
->htab_first_pass
= false;
854 spapr
->htab_save_index
= index
;
857 static int htab_save_later_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
860 bool final
= max_ns
< 0;
861 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
862 int examined
= 0, sent
= 0;
863 int index
= spapr
->htab_save_index
;
864 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
866 assert(!spapr
->htab_first_pass
);
869 int chunkstart
, invalidstart
;
871 /* Consume non-dirty HPTEs */
872 while ((index
< htabslots
)
873 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
879 /* Consume valid dirty HPTEs */
880 while ((index
< htabslots
)
881 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
882 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
883 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
888 invalidstart
= index
;
889 /* Consume invalid dirty HPTEs */
890 while ((index
< htabslots
)
891 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
892 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
893 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
898 if (index
> chunkstart
) {
899 int n_valid
= invalidstart
- chunkstart
;
900 int n_invalid
= index
- invalidstart
;
902 qemu_put_be32(f
, chunkstart
);
903 qemu_put_be16(f
, n_valid
);
904 qemu_put_be16(f
, n_invalid
);
905 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
906 HASH_PTE_SIZE_64
* n_valid
);
907 sent
+= index
- chunkstart
;
909 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
914 if (examined
>= htabslots
) {
918 if (index
>= htabslots
) {
919 assert(index
== htabslots
);
922 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
924 if (index
>= htabslots
) {
925 assert(index
== htabslots
);
929 spapr
->htab_save_index
= index
;
931 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
934 #define MAX_ITERATION_NS 5000000 /* 5 ms */
935 #define MAX_KVM_BUF_SIZE 2048
937 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
939 sPAPREnvironment
*spapr
= opaque
;
942 /* Iteration header */
946 assert(kvm_enabled());
948 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
,
949 MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
953 } else if (spapr
->htab_first_pass
) {
954 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
956 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
967 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
969 sPAPREnvironment
*spapr
= opaque
;
971 /* Iteration header */
977 assert(kvm_enabled());
979 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
, MAX_KVM_BUF_SIZE
, -1);
983 close(spapr
->htab_fd
);
986 htab_save_later_pass(f
, spapr
, -1);
997 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
999 sPAPREnvironment
*spapr
= opaque
;
1000 uint32_t section_hdr
;
1003 if (version_id
< 1 || version_id
> 1) {
1004 fprintf(stderr
, "htab_load() bad version\n");
1008 section_hdr
= qemu_get_be32(f
);
1011 /* First section, just the hash shift */
1012 if (spapr
->htab_shift
!= section_hdr
) {
1019 assert(kvm_enabled());
1021 fd
= kvmppc_get_htab_fd(true);
1023 fprintf(stderr
, "Unable to open fd to restore KVM hash table: %s\n",
1030 uint16_t n_valid
, n_invalid
;
1032 index
= qemu_get_be32(f
);
1033 n_valid
= qemu_get_be16(f
);
1034 n_invalid
= qemu_get_be16(f
);
1036 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1041 if ((index
+ n_valid
+ n_invalid
) >
1042 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1043 /* Bad index in stream */
1044 fprintf(stderr
, "htab_load() bad index %d (%hd+%hd entries) "
1045 "in htab stream (htab_shift=%d)\n", index
, n_valid
, n_invalid
,
1052 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1053 HASH_PTE_SIZE_64
* n_valid
);
1056 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1057 HASH_PTE_SIZE_64
* n_invalid
);
1064 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1079 static SaveVMHandlers savevm_htab_handlers
= {
1080 .save_live_setup
= htab_save_setup
,
1081 .save_live_iterate
= htab_save_iterate
,
1082 .save_live_complete
= htab_save_complete
,
1083 .load_state
= htab_load
,
1086 /* pSeries LPAR / sPAPR hardware init */
1087 static void ppc_spapr_init(QEMUMachineInitArgs
*args
)
1089 ram_addr_t ram_size
= args
->ram_size
;
1090 const char *cpu_model
= args
->cpu_model
;
1091 const char *kernel_filename
= args
->kernel_filename
;
1092 const char *kernel_cmdline
= args
->kernel_cmdline
;
1093 const char *initrd_filename
= args
->initrd_filename
;
1094 const char *boot_device
= args
->boot_order
;
1099 MemoryRegion
*sysmem
= get_system_memory();
1100 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1101 hwaddr rma_alloc_size
;
1102 uint32_t initrd_base
= 0;
1103 long kernel_size
= 0, initrd_size
= 0;
1104 long load_limit
, rtas_limit
, fw_size
;
1107 msi_supported
= true;
1109 spapr
= g_malloc0(sizeof(*spapr
));
1110 QLIST_INIT(&spapr
->phbs
);
1112 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1114 /* Allocate RMA if necessary */
1115 rma_alloc_size
= kvmppc_alloc_rma("ppc_spapr.rma", sysmem
);
1117 if (rma_alloc_size
== -1) {
1118 hw_error("qemu: Unable to create RMA\n");
1122 if (rma_alloc_size
&& (rma_alloc_size
< ram_size
)) {
1123 spapr
->rma_size
= rma_alloc_size
;
1125 spapr
->rma_size
= ram_size
;
1127 /* With KVM, we don't actually know whether KVM supports an
1128 * unbounded RMA (PR KVM) or is limited by the hash table size
1129 * (HV KVM using VRMA), so we always assume the latter
1131 * In that case, we also limit the initial allocations for RTAS
1132 * etc... to 256M since we have no way to know what the VRMA size
1133 * is going to be as it depends on the size of the hash table
1134 * isn't determined yet.
1136 if (kvm_enabled()) {
1137 spapr
->vrma_adjust
= 1;
1138 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1142 /* We place the device tree and RTAS just below either the top of the RMA,
1143 * or just below 2GB, whichever is lowere, so that it can be
1144 * processed with 32-bit real mode code if necessary */
1145 rtas_limit
= MIN(spapr
->rma_size
, 0x80000000);
1146 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1147 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
1148 load_limit
= spapr
->fdt_addr
- FW_OVERHEAD
;
1150 /* We aim for a hash table of size 1/128 the size of RAM. The
1151 * normal rule of thumb is 1/64 the size of RAM, but that's much
1152 * more than needed for the Linux guests we support. */
1153 spapr
->htab_shift
= 18; /* Minimum architected size */
1154 while (spapr
->htab_shift
<= 46) {
1155 if ((1ULL << (spapr
->htab_shift
+ 7)) >= ram_size
) {
1158 spapr
->htab_shift
++;
1161 /* Set up Interrupt Controller before we create the VCPUs */
1162 spapr
->icp
= xics_system_init(smp_cpus
* kvmppc_smt_threads() / smp_threads
,
1164 spapr
->next_irq
= XICS_IRQ_BASE
;
1167 if (cpu_model
== NULL
) {
1168 cpu_model
= kvm_enabled() ? "host" : "POWER7";
1170 for (i
= 0; i
< smp_cpus
; i
++) {
1171 cpu
= cpu_ppc_init(cpu_model
);
1173 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
1178 xics_cpu_setup(spapr
->icp
, cpu
);
1180 /* Set time-base frequency to 512 MHz */
1181 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1183 /* PAPR always has exception vectors in RAM not ROM. To ensure this,
1184 * MSR[IP] should never be set.
1186 env
->msr_mask
&= ~(1 << 6);
1188 /* Tell KVM that we're in PAPR mode */
1189 if (kvm_enabled()) {
1190 kvmppc_set_papr(cpu
);
1193 qemu_register_reset(spapr_cpu_reset
, cpu
);
1197 spapr
->ram_limit
= ram_size
;
1198 if (spapr
->ram_limit
> rma_alloc_size
) {
1199 ram_addr_t nonrma_base
= rma_alloc_size
;
1200 ram_addr_t nonrma_size
= spapr
->ram_limit
- rma_alloc_size
;
1202 memory_region_init_ram(ram
, NULL
, "ppc_spapr.ram", nonrma_size
);
1203 vmstate_register_ram_global(ram
);
1204 memory_region_add_subregion(sysmem
, nonrma_base
, ram
);
1207 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1208 spapr
->rtas_size
= load_image_targphys(filename
, spapr
->rtas_addr
,
1209 rtas_limit
- spapr
->rtas_addr
);
1210 if (spapr
->rtas_size
< 0) {
1211 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1214 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1215 hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
1216 spapr
->rtas_size
, RTAS_MAX_SIZE
);
1221 /* Set up EPOW events infrastructure */
1222 spapr_events_init(spapr
);
1224 /* Set up VIO bus */
1225 spapr
->vio_bus
= spapr_vio_bus_init();
1227 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1228 if (serial_hds
[i
]) {
1229 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1233 /* We always have at least the nvram device on VIO */
1234 spapr_create_nvram(spapr
);
1237 spapr_pci_msi_init(spapr
, SPAPR_PCI_MSI_WINDOW
);
1238 spapr_pci_rtas_init();
1240 phb
= spapr_create_phb(spapr
, 0);
1242 for (i
= 0; i
< nb_nics
; i
++) {
1243 NICInfo
*nd
= &nd_table
[i
];
1246 nd
->model
= g_strdup("ibmveth");
1249 if (strcmp(nd
->model
, "ibmveth") == 0) {
1250 spapr_vlan_create(spapr
->vio_bus
, nd
);
1252 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1256 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1257 spapr_vscsi_create(spapr
->vio_bus
);
1261 if (spapr_vga_init(phb
->bus
)) {
1262 spapr
->has_graphics
= true;
1265 if (usb_enabled(spapr
->has_graphics
)) {
1266 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1267 if (spapr
->has_graphics
) {
1268 usbdevice_create("keyboard");
1269 usbdevice_create("mouse");
1273 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1274 fprintf(stderr
, "qemu: pSeries SLOF firmware requires >= "
1275 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF
);
1279 if (kernel_filename
) {
1280 uint64_t lowaddr
= 0;
1282 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1283 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
1284 if (kernel_size
< 0) {
1285 kernel_size
= load_image_targphys(kernel_filename
,
1287 load_limit
- KERNEL_LOAD_ADDR
);
1289 if (kernel_size
< 0) {
1290 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
1296 if (initrd_filename
) {
1297 /* Try to locate the initrd in the gap between the kernel
1298 * and the firmware. Add a bit of space just in case
1300 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1301 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1302 load_limit
- initrd_base
);
1303 if (initrd_size
< 0) {
1304 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
1314 if (bios_name
== NULL
) {
1315 bios_name
= FW_FILE_NAME
;
1317 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1318 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1320 hw_error("qemu: could not load LPAR rtas '%s'\n", filename
);
1325 spapr
->entry_point
= 0x100;
1327 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1328 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1329 &savevm_htab_handlers
, spapr
);
1331 /* Prepare the device tree */
1332 spapr
->fdt_skel
= spapr_create_fdt_skel(cpu_model
,
1333 initrd_base
, initrd_size
,
1335 boot_device
, kernel_cmdline
,
1337 assert(spapr
->fdt_skel
!= NULL
);
1340 static QEMUMachine spapr_machine
= {
1342 .desc
= "pSeries Logical Partition (PAPR compliant)",
1344 .init
= ppc_spapr_init
,
1345 .reset
= ppc_spapr_reset
,
1346 .block_default_type
= IF_SCSI
,
1347 .max_cpus
= MAX_CPUS
,
1349 .default_boot_order
= NULL
,
1352 static void spapr_machine_init(void)
1354 qemu_register_machine(&spapr_machine
);
1357 machine_init(spapr_machine_init
);