hw/ppc_chrp.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "hw.h"
  26 #include "ppc.h"
  27 #include "ppc_mac.h"
  28 #include "nvram.h"
  29 #include "pc.h"
  30 #include "pci.h"
  31 #include "net.h"
  32 #include "sysemu.h"
  33 #include "boards.h"
  34
  35 /* UniN device */
  36 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  37 {
  38 }
  39
  40 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  41 {
  42     return 0;
  43 }
  44
  45 static CPUWriteMemoryFunc *unin_write[] = {
  46     &unin_writel,
  47     &unin_writel,
  48     &unin_writel,
  49 };
  50
  51 static CPUReadMemoryFunc *unin_read[] = {
  52     &unin_readl,
  53     &unin_readl,
  54     &unin_readl,
  55 };
  56
  57 /* PowerPC Mac99 hardware initialisation */
  58 static void ppc_core99_init (int ram_size, int vga_ram_size,
  59                              const char *boot_device, DisplayState *ds,
  60                              const char **fd_filename, int snapshot,
  61                              const char *kernel_filename,
  62                              const char *kernel_cmdline,
  63                              const char *initrd_filename,
  64                              const char *cpu_model)
  65 {
  66     CPUState *env = NULL, *envs[MAX_CPUS];
  67     char buf[1024];
  68     qemu_irq *pic, **openpic_irqs;
  69     int unin_memory;
  70     int linux_boot, i;
  71     unsigned long bios_offset, vga_bios_offset;
  72     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
  73     PCIBus *pci_bus;
  74     nvram_t nvram;
  75 #if 0
  76     MacIONVRAMState *nvr;
  77     int nvram_mem_index;
  78 #endif
  79     m48t59_t *m48t59;
  80     int vga_bios_size, bios_size;
  81     qemu_irq *dummy_irq;
  82     int pic_mem_index, dbdma_mem_index, cuda_mem_index;
  83     int ide_mem_index[2];
  84     int ppc_boot_device;
  85
  86     linux_boot = (kernel_filename != NULL);
  87
  88     /* init CPUs */
  89     if (cpu_model == NULL)
  90         cpu_model = "default";
  91     for (i = 0; i < smp_cpus; i++) {
  92         env = cpu_init(cpu_model);
  93         if (!env) {
  94             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
  95             exit(1);
  96         }
  97         /* Set time-base frequency to 100 Mhz */
  98         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
  99 #if 0
 100         env->osi_call = vga_osi_call;
 101 #endif
 102         qemu_register_reset(&cpu_ppc_reset, env);
 103         register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
 104         envs[i] = env;
 105     }
 106     if (env->nip < 0xFFF80000) {
 107         /* Special test for PowerPC 601:
 108          * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
 109          * But the NVRAM is located at 0xFFF04000...
 110          */
 111         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 112     }
 113
 114     /* allocate RAM */
 115     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 116
 117     /* allocate and load BIOS */
 118     bios_offset = ram_size + vga_ram_size;
 119     if (bios_name == NULL)
 120         bios_name = BIOS_FILENAME;
 121     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 122     bios_size = load_image(buf, phys_ram_base + bios_offset);
 123     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 124         cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
 125         exit(1);
 126     }
 127     bios_size = (bios_size + 0xfff) & ~0xfff;
 128     if (bios_size > 0x00080000) {
 129         /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
 130         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 131     }
 132     cpu_register_physical_memory((uint32_t)(-bios_size),
 133                                  bios_size, bios_offset | IO_MEM_ROM);
 134
 135     /* allocate and load VGA BIOS */
 136     vga_bios_offset = bios_offset + bios_size;
 137     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 138     vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
 139     if (vga_bios_size < 0) {
 140         /* if no bios is present, we can still work */
 141         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
 142         vga_bios_size = 0;
 143     } else {
 144         /* set a specific header (XXX: find real Apple format for NDRV
 145            drivers) */
 146         phys_ram_base[vga_bios_offset] = 'N';
 147         phys_ram_base[vga_bios_offset + 1] = 'D';
 148         phys_ram_base[vga_bios_offset + 2] = 'R';
 149         phys_ram_base[vga_bios_offset + 3] = 'V';
 150         cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
 151                      vga_bios_size);
 152         vga_bios_size += 8;
 153     }
 154     vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
 155
 156     if (linux_boot) {
 157         kernel_base = KERNEL_LOAD_ADDR;
 158         /* now we can load the kernel */
 159         kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
 160         if (kernel_size < 0) {
 161             cpu_abort(env, "qemu: could not load kernel '%s'\n",
 162                       kernel_filename);
 163             exit(1);
 164         }
 165         /* load initrd */
 166         if (initrd_filename) {
 167             initrd_base = INITRD_LOAD_ADDR;
 168             initrd_size = load_image(initrd_filename,
 169                                      phys_ram_base + initrd_base);
 170             if (initrd_size < 0) {
 171                 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
 172                           initrd_filename);
 173                 exit(1);
 174             }
 175         } else {
 176             initrd_base = 0;
 177             initrd_size = 0;
 178         }
 179         ppc_boot_device = 'm';
 180     } else {
 181         kernel_base = 0;
 182         kernel_size = 0;
 183         initrd_base = 0;
 184         initrd_size = 0;
 185         ppc_boot_device = '\0';
 186         /* We consider that NewWorld PowerMac never have any floppy drive
 187          * For now, OHW cannot boot from the network.
 188          */
 189         for (i = 0; boot_device[i] != '\0'; i++) {
 190             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 191                 ppc_boot_device = boot_device[i];
 192                 break;
 193             }
 194         }
 195         if (ppc_boot_device == '\0') {
 196             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 197             exit(1);
 198         }
 199     }
 200
 201     isa_mem_base = 0x80000000;
 202
 203     /* Register 8 MB of ISA IO space */
 204     isa_mmio_init(0xf2000000, 0x00800000);
 205
 206     /* UniN init */
 207     unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
 208     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 209
 210     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 211     openpic_irqs[0] =
 212         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 213     for (i = 0; i < smp_cpus; i++) {
 214         /* Mac99 IRQ connection between OpenPIC outputs pins
 215          * and PowerPC input pins
 216          */
 217         switch (PPC_INPUT(env)) {
 218         case PPC_FLAGS_INPUT_6xx:
 219             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 220             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 221                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 222             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 223                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 224             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 225                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 226             /* Not connected ? */
 227             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 228             /* Check this */
 229             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 230                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 231             break;
 232 #if defined(TARGET_PPC64)
 233         case PPC_FLAGS_INPUT_970:
 234             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 235             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 236                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 237             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 238                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 239             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 240                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 241             /* Not connected ? */
 242             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 243             /* Check this */
 244             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 245                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 246             break;
 247 #endif /* defined(TARGET_PPC64) */
 248         default:
 249             cpu_abort(env, "Bus model not supported on mac99 machine\n");
 250             exit(1);
 251         }
 252     }
 253     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 254     pci_bus = pci_pmac_init(pic);
 255     /* init basic PC hardware */
 256     pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
 257                  ram_size, vga_ram_size,
 258                  vga_bios_offset, vga_bios_size);
 259
 260     /* XXX: suppress that */
 261     dummy_irq = i8259_init(NULL);
 262
 263     /* XXX: use Mac Serial port */
 264     serial_init(0x3f8, dummy_irq[4], serial_hds[0]);
 265     for(i = 0; i < nb_nics; i++) {
 266         if (!nd_table[i].model)
 267             nd_table[i].model = "ne2k_pci";
 268         pci_nic_init(pci_bus, &nd_table[i], -1);
 269     }
 270 #if 1
 271     ide_mem_index[0] = pmac_ide_init(&bs_table[0], pic[0x13]);
 272     ide_mem_index[1] = pmac_ide_init(&bs_table[2], pic[0x14]);
 273 #else
 274     pci_cmd646_ide_init(pci_bus, &bs_table[0], 0);
 275 #endif
 276     /* cuda also initialize ADB */
 277     cuda_init(&cuda_mem_index, pic[0x19]);
 278
 279     adb_kbd_init(&adb_bus);
 280     adb_mouse_init(&adb_bus);
 281
 282     dbdma_init(&dbdma_mem_index);
 283
 284     macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
 285                cuda_mem_index, NULL, 2, ide_mem_index);
 286
 287     if (usb_enabled) {
 288         usb_ohci_init_pci(pci_bus, 3, -1);
 289     }
 290
 291     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 292         graphic_depth = 15;
 293 #if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
 294     /* The NewWorld NVRAM is not located in the MacIO device */
 295     nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
 296     pmac_format_nvram_partition(nvr, 0x2000);
 297     macio_nvram_map(nvr, 0xFFF04000);
 298     nvram.opaque = nvr;
 299     nvram.read_fn = &macio_nvram_read;
 300     nvram.write_fn = &macio_nvram_write;
 301 #else
 302     m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
 303     nvram.opaque = m48t59;
 304     nvram.read_fn = &m48t59_read;
 305     nvram.write_fn = &m48t59_write;
 306 #endif
 307     PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
 308                          ppc_boot_device, kernel_base, kernel_size,
 309                          kernel_cmdline,
 310                          initrd_base, initrd_size,
 311                          /* XXX: need an option to load a NVRAM image */
 312                          0,
 313                          graphic_width, graphic_height, graphic_depth);
 314     /* No PCI init: the BIOS will do it */
 315
 316     /* Special port to get debug messages from Open-Firmware */
 317     register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
 318  }
 319
 320 QEMUMachine core99_machine = {
 321     "mac99",
 322     "Mac99 based PowerMAC",
 323     ppc_core99_init,
 324 };