hw/ppc_newworld.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "hw.h"
  26 #include "ppc.h"
  27 #include "ppc_mac.h"
  28 #include "mac_dbdma.h"
  29 #include "nvram.h"
  30 #include "pc.h"
  31 #include "pci.h"
  32 #include "net.h"
  33 #include "sysemu.h"
  34 #include "boards.h"
  35 #include "escc.h"
  36
  37 #define MAX_IDE_BUS 2
  38 #define VGA_BIOS_SIZE 65536
  39
  40 /* debug UniNorth */
  41 //#define DEBUG_UNIN
  42
  43 #ifdef DEBUG_UNIN
  44 #define UNIN_DPRINTF(fmt, args...) \
  45 do { printf("UNIN: " fmt , ##args); } while (0)
  46 #else
  47 #define UNIN_DPRINTF(fmt, args...)
  48 #endif
  49
  50 /* UniN device */
  51 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  52 {
  53     UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
  54 }
  55
  56 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  57 {
  58     uint32_t value;
  59
  60     value = 0;
  61     UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
  62
  63     return value;
  64 }
  65
  66 static CPUWriteMemoryFunc *unin_write[] = {
  67     &unin_writel,
  68     &unin_writel,
  69     &unin_writel,
  70 };
  71
  72 static CPUReadMemoryFunc *unin_read[] = {
  73     &unin_readl,
  74     &unin_readl,
  75     &unin_readl,
  76 };
  77
  78 /* PowerPC Mac99 hardware initialisation */
  79 static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
  80                              const char *boot_device,
  81                              const char *kernel_filename,
  82                              const char *kernel_cmdline,
  83                              const char *initrd_filename,
  84                              const char *cpu_model)
  85 {
  86     CPUState *env = NULL, *envs[MAX_CPUS];
  87     char buf[1024];
  88     qemu_irq *pic, **openpic_irqs;
  89     int unin_memory;
  90     int linux_boot, i;
  91     ram_addr_t ram_offset, vga_ram_offset, bios_offset, vga_bios_offset;
  92     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
  93     PCIBus *pci_bus;
  94     nvram_t nvram;
  95 #if 0
  96     MacIONVRAMState *nvr;
  97     int nvram_mem_index;
  98 #endif
  99     m48t59_t *m48t59;
 100     int vga_bios_size, bios_size;
 101     qemu_irq *dummy_irq;
 102     int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
 103     int ide_mem_index[2];
 104     int ppc_boot_device;
 105     int index;
 106     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 107     void *dbdma;
 108
 109     linux_boot = (kernel_filename != NULL);
 110
 111     /* init CPUs */
 112     if (cpu_model == NULL)
 113         cpu_model = "default";
 114     for (i = 0; i < smp_cpus; i++) {
 115         env = cpu_init(cpu_model);
 116         if (!env) {
 117             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 118             exit(1);
 119         }
 120         /* Set time-base frequency to 100 Mhz */
 121         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 122 #if 0
 123         env->osi_call = vga_osi_call;
 124 #endif
 125         qemu_register_reset(&cpu_ppc_reset, env);
 126         envs[i] = env;
 127     }
 128
 129     /* allocate RAM */
 130     ram_offset = qemu_ram_alloc(ram_size);
 131     cpu_register_physical_memory(0, ram_size, ram_offset);
 132
 133     /* allocate VGA RAM */
 134     vga_ram_offset = qemu_ram_alloc(vga_ram_size);
 135
 136     /* allocate and load BIOS */
 137     bios_offset = qemu_ram_alloc(BIOS_SIZE);
 138     if (bios_name == NULL)
 139         bios_name = BIOS_FILENAME;
 140     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 141     bios_size = load_image(buf, phys_ram_base + bios_offset);
 142     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 143         cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
 144         exit(1);
 145     }
 146     bios_size = (bios_size + 0xfff) & ~0xfff;
 147     if (bios_size > 0x00080000) {
 148         /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
 149         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 150     }
 151     cpu_register_physical_memory((uint32_t)(-bios_size),
 152                                  bios_size, bios_offset | IO_MEM_ROM);
 153
 154     /* allocate and load VGA BIOS */
 155     vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
 156     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 157     vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
 158     if (vga_bios_size < 0) {
 159         /* if no bios is present, we can still work */
 160         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
 161         vga_bios_size = 0;
 162     } else {
 163         /* set a specific header (XXX: find real Apple format for NDRV
 164            drivers) */
 165         phys_ram_base[vga_bios_offset] = 'N';
 166         phys_ram_base[vga_bios_offset + 1] = 'D';
 167         phys_ram_base[vga_bios_offset + 2] = 'R';
 168         phys_ram_base[vga_bios_offset + 3] = 'V';
 169         cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
 170                      vga_bios_size);
 171         vga_bios_size += 8;
 172     }
 173
 174     if (linux_boot) {
 175         kernel_base = KERNEL_LOAD_ADDR;
 176         /* now we can load the kernel */
 177         kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
 178         if (kernel_size < 0) {
 179             cpu_abort(env, "qemu: could not load kernel '%s'\n",
 180                       kernel_filename);
 181             exit(1);
 182         }
 183         /* load initrd */
 184         if (initrd_filename) {
 185             initrd_base = INITRD_LOAD_ADDR;
 186             initrd_size = load_image(initrd_filename,
 187                                      phys_ram_base + initrd_base);
 188             if (initrd_size < 0) {
 189                 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
 190                           initrd_filename);
 191                 exit(1);
 192             }
 193         } else {
 194             initrd_base = 0;
 195             initrd_size = 0;
 196         }
 197         ppc_boot_device = 'm';
 198     } else {
 199         kernel_base = 0;
 200         kernel_size = 0;
 201         initrd_base = 0;
 202         initrd_size = 0;
 203         ppc_boot_device = '\0';
 204         /* We consider that NewWorld PowerMac never have any floppy drive
 205          * For now, OHW cannot boot from the network.
 206          */
 207         for (i = 0; boot_device[i] != '\0'; i++) {
 208             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 209                 ppc_boot_device = boot_device[i];
 210                 break;
 211             }
 212         }
 213         if (ppc_boot_device == '\0') {
 214             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 215             exit(1);
 216         }
 217     }
 218
 219     isa_mem_base = 0x80000000;
 220
 221     /* Register 8 MB of ISA IO space */
 222     isa_mmio_init(0xf2000000, 0x00800000);
 223
 224     /* UniN init */
 225     unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
 226     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 227
 228     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 229     openpic_irqs[0] =
 230         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 231     for (i = 0; i < smp_cpus; i++) {
 232         /* Mac99 IRQ connection between OpenPIC outputs pins
 233          * and PowerPC input pins
 234          */
 235         switch (PPC_INPUT(env)) {
 236         case PPC_FLAGS_INPUT_6xx:
 237             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 238             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 239                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 240             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 241                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 242             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 243                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 244             /* Not connected ? */
 245             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 246             /* Check this */
 247             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 248                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 249             break;
 250 #if defined(TARGET_PPC64)
 251         case PPC_FLAGS_INPUT_970:
 252             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 253             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 254                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 255             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 256                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 257             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 258                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 259             /* Not connected ? */
 260             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 261             /* Check this */
 262             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 263                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 264             break;
 265 #endif /* defined(TARGET_PPC64) */
 266         default:
 267             cpu_abort(env, "Bus model not supported on mac99 machine\n");
 268             exit(1);
 269         }
 270     }
 271     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 272     pci_bus = pci_pmac_init(pic);
 273     /* init basic PC hardware */
 274     pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
 275                  vga_ram_offset, vga_ram_size,
 276                  vga_bios_offset, vga_bios_size);
 277
 278     /* XXX: suppress that */
 279     dummy_irq = i8259_init(NULL);
 280
 281     escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
 282                                serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
 283
 284     for(i = 0; i < nb_nics; i++)
 285         pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");
 286
 287     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 288         fprintf(stderr, "qemu: too many IDE bus\n");
 289         exit(1);
 290     }
 291     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 292         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 293         if (index != -1)
 294             hd[i] = drives_table[index].bdrv;
 295         else
 296             hd[i] = NULL;
 297     }
 298     dbdma = DBDMA_init(&dbdma_mem_index);
 299 #if 1
 300     ide_mem_index[0] = pmac_ide_init(&hd[0], pic[0x13], dbdma, 0x14, pic[0x01]);
 301     ide_mem_index[1] = pmac_ide_init(&hd[2], pic[0x14], dbdma, 0x16, pic[0x02]);
 302 #else
 303     pci_cmd646_ide_init(pci_bus, &hd[0], 0);
 304 #endif
 305     /* cuda also initialize ADB */
 306     cuda_init(&cuda_mem_index, pic[0x19]);
 307
 308     adb_kbd_init(&adb_bus);
 309     adb_mouse_init(&adb_bus);
 310
 311
 312     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
 313                dbdma_mem_index, cuda_mem_index, NULL, 2, ide_mem_index,
 314                escc_mem_index);
 315
 316     if (usb_enabled) {
 317         usb_ohci_init_pci(pci_bus, 3, -1);
 318     }
 319
 320     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 321         graphic_depth = 15;
 322 #if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
 323     /* The NewWorld NVRAM is not located in the MacIO device */
 324     nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
 325     pmac_format_nvram_partition(nvr, 0x2000);
 326     macio_nvram_map(nvr, 0xFFF04000);
 327     nvram.opaque = nvr;
 328     nvram.read_fn = &macio_nvram_read;
 329     nvram.write_fn = &macio_nvram_write;
 330 #else
 331     m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
 332     nvram.opaque = m48t59;
 333     nvram.read_fn = &m48t59_read;
 334     nvram.write_fn = &m48t59_write;
 335 #endif
 336     PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
 337                          ppc_boot_device, kernel_base, kernel_size,
 338                          kernel_cmdline,
 339                          initrd_base, initrd_size,
 340                          /* XXX: need an option to load a NVRAM image */
 341                          0,
 342                          graphic_width, graphic_height, graphic_depth);
 343     /* No PCI init: the BIOS will do it */
 344
 345     /* Special port to get debug messages from Open-Firmware */
 346     register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
 347 }
 348
 349 QEMUMachine core99_machine = {
 350     .name = "mac99",
 351     .desc = "Mac99 based PowerMAC",
 352     .init = ppc_core99_init,
 353     .ram_require = BIOS_SIZE + VGA_BIOS_SIZE + VGA_RAM_SIZE,
 354     .max_cpus = MAX_CPUS,
 355 };