]> git.proxmox.com Git - qemu.git/blob - hw/ppc_newworld.c
More phys_ram_base removal.
[qemu.git] / hw / ppc_newworld.c
1 /*
2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 #include "hw.h"
26 #include "ppc.h"
27 #include "ppc_mac.h"
28 #include "mac_dbdma.h"
29 #include "nvram.h"
30 #include "pc.h"
31 #include "pci.h"
32 #include "net.h"
33 #include "sysemu.h"
34 #include "boards.h"
35 #include "fw_cfg.h"
36 #include "escc.h"
37 #include "openpic.h"
38
39 #define MAX_IDE_BUS 2
40 #define VGA_BIOS_SIZE 65536
41 #define CFG_ADDR 0xf0000510
42
43 /* debug UniNorth */
44 //#define DEBUG_UNIN
45
46 #ifdef DEBUG_UNIN
47 #define UNIN_DPRINTF(fmt, args...) \
48 do { printf("UNIN: " fmt , ##args); } while (0)
49 #else
50 #define UNIN_DPRINTF(fmt, args...)
51 #endif
52
53 /* UniN device */
54 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
55 {
56 UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
57 }
58
59 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
60 {
61 uint32_t value;
62
63 value = 0;
64 UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
65
66 return value;
67 }
68
69 static CPUWriteMemoryFunc *unin_write[] = {
70 &unin_writel,
71 &unin_writel,
72 &unin_writel,
73 };
74
75 static CPUReadMemoryFunc *unin_read[] = {
76 &unin_readl,
77 &unin_readl,
78 &unin_readl,
79 };
80
81 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
82 {
83 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
84 return 0;
85 }
86
87 /* PowerPC Mac99 hardware initialisation */
88 static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
89 const char *boot_device,
90 const char *kernel_filename,
91 const char *kernel_cmdline,
92 const char *initrd_filename,
93 const char *cpu_model)
94 {
95 CPUState *env = NULL, *envs[MAX_CPUS];
96 char buf[1024];
97 qemu_irq *pic, **openpic_irqs;
98 int unin_memory;
99 int linux_boot, i;
100 ram_addr_t ram_offset, vga_ram_offset, bios_offset, vga_bios_offset;
101 uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
102 PCIBus *pci_bus;
103 MacIONVRAMState *nvr;
104 int nvram_mem_index;
105 int vga_bios_size, bios_size;
106 qemu_irq *dummy_irq;
107 int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
108 int ppc_boot_device;
109 int index;
110 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
111 void *fw_cfg;
112 void *dbdma;
113 uint8_t *vga_bios_ptr;
114
115 linux_boot = (kernel_filename != NULL);
116
117 /* init CPUs */
118 if (cpu_model == NULL)
119 cpu_model = "G4";
120 for (i = 0; i < smp_cpus; i++) {
121 env = cpu_init(cpu_model);
122 if (!env) {
123 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
124 exit(1);
125 }
126 /* Set time-base frequency to 100 Mhz */
127 cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
128 #if 0
129 env->osi_call = vga_osi_call;
130 #endif
131 qemu_register_reset(&cpu_ppc_reset, env);
132 envs[i] = env;
133 }
134
135 /* allocate RAM */
136 ram_offset = qemu_ram_alloc(ram_size);
137 cpu_register_physical_memory(0, ram_size, ram_offset);
138
139 /* allocate VGA RAM */
140 vga_ram_offset = qemu_ram_alloc(vga_ram_size);
141
142 /* allocate and load BIOS */
143 bios_offset = qemu_ram_alloc(BIOS_SIZE);
144 if (bios_name == NULL)
145 bios_name = PROM_FILENAME;
146 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
147 cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
148
149 /* Load OpenBIOS (ELF) */
150 bios_size = load_elf(buf, 0, NULL, NULL, NULL);
151 if (bios_size < 0 || bios_size > BIOS_SIZE) {
152 cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
153 exit(1);
154 }
155
156 /* allocate and load VGA BIOS */
157 vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
158 vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
159 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
160 vga_bios_size = load_image(buf, vga_bios_ptr + 8);
161 if (vga_bios_size < 0) {
162 /* if no bios is present, we can still work */
163 fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
164 vga_bios_size = 0;
165 } else {
166 /* set a specific header (XXX: find real Apple format for NDRV
167 drivers) */
168 vga_bios_ptr[0] = 'N';
169 vga_bios_ptr[1] = 'D';
170 vga_bios_ptr[2] = 'R';
171 vga_bios_ptr[3] = 'V';
172 cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
173 vga_bios_size += 8;
174 }
175
176 if (linux_boot) {
177 uint64_t lowaddr = 0;
178 kernel_base = KERNEL_LOAD_ADDR;
179
180 /* Now we can load the kernel. The first step tries to load the kernel
181 supposing PhysAddr = 0x00000000. If that was wrong the kernel is
182 loaded again, the new PhysAddr being computed from lowaddr. */
183 kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL);
184 if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
185 kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
186 NULL, 0, NULL);
187 }
188 if (kernel_size < 0)
189 kernel_size = load_aout(kernel_filename, kernel_base,
190 ram_size - kernel_base);
191 if (kernel_size < 0)
192 kernel_size = load_image_targphys(kernel_filename,
193 kernel_base,
194 ram_size - kernel_base);
195 if (kernel_size < 0) {
196 cpu_abort(env, "qemu: could not load kernel '%s'\n",
197 kernel_filename);
198 exit(1);
199 }
200 /* load initrd */
201 if (initrd_filename) {
202 initrd_base = INITRD_LOAD_ADDR;
203 initrd_size = load_image_targphys(initrd_filename, initrd_base,
204 ram_size - initrd_base);
205 if (initrd_size < 0) {
206 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
207 initrd_filename);
208 exit(1);
209 }
210 } else {
211 initrd_base = 0;
212 initrd_size = 0;
213 }
214 ppc_boot_device = 'm';
215 } else {
216 kernel_base = 0;
217 kernel_size = 0;
218 initrd_base = 0;
219 initrd_size = 0;
220 ppc_boot_device = '\0';
221 /* We consider that NewWorld PowerMac never have any floppy drive
222 * For now, OHW cannot boot from the network.
223 */
224 for (i = 0; boot_device[i] != '\0'; i++) {
225 if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
226 ppc_boot_device = boot_device[i];
227 break;
228 }
229 }
230 if (ppc_boot_device == '\0') {
231 fprintf(stderr, "No valid boot device for Mac99 machine\n");
232 exit(1);
233 }
234 }
235
236 isa_mem_base = 0x80000000;
237
238 /* Register 8 MB of ISA IO space */
239 isa_mmio_init(0xf2000000, 0x00800000);
240
241 /* UniN init */
242 unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
243 cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
244
245 openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
246 openpic_irqs[0] =
247 qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
248 for (i = 0; i < smp_cpus; i++) {
249 /* Mac99 IRQ connection between OpenPIC outputs pins
250 * and PowerPC input pins
251 */
252 switch (PPC_INPUT(env)) {
253 case PPC_FLAGS_INPUT_6xx:
254 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
255 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
256 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
257 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
258 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
259 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
260 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
261 /* Not connected ? */
262 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
263 /* Check this */
264 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
265 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
266 break;
267 #if defined(TARGET_PPC64)
268 case PPC_FLAGS_INPUT_970:
269 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
270 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
271 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
272 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
273 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
274 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
275 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
276 /* Not connected ? */
277 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
278 /* Check this */
279 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
280 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
281 break;
282 #endif /* defined(TARGET_PPC64) */
283 default:
284 cpu_abort(env, "Bus model not supported on mac99 machine\n");
285 exit(1);
286 }
287 }
288 pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
289 pci_bus = pci_pmac_init(pic);
290 /* init basic PC hardware */
291 pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
292 vga_ram_offset, vga_ram_size,
293 vga_bios_offset, vga_bios_size);
294
295 /* XXX: suppress that */
296 dummy_irq = i8259_init(NULL);
297
298 escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
299 serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
300
301 for(i = 0; i < nb_nics; i++)
302 pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");
303
304 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
305 fprintf(stderr, "qemu: too many IDE bus\n");
306 exit(1);
307 }
308 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
309 index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
310 if (index != -1)
311 hd[i] = drives_table[index].bdrv;
312 else
313 hd[i] = NULL;
314 }
315 dbdma = DBDMA_init(&dbdma_mem_index);
316 pci_cmd646_ide_init(pci_bus, hd, 0);
317
318 /* cuda also initialize ADB */
319 cuda_init(&cuda_mem_index, pic[0x19]);
320
321 adb_kbd_init(&adb_bus);
322 adb_mouse_init(&adb_bus);
323
324
325 macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
326 dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
327 escc_mem_index);
328
329 if (usb_enabled) {
330 usb_ohci_init_pci(pci_bus, 3, -1);
331 }
332
333 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
334 graphic_depth = 15;
335
336 /* The NewWorld NVRAM is not located in the MacIO device */
337 nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
338 pmac_format_nvram_partition(nvr, 0x2000);
339 macio_nvram_map(nvr, 0xFFF04000);
340 /* No PCI init: the BIOS will do it */
341
342 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
343 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
344 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
345 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
346 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
347 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
348 if (kernel_cmdline) {
349 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
350 pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
351 } else {
352 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
353 }
354 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
355 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
356 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
357 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
358 }
359
360 QEMUMachine core99_machine = {
361 .name = "mac99",
362 .desc = "Mac99 based PowerMAC",
363 .init = ppc_core99_init,
364 .ram_require = BIOS_SIZE + VGA_BIOS_SIZE + VGA_RAM_SIZE,
365 .max_cpus = MAX_CPUS,
366 };