hw/ppc_newworld.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  *
  25  * PCI bus layout on a real G5 (U3 based):
  26  *
  27  * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
  28  * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
  29  * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
  30  * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  31  * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  32  * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
  33  * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
  34  * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
  35  * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
  36  * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
  37  * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
  38  * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  39  * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  40  * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  41  * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  42  * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
  43  * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
  44  * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
  45  * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
  46  * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
  47  *
  48  */
  49 #include "hw.h"
  50 #include "ppc.h"
  51 #include "ppc_mac.h"
  52 #include "mac_dbdma.h"
  53 #include "nvram.h"
  54 #include "pc.h"
  55 #include "pci.h"
  56 #include "usb-ohci.h"
  57 #include "net.h"
  58 #include "sysemu.h"
  59 #include "boards.h"
  60 #include "fw_cfg.h"
  61 #include "escc.h"
  62 #include "openpic.h"
  63 #include "ide.h"
  64 #include "loader.h"
  65 #include "elf.h"
  66 #include "kvm.h"
  67 #include "kvm_ppc.h"
  68 #include "hw/usb.h"
  69 #include "blockdev.h"
  70
  71 #define MAX_IDE_BUS 2
  72 #define VGA_BIOS_SIZE 65536
  73 #define CFG_ADDR 0xf0000510
  74
  75 /* debug UniNorth */
  76 //#define DEBUG_UNIN
  77
  78 #ifdef DEBUG_UNIN
  79 #define UNIN_DPRINTF(fmt, ...)                                  \
  80     do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
  81 #else
  82 #define UNIN_DPRINTF(fmt, ...)
  83 #endif
  84
  85 /* UniN device */
  86 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  87 {
  88     UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
  89 }
  90
  91 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  92 {
  93     uint32_t value;
  94
  95     value = 0;
  96     UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
  97
  98     return value;
  99 }
 100
 101 static CPUWriteMemoryFunc * const unin_write[] = {
 102     &unin_writel,
 103     &unin_writel,
 104     &unin_writel,
 105 };
 106
 107 static CPUReadMemoryFunc * const unin_read[] = {
 108     &unin_readl,
 109     &unin_readl,
 110     &unin_readl,
 111 };
 112
 113 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
 114 {
 115     fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
 116     return 0;
 117 }
 118
 119 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 120 {
 121     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 122 }
 123
 124 /* PowerPC Mac99 hardware initialisation */
 125 static void ppc_core99_init (ram_addr_t ram_size,
 126                              const char *boot_device,
 127                              const char *kernel_filename,
 128                              const char *kernel_cmdline,
 129                              const char *initrd_filename,
 130                              const char *cpu_model)
 131 {
 132     CPUState *env = NULL, *envs[MAX_CPUS];
 133     char *filename;
 134     qemu_irq *pic, **openpic_irqs;
 135     int unin_memory;
 136     int linux_boot, i;
 137     ram_addr_t ram_offset, bios_offset, vga_bios_offset;
 138     uint32_t kernel_base, initrd_base;
 139     long kernel_size, initrd_size;
 140     PCIBus *pci_bus;
 141     MacIONVRAMState *nvr;
 142     int nvram_mem_index;
 143     int vga_bios_size, bios_size;
 144     int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
 145     int ide_mem_index[3];
 146     int ppc_boot_device;
 147     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 148     void *fw_cfg;
 149     void *dbdma;
 150     uint8_t *vga_bios_ptr;
 151     int machine_arch;
 152
 153     linux_boot = (kernel_filename != NULL);
 154
 155     /* init CPUs */
 156     if (cpu_model == NULL)
 157 #ifdef TARGET_PPC64
 158         cpu_model = "970fx";
 159 #else
 160         cpu_model = "G4";
 161 #endif
 162     for (i = 0; i < smp_cpus; i++) {
 163         env = cpu_init(cpu_model);
 164         if (!env) {
 165             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 166             exit(1);
 167         }
 168         /* Set time-base frequency to 100 Mhz */
 169         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 170 #if 0
 171         env->osi_call = vga_osi_call;
 172 #endif
 173         qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
 174         envs[i] = env;
 175     }
 176
 177     /* allocate RAM */
 178     ram_offset = qemu_ram_alloc(NULL, "ppc_core99.ram", ram_size);
 179     cpu_register_physical_memory(0, ram_size, ram_offset);
 180
 181     /* allocate and load BIOS */
 182     bios_offset = qemu_ram_alloc(NULL, "ppc_core99.bios", BIOS_SIZE);
 183     if (bios_name == NULL)
 184         bios_name = PROM_FILENAME;
 185     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 186     cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
 187
 188     /* Load OpenBIOS (ELF) */
 189     if (filename) {
 190         bios_size = load_elf(filename, NULL, NULL, NULL,
 191                              NULL, NULL, 1, ELF_MACHINE, 0);
 192
 193         qemu_free(filename);
 194     } else {
 195         bios_size = -1;
 196     }
 197     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 198         hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
 199         exit(1);
 200     }
 201
 202     /* allocate and load VGA BIOS */
 203     vga_bios_offset = qemu_ram_alloc(NULL, "ppc_core99.vbios", VGA_BIOS_SIZE);
 204     vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
 205     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
 206     if (filename) {
 207         vga_bios_size = load_image(filename, vga_bios_ptr + 8);
 208         qemu_free(filename);
 209     } else {
 210         vga_bios_size = -1;
 211     }
 212     if (vga_bios_size < 0) {
 213         /* if no bios is present, we can still work */
 214         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
 215                 VGABIOS_FILENAME);
 216         vga_bios_size = 0;
 217     } else {
 218         /* set a specific header (XXX: find real Apple format for NDRV
 219            drivers) */
 220         vga_bios_ptr[0] = 'N';
 221         vga_bios_ptr[1] = 'D';
 222         vga_bios_ptr[2] = 'R';
 223         vga_bios_ptr[3] = 'V';
 224         cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
 225         vga_bios_size += 8;
 226
 227         /* Round to page boundary */
 228         vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
 229             TARGET_PAGE_MASK;
 230     }
 231
 232     if (linux_boot) {
 233         uint64_t lowaddr = 0;
 234         int bswap_needed;
 235
 236 #ifdef BSWAP_NEEDED
 237         bswap_needed = 1;
 238 #else
 239         bswap_needed = 0;
 240 #endif
 241         kernel_base = KERNEL_LOAD_ADDR;
 242
 243         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 244                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 245         if (kernel_size < 0)
 246             kernel_size = load_aout(kernel_filename, kernel_base,
 247                                     ram_size - kernel_base, bswap_needed,
 248                                     TARGET_PAGE_SIZE);
 249         if (kernel_size < 0)
 250             kernel_size = load_image_targphys(kernel_filename,
 251                                               kernel_base,
 252                                               ram_size - kernel_base);
 253         if (kernel_size < 0) {
 254             hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
 255             exit(1);
 256         }
 257         /* load initrd */
 258         if (initrd_filename) {
 259             initrd_base = INITRD_LOAD_ADDR;
 260             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 261                                               ram_size - initrd_base);
 262             if (initrd_size < 0) {
 263                 hw_error("qemu: could not load initial ram disk '%s'\n",
 264                          initrd_filename);
 265                 exit(1);
 266             }
 267         } else {
 268             initrd_base = 0;
 269             initrd_size = 0;
 270         }
 271         ppc_boot_device = 'm';
 272     } else {
 273         kernel_base = 0;
 274         kernel_size = 0;
 275         initrd_base = 0;
 276         initrd_size = 0;
 277         ppc_boot_device = '\0';
 278         /* We consider that NewWorld PowerMac never have any floppy drive
 279          * For now, OHW cannot boot from the network.
 280          */
 281         for (i = 0; boot_device[i] != '\0'; i++) {
 282             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 283                 ppc_boot_device = boot_device[i];
 284                 break;
 285             }
 286         }
 287         if (ppc_boot_device == '\0') {
 288             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 289             exit(1);
 290         }
 291     }
 292
 293     isa_mem_base = 0x80000000;
 294
 295     /* Register 8 MB of ISA IO space */
 296     isa_mmio_init(0xf2000000, 0x00800000, 1);
 297
 298     /* UniN init */
 299     unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
 300     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 301
 302     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 303     openpic_irqs[0] =
 304         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 305     for (i = 0; i < smp_cpus; i++) {
 306         /* Mac99 IRQ connection between OpenPIC outputs pins
 307          * and PowerPC input pins
 308          */
 309         switch (PPC_INPUT(env)) {
 310         case PPC_FLAGS_INPUT_6xx:
 311             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 312             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 313                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 314             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 315                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 316             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 317                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 318             /* Not connected ? */
 319             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 320             /* Check this */
 321             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 322                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 323             break;
 324 #if defined(TARGET_PPC64)
 325         case PPC_FLAGS_INPUT_970:
 326             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 327             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 328                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 329             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 330                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 331             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 332                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 333             /* Not connected ? */
 334             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 335             /* Check this */
 336             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 337                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 338             break;
 339 #endif /* defined(TARGET_PPC64) */
 340         default:
 341             hw_error("Bus model not supported on mac99 machine\n");
 342             exit(1);
 343         }
 344     }
 345     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 346     if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
 347         /* 970 gets a U3 bus */
 348         pci_bus = pci_pmac_u3_init(pic);
 349         machine_arch = ARCH_MAC99_U3;
 350     } else {
 351         pci_bus = pci_pmac_init(pic);
 352         machine_arch = ARCH_MAC99;
 353     }
 354     /* init basic PC hardware */
 355     pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
 356
 357     escc_mem_index = escc_init(0x80013000, pic[0x25], pic[0x24],
 358                                serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
 359
 360     for(i = 0; i < nb_nics; i++)
 361         pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
 362
 363     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 364         fprintf(stderr, "qemu: too many IDE bus\n");
 365         exit(1);
 366     }
 367     dbdma = DBDMA_init(&dbdma_mem_index);
 368
 369     /* We only emulate 2 out of 3 IDE controllers for now */
 370     ide_mem_index[0] = -1;
 371     hd[0] = drive_get(IF_IDE, 0, 0);
 372     hd[1] = drive_get(IF_IDE, 0, 1);
 373     ide_mem_index[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
 374     hd[0] = drive_get(IF_IDE, 1, 0);
 375     hd[1] = drive_get(IF_IDE, 1, 1);
 376     ide_mem_index[2] = pmac_ide_init(hd, pic[0x0e], dbdma, 0x1a, pic[0x02]);
 377
 378     /* cuda also initialize ADB */
 379     if (machine_arch == ARCH_MAC99_U3) {
 380         usb_enabled = 1;
 381     }
 382     cuda_init(&cuda_mem_index, pic[0x19]);
 383
 384     adb_kbd_init(&adb_bus);
 385     adb_mouse_init(&adb_bus);
 386
 387     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
 388                dbdma_mem_index, cuda_mem_index, NULL, 3, ide_mem_index,
 389                escc_mem_index);
 390
 391     if (usb_enabled) {
 392         usb_ohci_init_pci(pci_bus, -1);
 393     }
 394
 395     /* U3 needs to use USB for input because Linux doesn't support via-cuda
 396        on PPC64 */
 397     if (machine_arch == ARCH_MAC99_U3) {
 398         usbdevice_create("keyboard");
 399         usbdevice_create("mouse");
 400     }
 401
 402     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 403         graphic_depth = 15;
 404
 405     /* The NewWorld NVRAM is not located in the MacIO device */
 406     nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
 407     pmac_format_nvram_partition(nvr, 0x2000);
 408     macio_nvram_map(nvr, 0xFFF04000);
 409     /* No PCI init: the BIOS will do it */
 410
 411     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
 412     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 413     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 414     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
 415     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 416     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 417     if (kernel_cmdline) {
 418         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
 419         pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
 420     } else {
 421         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 422     }
 423     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 424     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 425     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 426
 427     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 428     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 429     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 430
 431     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 432     if (kvm_enabled()) {
 433 #ifdef CONFIG_KVM
 434         uint8_t *hypercall;
 435
 436         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
 437         hypercall = qemu_malloc(16);
 438         kvmppc_get_hypercall(env, hypercall, 16);
 439         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 440         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 441 #endif
 442     } else {
 443         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
 444     }
 445
 446     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 447 }
 448
 449 static QEMUMachine core99_machine = {
 450     .name = "mac99",
 451     .desc = "Mac99 based PowerMAC",
 452     .init = ppc_core99_init,
 453     .max_cpus = MAX_CPUS,
 454 #ifdef TARGET_PPC64
 455     .is_default = 1,
 456 #endif
 457 };
 458
 459 static void core99_machine_init(void)
 460 {
 461     qemu_register_machine(&core99_machine);
 462 }
 463
 464 machine_init(core99_machine_init);