2 * Qemu PowerPC MPC8544DS board emualtion
4 * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
6 * Author: Yu Liu, <yu.liu@freescale.com>
8 * This file is derived from hw/ppc440_bamboo.c,
9 * the copyright for that material belongs to the original owners.
11 * This is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
18 #include "qemu-common.h"
27 #include "device_tree.h"
34 #define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
35 #define UIMAGE_LOAD_BASE 0
36 #define DTC_LOAD_PAD 0x500000
37 #define DTC_PAD_MASK 0xFFFFF
38 #define INITRD_LOAD_PAD 0x2000000
39 #define INITRD_PAD_MASK 0xFFFFFF
41 #define RAM_SIZES_ALIGN (64UL << 20)
43 #define MPC8544_CCSRBAR_BASE 0xE0000000
44 #define MPC8544_MPIC_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x40000)
45 #define MPC8544_SERIAL0_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4500)
46 #define MPC8544_SERIAL1_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x4600)
47 #define MPC8544_PCI_REGS_BASE (MPC8544_CCSRBAR_BASE + 0x8000)
48 #define MPC8544_PCI_REGS_SIZE 0x1000
49 #define MPC8544_PCI_IO 0xE1000000
50 #define MPC8544_PCI_IOLEN 0x10000
51 #define MPC8544_UTIL_BASE (MPC8544_CCSRBAR_BASE + 0xe0000)
52 #define MPC8544_SPIN_BASE 0xEF000000
60 static int mpc8544_load_device_tree(CPUState
*env
,
61 target_phys_addr_t addr
,
63 target_phys_addr_t initrd_base
,
64 target_phys_addr_t initrd_size
,
65 const char *kernel_cmdline
)
69 uint32_t mem_reg_property
[] = {0, cpu_to_be32(ramsize
)};
73 uint8_t hypercall
[16];
74 uint32_t clock_freq
= 400000000;
75 uint32_t tb_freq
= 400000000;
78 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, BINARY_DEVICE_TREE_FILE
);
82 fdt
= load_device_tree(filename
, &fdt_size
);
88 /* Manipulate device tree in memory. */
89 ret
= qemu_devtree_setprop(fdt
, "/memory", "reg", mem_reg_property
,
90 sizeof(mem_reg_property
));
92 fprintf(stderr
, "couldn't set /memory/reg\n");
95 ret
= qemu_devtree_setprop_cell(fdt
, "/chosen", "linux,initrd-start",
98 fprintf(stderr
, "couldn't set /chosen/linux,initrd-start\n");
101 ret
= qemu_devtree_setprop_cell(fdt
, "/chosen", "linux,initrd-end",
102 (initrd_base
+ initrd_size
));
104 fprintf(stderr
, "couldn't set /chosen/linux,initrd-end\n");
108 ret
= qemu_devtree_setprop_string(fdt
, "/chosen", "bootargs",
111 fprintf(stderr
, "couldn't set /chosen/bootargs\n");
114 /* Read out host's frequencies */
115 clock_freq
= kvmppc_get_clockfreq();
116 tb_freq
= kvmppc_get_tbfreq();
118 /* indicate KVM hypercall interface */
119 qemu_devtree_setprop_string(fdt
, "/hypervisor", "compatible",
121 kvmppc_get_hypercall(env
, hypercall
, sizeof(hypercall
));
122 qemu_devtree_setprop(fdt
, "/hypervisor", "hcall-instructions",
123 hypercall
, sizeof(hypercall
));
126 for (i
= 0; i
< smp_cpus
; i
++) {
128 snprintf(cpu_name
, sizeof(cpu_name
), "/cpus/PowerPC,8544@%x", i
);
129 qemu_devtree_setprop_cell(fdt
, cpu_name
, "clock-frequency", clock_freq
);
130 qemu_devtree_setprop_cell(fdt
, cpu_name
, "timebase-frequency", tb_freq
);
133 for (i
= smp_cpus
; i
< 32; i
++) {
135 snprintf(cpu_name
, sizeof(cpu_name
), "/cpus/PowerPC,8544@%x", i
);
136 qemu_devtree_nop_node(fdt
, cpu_name
);
139 ret
= rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE
, fdt
, fdt_size
, addr
);
148 /* Create -kernel TLB entries for BookE, linearly spanning 256MB. */
149 static inline target_phys_addr_t
booke206_page_size_to_tlb(uint64_t size
)
151 return (ffs(size
>> 10) - 1) >> 1;
154 static void mmubooke_create_initial_mapping(CPUState
*env
,
156 target_phys_addr_t pa
)
158 ppcmas_tlb_t
*tlb
= booke206_get_tlbm(env
, 1, 0, 0);
159 target_phys_addr_t size
;
161 size
= (booke206_page_size_to_tlb(256 * 1024 * 1024) << MAS1_TSIZE_SHIFT
);
162 tlb
->mas1
= MAS1_VALID
| size
;
163 tlb
->mas2
= va
& TARGET_PAGE_MASK
;
164 tlb
->mas7_3
= pa
& TARGET_PAGE_MASK
;
165 tlb
->mas7_3
|= MAS3_UR
| MAS3_UW
| MAS3_UX
| MAS3_SR
| MAS3_SW
| MAS3_SX
;
168 static void mpc8544ds_cpu_reset_sec(void *opaque
)
170 CPUState
*env
= opaque
;
174 /* Secondary CPU starts in halted state for now. Needs to change when
175 implementing non-kernel boot. */
177 env
->exception_index
= EXCP_HLT
;
180 static void mpc8544ds_cpu_reset(void *opaque
)
182 CPUState
*env
= opaque
;
183 struct boot_info
*bi
= env
->load_info
;
187 /* Set initial guest state. */
189 env
->gpr
[1] = (16<<20) - 8;
190 env
->gpr
[3] = bi
->dt_base
;
191 env
->nip
= bi
->entry
;
192 mmubooke_create_initial_mapping(env
, 0, 0);
195 static void mpc8544ds_init(ram_addr_t ram_size
,
196 const char *boot_device
,
197 const char *kernel_filename
,
198 const char *kernel_cmdline
,
199 const char *initrd_filename
,
200 const char *cpu_model
)
203 CPUState
*env
= NULL
;
205 uint64_t elf_lowaddr
;
206 target_phys_addr_t entry
=0;
207 target_phys_addr_t loadaddr
=UIMAGE_LOAD_BASE
;
208 target_long kernel_size
=0;
209 target_ulong dt_base
= 0;
210 target_ulong initrd_base
= 0;
211 target_long initrd_size
=0;
213 unsigned int pci_irq_nrs
[4] = {1, 2, 3, 4};
214 qemu_irq
**irqs
, *mpic
;
216 CPUState
*firstenv
= NULL
;
219 if (cpu_model
== NULL
) {
220 cpu_model
= "e500v2_v30";
223 irqs
= g_malloc0(smp_cpus
* sizeof(qemu_irq
*));
224 irqs
[0] = g_malloc0(smp_cpus
* sizeof(qemu_irq
) * OPENPIC_OUTPUT_NB
);
225 for (i
= 0; i
< smp_cpus
; i
++) {
227 env
= cpu_ppc_init(cpu_model
);
229 fprintf(stderr
, "Unable to initialize CPU!\n");
237 irqs
[i
] = irqs
[0] + (i
* OPENPIC_OUTPUT_NB
);
238 input
= (qemu_irq
*)env
->irq_inputs
;
239 irqs
[i
][OPENPIC_OUTPUT_INT
] = input
[PPCE500_INPUT_INT
];
240 irqs
[i
][OPENPIC_OUTPUT_CINT
] = input
[PPCE500_INPUT_CINT
];
241 env
->spr
[SPR_BOOKE_PIR
] = env
->cpu_index
= i
;
243 /* XXX register timer? */
244 ppc_emb_timers_init(env
, 400000000, PPC_INTERRUPT_DECR
);
245 ppc_dcr_init(env
, NULL
, NULL
);
246 /* XXX Enable DEC interrupts - probably wrong in the backend */
247 env
->spr
[SPR_40x_TCR
] = 1 << 26;
249 /* Register reset handler */
252 struct boot_info
*boot_info
;
253 boot_info
= g_malloc0(sizeof(struct boot_info
));
254 qemu_register_reset(mpc8544ds_cpu_reset
, env
);
255 env
->load_info
= boot_info
;
258 qemu_register_reset(mpc8544ds_cpu_reset_sec
, env
);
264 /* Fixup Memory size on a alignment boundary */
265 ram_size
&= ~(RAM_SIZES_ALIGN
- 1);
267 /* Register Memory */
268 cpu_register_physical_memory(0, ram_size
, qemu_ram_alloc(NULL
,
269 "mpc8544ds.ram", ram_size
));
272 mpic
= mpic_init(MPC8544_MPIC_REGS_BASE
, smp_cpus
, irqs
, NULL
);
275 cpu_abort(env
, "MPIC failed to initialize\n");
280 serial_mm_init(MPC8544_SERIAL0_REGS_BASE
,
281 0, mpic
[12+26], 399193,
282 serial_hds
[0], 1, 1);
286 serial_mm_init(MPC8544_SERIAL1_REGS_BASE
,
287 0, mpic
[12+26], 399193,
288 serial_hds
[0], 1, 1);
291 /* General Utility device */
292 sysbus_create_simple("mpc8544-guts", MPC8544_UTIL_BASE
, NULL
);
295 dev
= sysbus_create_varargs("e500-pcihost", MPC8544_PCI_REGS_BASE
,
296 mpic
[pci_irq_nrs
[0]], mpic
[pci_irq_nrs
[1]],
297 mpic
[pci_irq_nrs
[2]], mpic
[pci_irq_nrs
[3]],
299 pci_bus
= (PCIBus
*)qdev_get_child_bus(dev
, "pci.0");
301 printf("couldn't create PCI controller!\n");
303 isa_mmio_init(MPC8544_PCI_IO
, MPC8544_PCI_IOLEN
);
306 /* Register network interfaces. */
307 for (i
= 0; i
< nb_nics
; i
++) {
308 pci_nic_init_nofail(&nd_table
[i
], "virtio", NULL
);
312 /* Register spinning region */
313 sysbus_create_simple("e500-spin", MPC8544_SPIN_BASE
, NULL
);
316 if (kernel_filename
) {
317 kernel_size
= load_uimage(kernel_filename
, &entry
, &loadaddr
, NULL
);
318 if (kernel_size
< 0) {
319 kernel_size
= load_elf(kernel_filename
, NULL
, NULL
, &elf_entry
,
320 &elf_lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
322 loadaddr
= elf_lowaddr
;
324 /* XXX try again as binary */
325 if (kernel_size
< 0) {
326 fprintf(stderr
, "qemu: could not load kernel '%s'\n",
333 if (initrd_filename
) {
334 initrd_base
= (kernel_size
+ INITRD_LOAD_PAD
) & ~INITRD_PAD_MASK
;
335 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
336 ram_size
- initrd_base
);
338 if (initrd_size
< 0) {
339 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
345 /* If we're loading a kernel directly, we must load the device tree too. */
346 if (kernel_filename
) {
347 struct boot_info
*boot_info
;
350 cpu_abort(env
, "Compiled without FDT support - can't load kernel\n");
352 dt_base
= (kernel_size
+ DTC_LOAD_PAD
) & ~DTC_PAD_MASK
;
353 if (mpc8544_load_device_tree(env
, dt_base
, ram_size
,
354 initrd_base
, initrd_size
, kernel_cmdline
) < 0) {
355 fprintf(stderr
, "couldn't load device tree\n");
359 boot_info
= env
->load_info
;
360 boot_info
->entry
= entry
;
361 boot_info
->dt_base
= dt_base
;
369 static QEMUMachine mpc8544ds_machine
= {
372 .init
= mpc8544ds_init
,
375 static void mpc8544ds_machine_init(void)
377 qemu_register_machine(&mpc8544ds_machine
);
380 machine_init(mpc8544ds_machine_init
);