hw/pxa2xx_keypad.c

   1 /*
   2  * Intel PXA27X Keypad Controller emulation.
   3  *
   4  * Copyright (c) 2007 MontaVista Software, Inc
   5  * Written by Armin Kuster <akuster@kama-aina.net>
   6  *              or  <Akuster@mvista.com>
   7  *
   8  * This code is licensed under the GPLv2.
   9  */
  10
  11 #include "hw.h"
  12 #include "pxa.h"
  13 #include "console.h"
  14
  15 /*
  16  * Keypad
  17  */
  18 #define KPC         0x00    /* Keypad Interface Control register */
  19 #define KPDK        0x08    /* Keypad Interface Direct Key register */
  20 #define KPREC       0x10    /* Keypad Interface Rotary Encoder register */
  21 #define KPMK        0x18    /* Keypad Interface Matrix Key register */
  22 #define KPAS        0x20    /* Keypad Interface Automatic Scan register */
  23 #define KPASMKP0    0x28    /* Keypad Interface Automatic Scan Multiple
  24                                 Key Presser register 0 */
  25 #define KPASMKP1    0x30    /* Keypad Interface Automatic Scan Multiple
  26                                 Key Presser register 1 */
  27 #define KPASMKP2    0x38    /* Keypad Interface Automatic Scan Multiple
  28                                 Key Presser register 2 */
  29 #define KPASMKP3    0x40    /* Keypad Interface Automatic Scan Multiple
  30                                 Key Presser register 3 */
  31 #define KPKDI       0x48    /* Keypad Interface Key Debounce Interval
  32                                 register */
  33
  34 /* Keypad defines */
  35 #define KPC_AS          (0x1 << 30)  /* Automatic Scan bit */
  36 #define KPC_ASACT       (0x1 << 29)  /* Automatic Scan on Activity */
  37 #define KPC_MI          (0x1 << 22)  /* Matrix interrupt bit */
  38 #define KPC_IMKP        (0x1 << 21)  /* Ignore Multiple Key Press */
  39 #define KPC_MS7         (0x1 << 20)  /* Matrix scan line 7 */
  40 #define KPC_MS6         (0x1 << 19)  /* Matrix scan line 6 */
  41 #define KPC_MS5         (0x1 << 18)  /* Matrix scan line 5 */
  42 #define KPC_MS4         (0x1 << 17)  /* Matrix scan line 4 */
  43 #define KPC_MS3         (0x1 << 16)  /* Matrix scan line 3 */
  44 #define KPC_MS2         (0x1 << 15)  /* Matrix scan line 2 */
  45 #define KPC_MS1         (0x1 << 14)  /* Matrix scan line 1 */
  46 #define KPC_MS0         (0x1 << 13)  /* Matrix scan line 0 */
  47 #define KPC_ME          (0x1 << 12)  /* Matrix Keypad Enable */
  48 #define KPC_MIE         (0x1 << 11)  /* Matrix Interrupt Enable */
  49 #define KPC_DK_DEB_SEL  (0x1 <<  9)  /* Direct Keypad Debounce Select */
  50 #define KPC_DI          (0x1 <<  5)  /* Direct key interrupt bit */
  51 #define KPC_RE_ZERO_DEB (0x1 <<  4)  /* Rotary Encoder Zero Debounce */
  52 #define KPC_REE1        (0x1 <<  3)  /* Rotary Encoder1 Enable */
  53 #define KPC_REE0        (0x1 <<  2)  /* Rotary Encoder0 Enable */
  54 #define KPC_DE          (0x1 <<  1)  /* Direct Keypad Enable */
  55 #define KPC_DIE         (0x1 <<  0)  /* Direct Keypad interrupt Enable */
  56
  57 #define KPDK_DKP        (0x1 << 31)
  58 #define KPDK_DK7        (0x1 <<  7)
  59 #define KPDK_DK6        (0x1 <<  6)
  60 #define KPDK_DK5        (0x1 <<  5)
  61 #define KPDK_DK4        (0x1 <<  4)
  62 #define KPDK_DK3        (0x1 <<  3)
  63 #define KPDK_DK2        (0x1 <<  2)
  64 #define KPDK_DK1        (0x1 <<  1)
  65 #define KPDK_DK0        (0x1 <<  0)
  66
  67 #define KPREC_OF1       (0x1 << 31)
  68 #define KPREC_UF1       (0x1 << 30)
  69 #define KPREC_OF0       (0x1 << 15)
  70 #define KPREC_UF0       (0x1 << 14)
  71
  72 #define KPMK_MKP        (0x1 << 31)
  73 #define KPAS_SO         (0x1 << 31)
  74 #define KPASMKPx_SO     (0x1 << 31)
  75
  76
  77 #define KPASMKPx_MKC(row, col)  (1 << (row + 16 * (col % 2)))
  78
  79 #define PXAKBD_MAXROW   8
  80 #define PXAKBD_MAXCOL   8
  81
  82 struct PXA2xxKeyPadState {
  83     qemu_irq    irq;
  84     struct  keymap *map;
  85     int         pressed_cnt;
  86
  87     uint32_t    kpc;
  88     uint32_t    kpdk;
  89     uint32_t    kprec;
  90     uint32_t    kpmk;
  91     uint32_t    kpas;
  92     uint32_t    kpasmkp[4];
  93     uint32_t    kpkdi;
  94 };
  95
  96 static void pxa27x_keypad_find_pressed_key(PXA2xxKeyPadState *kp, int *row, int *col)
  97 {
  98     int i;
  99     for (i = 0; i < 4; i++)
 100     {
 101         *col = i * 2;
 102         for (*row = 0; *row < 8; (*row)++) {
 103             if (kp->kpasmkp[i] & (1 << *row))
 104                 return;
 105         }
 106         *col = i * 2 + 1;
 107         for (*row = 0; *row < 8; (*row)++) {
 108             if (kp->kpasmkp[i] & (1 << (*row + 16)))
 109                 return;
 110         }
 111     }
 112 }
 113
 114 static void pxa27x_keyboard_event (PXA2xxKeyPadState *kp, int keycode)
 115 {
 116     int row, col, rel, assert_irq = 0;
 117     uint32_t val;
 118
 119     if(!(kp->kpc & KPC_ME)) /* skip if not enabled */
 120         return;
 121
 122     if(kp->kpc & KPC_AS || kp->kpc & KPC_ASACT) {
 123         if(kp->kpc & KPC_AS)
 124             kp->kpc &= ~(KPC_AS);
 125
 126         rel = (keycode & 0x80) ? 1 : 0; /* key release from qemu */
 127         keycode &= ~(0x80); /* strip qemu key release bit */
 128
 129         row = kp->map[keycode].row;
 130         col = kp->map[keycode].column;
 131         if(row == -1 || col == -1)
 132             return;
 133
 134         val = KPASMKPx_MKC(row, col);
 135         if (rel) {
 136             if (kp->kpasmkp[col / 2] & val) {
 137                 kp->kpasmkp[col / 2] &= ~val;
 138                 kp->pressed_cnt--;
 139                 assert_irq = 1;
 140             }
 141         } else {
 142             if (!(kp->kpasmkp[col / 2] & val)) {
 143                 kp->kpasmkp[col / 2] |= val;
 144                 kp->pressed_cnt++;
 145                 assert_irq = 1;
 146             }
 147         }
 148         kp->kpas = ((kp->pressed_cnt & 0x1f) << 26) | (0xf << 4) | 0xf;
 149         if (kp->pressed_cnt == 1) {
 150             kp->kpas &= ~((0xf << 4) | 0xf);
 151             if (rel)
 152                 pxa27x_keypad_find_pressed_key(kp, &row, &col);
 153             kp->kpas |= ((row & 0xf) << 4) | (col & 0xf);
 154         }
 155         goto out;
 156     }
 157     return;
 158
 159 out:
 160     if (assert_irq && (kp->kpc & KPC_MIE)) {
 161         kp->kpc |= KPC_MI;
 162         qemu_irq_raise(kp->irq);
 163     }
 164     return;
 165 }
 166
 167 static uint32_t pxa2xx_keypad_read(void *opaque, target_phys_addr_t offset)
 168 {
 169     PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
 170     uint32_t tmp;
 171
 172     switch (offset) {
 173     case KPC:
 174         tmp = s->kpc;
 175         if(tmp & KPC_MI)
 176             s->kpc &= ~(KPC_MI);
 177         if(tmp & KPC_DI)
 178             s->kpc &= ~(KPC_DI);
 179         qemu_irq_lower(s->irq);
 180         return tmp;
 181         break;
 182     case KPDK:
 183         return s->kpdk;
 184         break;
 185     case KPREC:
 186         tmp = s->kprec;
 187         if(tmp & KPREC_OF1)
 188             s->kprec &= ~(KPREC_OF1);
 189         if(tmp & KPREC_UF1)
 190             s->kprec &= ~(KPREC_UF1);
 191         if(tmp & KPREC_OF0)
 192             s->kprec &= ~(KPREC_OF0);
 193         if(tmp & KPREC_UF0)
 194             s->kprec &= ~(KPREC_UF0);
 195         return tmp;
 196         break;
 197     case KPMK:
 198         tmp = s->kpmk;
 199         if(tmp & KPMK_MKP)
 200             s->kpmk &= ~(KPMK_MKP);
 201         return tmp;
 202         break;
 203     case KPAS:
 204         return s->kpas;
 205         break;
 206     case KPASMKP0:
 207         return s->kpasmkp[0];
 208         break;
 209     case KPASMKP1:
 210         return s->kpasmkp[1];
 211         break;
 212     case KPASMKP2:
 213         return s->kpasmkp[2];
 214         break;
 215     case KPASMKP3:
 216         return s->kpasmkp[3];
 217         break;
 218     case KPKDI:
 219         return s->kpkdi;
 220         break;
 221     default:
 222         hw_error("%s: Bad offset " REG_FMT "\n", __FUNCTION__, offset);
 223     }
 224
 225     return 0;
 226 }
 227
 228 static void pxa2xx_keypad_write(void *opaque,
 229                 target_phys_addr_t offset, uint32_t value)
 230 {
 231     PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
 232
 233     switch (offset) {
 234     case KPC:
 235         s->kpc = value;
 236         break;
 237     case KPDK:
 238         s->kpdk = value;
 239         break;
 240     case KPREC:
 241         s->kprec = value;
 242         break;
 243     case KPMK:
 244         s->kpmk = value;
 245         break;
 246     case KPAS:
 247         s->kpas = value;
 248         break;
 249     case KPASMKP0:
 250         s->kpasmkp[0] = value;
 251         break;
 252     case KPASMKP1:
 253         s->kpasmkp[1] = value;
 254         break;
 255     case KPASMKP2:
 256         s->kpasmkp[2] = value;
 257         break;
 258     case KPASMKP3:
 259         s->kpasmkp[3] = value;
 260         break;
 261     case KPKDI:
 262         s->kpkdi = value;
 263         break;
 264
 265     default:
 266         hw_error("%s: Bad offset " REG_FMT "\n", __FUNCTION__, offset);
 267     }
 268 }
 269
 270 static CPUReadMemoryFunc * const pxa2xx_keypad_readfn[] = {
 271     pxa2xx_keypad_read,
 272     pxa2xx_keypad_read,
 273     pxa2xx_keypad_read
 274 };
 275
 276 static CPUWriteMemoryFunc * const pxa2xx_keypad_writefn[] = {
 277     pxa2xx_keypad_write,
 278     pxa2xx_keypad_write,
 279     pxa2xx_keypad_write
 280 };
 281
 282 static void pxa2xx_keypad_save(QEMUFile *f, void *opaque)
 283 {
 284     PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
 285
 286     qemu_put_be32s(f, &s->kpc);
 287     qemu_put_be32s(f, &s->kpdk);
 288     qemu_put_be32s(f, &s->kprec);
 289     qemu_put_be32s(f, &s->kpmk);
 290     qemu_put_be32s(f, &s->kpas);
 291     qemu_put_be32s(f, &s->kpasmkp[0]);
 292     qemu_put_be32s(f, &s->kpasmkp[1]);
 293     qemu_put_be32s(f, &s->kpasmkp[2]);
 294     qemu_put_be32s(f, &s->kpasmkp[3]);
 295     qemu_put_be32s(f, &s->kpkdi);
 296
 297 }
 298
 299 static int pxa2xx_keypad_load(QEMUFile *f, void *opaque, int version_id)
 300 {
 301     PXA2xxKeyPadState *s = (PXA2xxKeyPadState *) opaque;
 302
 303     qemu_get_be32s(f, &s->kpc);
 304     qemu_get_be32s(f, &s->kpdk);
 305     qemu_get_be32s(f, &s->kprec);
 306     qemu_get_be32s(f, &s->kpmk);
 307     qemu_get_be32s(f, &s->kpas);
 308     qemu_get_be32s(f, &s->kpasmkp[0]);
 309     qemu_get_be32s(f, &s->kpasmkp[1]);
 310     qemu_get_be32s(f, &s->kpasmkp[2]);
 311     qemu_get_be32s(f, &s->kpasmkp[3]);
 312     qemu_get_be32s(f, &s->kpkdi);
 313
 314     return 0;
 315 }
 316
 317 PXA2xxKeyPadState *pxa27x_keypad_init(target_phys_addr_t base,
 318         qemu_irq irq)
 319 {
 320     int iomemtype;
 321     PXA2xxKeyPadState *s;
 322
 323     s = (PXA2xxKeyPadState *) qemu_mallocz(sizeof(PXA2xxKeyPadState));
 324     s->irq = irq;
 325
 326     iomemtype = cpu_register_io_memory(pxa2xx_keypad_readfn,
 327                     pxa2xx_keypad_writefn, s, DEVICE_NATIVE_ENDIAN);
 328     cpu_register_physical_memory(base, 0x00100000, iomemtype);
 329
 330     register_savevm(NULL, "pxa2xx_keypad", 0, 0,
 331                     pxa2xx_keypad_save, pxa2xx_keypad_load, s);
 332
 333     return s;
 334 }
 335
 336 void pxa27x_register_keypad(PXA2xxKeyPadState *kp, struct keymap *map,
 337         int size)
 338 {
 339     if(!map || size < 0x80) {
 340         fprintf(stderr, "%s - No PXA keypad map defined\n", __FUNCTION__);
 341         exit(-1);
 342     }
 343
 344     kp->map = map;
 345     qemu_add_kbd_event_handler((QEMUPutKBDEvent *) pxa27x_keyboard_event, kp);
 346 }