2 * ARM RealView Baseboard System emulation.
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
12 #include "primecell.h"
19 #include "bitbang_i2c.h"
21 #include "exec-memory.h"
23 #define SMP_BOOT_ADDR 0xe0000000
28 bitbang_i2c_interface
*bitbang
;
33 static uint64_t realview_i2c_read(void *opaque
, target_phys_addr_t offset
,
36 RealViewI2CState
*s
= (RealViewI2CState
*)opaque
;
39 return (s
->out
& 1) | (s
->in
<< 1);
41 hw_error("realview_i2c_read: Bad offset 0x%x\n", (int)offset
);
46 static void realview_i2c_write(void *opaque
, target_phys_addr_t offset
,
47 uint64_t value
, unsigned size
)
49 RealViewI2CState
*s
= (RealViewI2CState
*)opaque
;
59 hw_error("realview_i2c_write: Bad offset 0x%x\n", (int)offset
);
61 bitbang_i2c_set(s
->bitbang
, BITBANG_I2C_SCL
, (s
->out
& 1) != 0);
62 s
->in
= bitbang_i2c_set(s
->bitbang
, BITBANG_I2C_SDA
, (s
->out
& 2) != 0);
65 static const MemoryRegionOps realview_i2c_ops
= {
66 .read
= realview_i2c_read
,
67 .write
= realview_i2c_write
,
68 .endianness
= DEVICE_NATIVE_ENDIAN
,
71 static int realview_i2c_init(SysBusDevice
*dev
)
73 RealViewI2CState
*s
= FROM_SYSBUS(RealViewI2CState
, dev
);
76 bus
= i2c_init_bus(&dev
->qdev
, "i2c");
77 s
->bitbang
= bitbang_i2c_init(bus
);
78 memory_region_init_io(&s
->iomem
, &realview_i2c_ops
, s
,
79 "realview-i2c", 0x1000);
80 sysbus_init_mmio_region(dev
, &s
->iomem
);
84 static SysBusDeviceInfo realview_i2c_info
= {
85 .init
= realview_i2c_init
,
86 .qdev
.name
= "realview_i2c",
87 .qdev
.size
= sizeof(RealViewI2CState
),
90 static void realview_register_devices(void)
92 sysbus_register_withprop(&realview_i2c_info
);
97 static struct arm_boot_info realview_binfo
= {
98 .smp_loader_start
= SMP_BOOT_ADDR
,
101 /* The following two lists must be consistent. */
102 enum realview_board_type
{
109 static const int realview_board_id
[] = {
116 static void realview_init(ram_addr_t ram_size
,
117 const char *boot_device
,
118 const char *kernel_filename
, const char *kernel_cmdline
,
119 const char *initrd_filename
, const char *cpu_model
,
120 enum realview_board_type board_type
)
122 CPUState
*env
= NULL
;
123 MemoryRegion
*sysmem
= get_system_memory();
124 MemoryRegion
*ram_lo
= g_new(MemoryRegion
, 1);
125 MemoryRegion
*ram_hi
= g_new(MemoryRegion
, 1);
126 MemoryRegion
*ram_alias
= g_new(MemoryRegion
, 1);
127 MemoryRegion
*ram_hack
= g_new(MemoryRegion
, 1);
128 DeviceState
*dev
, *sysctl
, *gpio2
;
129 SysBusDevice
*busdev
;
141 uint32_t proc_id
= 0;
143 ram_addr_t low_ram_size
;
145 switch (board_type
) {
148 case BOARD_EB_MPCORE
:
159 for (n
= 0; n
< smp_cpus
; n
++) {
160 env
= cpu_init(cpu_model
);
162 fprintf(stderr
, "Unable to find CPU definition\n");
165 irqp
= arm_pic_init_cpu(env
);
166 cpu_irq
[n
] = irqp
[ARM_PIC_CPU_IRQ
];
168 if (arm_feature(env
, ARM_FEATURE_V7
)) {
170 proc_id
= 0x0c000000;
172 proc_id
= 0x0e000000;
174 } else if (arm_feature(env
, ARM_FEATURE_V6K
)) {
175 proc_id
= 0x06000000;
176 } else if (arm_feature(env
, ARM_FEATURE_V6
)) {
177 proc_id
= 0x04000000;
179 proc_id
= 0x02000000;
182 if (is_pb
&& ram_size
> 0x20000000) {
184 low_ram_size
= ram_size
- 0x20000000;
185 ram_size
= 0x20000000;
186 memory_region_init_ram(ram_lo
, NULL
, "realview.lowmem", low_ram_size
);
187 memory_region_add_subregion(sysmem
, 0x20000000, ram_lo
);
190 memory_region_init_ram(ram_hi
, NULL
, "realview.highmem", ram_size
);
191 low_ram_size
= ram_size
;
192 if (low_ram_size
> 0x10000000)
193 low_ram_size
= 0x10000000;
194 /* SDRAM at address zero. */
195 memory_region_init_alias(ram_alias
, "realview.alias",
196 ram_hi
, 0, low_ram_size
);
197 memory_region_add_subregion(sysmem
, 0, ram_alias
);
199 /* And again at a high address. */
200 memory_region_add_subregion(sysmem
, 0x70000000, ram_hi
);
202 ram_size
= low_ram_size
;
205 sys_id
= is_pb
? 0x01780500 : 0xc1400400;
206 sysctl
= qdev_create(NULL
, "realview_sysctl");
207 qdev_prop_set_uint32(sysctl
, "sys_id", sys_id
);
208 qdev_init_nofail(sysctl
);
209 qdev_prop_set_uint32(sysctl
, "proc_id", proc_id
);
210 sysbus_mmio_map(sysbus_from_qdev(sysctl
), 0, 0x10000000);
213 dev
= qdev_create(NULL
, is_pb
? "a9mpcore_priv": "realview_mpcore");
214 qdev_prop_set_uint32(dev
, "num-cpu", smp_cpus
);
215 qdev_init_nofail(dev
);
216 busdev
= sysbus_from_qdev(dev
);
218 realview_binfo
.smp_priv_base
= 0x1f000000;
220 realview_binfo
.smp_priv_base
= 0x10100000;
222 sysbus_mmio_map(busdev
, 0, realview_binfo
.smp_priv_base
);
223 for (n
= 0; n
< smp_cpus
; n
++) {
224 sysbus_connect_irq(busdev
, n
, cpu_irq
[n
]);
227 uint32_t gic_addr
= is_pb
? 0x1e000000 : 0x10040000;
228 /* For now just create the nIRQ GIC, and ignore the others. */
229 dev
= sysbus_create_simple("realview_gic", gic_addr
, cpu_irq
[0]);
231 for (n
= 0; n
< 64; n
++) {
232 pic
[n
] = qdev_get_gpio_in(dev
, n
);
235 sysbus_create_simple("pl050_keyboard", 0x10006000, pic
[20]);
236 sysbus_create_simple("pl050_mouse", 0x10007000, pic
[21]);
238 sysbus_create_simple("pl011", 0x10009000, pic
[12]);
239 sysbus_create_simple("pl011", 0x1000a000, pic
[13]);
240 sysbus_create_simple("pl011", 0x1000b000, pic
[14]);
241 sysbus_create_simple("pl011", 0x1000c000, pic
[15]);
243 /* DMA controller is optional, apparently. */
244 sysbus_create_simple("pl081", 0x10030000, pic
[24]);
246 sysbus_create_simple("sp804", 0x10011000, pic
[4]);
247 sysbus_create_simple("sp804", 0x10012000, pic
[5]);
249 sysbus_create_simple("pl061", 0x10013000, pic
[6]);
250 sysbus_create_simple("pl061", 0x10014000, pic
[7]);
251 gpio2
= sysbus_create_simple("pl061", 0x10015000, pic
[8]);
253 sysbus_create_simple("pl111", 0x10020000, pic
[23]);
255 dev
= sysbus_create_varargs("pl181", 0x10005000, pic
[17], pic
[18], NULL
);
256 /* Wire up MMC card detect and read-only signals. These have
257 * to go to both the PL061 GPIO and the sysctl register.
258 * Note that the PL181 orders these lines (readonly,inserted)
259 * and the PL061 has them the other way about. Also the card
260 * detect line is inverted.
262 mmc_irq
[0] = qemu_irq_split(
263 qdev_get_gpio_in(sysctl
, ARM_SYSCTL_GPIO_MMC_WPROT
),
264 qdev_get_gpio_in(gpio2
, 1));
265 mmc_irq
[1] = qemu_irq_split(
266 qdev_get_gpio_in(sysctl
, ARM_SYSCTL_GPIO_MMC_CARDIN
),
267 qemu_irq_invert(qdev_get_gpio_in(gpio2
, 0)));
268 qdev_connect_gpio_out(dev
, 0, mmc_irq
[0]);
269 qdev_connect_gpio_out(dev
, 1, mmc_irq
[1]);
271 sysbus_create_simple("pl031", 0x10017000, pic
[10]);
274 dev
= qdev_create(NULL
, "realview_pci");
275 busdev
= sysbus_from_qdev(dev
);
276 qdev_init_nofail(dev
);
277 sysbus_mmio_map(busdev
, 0, 0x61000000); /* PCI self-config */
278 sysbus_mmio_map(busdev
, 1, 0x62000000); /* PCI config */
279 sysbus_mmio_map(busdev
, 2, 0x63000000); /* PCI I/O */
280 sysbus_connect_irq(busdev
, 0, pic
[48]);
281 sysbus_connect_irq(busdev
, 1, pic
[49]);
282 sysbus_connect_irq(busdev
, 2, pic
[50]);
283 sysbus_connect_irq(busdev
, 3, pic
[51]);
284 pci_bus
= (PCIBus
*)qdev_get_child_bus(dev
, "pci");
286 usb_ohci_init_pci(pci_bus
, -1);
288 n
= drive_get_max_bus(IF_SCSI
);
290 pci_create_simple(pci_bus
, -1, "lsi53c895a");
294 for(n
= 0; n
< nb_nics
; n
++) {
297 if (!done_nic
&& (!nd
->model
||
298 strcmp(nd
->model
, is_pb
? "lan9118" : "smc91c111") == 0)) {
300 lan9118_init(nd
, 0x4e000000, pic
[28]);
302 smc91c111_init(nd
, 0x4e000000, pic
[28]);
306 pci_nic_init_nofail(nd
, "rtl8139", NULL
);
310 dev
= sysbus_create_simple("realview_i2c", 0x10002000, NULL
);
311 i2c
= (i2c_bus
*)qdev_get_child_bus(dev
, "i2c");
312 i2c_create_slave(i2c
, "ds1338", 0x68);
314 /* Memory map for RealView Emulation Baseboard: */
315 /* 0x10000000 System registers. */
316 /* 0x10001000 System controller. */
317 /* 0x10002000 Two-Wire Serial Bus. */
318 /* 0x10003000 Reserved. */
319 /* 0x10004000 AACI. */
320 /* 0x10005000 MCI. */
321 /* 0x10006000 KMI0. */
322 /* 0x10007000 KMI1. */
323 /* 0x10008000 Character LCD. (EB) */
324 /* 0x10009000 UART0. */
325 /* 0x1000a000 UART1. */
326 /* 0x1000b000 UART2. */
327 /* 0x1000c000 UART3. */
328 /* 0x1000d000 SSPI. */
329 /* 0x1000e000 SCI. */
330 /* 0x1000f000 Reserved. */
331 /* 0x10010000 Watchdog. */
332 /* 0x10011000 Timer 0+1. */
333 /* 0x10012000 Timer 2+3. */
334 /* 0x10013000 GPIO 0. */
335 /* 0x10014000 GPIO 1. */
336 /* 0x10015000 GPIO 2. */
337 /* 0x10002000 Two-Wire Serial Bus - DVI. (PB) */
338 /* 0x10017000 RTC. */
339 /* 0x10018000 DMC. */
340 /* 0x10019000 PCI controller config. */
341 /* 0x10020000 CLCD. */
342 /* 0x10030000 DMA Controller. */
343 /* 0x10040000 GIC1. (EB) */
344 /* 0x10050000 GIC2. (EB) */
345 /* 0x10060000 GIC3. (EB) */
346 /* 0x10070000 GIC4. (EB) */
347 /* 0x10080000 SMC. */
348 /* 0x1e000000 GIC1. (PB) */
349 /* 0x1e001000 GIC2. (PB) */
350 /* 0x1e002000 GIC3. (PB) */
351 /* 0x1e003000 GIC4. (PB) */
352 /* 0x40000000 NOR flash. */
353 /* 0x44000000 DoC flash. */
354 /* 0x48000000 SRAM. */
355 /* 0x4c000000 Configuration flash. */
356 /* 0x4e000000 Ethernet. */
357 /* 0x4f000000 USB. */
358 /* 0x50000000 PISMO. */
359 /* 0x54000000 PISMO. */
360 /* 0x58000000 PISMO. */
361 /* 0x5c000000 PISMO. */
362 /* 0x60000000 PCI. */
363 /* 0x61000000 PCI Self Config. */
364 /* 0x62000000 PCI Config. */
365 /* 0x63000000 PCI IO. */
366 /* 0x64000000 PCI mem 0. */
367 /* 0x68000000 PCI mem 1. */
368 /* 0x6c000000 PCI mem 2. */
370 /* ??? Hack to map an additional page of ram for the secondary CPU
371 startup code. I guess this works on real hardware because the
372 BootROM happens to be in ROM/flash or in memory that isn't clobbered
373 until after Linux boots the secondary CPUs. */
374 memory_region_init_ram(ram_hack
, NULL
, "realview.hack", 0x1000);
375 memory_region_add_subregion(sysmem
, SMP_BOOT_ADDR
, ram_hack
);
377 realview_binfo
.ram_size
= ram_size
;
378 realview_binfo
.kernel_filename
= kernel_filename
;
379 realview_binfo
.kernel_cmdline
= kernel_cmdline
;
380 realview_binfo
.initrd_filename
= initrd_filename
;
381 realview_binfo
.nb_cpus
= smp_cpus
;
382 realview_binfo
.board_id
= realview_board_id
[board_type
];
383 realview_binfo
.loader_start
= (board_type
== BOARD_PB_A8
? 0x70000000 : 0);
384 arm_load_kernel(first_cpu
, &realview_binfo
);
387 static void realview_eb_init(ram_addr_t ram_size
,
388 const char *boot_device
,
389 const char *kernel_filename
, const char *kernel_cmdline
,
390 const char *initrd_filename
, const char *cpu_model
)
393 cpu_model
= "arm926";
395 realview_init(ram_size
, boot_device
, kernel_filename
, kernel_cmdline
,
396 initrd_filename
, cpu_model
, BOARD_EB
);
399 static void realview_eb_mpcore_init(ram_addr_t ram_size
,
400 const char *boot_device
,
401 const char *kernel_filename
, const char *kernel_cmdline
,
402 const char *initrd_filename
, const char *cpu_model
)
405 cpu_model
= "arm11mpcore";
407 realview_init(ram_size
, boot_device
, kernel_filename
, kernel_cmdline
,
408 initrd_filename
, cpu_model
, BOARD_EB_MPCORE
);
411 static void realview_pb_a8_init(ram_addr_t ram_size
,
412 const char *boot_device
,
413 const char *kernel_filename
, const char *kernel_cmdline
,
414 const char *initrd_filename
, const char *cpu_model
)
417 cpu_model
= "cortex-a8";
419 realview_init(ram_size
, boot_device
, kernel_filename
, kernel_cmdline
,
420 initrd_filename
, cpu_model
, BOARD_PB_A8
);
423 static void realview_pbx_a9_init(ram_addr_t ram_size
,
424 const char *boot_device
,
425 const char *kernel_filename
, const char *kernel_cmdline
,
426 const char *initrd_filename
, const char *cpu_model
)
429 cpu_model
= "cortex-a9";
431 realview_init(ram_size
, boot_device
, kernel_filename
, kernel_cmdline
,
432 initrd_filename
, cpu_model
, BOARD_PBX_A9
);
435 static QEMUMachine realview_eb_machine
= {
436 .name
= "realview-eb",
437 .desc
= "ARM RealView Emulation Baseboard (ARM926EJ-S)",
438 .init
= realview_eb_init
,
442 static QEMUMachine realview_eb_mpcore_machine
= {
443 .name
= "realview-eb-mpcore",
444 .desc
= "ARM RealView Emulation Baseboard (ARM11MPCore)",
445 .init
= realview_eb_mpcore_init
,
450 static QEMUMachine realview_pb_a8_machine
= {
451 .name
= "realview-pb-a8",
452 .desc
= "ARM RealView Platform Baseboard for Cortex-A8",
453 .init
= realview_pb_a8_init
,
456 static QEMUMachine realview_pbx_a9_machine
= {
457 .name
= "realview-pbx-a9",
458 .desc
= "ARM RealView Platform Baseboard Explore for Cortex-A9",
459 .init
= realview_pbx_a9_init
,
464 static void realview_machine_init(void)
466 qemu_register_machine(&realview_eb_machine
);
467 qemu_register_machine(&realview_eb_mpcore_machine
);
468 qemu_register_machine(&realview_pb_a8_machine
);
469 qemu_register_machine(&realview_pbx_a9_machine
);
472 machine_init(realview_machine_init
);
473 device_init(realview_register_devices
)