hw/sh_intc.c

   1 /*
   2  * SuperH interrupt controller module
   3  *
   4  * Copyright (c) 2007 Magnus Damm
   5  * Based on sh_timer.c and arm_timer.c by Paul Brook
   6  * Copyright (c) 2005-2006 CodeSourcery.
   7  *
   8  * This code is licenced under the GPL.
   9  */
  10
  11 #include <assert.h>
  12 #include "sh_intc.h"
  13 #include "hw.h"
  14 #include "sh.h"
  15
  16 //#define DEBUG_INTC
  17 //#define DEBUG_INTC_SOURCES
  18
  19 #define INTC_A7(x) ((x) & 0x1fffffff)
  20 #define INTC_ARRAY(x) (sizeof(x) / sizeof(x[0]))
  21
  22 void sh_intc_toggle_source(struct intc_source *source,
  23                            int enable_adj, int assert_adj)
  24 {
  25     int enable_changed = 0;
  26     int pending_changed = 0;
  27     int old_pending;
  28
  29     if ((source->enable_count == source->enable_max) && (enable_adj == -1))
  30         enable_changed = -1;
  31
  32     source->enable_count += enable_adj;
  33
  34     if (source->enable_count == source->enable_max)
  35         enable_changed = 1;
  36
  37     source->asserted += assert_adj;
  38
  39     old_pending = source->pending;
  40     source->pending = source->asserted &&
  41       (source->enable_count == source->enable_max);
  42
  43     if (old_pending != source->pending)
  44         pending_changed = 1;
  45
  46     if (pending_changed) {
  47         if (source->pending) {
  48             source->parent->pending++;
  49             if (source->parent->pending == 1)
  50                 cpu_interrupt(first_cpu, CPU_INTERRUPT_HARD);
  51         }
  52         else {
  53             source->parent->pending--;
  54             if (source->parent->pending == 0)
  55                 cpu_reset_interrupt(first_cpu, CPU_INTERRUPT_HARD);
  56         }
  57     }
  58
  59   if (enable_changed || assert_adj || pending_changed) {
  60 #ifdef DEBUG_INTC_SOURCES
  61             printf("sh_intc: (%d/%d/%d/%d) interrupt source 0x%x %s%s%s\n",
  62                    source->parent->pending,
  63                    source->asserted,
  64                    source->enable_count,
  65                    source->enable_max,
  66                    source->vect,
  67                    source->asserted ? "asserted " :
  68                    assert_adj ? "deasserted" : "",
  69                    enable_changed == 1 ? "enabled " :
  70                    enable_changed == -1 ? "disabled " : "",
  71                    source->pending ? "pending" : "");
  72 #endif
  73   }
  74 }
  75
  76 void sh_intc_set_irq (void *opaque, int n, int level)
  77 {
  78   struct intc_desc *desc = opaque;
  79   struct intc_source *source = &(desc->sources[n]);
  80
  81   if (level && !source->asserted)
  82     sh_intc_toggle_source(source, 0, 1);
  83   else if (!level && source->asserted)
  84     sh_intc_toggle_source(source, 0, -1);
  85 }
  86
  87 int sh_intc_get_pending_vector(struct intc_desc *desc, int imask)
  88 {
  89     unsigned int i;
  90
  91     /* slow: use a linked lists of pending sources instead */
  92     /* wrong: take interrupt priority into account (one list per priority) */
  93
  94     if (imask == 0x0f) {
  95         return -1; /* FIXME, update code to include priority per source */
  96     }
  97
  98     for (i = 0; i < desc->nr_sources; i++) {
  99         struct intc_source *source = desc->sources + i;
 100
 101         if (source->pending) {
 102 #ifdef DEBUG_INTC_SOURCES
 103             printf("sh_intc: (%d) returning interrupt source 0x%x\n",
 104                    desc->pending, source->vect);
 105 #endif
 106             return source->vect;
 107         }
 108     }
 109
 110     assert(0);
 111 }
 112
 113 #define INTC_MODE_NONE       0
 114 #define INTC_MODE_DUAL_SET   1
 115 #define INTC_MODE_DUAL_CLR   2
 116 #define INTC_MODE_ENABLE_REG 3
 117 #define INTC_MODE_MASK_REG   4
 118 #define INTC_MODE_IS_PRIO    8
 119
 120 static unsigned int sh_intc_mode(unsigned long address,
 121                                  unsigned long set_reg, unsigned long clr_reg)
 122 {
 123     if ((address != INTC_A7(set_reg)) &&
 124         (address != INTC_A7(clr_reg)))
 125         return INTC_MODE_NONE;
 126
 127     if (set_reg && clr_reg) {
 128         if (address == INTC_A7(set_reg))
 129             return INTC_MODE_DUAL_SET;
 130         else
 131             return INTC_MODE_DUAL_CLR;
 132     }
 133
 134     if (set_reg)
 135         return INTC_MODE_ENABLE_REG;
 136     else
 137         return INTC_MODE_MASK_REG;
 138 }
 139
 140 static void sh_intc_locate(struct intc_desc *desc,
 141                            unsigned long address,
 142                            unsigned long **datap,
 143                            intc_enum **enums,
 144                            unsigned int *first,
 145                            unsigned int *width,
 146                            unsigned int *modep)
 147 {
 148     unsigned int i, mode;
 149
 150     /* this is slow but works for now */
 151
 152     if (desc->mask_regs) {
 153         for (i = 0; i < desc->nr_mask_regs; i++) {
 154             struct intc_mask_reg *mr = desc->mask_regs + i;
 155
 156             mode = sh_intc_mode(address, mr->set_reg, mr->clr_reg);
 157             if (mode == INTC_MODE_NONE)
 158                 continue;
 159
 160             *modep = mode;
 161             *datap = &mr->value;
 162             *enums = mr->enum_ids;
 163             *first = mr->reg_width - 1;
 164             *width = 1;
 165             return;
 166         }
 167     }
 168
 169     if (desc->prio_regs) {
 170         for (i = 0; i < desc->nr_prio_regs; i++) {
 171             struct intc_prio_reg *pr = desc->prio_regs + i;
 172
 173             mode = sh_intc_mode(address, pr->set_reg, pr->clr_reg);
 174             if (mode == INTC_MODE_NONE)
 175                 continue;
 176
 177             *modep = mode | INTC_MODE_IS_PRIO;
 178             *datap = &pr->value;
 179             *enums = pr->enum_ids;
 180             *first = (pr->reg_width / pr->field_width) - 1;
 181             *width = pr->field_width;
 182             return;
 183         }
 184     }
 185
 186     assert(0);
 187 }
 188
 189 static void sh_intc_toggle_mask(struct intc_desc *desc, intc_enum id,
 190                                 int enable, int is_group)
 191 {
 192     struct intc_source *source = desc->sources + id;
 193
 194     if (!id)
 195         return;
 196
 197     if (!source->next_enum_id && (!source->enable_max || !source->vect)) {
 198 #ifdef DEBUG_INTC_SOURCES
 199         printf("sh_intc: reserved interrupt source %d modified\n", id);
 200 #endif
 201         return;
 202     }
 203
 204     if (source->vect)
 205         sh_intc_toggle_source(source, enable ? 1 : -1, 0);
 206
 207 #ifdef DEBUG_INTC
 208     else {
 209         printf("setting interrupt group %d to %d\n", id, !!enable);
 210     }
 211 #endif
 212
 213     if ((is_group || !source->vect) && source->next_enum_id) {
 214         sh_intc_toggle_mask(desc, source->next_enum_id, enable, 1);
 215     }
 216
 217 #ifdef DEBUG_INTC
 218     if (!source->vect) {
 219         printf("setting interrupt group %d to %d - done\n", id, !!enable);
 220     }
 221 #endif
 222 }
 223
 224 static uint32_t sh_intc_read(void *opaque, target_phys_addr_t offset)
 225 {
 226     struct intc_desc *desc = opaque;
 227     intc_enum *enum_ids = NULL;
 228     unsigned int first = 0;
 229     unsigned int width = 0;
 230     unsigned int mode = 0;
 231     unsigned long *valuep;
 232
 233 #ifdef DEBUG_INTC
 234     printf("sh_intc_read 0x%lx\n", (unsigned long) offset);
 235 #endif
 236
 237     sh_intc_locate(desc, (unsigned long)offset, &valuep,
 238                    &enum_ids, &first, &width, &mode);
 239     return *valuep;
 240 }
 241
 242 static void sh_intc_write(void *opaque, target_phys_addr_t offset,
 243                           uint32_t value)
 244 {
 245     struct intc_desc *desc = opaque;
 246     intc_enum *enum_ids = NULL;
 247     unsigned int first = 0;
 248     unsigned int width = 0;
 249     unsigned int mode = 0;
 250     unsigned int k;
 251     unsigned long *valuep;
 252     unsigned long mask;
 253
 254 #ifdef DEBUG_INTC
 255     printf("sh_intc_write 0x%lx 0x%08x\n", (unsigned long) offset, value);
 256 #endif
 257
 258     sh_intc_locate(desc, (unsigned long)offset, &valuep,
 259                    &enum_ids, &first, &width, &mode);
 260
 261     switch (mode) {
 262     case INTC_MODE_ENABLE_REG | INTC_MODE_IS_PRIO: break;
 263     case INTC_MODE_DUAL_SET: value |= *valuep; break;
 264     case INTC_MODE_DUAL_CLR: value = *valuep & ~value; break;
 265     default: assert(0);
 266     }
 267
 268     for (k = 0; k <= first; k++) {
 269         mask = ((1 << width) - 1) << ((first - k) * width);
 270
 271         if ((*valuep & mask) == (value & mask))
 272             continue;
 273 #if 0
 274         printf("k = %d, first = %d, enum = %d, mask = 0x%08x\n",
 275                k, first, enum_ids[k], (unsigned int)mask);
 276 #endif
 277         sh_intc_toggle_mask(desc, enum_ids[k], value & mask, 0);
 278     }
 279
 280     *valuep = value;
 281
 282 #ifdef DEBUG_INTC
 283     printf("sh_intc_write 0x%lx -> 0x%08x\n", (unsigned long) offset, value);
 284 #endif
 285 }
 286
 287 static CPUReadMemoryFunc *sh_intc_readfn[] = {
 288     sh_intc_read,
 289     sh_intc_read,
 290     sh_intc_read
 291 };
 292
 293 static CPUWriteMemoryFunc *sh_intc_writefn[] = {
 294     sh_intc_write,
 295     sh_intc_write,
 296     sh_intc_write
 297 };
 298
 299 struct intc_source *sh_intc_source(struct intc_desc *desc, intc_enum id)
 300 {
 301     if (id)
 302         return desc->sources + id;
 303
 304     return NULL;
 305 }
 306
 307 static void sh_intc_register(struct intc_desc *desc,
 308                              unsigned long address)
 309 {
 310     if (address)
 311         cpu_register_physical_memory_offset(INTC_A7(address), 4,
 312                                             desc->iomemtype, INTC_A7(address));
 313 }
 314
 315 static void sh_intc_register_source(struct intc_desc *desc,
 316                                     intc_enum source,
 317                                     struct intc_group *groups,
 318                                     int nr_groups)
 319 {
 320     unsigned int i, k;
 321     struct intc_source *s;
 322
 323     if (desc->mask_regs) {
 324         for (i = 0; i < desc->nr_mask_regs; i++) {
 325             struct intc_mask_reg *mr = desc->mask_regs + i;
 326
 327             for (k = 0; k < INTC_ARRAY(mr->enum_ids); k++) {
 328                 if (mr->enum_ids[k] != source)
 329                     continue;
 330
 331                 s = sh_intc_source(desc, mr->enum_ids[k]);
 332                 if (s)
 333                     s->enable_max++;
 334             }
 335         }
 336     }
 337
 338     if (desc->prio_regs) {
 339         for (i = 0; i < desc->nr_prio_regs; i++) {
 340             struct intc_prio_reg *pr = desc->prio_regs + i;
 341
 342             for (k = 0; k < INTC_ARRAY(pr->enum_ids); k++) {
 343                 if (pr->enum_ids[k] != source)
 344                     continue;
 345
 346                 s = sh_intc_source(desc, pr->enum_ids[k]);
 347                 if (s)
 348                     s->enable_max++;
 349             }
 350         }
 351     }
 352
 353     if (groups) {
 354         for (i = 0; i < nr_groups; i++) {
 355             struct intc_group *gr = groups + i;
 356
 357             for (k = 0; k < INTC_ARRAY(gr->enum_ids); k++) {
 358                 if (gr->enum_ids[k] != source)
 359                     continue;
 360
 361                 s = sh_intc_source(desc, gr->enum_ids[k]);
 362                 if (s)
 363                     s->enable_max++;
 364             }
 365         }
 366     }
 367
 368 }
 369
 370 void sh_intc_register_sources(struct intc_desc *desc,
 371                               struct intc_vect *vectors,
 372                               int nr_vectors,
 373                               struct intc_group *groups,
 374                               int nr_groups)
 375 {
 376     unsigned int i, k;
 377     struct intc_source *s;
 378
 379     for (i = 0; i < nr_vectors; i++) {
 380         struct intc_vect *vect = vectors + i;
 381
 382         sh_intc_register_source(desc, vect->enum_id, groups, nr_groups);
 383         s = sh_intc_source(desc, vect->enum_id);
 384         if (s)
 385             s->vect = vect->vect;
 386
 387 #ifdef DEBUG_INTC_SOURCES
 388         printf("sh_intc: registered source %d -> 0x%04x (%d/%d)\n",
 389                vect->enum_id, s->vect, s->enable_count, s->enable_max);
 390 #endif
 391     }
 392
 393     if (groups) {
 394         for (i = 0; i < nr_groups; i++) {
 395             struct intc_group *gr = groups + i;
 396
 397             s = sh_intc_source(desc, gr->enum_id);
 398             s->next_enum_id = gr->enum_ids[0];
 399
 400             for (k = 1; k < INTC_ARRAY(gr->enum_ids); k++) {
 401                 if (!gr->enum_ids[k])
 402                     continue;
 403
 404                 s = sh_intc_source(desc, gr->enum_ids[k - 1]);
 405                 s->next_enum_id = gr->enum_ids[k];
 406             }
 407
 408 #ifdef DEBUG_INTC_SOURCES
 409             printf("sh_intc: registered group %d (%d/%d)\n",
 410                    gr->enum_id, s->enable_count, s->enable_max);
 411 #endif
 412         }
 413     }
 414 }
 415
 416 int sh_intc_init(struct intc_desc *desc,
 417                  int nr_sources,
 418                  struct intc_mask_reg *mask_regs,
 419                  int nr_mask_regs,
 420                  struct intc_prio_reg *prio_regs,
 421                  int nr_prio_regs)
 422 {
 423     unsigned int i;
 424
 425     desc->pending = 0;
 426     desc->nr_sources = nr_sources;
 427     desc->mask_regs = mask_regs;
 428     desc->nr_mask_regs = nr_mask_regs;
 429     desc->prio_regs = prio_regs;
 430     desc->nr_prio_regs = nr_prio_regs;
 431
 432     i = sizeof(struct intc_source) * nr_sources;
 433     desc->sources = malloc(i);
 434     if (!desc->sources)
 435         return -1;
 436
 437     memset(desc->sources, 0, i);
 438     for (i = 0; i < desc->nr_sources; i++) {
 439         struct intc_source *source = desc->sources + i;
 440
 441         source->parent = desc;
 442     }
 443
 444     desc->irqs = qemu_allocate_irqs(sh_intc_set_irq, desc, nr_sources);
 445
 446     desc->iomemtype = cpu_register_io_memory(0, sh_intc_readfn,
 447                                              sh_intc_writefn, desc);
 448     if (desc->mask_regs) {
 449         for (i = 0; i < desc->nr_mask_regs; i++) {
 450             struct intc_mask_reg *mr = desc->mask_regs + i;
 451
 452             sh_intc_register(desc, mr->set_reg);
 453             sh_intc_register(desc, mr->clr_reg);
 454         }
 455     }
 456
 457     if (desc->prio_regs) {
 458         for (i = 0; i < desc->nr_prio_regs; i++) {
 459             struct intc_prio_reg *pr = desc->prio_regs + i;
 460
 461             sh_intc_register(desc, pr->set_reg);
 462             sh_intc_register(desc, pr->clr_reg);
 463         }
 464     }
 465
 466     return 0;
 467 }
 468
 469 /* Assert level <n> IRL interrupt.
 470    0:deassert. 1:lowest priority,... 15:highest priority. */
 471 void sh_intc_set_irl(void *opaque, int n, int level)
 472 {
 473     struct intc_source *s = opaque;
 474     int i, irl = level ^ 15;
 475     for (i = 0; (s = sh_intc_source(s->parent, s->next_enum_id)); i++) {
 476         if (i == irl)
 477             sh_intc_toggle_source(s, s->enable_count?0:1, s->asserted?0:1);
 478         else
 479             if (s->asserted)
 480                 sh_intc_toggle_source(s, 0, -1);
 481     }
 482 }