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q35: update lpc pci config space according to configured devices
[qemu.git] / hw / smbus_ich9.c
1 /*
2 * ACPI implementation
3 *
4 * Copyright (c) 2006 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License version 2 as published by the Free Software Foundation.
9 *
10 * This library is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * Lesser General Public License for more details.
14 *
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with this library; if not, see <http://www.gnu.org/licenses/>
17 */
18 /*
19 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
20 * VA Linux Systems Japan K.K.
21 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
22 *
23 * This is based on acpi.c, but heavily rewritten.
24 */
25 #include "hw.h"
26 #include "pc.h"
27 #include "pm_smbus.h"
28 #include "pci.h"
29 #include "sysemu.h"
30 #include "i2c.h"
31 #include "smbus.h"
32
33 #include "ich9.h"
34
35 #define TYPE_ICH9_SMB_DEVICE "ICH9 SMB"
36 #define ICH9_SMB_DEVICE(obj) \
37 OBJECT_CHECK(ICH9SMBState, (obj), TYPE_ICH9_SMB_DEVICE)
38
39 typedef struct ICH9SMBState {
40 PCIDevice dev;
41
42 PMSMBus smb;
43 } ICH9SMBState;
44
45 static const VMStateDescription vmstate_ich9_smbus = {
46 .name = "ich9_smb",
47 .version_id = 1,
48 .minimum_version_id = 1,
49 .minimum_version_id_old = 1,
50 .fields = (VMStateField[]) {
51 VMSTATE_PCI_DEVICE(dev, struct ICH9SMBState),
52 VMSTATE_END_OF_LIST()
53 }
54 };
55
56 static void ich9_smbus_write_config(PCIDevice *d, uint32_t address,
57 uint32_t val, int len)
58 {
59 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
60
61 pci_default_write_config(d, address, val, len);
62 if (range_covers_byte(address, len, ICH9_SMB_HOSTC)) {
63 uint8_t hostc = s->dev.config[ICH9_SMB_HOSTC];
64 if ((hostc & ICH9_SMB_HOSTC_HST_EN) &&
65 !(hostc & ICH9_SMB_HOSTC_I2C_EN)) {
66 memory_region_set_enabled(&s->smb.io, true);
67 } else {
68 memory_region_set_enabled(&s->smb.io, false);
69 }
70 }
71 }
72
73 static int ich9_smbus_initfn(PCIDevice *d)
74 {
75 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
76
77 /* TODO? D31IP.SMIP in chipset configuration space */
78 pci_config_set_interrupt_pin(d->config, 0x01); /* interrupt pin 1 */
79
80 pci_set_byte(d->config + ICH9_SMB_HOSTC, 0);
81 /* TODO bar0, bar1: 64bit BAR support*/
82
83 pm_smbus_init(&d->qdev, &s->smb);
84 pci_register_bar(d, ICH9_SMB_SMB_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO,
85 &s->smb.io);
86 return 0;
87 }
88
89 static void ich9_smb_class_init(ObjectClass *klass, void *data)
90 {
91 DeviceClass *dc = DEVICE_CLASS(klass);
92 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
93
94 k->vendor_id = PCI_VENDOR_ID_INTEL;
95 k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6;
96 k->revision = ICH9_A2_SMB_REVISION;
97 k->class_id = PCI_CLASS_SERIAL_SMBUS;
98 dc->no_user = 1;
99 dc->vmsd = &vmstate_ich9_smbus;
100 dc->desc = "ICH9 SMBUS Bridge";
101 k->init = ich9_smbus_initfn;
102 k->config_write = ich9_smbus_write_config;
103 }
104
105 i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
106 {
107 PCIDevice *d =
108 pci_create_simple_multifunction(bus, devfn, true, TYPE_ICH9_SMB_DEVICE);
109 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
110 return s->smb.smbus;
111 }
112
113 static const TypeInfo ich9_smb_info = {
114 .name = TYPE_ICH9_SMB_DEVICE,
115 .parent = TYPE_PCI_DEVICE,
116 .instance_size = sizeof(ICH9SMBState),
117 .class_init = ich9_smb_class_init,
118 };
119
120 static void ich9_smb_register(void)
121 {
122 type_register_static(&ich9_smb_info);
123 }
124
125 type_init(ich9_smb_register);