hw/spapr.c

   1 /*
   2  * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  * Copyright (c) 2010 David Gibson, IBM Corporation.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  *
  26  */
  27 #include "sysemu.h"
  28 #include "hw.h"
  29 #include "elf.h"
  30 #include "net.h"
  31 #include "blockdev.h"
  32 #include "cpus.h"
  33 #include "kvm.h"
  34 #include "kvm_ppc.h"
  35
  36 #include "hw/boards.h"
  37 #include "hw/ppc.h"
  38 #include "hw/loader.h"
  39
  40 #include "hw/spapr.h"
  41 #include "hw/spapr_vio.h"
  42 #include "hw/spapr_pci.h"
  43 #include "hw/xics.h"
  44 #include "hw/msi.h"
  45
  46 #include "kvm.h"
  47 #include "kvm_ppc.h"
  48 #include "pci.h"
  49
  50 #include "exec-memory.h"
  51 #include "hw/usb.h"
  52
  53 #include <libfdt.h>
  54
  55 /* SLOF memory layout:
  56  *
  57  * SLOF raw image loaded at 0, copies its romfs right below the flat
  58  * device-tree, then position SLOF itself 31M below that
  59  *
  60  * So we set FW_OVERHEAD to 40MB which should account for all of that
  61  * and more
  62  *
  63  * We load our kernel at 4M, leaving space for SLOF initial image
  64  */
  65 #define FDT_MAX_SIZE            0x10000
  66 #define RTAS_MAX_SIZE           0x10000
  67 #define FW_MAX_SIZE             0x400000
  68 #define FW_FILE_NAME            "slof.bin"
  69 #define FW_OVERHEAD             0x2800000
  70 #define KERNEL_LOAD_ADDR        FW_MAX_SIZE
  71
  72 #define MIN_RMA_SLOF            128UL
  73
  74 #define TIMEBASE_FREQ           512000000ULL
  75
  76 #define MAX_CPUS                256
  77 #define XICS_IRQS               1024
  78
  79 #define SPAPR_PCI_BUID          0x800000020000001ULL
  80 #define SPAPR_PCI_MEM_WIN_ADDR  (0x10000000000ULL + 0xA0000000)
  81 #define SPAPR_PCI_MEM_WIN_SIZE  0x20000000
  82 #define SPAPR_PCI_IO_WIN_ADDR   (0x10000000000ULL + 0x80000000)
  83 #define SPAPR_PCI_MSI_WIN_ADDR  (0x10000000000ULL + 0x90000000)
  84
  85 #define PHANDLE_XICP            0x00001111
  86
  87 #define HTAB_SIZE(spapr)        (1ULL << ((spapr)->htab_shift))
  88
  89 sPAPREnvironment *spapr;
  90
  91 int spapr_allocate_irq(int hint, bool lsi)
  92 {
  93     int irq;
  94
  95     if (hint) {
  96         irq = hint;
  97         /* FIXME: we should probably check for collisions somehow */
  98     } else {
  99         irq = spapr->next_irq++;
 100     }
 101
 102     /* Configure irq type */
 103     if (!xics_get_qirq(spapr->icp, irq)) {
 104         return 0;
 105     }
 106
 107     xics_set_irq_type(spapr->icp, irq, lsi);
 108
 109     return irq;
 110 }
 111
 112 /* Allocate block of consequtive IRQs, returns a number of the first */
 113 int spapr_allocate_irq_block(int num, bool lsi)
 114 {
 115     int first = -1;
 116     int i;
 117
 118     for (i = 0; i < num; ++i) {
 119         int irq;
 120
 121         irq = spapr_allocate_irq(0, lsi);
 122         if (!irq) {
 123             return -1;
 124         }
 125
 126         if (0 == i) {
 127             first = irq;
 128         }
 129
 130         /* If the above doesn't create a consecutive block then that's
 131          * an internal bug */
 132         assert(irq == (first + i));
 133     }
 134
 135     return first;
 136 }
 137
 138 static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr)
 139 {
 140     int ret = 0, offset;
 141     CPUPPCState *env;
 142     char cpu_model[32];
 143     int smt = kvmppc_smt_threads();
 144     uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
 145
 146     assert(spapr->cpu_model);
 147
 148     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 149         uint32_t associativity[] = {cpu_to_be32(0x5),
 150                                     cpu_to_be32(0x0),
 151                                     cpu_to_be32(0x0),
 152                                     cpu_to_be32(0x0),
 153                                     cpu_to_be32(env->numa_node),
 154                                     cpu_to_be32(env->cpu_index)};
 155
 156         if ((env->cpu_index % smt) != 0) {
 157             continue;
 158         }
 159
 160         snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model,
 161                  env->cpu_index);
 162
 163         offset = fdt_path_offset(fdt, cpu_model);
 164         if (offset < 0) {
 165             return offset;
 166         }
 167
 168         if (nb_numa_nodes > 1) {
 169             ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
 170                               sizeof(associativity));
 171             if (ret < 0) {
 172                 return ret;
 173             }
 174         }
 175
 176         ret = fdt_setprop(fdt, offset, "ibm,pft-size",
 177                           pft_size_prop, sizeof(pft_size_prop));
 178         if (ret < 0) {
 179             return ret;
 180         }
 181     }
 182     return ret;
 183 }
 184
 185
 186 static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
 187                                      size_t maxsize)
 188 {
 189     size_t maxcells = maxsize / sizeof(uint32_t);
 190     int i, j, count;
 191     uint32_t *p = prop;
 192
 193     for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) {
 194         struct ppc_one_seg_page_size *sps = &env->sps.sps[i];
 195
 196         if (!sps->page_shift) {
 197             break;
 198         }
 199         for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) {
 200             if (sps->enc[count].page_shift == 0) {
 201                 break;
 202             }
 203         }
 204         if ((p - prop) >= (maxcells - 3 - count * 2)) {
 205             break;
 206         }
 207         *(p++) = cpu_to_be32(sps->page_shift);
 208         *(p++) = cpu_to_be32(sps->slb_enc);
 209         *(p++) = cpu_to_be32(count);
 210         for (j = 0; j < count; j++) {
 211             *(p++) = cpu_to_be32(sps->enc[j].page_shift);
 212             *(p++) = cpu_to_be32(sps->enc[j].pte_enc);
 213         }
 214     }
 215
 216     return (p - prop) * sizeof(uint32_t);
 217 }
 218
 219 #define _FDT(exp) \
 220     do { \
 221         int ret = (exp);                                           \
 222         if (ret < 0) {                                             \
 223             fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
 224                     #exp, fdt_strerror(ret));                      \
 225             exit(1);                                               \
 226         }                                                          \
 227     } while (0)
 228
 229
 230 static void *spapr_create_fdt_skel(const char *cpu_model,
 231                                    hwaddr initrd_base,
 232                                    hwaddr initrd_size,
 233                                    hwaddr kernel_size,
 234                                    const char *boot_device,
 235                                    const char *kernel_cmdline)
 236 {
 237     void *fdt;
 238     CPUPPCState *env;
 239     uint32_t start_prop = cpu_to_be32(initrd_base);
 240     uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
 241     char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
 242         "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
 243     char qemu_hypertas_prop[] = "hcall-memop1";
 244     uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
 245     uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
 246     char *modelname;
 247     int i, smt = kvmppc_smt_threads();
 248     unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
 249
 250     fdt = g_malloc0(FDT_MAX_SIZE);
 251     _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
 252
 253     if (kernel_size) {
 254         _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size)));
 255     }
 256     if (initrd_size) {
 257         _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size)));
 258     }
 259     _FDT((fdt_finish_reservemap(fdt)));
 260
 261     /* Root node */
 262     _FDT((fdt_begin_node(fdt, "")));
 263     _FDT((fdt_property_string(fdt, "device_type", "chrp")));
 264     _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
 265
 266     _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
 267     _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
 268
 269     /* /chosen */
 270     _FDT((fdt_begin_node(fdt, "chosen")));
 271
 272     /* Set Form1_affinity */
 273     _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5))));
 274
 275     _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
 276     _FDT((fdt_property(fdt, "linux,initrd-start",
 277                        &start_prop, sizeof(start_prop))));
 278     _FDT((fdt_property(fdt, "linux,initrd-end",
 279                        &end_prop, sizeof(end_prop))));
 280     if (kernel_size) {
 281         uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
 282                               cpu_to_be64(kernel_size) };
 283
 284         _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop))));
 285     }
 286     _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
 287     _FDT((fdt_property_cell(fdt, "qemu,graphic-width", graphic_width)));
 288     _FDT((fdt_property_cell(fdt, "qemu,graphic-height", graphic_height)));
 289     _FDT((fdt_property_cell(fdt, "qemu,graphic-depth", graphic_depth)));
 290
 291     _FDT((fdt_end_node(fdt)));
 292
 293     /* cpus */
 294     _FDT((fdt_begin_node(fdt, "cpus")));
 295
 296     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 297     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 298
 299     modelname = g_strdup(cpu_model);
 300
 301     for (i = 0; i < strlen(modelname); i++) {
 302         modelname[i] = toupper(modelname[i]);
 303     }
 304
 305     /* This is needed during FDT finalization */
 306     spapr->cpu_model = g_strdup(modelname);
 307
 308     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 309         int index = env->cpu_index;
 310         uint32_t servers_prop[smp_threads];
 311         uint32_t gservers_prop[smp_threads * 2];
 312         char *nodename;
 313         uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
 314                            0xffffffff, 0xffffffff};
 315         uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
 316         uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
 317         uint32_t page_sizes_prop[64];
 318         size_t page_sizes_prop_size;
 319
 320         if ((index % smt) != 0) {
 321             continue;
 322         }
 323
 324         if (asprintf(&nodename, "%s@%x", modelname, index) < 0) {
 325             fprintf(stderr, "Allocation failure\n");
 326             exit(1);
 327         }
 328
 329         _FDT((fdt_begin_node(fdt, nodename)));
 330
 331         free(nodename);
 332
 333         _FDT((fdt_property_cell(fdt, "reg", index)));
 334         _FDT((fdt_property_string(fdt, "device_type", "cpu")));
 335
 336         _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
 337         _FDT((fdt_property_cell(fdt, "dcache-block-size",
 338                                 env->dcache_line_size)));
 339         _FDT((fdt_property_cell(fdt, "icache-block-size",
 340                                 env->icache_line_size)));
 341         _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
 342         _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
 343         _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
 344         _FDT((fdt_property_string(fdt, "status", "okay")));
 345         _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
 346
 347         /* Build interrupt servers and gservers properties */
 348         for (i = 0; i < smp_threads; i++) {
 349             servers_prop[i] = cpu_to_be32(index + i);
 350             /* Hack, direct the group queues back to cpu 0 */
 351             gservers_prop[i*2] = cpu_to_be32(index + i);
 352             gservers_prop[i*2 + 1] = 0;
 353         }
 354         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
 355                            servers_prop, sizeof(servers_prop))));
 356         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
 357                            gservers_prop, sizeof(gservers_prop))));
 358
 359         if (env->mmu_model & POWERPC_MMU_1TSEG) {
 360             _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
 361                                segs, sizeof(segs))));
 362         }
 363
 364         /* Advertise VMX/VSX (vector extensions) if available
 365          *   0 / no property == no vector extensions
 366          *   1               == VMX / Altivec available
 367          *   2               == VSX available */
 368         if (env->insns_flags & PPC_ALTIVEC) {
 369             uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;
 370
 371             _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
 372         }
 373
 374         /* Advertise DFP (Decimal Floating Point) if available
 375          *   0 / no property == no DFP
 376          *   1               == DFP available */
 377         if (env->insns_flags2 & PPC2_DFP) {
 378             _FDT((fdt_property_cell(fdt, "ibm,dfp", 1)));
 379         }
 380
 381         page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop,
 382                                                       sizeof(page_sizes_prop));
 383         if (page_sizes_prop_size) {
 384             _FDT((fdt_property(fdt, "ibm,segment-page-sizes",
 385                                page_sizes_prop, page_sizes_prop_size)));
 386         }
 387
 388         _FDT((fdt_end_node(fdt)));
 389     }
 390
 391     g_free(modelname);
 392
 393     _FDT((fdt_end_node(fdt)));
 394
 395     /* RTAS */
 396     _FDT((fdt_begin_node(fdt, "rtas")));
 397
 398     _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
 399                        sizeof(hypertas_prop))));
 400     _FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop,
 401                        sizeof(qemu_hypertas_prop))));
 402
 403     _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
 404         refpoints, sizeof(refpoints))));
 405
 406     _FDT((fdt_end_node(fdt)));
 407
 408     /* interrupt controller */
 409     _FDT((fdt_begin_node(fdt, "interrupt-controller")));
 410
 411     _FDT((fdt_property_string(fdt, "device_type",
 412                               "PowerPC-External-Interrupt-Presentation")));
 413     _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
 414     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 415     _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
 416                        interrupt_server_ranges_prop,
 417                        sizeof(interrupt_server_ranges_prop))));
 418     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
 419     _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
 420     _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
 421
 422     _FDT((fdt_end_node(fdt)));
 423
 424     /* vdevice */
 425     _FDT((fdt_begin_node(fdt, "vdevice")));
 426
 427     _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
 428     _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
 429     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 430     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 431     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
 432     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 433
 434     _FDT((fdt_end_node(fdt)));
 435
 436     _FDT((fdt_end_node(fdt))); /* close root node */
 437     _FDT((fdt_finish(fdt)));
 438
 439     return fdt;
 440 }
 441
 442 static int spapr_populate_memory(sPAPREnvironment *spapr, void *fdt)
 443 {
 444     uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
 445                                 cpu_to_be32(0x0), cpu_to_be32(0x0),
 446                                 cpu_to_be32(0x0)};
 447     char mem_name[32];
 448     hwaddr node0_size, mem_start;
 449     uint64_t mem_reg_property[2];
 450     int i, off;
 451
 452     /* memory node(s) */
 453     node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size;
 454     if (spapr->rma_size > node0_size) {
 455         spapr->rma_size = node0_size;
 456     }
 457
 458     /* RMA */
 459     mem_reg_property[0] = 0;
 460     mem_reg_property[1] = cpu_to_be64(spapr->rma_size);
 461     off = fdt_add_subnode(fdt, 0, "memory@0");
 462     _FDT(off);
 463     _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
 464     _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
 465                       sizeof(mem_reg_property))));
 466     _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
 467                       sizeof(associativity))));
 468
 469     /* RAM: Node 0 */
 470     if (node0_size > spapr->rma_size) {
 471         mem_reg_property[0] = cpu_to_be64(spapr->rma_size);
 472         mem_reg_property[1] = cpu_to_be64(node0_size - spapr->rma_size);
 473
 474         sprintf(mem_name, "memory@" TARGET_FMT_lx, spapr->rma_size);
 475         off = fdt_add_subnode(fdt, 0, mem_name);
 476         _FDT(off);
 477         _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
 478         _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
 479                           sizeof(mem_reg_property))));
 480         _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
 481                           sizeof(associativity))));
 482     }
 483
 484     /* RAM: Node 1 and beyond */
 485     mem_start = node0_size;
 486     for (i = 1; i < nb_numa_nodes; i++) {
 487         mem_reg_property[0] = cpu_to_be64(mem_start);
 488         mem_reg_property[1] = cpu_to_be64(node_mem[i]);
 489         associativity[3] = associativity[4] = cpu_to_be32(i);
 490         sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
 491         off = fdt_add_subnode(fdt, 0, mem_name);
 492         _FDT(off);
 493         _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
 494         _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
 495                           sizeof(mem_reg_property))));
 496         _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
 497                           sizeof(associativity))));
 498         mem_start += node_mem[i];
 499     }
 500
 501     return 0;
 502 }
 503
 504 static void spapr_finalize_fdt(sPAPREnvironment *spapr,
 505                                hwaddr fdt_addr,
 506                                hwaddr rtas_addr,
 507                                hwaddr rtas_size)
 508 {
 509     int ret;
 510     void *fdt;
 511     sPAPRPHBState *phb;
 512
 513     fdt = g_malloc(FDT_MAX_SIZE);
 514
 515     /* open out the base tree into a temp buffer for the final tweaks */
 516     _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
 517
 518     ret = spapr_populate_memory(spapr, fdt);
 519     if (ret < 0) {
 520         fprintf(stderr, "couldn't setup memory nodes in fdt\n");
 521         exit(1);
 522     }
 523
 524     ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
 525     if (ret < 0) {
 526         fprintf(stderr, "couldn't setup vio devices in fdt\n");
 527         exit(1);
 528     }
 529
 530     QLIST_FOREACH(phb, &spapr->phbs, list) {
 531         ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
 532     }
 533
 534     if (ret < 0) {
 535         fprintf(stderr, "couldn't setup PCI devices in fdt\n");
 536         exit(1);
 537     }
 538
 539     /* RTAS */
 540     ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
 541     if (ret < 0) {
 542         fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
 543     }
 544
 545     /* Advertise NUMA via ibm,associativity */
 546     ret = spapr_fixup_cpu_dt(fdt, spapr);
 547     if (ret < 0) {
 548         fprintf(stderr, "Couldn't finalize CPU device tree properties\n");
 549     }
 550
 551     if (!spapr->has_graphics) {
 552         spapr_populate_chosen_stdout(fdt, spapr->vio_bus);
 553     }
 554
 555     _FDT((fdt_pack(fdt)));
 556
 557     if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
 558         hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
 559                  fdt_totalsize(fdt), FDT_MAX_SIZE);
 560         exit(1);
 561     }
 562
 563     cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
 564
 565     g_free(fdt);
 566 }
 567
 568 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 569 {
 570     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 571 }
 572
 573 static void emulate_spapr_hypercall(CPUPPCState *env)
 574 {
 575     if (msr_pr) {
 576         hcall_dprintf("Hypercall made with MSR[PR]=1\n");
 577         env->gpr[3] = H_PRIVILEGE;
 578     } else {
 579         env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
 580     }
 581 }
 582
 583 static void spapr_reset_htab(sPAPREnvironment *spapr)
 584 {
 585     long shift;
 586
 587     /* allocate hash page table.  For now we always make this 16mb,
 588      * later we should probably make it scale to the size of guest
 589      * RAM */
 590
 591     shift = kvmppc_reset_htab(spapr->htab_shift);
 592
 593     if (shift > 0) {
 594         /* Kernel handles htab, we don't need to allocate one */
 595         spapr->htab_shift = shift;
 596     } else {
 597         if (!spapr->htab) {
 598             /* Allocate an htab if we don't yet have one */
 599             spapr->htab = qemu_memalign(HTAB_SIZE(spapr), HTAB_SIZE(spapr));
 600         }
 601
 602         /* And clear it */
 603         memset(spapr->htab, 0, HTAB_SIZE(spapr));
 604     }
 605
 606     /* Update the RMA size if necessary */
 607     if (spapr->vrma_adjust) {
 608         spapr->rma_size = kvmppc_rma_size(ram_size, spapr->htab_shift);
 609     }
 610 }
 611
 612 static void ppc_spapr_reset(void)
 613 {
 614     /* Reset the hash table & recalc the RMA */
 615     spapr_reset_htab(spapr);
 616
 617     qemu_devices_reset();
 618
 619     /* Load the fdt */
 620     spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
 621                        spapr->rtas_size);
 622
 623     /* Set up the entry state */
 624     first_cpu->gpr[3] = spapr->fdt_addr;
 625     first_cpu->gpr[5] = 0;
 626     first_cpu->halted = 0;
 627     first_cpu->nip = spapr->entry_point;
 628
 629 }
 630
 631 static void spapr_cpu_reset(void *opaque)
 632 {
 633     PowerPCCPU *cpu = opaque;
 634     CPUPPCState *env = &cpu->env;
 635
 636     cpu_reset(CPU(cpu));
 637
 638     /* All CPUs start halted.  CPU0 is unhalted from the machine level
 639      * reset code and the rest are explicitly started up by the guest
 640      * using an RTAS call */
 641     env->halted = 1;
 642
 643     env->spr[SPR_HIOR] = 0;
 644
 645     env->external_htab = spapr->htab;
 646     env->htab_base = -1;
 647     env->htab_mask = HTAB_SIZE(spapr) - 1;
 648     env->spr[SPR_SDR1] = (unsigned long)spapr->htab |
 649         (spapr->htab_shift - 18);
 650 }
 651
 652 /* Returns whether we want to use VGA or not */
 653 static int spapr_vga_init(PCIBus *pci_bus)
 654 {
 655     switch (vga_interface_type) {
 656     case VGA_NONE:
 657     case VGA_STD:
 658         return pci_vga_init(pci_bus) != NULL;
 659     default:
 660         fprintf(stderr, "This vga model is not supported,"
 661                 "currently it only supports -vga std\n");
 662         exit(0);
 663         break;
 664     }
 665 }
 666
 667 /* pSeries LPAR / sPAPR hardware init */
 668 static void ppc_spapr_init(QEMUMachineInitArgs *args)
 669 {
 670     ram_addr_t ram_size = args->ram_size;
 671     const char *cpu_model = args->cpu_model;
 672     const char *kernel_filename = args->kernel_filename;
 673     const char *kernel_cmdline = args->kernel_cmdline;
 674     const char *initrd_filename = args->initrd_filename;
 675     const char *boot_device = args->boot_device;
 676     PowerPCCPU *cpu;
 677     CPUPPCState *env;
 678     PCIHostState *phb;
 679     int i;
 680     MemoryRegion *sysmem = get_system_memory();
 681     MemoryRegion *ram = g_new(MemoryRegion, 1);
 682     hwaddr rma_alloc_size;
 683     uint32_t initrd_base = 0;
 684     long kernel_size = 0, initrd_size = 0;
 685     long load_limit, rtas_limit, fw_size;
 686     char *filename;
 687
 688     msi_supported = true;
 689
 690     spapr = g_malloc0(sizeof(*spapr));
 691     QLIST_INIT(&spapr->phbs);
 692
 693     cpu_ppc_hypercall = emulate_spapr_hypercall;
 694
 695     /* Allocate RMA if necessary */
 696     rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
 697
 698     if (rma_alloc_size == -1) {
 699         hw_error("qemu: Unable to create RMA\n");
 700         exit(1);
 701     }
 702
 703     if (rma_alloc_size && (rma_alloc_size < ram_size)) {
 704         spapr->rma_size = rma_alloc_size;
 705     } else {
 706         spapr->rma_size = ram_size;
 707
 708         /* With KVM, we don't actually know whether KVM supports an
 709          * unbounded RMA (PR KVM) or is limited by the hash table size
 710          * (HV KVM using VRMA), so we always assume the latter
 711          *
 712          * In that case, we also limit the initial allocations for RTAS
 713          * etc... to 256M since we have no way to know what the VRMA size
 714          * is going to be as it depends on the size of the hash table
 715          * isn't determined yet.
 716          */
 717         if (kvm_enabled()) {
 718             spapr->vrma_adjust = 1;
 719             spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
 720         }
 721     }
 722
 723     /* We place the device tree and RTAS just below either the top of the RMA,
 724      * or just below 2GB, whichever is lowere, so that it can be
 725      * processed with 32-bit real mode code if necessary */
 726     rtas_limit = MIN(spapr->rma_size, 0x80000000);
 727     spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE;
 728     spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE;
 729     load_limit = spapr->fdt_addr - FW_OVERHEAD;
 730
 731     /* We aim for a hash table of size 1/128 the size of RAM.  The
 732      * normal rule of thumb is 1/64 the size of RAM, but that's much
 733      * more than needed for the Linux guests we support. */
 734     spapr->htab_shift = 18; /* Minimum architected size */
 735     while (spapr->htab_shift <= 46) {
 736         if ((1ULL << (spapr->htab_shift + 7)) >= ram_size) {
 737             break;
 738         }
 739         spapr->htab_shift++;
 740     }
 741
 742     /* init CPUs */
 743     if (cpu_model == NULL) {
 744         cpu_model = kvm_enabled() ? "host" : "POWER7";
 745     }
 746     for (i = 0; i < smp_cpus; i++) {
 747         cpu = cpu_ppc_init(cpu_model);
 748         if (cpu == NULL) {
 749             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 750             exit(1);
 751         }
 752         env = &cpu->env;
 753
 754         /* Set time-base frequency to 512 MHz */
 755         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
 756
 757         /* PAPR always has exception vectors in RAM not ROM */
 758         env->hreset_excp_prefix = 0;
 759
 760         /* Tell KVM that we're in PAPR mode */
 761         if (kvm_enabled()) {
 762             kvmppc_set_papr(env);
 763         }
 764
 765         qemu_register_reset(spapr_cpu_reset, cpu);
 766     }
 767
 768     /* allocate RAM */
 769     spapr->ram_limit = ram_size;
 770     if (spapr->ram_limit > rma_alloc_size) {
 771         ram_addr_t nonrma_base = rma_alloc_size;
 772         ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
 773
 774         memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
 775         vmstate_register_ram_global(ram);
 776         memory_region_add_subregion(sysmem, nonrma_base, ram);
 777     }
 778
 779     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
 780     spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
 781                                            rtas_limit - spapr->rtas_addr);
 782     if (spapr->rtas_size < 0) {
 783         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 784         exit(1);
 785     }
 786     if (spapr->rtas_size > RTAS_MAX_SIZE) {
 787         hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
 788                  spapr->rtas_size, RTAS_MAX_SIZE);
 789         exit(1);
 790     }
 791     g_free(filename);
 792
 793
 794     /* Set up Interrupt Controller */
 795     spapr->icp = xics_system_init(XICS_IRQS);
 796     spapr->next_irq = 16;
 797
 798     /* Set up IOMMU */
 799     spapr_iommu_init();
 800
 801     /* Set up VIO bus */
 802     spapr->vio_bus = spapr_vio_bus_init();
 803
 804     for (i = 0; i < MAX_SERIAL_PORTS; i++) {
 805         if (serial_hds[i]) {
 806             spapr_vty_create(spapr->vio_bus, serial_hds[i]);
 807         }
 808     }
 809
 810     /* Set up PCI */
 811     spapr_pci_rtas_init();
 812
 813     spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
 814                      SPAPR_PCI_MEM_WIN_ADDR,
 815                      SPAPR_PCI_MEM_WIN_SIZE,
 816                      SPAPR_PCI_IO_WIN_ADDR,
 817                      SPAPR_PCI_MSI_WIN_ADDR);
 818     phb = PCI_HOST_BRIDGE(QLIST_FIRST(&spapr->phbs));
 819
 820     for (i = 0; i < nb_nics; i++) {
 821         NICInfo *nd = &nd_table[i];
 822
 823         if (!nd->model) {
 824             nd->model = g_strdup("ibmveth");
 825         }
 826
 827         if (strcmp(nd->model, "ibmveth") == 0) {
 828             spapr_vlan_create(spapr->vio_bus, nd);
 829         } else {
 830             pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
 831         }
 832     }
 833
 834     for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
 835         spapr_vscsi_create(spapr->vio_bus);
 836     }
 837
 838     /* Graphics */
 839     if (spapr_vga_init(phb->bus)) {
 840         spapr->has_graphics = true;
 841     }
 842
 843     if (usb_enabled) {
 844         pci_create_simple(phb->bus, -1, "pci-ohci");
 845         if (spapr->has_graphics) {
 846             usbdevice_create("keyboard");
 847             usbdevice_create("mouse");
 848         }
 849     }
 850
 851     if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
 852         fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
 853                 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
 854         exit(1);
 855     }
 856
 857     if (kernel_filename) {
 858         uint64_t lowaddr = 0;
 859
 860         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 861                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 862         if (kernel_size < 0) {
 863             kernel_size = load_image_targphys(kernel_filename,
 864                                               KERNEL_LOAD_ADDR,
 865                                               load_limit - KERNEL_LOAD_ADDR);
 866         }
 867         if (kernel_size < 0) {
 868             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 869                     kernel_filename);
 870             exit(1);
 871         }
 872
 873         /* load initrd */
 874         if (initrd_filename) {
 875             /* Try to locate the initrd in the gap between the kernel
 876              * and the firmware. Add a bit of space just in case
 877              */
 878             initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff;
 879             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 880                                               load_limit - initrd_base);
 881             if (initrd_size < 0) {
 882                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 883                         initrd_filename);
 884                 exit(1);
 885             }
 886         } else {
 887             initrd_base = 0;
 888             initrd_size = 0;
 889         }
 890     }
 891
 892     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME);
 893     fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
 894     if (fw_size < 0) {
 895         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 896         exit(1);
 897     }
 898     g_free(filename);
 899
 900     spapr->entry_point = 0x100;
 901
 902     /* Prepare the device tree */
 903     spapr->fdt_skel = spapr_create_fdt_skel(cpu_model,
 904                                             initrd_base, initrd_size,
 905                                             kernel_size,
 906                                             boot_device, kernel_cmdline);
 907     assert(spapr->fdt_skel != NULL);
 908 }
 909
 910 static QEMUMachine spapr_machine = {
 911     .name = "pseries",
 912     .desc = "pSeries Logical Partition (PAPR compliant)",
 913     .init = ppc_spapr_init,
 914     .reset = ppc_spapr_reset,
 915     .max_cpus = MAX_CPUS,
 916     .no_parallel = 1,
 917     .use_scsi = 1,
 918 };
 919
 920 static void spapr_machine_init(void)
 921 {
 922     qemu_register_machine(&spapr_machine);
 923 }
 924
 925 machine_init(spapr_machine_init);