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1 /*
2 * TI TWL92230C energy-management companion device for the OMAP24xx.
3 * Aka. Menelaus (N4200 MENELAUS1_V2.2)
4 *
5 * Copyright (C) 2008 Nokia Corporation
6 * Written by Andrzej Zaborowski <andrew@openedhand.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 or
11 * (at your option) version 3 of the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 #include "hw.h"
25 #include "qemu-timer.h"
26 #include "i2c.h"
27 #include "sysemu.h"
28 #include "console.h"
29
30 #define VERBOSE 1
31
32 struct menelaus_s {
33 i2c_slave i2c;
34 qemu_irq irq;
35
36 int firstbyte;
37 uint8_t reg;
38
39 uint8_t vcore[5];
40 uint8_t dcdc[3];
41 uint8_t ldo[8];
42 uint8_t sleep[2];
43 uint8_t osc;
44 uint8_t detect;
45 uint16_t mask;
46 uint16_t status;
47 uint8_t dir;
48 uint8_t inputs;
49 uint8_t outputs;
50 uint8_t bbsms;
51 uint8_t pull[4];
52 uint8_t mmc_ctrl[3];
53 uint8_t mmc_debounce;
54 struct {
55 uint8_t ctrl;
56 uint16_t comp;
57 QEMUTimer *hz;
58 int64_t next;
59 struct tm tm;
60 struct tm new;
61 struct tm alm;
62 int sec_offset;
63 int alm_sec;
64 int next_comp;
65 struct tm *(*gettime)(const time_t *timep, struct tm *result);
66 } rtc;
67 qemu_irq handler[3];
68 qemu_irq *in;
69 int pwrbtn_state;
70 qemu_irq pwrbtn;
71 };
72
73 static inline void menelaus_update(struct menelaus_s *s)
74 {
75 qemu_set_irq(s->irq, s->status & ~s->mask);
76 }
77
78 static inline void menelaus_rtc_start(struct menelaus_s *s)
79 {
80 s->rtc.next =+ qemu_get_clock(rt_clock);
81 qemu_mod_timer(s->rtc.hz, s->rtc.next);
82 }
83
84 static inline void menelaus_rtc_stop(struct menelaus_s *s)
85 {
86 qemu_del_timer(s->rtc.hz);
87 s->rtc.next =- qemu_get_clock(rt_clock);
88 if (s->rtc.next < 1)
89 s->rtc.next = 1;
90 }
91
92 static void menelaus_rtc_update(struct menelaus_s *s)
93 {
94 qemu_get_timedate(&s->rtc.tm, s->rtc.sec_offset);
95 }
96
97 static void menelaus_alm_update(struct menelaus_s *s)
98 {
99 if ((s->rtc.ctrl & 3) == 3)
100 s->rtc.alm_sec = qemu_timedate_diff(&s->rtc.alm) - s->rtc.sec_offset;
101 }
102
103 static void menelaus_rtc_hz(void *opaque)
104 {
105 struct menelaus_s *s = (struct menelaus_s *) opaque;
106
107 s->rtc.next_comp --;
108 s->rtc.alm_sec --;
109 s->rtc.next += 1000;
110 qemu_mod_timer(s->rtc.hz, s->rtc.next);
111 if ((s->rtc.ctrl >> 3) & 3) { /* EVERY */
112 menelaus_rtc_update(s);
113 if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec)
114 s->status |= 1 << 8; /* RTCTMR */
115 else if (((s->rtc.ctrl >> 3) & 3) == 2 && !s->rtc.tm.tm_min)
116 s->status |= 1 << 8; /* RTCTMR */
117 else if (!s->rtc.tm.tm_hour)
118 s->status |= 1 << 8; /* RTCTMR */
119 } else
120 s->status |= 1 << 8; /* RTCTMR */
121 if ((s->rtc.ctrl >> 1) & 1) { /* RTC_AL_EN */
122 if (s->rtc.alm_sec == 0)
123 s->status |= 1 << 9; /* RTCALM */
124 /* TODO: wake-up */
125 }
126 if (s->rtc.next_comp <= 0) {
127 s->rtc.next -= muldiv64((int16_t) s->rtc.comp, 1000, 0x8000);
128 s->rtc.next_comp = 3600;
129 }
130 menelaus_update(s);
131 }
132
133 void menelaus_reset(i2c_slave *i2c)
134 {
135 struct menelaus_s *s = (struct menelaus_s *) i2c;
136 s->reg = 0x00;
137
138 s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check! */
139 s->vcore[1] = 0x05;
140 s->vcore[2] = 0x02;
141 s->vcore[3] = 0x0c;
142 s->vcore[4] = 0x03;
143 s->dcdc[0] = 0x33; /* Depends on wiring */
144 s->dcdc[1] = 0x03;
145 s->dcdc[2] = 0x00;
146 s->ldo[0] = 0x95;
147 s->ldo[1] = 0x7e;
148 s->ldo[2] = 0x00;
149 s->ldo[3] = 0x00; /* Depends on wiring */
150 s->ldo[4] = 0x03; /* Depends on wiring */
151 s->ldo[5] = 0x00;
152 s->ldo[6] = 0x00;
153 s->ldo[7] = 0x00;
154 s->sleep[0] = 0x00;
155 s->sleep[1] = 0x00;
156 s->osc = 0x01;
157 s->detect = 0x09;
158 s->mask = 0x0fff;
159 s->status = 0;
160 s->dir = 0x07;
161 s->outputs = 0x00;
162 s->bbsms = 0x00;
163 s->pull[0] = 0x00;
164 s->pull[1] = 0x00;
165 s->pull[2] = 0x00;
166 s->pull[3] = 0x00;
167 s->mmc_ctrl[0] = 0x03;
168 s->mmc_ctrl[1] = 0xc0;
169 s->mmc_ctrl[2] = 0x00;
170 s->mmc_debounce = 0x05;
171
172 if (s->rtc.ctrl & 1)
173 menelaus_rtc_stop(s);
174 s->rtc.ctrl = 0x00;
175 s->rtc.comp = 0x0000;
176 s->rtc.next = 1000;
177 s->rtc.sec_offset = 0;
178 s->rtc.next_comp = 1800;
179 s->rtc.alm_sec = 1800;
180 s->rtc.alm.tm_sec = 0x00;
181 s->rtc.alm.tm_min = 0x00;
182 s->rtc.alm.tm_hour = 0x00;
183 s->rtc.alm.tm_mday = 0x01;
184 s->rtc.alm.tm_mon = 0x00;
185 s->rtc.alm.tm_year = 2004;
186 menelaus_update(s);
187 }
188
189 static inline uint8_t to_bcd(int val)
190 {
191 return ((val / 10) << 4) | (val % 10);
192 }
193
194 static inline int from_bcd(uint8_t val)
195 {
196 return ((val >> 4) * 10) + (val & 0x0f);
197 }
198
199 static void menelaus_gpio_set(void *opaque, int line, int level)
200 {
201 struct menelaus_s *s = (struct menelaus_s *) opaque;
202
203 /* No interrupt generated */
204 s->inputs &= ~(1 << line);
205 s->inputs |= level << line;
206 }
207
208 static void menelaus_pwrbtn_set(void *opaque, int line, int level)
209 {
210 struct menelaus_s *s = (struct menelaus_s *) opaque;
211
212 if (!s->pwrbtn_state && level) {
213 s->status |= 1 << 11; /* PSHBTN */
214 menelaus_update(s);
215 }
216 s->pwrbtn_state = level;
217 }
218
219 #define MENELAUS_REV 0x01
220 #define MENELAUS_VCORE_CTRL1 0x02
221 #define MENELAUS_VCORE_CTRL2 0x03
222 #define MENELAUS_VCORE_CTRL3 0x04
223 #define MENELAUS_VCORE_CTRL4 0x05
224 #define MENELAUS_VCORE_CTRL5 0x06
225 #define MENELAUS_DCDC_CTRL1 0x07
226 #define MENELAUS_DCDC_CTRL2 0x08
227 #define MENELAUS_DCDC_CTRL3 0x09
228 #define MENELAUS_LDO_CTRL1 0x0a
229 #define MENELAUS_LDO_CTRL2 0x0b
230 #define MENELAUS_LDO_CTRL3 0x0c
231 #define MENELAUS_LDO_CTRL4 0x0d
232 #define MENELAUS_LDO_CTRL5 0x0e
233 #define MENELAUS_LDO_CTRL6 0x0f
234 #define MENELAUS_LDO_CTRL7 0x10
235 #define MENELAUS_LDO_CTRL8 0x11
236 #define MENELAUS_SLEEP_CTRL1 0x12
237 #define MENELAUS_SLEEP_CTRL2 0x13
238 #define MENELAUS_DEVICE_OFF 0x14
239 #define MENELAUS_OSC_CTRL 0x15
240 #define MENELAUS_DETECT_CTRL 0x16
241 #define MENELAUS_INT_MASK1 0x17
242 #define MENELAUS_INT_MASK2 0x18
243 #define MENELAUS_INT_STATUS1 0x19
244 #define MENELAUS_INT_STATUS2 0x1a
245 #define MENELAUS_INT_ACK1 0x1b
246 #define MENELAUS_INT_ACK2 0x1c
247 #define MENELAUS_GPIO_CTRL 0x1d
248 #define MENELAUS_GPIO_IN 0x1e
249 #define MENELAUS_GPIO_OUT 0x1f
250 #define MENELAUS_BBSMS 0x20
251 #define MENELAUS_RTC_CTRL 0x21
252 #define MENELAUS_RTC_UPDATE 0x22
253 #define MENELAUS_RTC_SEC 0x23
254 #define MENELAUS_RTC_MIN 0x24
255 #define MENELAUS_RTC_HR 0x25
256 #define MENELAUS_RTC_DAY 0x26
257 #define MENELAUS_RTC_MON 0x27
258 #define MENELAUS_RTC_YR 0x28
259 #define MENELAUS_RTC_WKDAY 0x29
260 #define MENELAUS_RTC_AL_SEC 0x2a
261 #define MENELAUS_RTC_AL_MIN 0x2b
262 #define MENELAUS_RTC_AL_HR 0x2c
263 #define MENELAUS_RTC_AL_DAY 0x2d
264 #define MENELAUS_RTC_AL_MON 0x2e
265 #define MENELAUS_RTC_AL_YR 0x2f
266 #define MENELAUS_RTC_COMP_MSB 0x30
267 #define MENELAUS_RTC_COMP_LSB 0x31
268 #define MENELAUS_S1_PULL_EN 0x32
269 #define MENELAUS_S1_PULL_DIR 0x33
270 #define MENELAUS_S2_PULL_EN 0x34
271 #define MENELAUS_S2_PULL_DIR 0x35
272 #define MENELAUS_MCT_CTRL1 0x36
273 #define MENELAUS_MCT_CTRL2 0x37
274 #define MENELAUS_MCT_CTRL3 0x38
275 #define MENELAUS_MCT_PIN_ST 0x39
276 #define MENELAUS_DEBOUNCE1 0x3a
277
278 static uint8_t menelaus_read(void *opaque, uint8_t addr)
279 {
280 struct menelaus_s *s = (struct menelaus_s *) opaque;
281 int reg = 0;
282
283 switch (addr) {
284 case MENELAUS_REV:
285 return 0x22;
286
287 case MENELAUS_VCORE_CTRL5: reg ++;
288 case MENELAUS_VCORE_CTRL4: reg ++;
289 case MENELAUS_VCORE_CTRL3: reg ++;
290 case MENELAUS_VCORE_CTRL2: reg ++;
291 case MENELAUS_VCORE_CTRL1:
292 return s->vcore[reg];
293
294 case MENELAUS_DCDC_CTRL3: reg ++;
295 case MENELAUS_DCDC_CTRL2: reg ++;
296 case MENELAUS_DCDC_CTRL1:
297 return s->dcdc[reg];
298
299 case MENELAUS_LDO_CTRL8: reg ++;
300 case MENELAUS_LDO_CTRL7: reg ++;
301 case MENELAUS_LDO_CTRL6: reg ++;
302 case MENELAUS_LDO_CTRL5: reg ++;
303 case MENELAUS_LDO_CTRL4: reg ++;
304 case MENELAUS_LDO_CTRL3: reg ++;
305 case MENELAUS_LDO_CTRL2: reg ++;
306 case MENELAUS_LDO_CTRL1:
307 return s->ldo[reg];
308
309 case MENELAUS_SLEEP_CTRL2: reg ++;
310 case MENELAUS_SLEEP_CTRL1:
311 return s->sleep[reg];
312
313 case MENELAUS_DEVICE_OFF:
314 return 0;
315
316 case MENELAUS_OSC_CTRL:
317 return s->osc | (1 << 7); /* CLK32K_GOOD */
318
319 case MENELAUS_DETECT_CTRL:
320 return s->detect;
321
322 case MENELAUS_INT_MASK1:
323 return (s->mask >> 0) & 0xff;
324 case MENELAUS_INT_MASK2:
325 return (s->mask >> 8) & 0xff;
326
327 case MENELAUS_INT_STATUS1:
328 return (s->status >> 0) & 0xff;
329 case MENELAUS_INT_STATUS2:
330 return (s->status >> 8) & 0xff;
331
332 case MENELAUS_INT_ACK1:
333 case MENELAUS_INT_ACK2:
334 return 0;
335
336 case MENELAUS_GPIO_CTRL:
337 return s->dir;
338 case MENELAUS_GPIO_IN:
339 return s->inputs | (~s->dir & s->outputs);
340 case MENELAUS_GPIO_OUT:
341 return s->outputs;
342
343 case MENELAUS_BBSMS:
344 return s->bbsms;
345
346 case MENELAUS_RTC_CTRL:
347 return s->rtc.ctrl;
348 case MENELAUS_RTC_UPDATE:
349 return 0x00;
350 case MENELAUS_RTC_SEC:
351 menelaus_rtc_update(s);
352 return to_bcd(s->rtc.tm.tm_sec);
353 case MENELAUS_RTC_MIN:
354 menelaus_rtc_update(s);
355 return to_bcd(s->rtc.tm.tm_min);
356 case MENELAUS_RTC_HR:
357 menelaus_rtc_update(s);
358 if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */
359 return to_bcd((s->rtc.tm.tm_hour % 12) + 1) |
360 (!!(s->rtc.tm.tm_hour >= 12) << 7); /* PM_nAM */
361 else
362 return to_bcd(s->rtc.tm.tm_hour);
363 case MENELAUS_RTC_DAY:
364 menelaus_rtc_update(s);
365 return to_bcd(s->rtc.tm.tm_mday);
366 case MENELAUS_RTC_MON:
367 menelaus_rtc_update(s);
368 return to_bcd(s->rtc.tm.tm_mon + 1);
369 case MENELAUS_RTC_YR:
370 menelaus_rtc_update(s);
371 return to_bcd(s->rtc.tm.tm_year - 2000);
372 case MENELAUS_RTC_WKDAY:
373 menelaus_rtc_update(s);
374 return to_bcd(s->rtc.tm.tm_wday);
375 case MENELAUS_RTC_AL_SEC:
376 return to_bcd(s->rtc.alm.tm_sec);
377 case MENELAUS_RTC_AL_MIN:
378 return to_bcd(s->rtc.alm.tm_min);
379 case MENELAUS_RTC_AL_HR:
380 if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */
381 return to_bcd((s->rtc.alm.tm_hour % 12) + 1) |
382 (!!(s->rtc.alm.tm_hour >= 12) << 7);/* AL_PM_nAM */
383 else
384 return to_bcd(s->rtc.alm.tm_hour);
385 case MENELAUS_RTC_AL_DAY:
386 return to_bcd(s->rtc.alm.tm_mday);
387 case MENELAUS_RTC_AL_MON:
388 return to_bcd(s->rtc.alm.tm_mon + 1);
389 case MENELAUS_RTC_AL_YR:
390 return to_bcd(s->rtc.alm.tm_year - 2000);
391 case MENELAUS_RTC_COMP_MSB:
392 return (s->rtc.comp >> 8) & 0xff;
393 case MENELAUS_RTC_COMP_LSB:
394 return (s->rtc.comp >> 0) & 0xff;
395
396 case MENELAUS_S1_PULL_EN:
397 return s->pull[0];
398 case MENELAUS_S1_PULL_DIR:
399 return s->pull[1];
400 case MENELAUS_S2_PULL_EN:
401 return s->pull[2];
402 case MENELAUS_S2_PULL_DIR:
403 return s->pull[3];
404
405 case MENELAUS_MCT_CTRL3: reg ++;
406 case MENELAUS_MCT_CTRL2: reg ++;
407 case MENELAUS_MCT_CTRL1:
408 return s->mmc_ctrl[reg];
409 case MENELAUS_MCT_PIN_ST:
410 /* TODO: return the real Card Detect */
411 return 0;
412 case MENELAUS_DEBOUNCE1:
413 return s->mmc_debounce;
414
415 default:
416 #ifdef VERBOSE
417 printf("%s: unknown register %02x\n", __FUNCTION__, addr);
418 #endif
419 break;
420 }
421 return 0;
422 }
423
424 static void menelaus_write(void *opaque, uint8_t addr, uint8_t value)
425 {
426 struct menelaus_s *s = (struct menelaus_s *) opaque;
427 int line;
428 int reg = 0;
429 struct tm tm;
430
431 switch (addr) {
432 case MENELAUS_VCORE_CTRL1:
433 s->vcore[0] = (value & 0xe) | MIN(value & 0x1f, 0x12);
434 break;
435 case MENELAUS_VCORE_CTRL2:
436 s->vcore[1] = value;
437 break;
438 case MENELAUS_VCORE_CTRL3:
439 s->vcore[2] = MIN(value & 0x1f, 0x12);
440 break;
441 case MENELAUS_VCORE_CTRL4:
442 s->vcore[3] = MIN(value & 0x1f, 0x12);
443 break;
444 case MENELAUS_VCORE_CTRL5:
445 s->vcore[4] = value & 3;
446 /* XXX
447 * auto set to 3 on M_Active, nRESWARM
448 * auto set to 0 on M_WaitOn, M_Backup
449 */
450 break;
451
452 case MENELAUS_DCDC_CTRL1:
453 s->dcdc[0] = value & 0x3f;
454 break;
455 case MENELAUS_DCDC_CTRL2:
456 s->dcdc[1] = value & 0x07;
457 /* XXX
458 * auto set to 3 on M_Active, nRESWARM
459 * auto set to 0 on M_WaitOn, M_Backup
460 */
461 break;
462 case MENELAUS_DCDC_CTRL3:
463 s->dcdc[2] = value & 0x07;
464 break;
465
466 case MENELAUS_LDO_CTRL1:
467 s->ldo[0] = value;
468 break;
469 case MENELAUS_LDO_CTRL2:
470 s->ldo[1] = value & 0x7f;
471 /* XXX
472 * auto set to 0x7e on M_WaitOn, M_Backup
473 */
474 break;
475 case MENELAUS_LDO_CTRL3:
476 s->ldo[2] = value & 3;
477 /* XXX
478 * auto set to 3 on M_Active, nRESWARM
479 * auto set to 0 on M_WaitOn, M_Backup
480 */
481 break;
482 case MENELAUS_LDO_CTRL4:
483 s->ldo[3] = value & 3;
484 /* XXX
485 * auto set to 3 on M_Active, nRESWARM
486 * auto set to 0 on M_WaitOn, M_Backup
487 */
488 break;
489 case MENELAUS_LDO_CTRL5:
490 s->ldo[4] = value & 3;
491 /* XXX
492 * auto set to 3 on M_Active, nRESWARM
493 * auto set to 0 on M_WaitOn, M_Backup
494 */
495 break;
496 case MENELAUS_LDO_CTRL6:
497 s->ldo[5] = value & 3;
498 break;
499 case MENELAUS_LDO_CTRL7:
500 s->ldo[6] = value & 3;
501 break;
502 case MENELAUS_LDO_CTRL8:
503 s->ldo[7] = value & 3;
504 break;
505
506 case MENELAUS_SLEEP_CTRL2: reg ++;
507 case MENELAUS_SLEEP_CTRL1:
508 s->sleep[reg] = value;
509 break;
510
511 case MENELAUS_DEVICE_OFF:
512 if (value & 1)
513 menelaus_reset(&s->i2c);
514 break;
515
516 case MENELAUS_OSC_CTRL:
517 s->osc = value & 7;
518 break;
519
520 case MENELAUS_DETECT_CTRL:
521 s->detect = value & 0x7f;
522 break;
523
524 case MENELAUS_INT_MASK1:
525 s->mask &= 0xf00;
526 s->mask |= value << 0;
527 menelaus_update(s);
528 break;
529 case MENELAUS_INT_MASK2:
530 s->mask &= 0x0ff;
531 s->mask |= value << 8;
532 menelaus_update(s);
533 break;
534
535 case MENELAUS_INT_ACK1:
536 s->status &= ~(((uint16_t) value) << 0);
537 menelaus_update(s);
538 break;
539 case MENELAUS_INT_ACK2:
540 s->status &= ~(((uint16_t) value) << 8);
541 menelaus_update(s);
542 break;
543
544 case MENELAUS_GPIO_CTRL:
545 for (line = 0; line < 3; line ++)
546 if (((s->dir ^ value) >> line) & 1)
547 if (s->handler[line])
548 qemu_set_irq(s->handler[line],
549 ((s->outputs & ~s->dir) >> line) & 1);
550 s->dir = value & 0x67;
551 break;
552 case MENELAUS_GPIO_OUT:
553 for (line = 0; line < 3; line ++)
554 if ((((s->outputs ^ value) & ~s->dir) >> line) & 1)
555 if (s->handler[line])
556 qemu_set_irq(s->handler[line], (s->outputs >> line) & 1);
557 s->outputs = value & 0x07;
558 break;
559
560 case MENELAUS_BBSMS:
561 s->bbsms = 0x0d;
562 break;
563
564 case MENELAUS_RTC_CTRL:
565 if ((s->rtc.ctrl ^ value) & 1) { /* RTC_EN */
566 if (value & 1)
567 menelaus_rtc_start(s);
568 else
569 menelaus_rtc_stop(s);
570 }
571 s->rtc.ctrl = value & 0x1f;
572 menelaus_alm_update(s);
573 break;
574 case MENELAUS_RTC_UPDATE:
575 menelaus_rtc_update(s);
576 memcpy(&tm, &s->rtc.tm, sizeof(tm));
577 switch (value & 0xf) {
578 case 0:
579 break;
580 case 1:
581 tm.tm_sec = s->rtc.new.tm_sec;
582 break;
583 case 2:
584 tm.tm_min = s->rtc.new.tm_min;
585 break;
586 case 3:
587 if (s->rtc.new.tm_hour > 23)
588 goto rtc_badness;
589 tm.tm_hour = s->rtc.new.tm_hour;
590 break;
591 case 4:
592 if (s->rtc.new.tm_mday < 1)
593 goto rtc_badness;
594 /* TODO check range */
595 tm.tm_mday = s->rtc.new.tm_mday;
596 break;
597 case 5:
598 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
599 goto rtc_badness;
600 tm.tm_mon = s->rtc.new.tm_mon;
601 break;
602 case 6:
603 tm.tm_year = s->rtc.new.tm_year;
604 break;
605 case 7:
606 /* TODO set .tm_mday instead */
607 tm.tm_wday = s->rtc.new.tm_wday;
608 break;
609 case 8:
610 if (s->rtc.new.tm_hour > 23)
611 goto rtc_badness;
612 if (s->rtc.new.tm_mday < 1)
613 goto rtc_badness;
614 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
615 goto rtc_badness;
616 tm.tm_sec = s->rtc.new.tm_sec;
617 tm.tm_min = s->rtc.new.tm_min;
618 tm.tm_hour = s->rtc.new.tm_hour;
619 tm.tm_mday = s->rtc.new.tm_mday;
620 tm.tm_mon = s->rtc.new.tm_mon;
621 tm.tm_year = s->rtc.new.tm_year;
622 break;
623 rtc_badness:
624 default:
625 fprintf(stderr, "%s: bad RTC_UPDATE value %02x\n",
626 __FUNCTION__, value);
627 s->status |= 1 << 10; /* RTCERR */
628 menelaus_update(s);
629 }
630 s->rtc.sec_offset = qemu_timedate_diff(&tm);
631 break;
632 case MENELAUS_RTC_SEC:
633 s->rtc.tm.tm_sec = from_bcd(value & 0x7f);
634 break;
635 case MENELAUS_RTC_MIN:
636 s->rtc.tm.tm_min = from_bcd(value & 0x7f);
637 break;
638 case MENELAUS_RTC_HR:
639 s->rtc.tm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
640 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
641 from_bcd(value & 0x3f);
642 break;
643 case MENELAUS_RTC_DAY:
644 s->rtc.tm.tm_mday = from_bcd(value);
645 break;
646 case MENELAUS_RTC_MON:
647 s->rtc.tm.tm_mon = MAX(1, from_bcd(value)) - 1;
648 break;
649 case MENELAUS_RTC_YR:
650 s->rtc.tm.tm_year = 2000 + from_bcd(value);
651 break;
652 case MENELAUS_RTC_WKDAY:
653 s->rtc.tm.tm_mday = from_bcd(value);
654 break;
655 case MENELAUS_RTC_AL_SEC:
656 s->rtc.alm.tm_sec = from_bcd(value & 0x7f);
657 menelaus_alm_update(s);
658 break;
659 case MENELAUS_RTC_AL_MIN:
660 s->rtc.alm.tm_min = from_bcd(value & 0x7f);
661 menelaus_alm_update(s);
662 break;
663 case MENELAUS_RTC_AL_HR:
664 s->rtc.alm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
665 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
666 from_bcd(value & 0x3f);
667 menelaus_alm_update(s);
668 break;
669 case MENELAUS_RTC_AL_DAY:
670 s->rtc.alm.tm_mday = from_bcd(value);
671 menelaus_alm_update(s);
672 break;
673 case MENELAUS_RTC_AL_MON:
674 s->rtc.alm.tm_mon = MAX(1, from_bcd(value)) - 1;
675 menelaus_alm_update(s);
676 break;
677 case MENELAUS_RTC_AL_YR:
678 s->rtc.alm.tm_year = 2000 + from_bcd(value);
679 menelaus_alm_update(s);
680 break;
681 case MENELAUS_RTC_COMP_MSB:
682 s->rtc.comp &= 0xff;
683 s->rtc.comp |= value << 8;
684 break;
685 case MENELAUS_RTC_COMP_LSB:
686 s->rtc.comp &= 0xff << 8;
687 s->rtc.comp |= value;
688 break;
689
690 case MENELAUS_S1_PULL_EN:
691 s->pull[0] = value;
692 break;
693 case MENELAUS_S1_PULL_DIR:
694 s->pull[1] = value & 0x1f;
695 break;
696 case MENELAUS_S2_PULL_EN:
697 s->pull[2] = value;
698 break;
699 case MENELAUS_S2_PULL_DIR:
700 s->pull[3] = value & 0x1f;
701 break;
702
703 case MENELAUS_MCT_CTRL1:
704 s->mmc_ctrl[0] = value & 0x7f;
705 break;
706 case MENELAUS_MCT_CTRL2:
707 s->mmc_ctrl[1] = value;
708 /* TODO update Card Detect interrupts */
709 break;
710 case MENELAUS_MCT_CTRL3:
711 s->mmc_ctrl[2] = value & 0xf;
712 break;
713 case MENELAUS_DEBOUNCE1:
714 s->mmc_debounce = value & 0x3f;
715 break;
716
717 default:
718 #ifdef VERBOSE
719 printf("%s: unknown register %02x\n", __FUNCTION__, addr);
720 #endif
721 }
722 }
723
724 static void menelaus_event(i2c_slave *i2c, enum i2c_event event)
725 {
726 struct menelaus_s *s = (struct menelaus_s *) i2c;
727
728 if (event == I2C_START_SEND)
729 s->firstbyte = 1;
730 }
731
732 static int menelaus_tx(i2c_slave *i2c, uint8_t data)
733 {
734 struct menelaus_s *s = (struct menelaus_s *) i2c;
735 /* Interpret register address byte */
736 if (s->firstbyte) {
737 s->reg = data;
738 s->firstbyte = 0;
739 } else
740 menelaus_write(s, s->reg ++, data);
741
742 return 0;
743 }
744
745 static int menelaus_rx(i2c_slave *i2c)
746 {
747 struct menelaus_s *s = (struct menelaus_s *) i2c;
748
749 return menelaus_read(s, s->reg ++);
750 }
751
752 static void tm_put(QEMUFile *f, struct tm *tm) {
753 qemu_put_be16(f, tm->tm_sec);
754 qemu_put_be16(f, tm->tm_min);
755 qemu_put_be16(f, tm->tm_hour);
756 qemu_put_be16(f, tm->tm_mday);
757 qemu_put_be16(f, tm->tm_min);
758 qemu_put_be16(f, tm->tm_year);
759 }
760
761 static void tm_get(QEMUFile *f, struct tm *tm) {
762 tm->tm_sec = qemu_get_be16(f);
763 tm->tm_min = qemu_get_be16(f);
764 tm->tm_hour = qemu_get_be16(f);
765 tm->tm_mday = qemu_get_be16(f);
766 tm->tm_min = qemu_get_be16(f);
767 tm->tm_year = qemu_get_be16(f);
768 }
769
770 static void menelaus_save(QEMUFile *f, void *opaque)
771 {
772 struct menelaus_s *s = (struct menelaus_s *) opaque;
773
774 qemu_put_be32(f, s->firstbyte);
775 qemu_put_8s(f, &s->reg);
776
777 qemu_put_8s(f, &s->vcore[0]);
778 qemu_put_8s(f, &s->vcore[1]);
779 qemu_put_8s(f, &s->vcore[2]);
780 qemu_put_8s(f, &s->vcore[3]);
781 qemu_put_8s(f, &s->vcore[4]);
782 qemu_put_8s(f, &s->dcdc[3]);
783 qemu_put_8s(f, &s->dcdc[3]);
784 qemu_put_8s(f, &s->dcdc[3]);
785 qemu_put_8s(f, &s->ldo[0]);
786 qemu_put_8s(f, &s->ldo[1]);
787 qemu_put_8s(f, &s->ldo[2]);
788 qemu_put_8s(f, &s->ldo[3]);
789 qemu_put_8s(f, &s->ldo[4]);
790 qemu_put_8s(f, &s->ldo[5]);
791 qemu_put_8s(f, &s->ldo[6]);
792 qemu_put_8s(f, &s->ldo[7]);
793 qemu_put_8s(f, &s->sleep[0]);
794 qemu_put_8s(f, &s->sleep[1]);
795 qemu_put_8s(f, &s->osc);
796 qemu_put_8s(f, &s->detect);
797 qemu_put_be16s(f, &s->mask);
798 qemu_put_be16s(f, &s->status);
799 qemu_put_8s(f, &s->dir);
800 qemu_put_8s(f, &s->inputs);
801 qemu_put_8s(f, &s->outputs);
802 qemu_put_8s(f, &s->bbsms);
803 qemu_put_8s(f, &s->pull[0]);
804 qemu_put_8s(f, &s->pull[1]);
805 qemu_put_8s(f, &s->pull[2]);
806 qemu_put_8s(f, &s->pull[3]);
807 qemu_put_8s(f, &s->mmc_ctrl[0]);
808 qemu_put_8s(f, &s->mmc_ctrl[1]);
809 qemu_put_8s(f, &s->mmc_ctrl[2]);
810 qemu_put_8s(f, &s->mmc_debounce);
811 qemu_put_8s(f, &s->rtc.ctrl);
812 qemu_put_be16s(f, &s->rtc.comp);
813 /* Should be <= 1000 */
814 qemu_put_be16(f, s->rtc.next - qemu_get_clock(rt_clock));
815 tm_put(f, &s->rtc.new);
816 tm_put(f, &s->rtc.alm);
817 qemu_put_byte(f, s->pwrbtn_state);
818
819 i2c_slave_save(f, &s->i2c);
820 }
821
822 static int menelaus_load(QEMUFile *f, void *opaque, int version_id)
823 {
824 struct menelaus_s *s = (struct menelaus_s *) opaque;
825
826 s->firstbyte = qemu_get_be32(f);
827 qemu_get_8s(f, &s->reg);
828
829 if (s->rtc.ctrl & 1) /* RTC_EN */
830 menelaus_rtc_stop(s);
831 qemu_get_8s(f, &s->vcore[0]);
832 qemu_get_8s(f, &s->vcore[1]);
833 qemu_get_8s(f, &s->vcore[2]);
834 qemu_get_8s(f, &s->vcore[3]);
835 qemu_get_8s(f, &s->vcore[4]);
836 qemu_get_8s(f, &s->dcdc[3]);
837 qemu_get_8s(f, &s->dcdc[3]);
838 qemu_get_8s(f, &s->dcdc[3]);
839 qemu_get_8s(f, &s->ldo[0]);
840 qemu_get_8s(f, &s->ldo[1]);
841 qemu_get_8s(f, &s->ldo[2]);
842 qemu_get_8s(f, &s->ldo[3]);
843 qemu_get_8s(f, &s->ldo[4]);
844 qemu_get_8s(f, &s->ldo[5]);
845 qemu_get_8s(f, &s->ldo[6]);
846 qemu_get_8s(f, &s->ldo[7]);
847 qemu_get_8s(f, &s->sleep[0]);
848 qemu_get_8s(f, &s->sleep[1]);
849 qemu_get_8s(f, &s->osc);
850 qemu_get_8s(f, &s->detect);
851 qemu_get_be16s(f, &s->mask);
852 qemu_get_be16s(f, &s->status);
853 qemu_get_8s(f, &s->dir);
854 qemu_get_8s(f, &s->inputs);
855 qemu_get_8s(f, &s->outputs);
856 qemu_get_8s(f, &s->bbsms);
857 qemu_get_8s(f, &s->pull[0]);
858 qemu_get_8s(f, &s->pull[1]);
859 qemu_get_8s(f, &s->pull[2]);
860 qemu_get_8s(f, &s->pull[3]);
861 qemu_get_8s(f, &s->mmc_ctrl[0]);
862 qemu_get_8s(f, &s->mmc_ctrl[1]);
863 qemu_get_8s(f, &s->mmc_ctrl[2]);
864 qemu_get_8s(f, &s->mmc_debounce);
865 qemu_get_8s(f, &s->rtc.ctrl);
866 qemu_get_be16s(f, &s->rtc.comp);
867 s->rtc.next = qemu_get_be16(f);
868 tm_get(f, &s->rtc.new);
869 tm_get(f, &s->rtc.alm);
870 s->pwrbtn_state = qemu_get_byte(f);
871 menelaus_alm_update(s);
872 menelaus_update(s);
873 if (s->rtc.ctrl & 1) /* RTC_EN */
874 menelaus_rtc_start(s);
875
876 i2c_slave_load(f, &s->i2c);
877 return 0;
878 }
879
880 static int menelaus_iid = 0;
881
882 i2c_slave *twl92230_init(i2c_bus *bus, qemu_irq irq)
883 {
884 struct menelaus_s *s = (struct menelaus_s *)
885 i2c_slave_init(bus, 0, sizeof(struct menelaus_s));
886
887 s->i2c.event = menelaus_event;
888 s->i2c.recv = menelaus_rx;
889 s->i2c.send = menelaus_tx;
890
891 s->irq = irq;
892 s->rtc.hz = qemu_new_timer(rt_clock, menelaus_rtc_hz, s);
893 s->in = qemu_allocate_irqs(menelaus_gpio_set, s, 3);
894 s->pwrbtn = qemu_allocate_irqs(menelaus_pwrbtn_set, s, 1)[0];
895
896 menelaus_reset(&s->i2c);
897
898 register_savevm("menelaus", menelaus_iid ++,
899 0, menelaus_save, menelaus_load, s);
900
901 return &s->i2c;
902 }
903
904 qemu_irq *twl92230_gpio_in_get(i2c_slave *i2c)
905 {
906 struct menelaus_s *s = (struct menelaus_s *) i2c;
907
908 return s->in;
909 }
910
911 void twl92230_gpio_out_set(i2c_slave *i2c, int line, qemu_irq handler)
912 {
913 struct menelaus_s *s = (struct menelaus_s *) i2c;
914
915 if (line >= 3 || line < 0) {
916 fprintf(stderr, "%s: No GPO line %i\n", __FUNCTION__, line);
917 exit(-1);
918 }
919 s->handler[line] = handler;
920 }