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[qemu.git] / hw / vfio_pci.c
1 /*
2 * vfio based device assignment support
3 *
4 * Copyright Red Hat, Inc. 2012
5 *
6 * Authors:
7 * Alex Williamson <alex.williamson@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Based on qemu-kvm device-assignment:
13 * Adapted for KVM by Qumranet.
14 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
15 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
16 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
17 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
18 * Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com)
19 */
20
21 #include <dirent.h>
22 #include <unistd.h>
23 #include <sys/ioctl.h>
24 #include <sys/mman.h>
25 #include <sys/stat.h>
26 #include <sys/types.h>
27 #include <linux/vfio.h>
28
29 #include "config.h"
30 #include "event_notifier.h"
31 #include "exec-memory.h"
32 #include "kvm.h"
33 #include "memory.h"
34 #include "msi.h"
35 #include "msix.h"
36 #include "pci.h"
37 #include "qemu-common.h"
38 #include "qemu-error.h"
39 #include "qemu-queue.h"
40 #include "range.h"
41
42 /* #define DEBUG_VFIO */
43 #ifdef DEBUG_VFIO
44 #define DPRINTF(fmt, ...) \
45 do { fprintf(stderr, "vfio: " fmt, ## __VA_ARGS__); } while (0)
46 #else
47 #define DPRINTF(fmt, ...) \
48 do { } while (0)
49 #endif
50
51 typedef struct VFIOBAR {
52 off_t fd_offset; /* offset of BAR within device fd */
53 int fd; /* device fd, allows us to pass VFIOBAR as opaque data */
54 MemoryRegion mem; /* slow, read/write access */
55 MemoryRegion mmap_mem; /* direct mapped access */
56 void *mmap;
57 size_t size;
58 uint32_t flags; /* VFIO region flags (rd/wr/mmap) */
59 uint8_t nr; /* cache the BAR number for debug */
60 } VFIOBAR;
61
62 typedef struct VFIOINTx {
63 bool pending; /* interrupt pending */
64 bool kvm_accel; /* set when QEMU bypass through KVM enabled */
65 uint8_t pin; /* which pin to pull for qemu_set_irq */
66 EventNotifier interrupt; /* eventfd triggered on interrupt */
67 EventNotifier unmask; /* eventfd for unmask on QEMU bypass */
68 PCIINTxRoute route; /* routing info for QEMU bypass */
69 uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */
70 QEMUTimer *mmap_timer; /* enable mmaps after periods w/o interrupts */
71 } VFIOINTx;
72
73 struct VFIODevice;
74
75 typedef struct VFIOMSIVector {
76 EventNotifier interrupt; /* eventfd triggered on interrupt */
77 struct VFIODevice *vdev; /* back pointer to device */
78 int virq; /* KVM irqchip route for QEMU bypass */
79 bool use;
80 } VFIOMSIVector;
81
82 enum {
83 VFIO_INT_NONE = 0,
84 VFIO_INT_INTx = 1,
85 VFIO_INT_MSI = 2,
86 VFIO_INT_MSIX = 3,
87 };
88
89 struct VFIOGroup;
90
91 typedef struct VFIOContainer {
92 int fd; /* /dev/vfio/vfio, empowered by the attached groups */
93 struct {
94 /* enable abstraction to support various iommu backends */
95 union {
96 MemoryListener listener; /* Used by type1 iommu */
97 };
98 void (*release)(struct VFIOContainer *);
99 } iommu_data;
100 QLIST_HEAD(, VFIOGroup) group_list;
101 QLIST_ENTRY(VFIOContainer) next;
102 } VFIOContainer;
103
104 /* Cache of MSI-X setup plus extra mmap and memory region for split BAR map */
105 typedef struct VFIOMSIXInfo {
106 uint8_t table_bar;
107 uint8_t pba_bar;
108 uint16_t entries;
109 uint32_t table_offset;
110 uint32_t pba_offset;
111 MemoryRegion mmap_mem;
112 void *mmap;
113 } VFIOMSIXInfo;
114
115 typedef struct VFIODevice {
116 PCIDevice pdev;
117 int fd;
118 VFIOINTx intx;
119 unsigned int config_size;
120 off_t config_offset; /* Offset of config space region within device fd */
121 unsigned int rom_size;
122 off_t rom_offset; /* Offset of ROM region within device fd */
123 int msi_cap_size;
124 VFIOMSIVector *msi_vectors;
125 VFIOMSIXInfo *msix;
126 int nr_vectors; /* Number of MSI/MSIX vectors currently in use */
127 int interrupt; /* Current interrupt type */
128 VFIOBAR bars[PCI_NUM_REGIONS - 1]; /* No ROM */
129 PCIHostDeviceAddress host;
130 QLIST_ENTRY(VFIODevice) next;
131 struct VFIOGroup *group;
132 bool reset_works;
133 } VFIODevice;
134
135 typedef struct VFIOGroup {
136 int fd;
137 int groupid;
138 VFIOContainer *container;
139 QLIST_HEAD(, VFIODevice) device_list;
140 QLIST_ENTRY(VFIOGroup) next;
141 QLIST_ENTRY(VFIOGroup) container_next;
142 } VFIOGroup;
143
144 #define MSIX_CAP_LENGTH 12
145
146 static QLIST_HEAD(, VFIOContainer)
147 container_list = QLIST_HEAD_INITIALIZER(container_list);
148
149 static QLIST_HEAD(, VFIOGroup)
150 group_list = QLIST_HEAD_INITIALIZER(group_list);
151
152 static void vfio_disable_interrupts(VFIODevice *vdev);
153 static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);
154 static void vfio_mmap_set_enabled(VFIODevice *vdev, bool enabled);
155
156 /*
157 * Common VFIO interrupt disable
158 */
159 static void vfio_disable_irqindex(VFIODevice *vdev, int index)
160 {
161 struct vfio_irq_set irq_set = {
162 .argsz = sizeof(irq_set),
163 .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER,
164 .index = index,
165 .start = 0,
166 .count = 0,
167 };
168
169 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);
170 }
171
172 /*
173 * INTx
174 */
175 static void vfio_unmask_intx(VFIODevice *vdev)
176 {
177 struct vfio_irq_set irq_set = {
178 .argsz = sizeof(irq_set),
179 .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_UNMASK,
180 .index = VFIO_PCI_INTX_IRQ_INDEX,
181 .start = 0,
182 .count = 1,
183 };
184
185 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);
186 }
187
188 /*
189 * Disabling BAR mmaping can be slow, but toggling it around INTx can
190 * also be a huge overhead. We try to get the best of both worlds by
191 * waiting until an interrupt to disable mmaps (subsequent transitions
192 * to the same state are effectively no overhead). If the interrupt has
193 * been serviced and the time gap is long enough, we re-enable mmaps for
194 * performance. This works well for things like graphics cards, which
195 * may not use their interrupt at all and are penalized to an unusable
196 * level by read/write BAR traps. Other devices, like NICs, have more
197 * regular interrupts and see much better latency by staying in non-mmap
198 * mode. We therefore set the default mmap_timeout such that a ping
199 * is just enough to keep the mmap disabled. Users can experiment with
200 * other options with the x-intx-mmap-timeout-ms parameter (a value of
201 * zero disables the timer).
202 */
203 static void vfio_intx_mmap_enable(void *opaque)
204 {
205 VFIODevice *vdev = opaque;
206
207 if (vdev->intx.pending) {
208 qemu_mod_timer(vdev->intx.mmap_timer,
209 qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout);
210 return;
211 }
212
213 vfio_mmap_set_enabled(vdev, true);
214 }
215
216 static void vfio_intx_interrupt(void *opaque)
217 {
218 VFIODevice *vdev = opaque;
219
220 if (!event_notifier_test_and_clear(&vdev->intx.interrupt)) {
221 return;
222 }
223
224 DPRINTF("%s(%04x:%02x:%02x.%x) Pin %c\n", __func__, vdev->host.domain,
225 vdev->host.bus, vdev->host.slot, vdev->host.function,
226 'A' + vdev->intx.pin);
227
228 vdev->intx.pending = true;
229 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 1);
230 vfio_mmap_set_enabled(vdev, false);
231 if (vdev->intx.mmap_timeout) {
232 qemu_mod_timer(vdev->intx.mmap_timer,
233 qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout);
234 }
235 }
236
237 static void vfio_eoi(VFIODevice *vdev)
238 {
239 if (!vdev->intx.pending) {
240 return;
241 }
242
243 DPRINTF("%s(%04x:%02x:%02x.%x) EOI\n", __func__, vdev->host.domain,
244 vdev->host.bus, vdev->host.slot, vdev->host.function);
245
246 vdev->intx.pending = false;
247 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
248 vfio_unmask_intx(vdev);
249 }
250
251 static int vfio_enable_intx(VFIODevice *vdev)
252 {
253 uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1);
254 int ret, argsz;
255 struct vfio_irq_set *irq_set;
256 int32_t *pfd;
257
258 if (!pin) {
259 return 0;
260 }
261
262 vfio_disable_interrupts(vdev);
263
264 vdev->intx.pin = pin - 1; /* Pin A (1) -> irq[0] */
265 ret = event_notifier_init(&vdev->intx.interrupt, 0);
266 if (ret) {
267 error_report("vfio: Error: event_notifier_init failed\n");
268 return ret;
269 }
270
271 argsz = sizeof(*irq_set) + sizeof(*pfd);
272
273 irq_set = g_malloc0(argsz);
274 irq_set->argsz = argsz;
275 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
276 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
277 irq_set->start = 0;
278 irq_set->count = 1;
279 pfd = (int32_t *)&irq_set->data;
280
281 *pfd = event_notifier_get_fd(&vdev->intx.interrupt);
282 qemu_set_fd_handler(*pfd, vfio_intx_interrupt, NULL, vdev);
283
284 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
285 g_free(irq_set);
286 if (ret) {
287 error_report("vfio: Error: Failed to setup INTx fd: %m\n");
288 qemu_set_fd_handler(*pfd, NULL, NULL, vdev);
289 event_notifier_cleanup(&vdev->intx.interrupt);
290 return -errno;
291 }
292
293 vdev->interrupt = VFIO_INT_INTx;
294
295 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
296 vdev->host.bus, vdev->host.slot, vdev->host.function);
297
298 return 0;
299 }
300
301 static void vfio_disable_intx(VFIODevice *vdev)
302 {
303 int fd;
304
305 qemu_del_timer(vdev->intx.mmap_timer);
306 vfio_disable_irqindex(vdev, VFIO_PCI_INTX_IRQ_INDEX);
307 vdev->intx.pending = false;
308 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
309 vfio_mmap_set_enabled(vdev, true);
310
311 fd = event_notifier_get_fd(&vdev->intx.interrupt);
312 qemu_set_fd_handler(fd, NULL, NULL, vdev);
313 event_notifier_cleanup(&vdev->intx.interrupt);
314
315 vdev->interrupt = VFIO_INT_NONE;
316
317 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
318 vdev->host.bus, vdev->host.slot, vdev->host.function);
319 }
320
321 /*
322 * MSI/X
323 */
324 static void vfio_msi_interrupt(void *opaque)
325 {
326 VFIOMSIVector *vector = opaque;
327 VFIODevice *vdev = vector->vdev;
328 int nr = vector - vdev->msi_vectors;
329
330 if (!event_notifier_test_and_clear(&vector->interrupt)) {
331 return;
332 }
333
334 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d\n", __func__,
335 vdev->host.domain, vdev->host.bus, vdev->host.slot,
336 vdev->host.function, nr);
337
338 if (vdev->interrupt == VFIO_INT_MSIX) {
339 msix_notify(&vdev->pdev, nr);
340 } else if (vdev->interrupt == VFIO_INT_MSI) {
341 msi_notify(&vdev->pdev, nr);
342 } else {
343 error_report("vfio: MSI interrupt receieved, but not enabled?\n");
344 }
345 }
346
347 static int vfio_enable_vectors(VFIODevice *vdev, bool msix)
348 {
349 struct vfio_irq_set *irq_set;
350 int ret = 0, i, argsz;
351 int32_t *fds;
352
353 argsz = sizeof(*irq_set) + (vdev->nr_vectors * sizeof(*fds));
354
355 irq_set = g_malloc0(argsz);
356 irq_set->argsz = argsz;
357 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
358 irq_set->index = msix ? VFIO_PCI_MSIX_IRQ_INDEX : VFIO_PCI_MSI_IRQ_INDEX;
359 irq_set->start = 0;
360 irq_set->count = vdev->nr_vectors;
361 fds = (int32_t *)&irq_set->data;
362
363 for (i = 0; i < vdev->nr_vectors; i++) {
364 if (!vdev->msi_vectors[i].use) {
365 fds[i] = -1;
366 continue;
367 }
368
369 fds[i] = event_notifier_get_fd(&vdev->msi_vectors[i].interrupt);
370 }
371
372 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
373
374 g_free(irq_set);
375
376 return ret;
377 }
378
379 static int vfio_msix_vector_use(PCIDevice *pdev,
380 unsigned int nr, MSIMessage msg)
381 {
382 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
383 VFIOMSIVector *vector;
384 int ret;
385
386 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d used\n", __func__,
387 vdev->host.domain, vdev->host.bus, vdev->host.slot,
388 vdev->host.function, nr);
389
390 vector = &vdev->msi_vectors[nr];
391 vector->vdev = vdev;
392 vector->use = true;
393
394 msix_vector_use(pdev, nr);
395
396 if (event_notifier_init(&vector->interrupt, 0)) {
397 error_report("vfio: Error: event_notifier_init failed\n");
398 }
399
400 /*
401 * Attempt to enable route through KVM irqchip,
402 * default to userspace handling if unavailable.
403 */
404 vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
405 if (vector->virq < 0 ||
406 kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
407 vector->virq) < 0) {
408 if (vector->virq >= 0) {
409 kvm_irqchip_release_virq(kvm_state, vector->virq);
410 vector->virq = -1;
411 }
412 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
413 vfio_msi_interrupt, NULL, vector);
414 }
415
416 /*
417 * We don't want to have the host allocate all possible MSI vectors
418 * for a device if they're not in use, so we shutdown and incrementally
419 * increase them as needed.
420 */
421 if (vdev->nr_vectors < nr + 1) {
422 vfio_disable_irqindex(vdev, VFIO_PCI_MSIX_IRQ_INDEX);
423 vdev->nr_vectors = nr + 1;
424 ret = vfio_enable_vectors(vdev, true);
425 if (ret) {
426 error_report("vfio: failed to enable vectors, %d\n", ret);
427 }
428 } else {
429 int argsz;
430 struct vfio_irq_set *irq_set;
431 int32_t *pfd;
432
433 argsz = sizeof(*irq_set) + sizeof(*pfd);
434
435 irq_set = g_malloc0(argsz);
436 irq_set->argsz = argsz;
437 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
438 VFIO_IRQ_SET_ACTION_TRIGGER;
439 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
440 irq_set->start = nr;
441 irq_set->count = 1;
442 pfd = (int32_t *)&irq_set->data;
443
444 *pfd = event_notifier_get_fd(&vector->interrupt);
445
446 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
447 g_free(irq_set);
448 if (ret) {
449 error_report("vfio: failed to modify vector, %d\n", ret);
450 }
451 }
452
453 return 0;
454 }
455
456 static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
457 {
458 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
459 VFIOMSIVector *vector = &vdev->msi_vectors[nr];
460 int argsz;
461 struct vfio_irq_set *irq_set;
462 int32_t *pfd;
463
464 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d released\n", __func__,
465 vdev->host.domain, vdev->host.bus, vdev->host.slot,
466 vdev->host.function, nr);
467
468 /*
469 * XXX What's the right thing to do here? This turns off the interrupt
470 * completely, but do we really just want to switch the interrupt to
471 * bouncing through userspace and let msix.c drop it? Not sure.
472 */
473 msix_vector_unuse(pdev, nr);
474
475 argsz = sizeof(*irq_set) + sizeof(*pfd);
476
477 irq_set = g_malloc0(argsz);
478 irq_set->argsz = argsz;
479 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
480 VFIO_IRQ_SET_ACTION_TRIGGER;
481 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
482 irq_set->start = nr;
483 irq_set->count = 1;
484 pfd = (int32_t *)&irq_set->data;
485
486 *pfd = -1;
487
488 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
489
490 g_free(irq_set);
491
492 if (vector->virq < 0) {
493 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
494 NULL, NULL, NULL);
495 } else {
496 kvm_irqchip_remove_irqfd_notifier(kvm_state, &vector->interrupt,
497 vector->virq);
498 kvm_irqchip_release_virq(kvm_state, vector->virq);
499 vector->virq = -1;
500 }
501
502 event_notifier_cleanup(&vector->interrupt);
503 vector->use = false;
504 }
505
506 /* TODO This should move to msi.c */
507 static MSIMessage msi_get_msg(PCIDevice *pdev, unsigned int vector)
508 {
509 uint16_t flags = pci_get_word(pdev->config + pdev->msi_cap + PCI_MSI_FLAGS);
510 bool msi64bit = flags & PCI_MSI_FLAGS_64BIT;
511 MSIMessage msg;
512
513 if (msi64bit) {
514 msg.address = pci_get_quad(pdev->config +
515 pdev->msi_cap + PCI_MSI_ADDRESS_LO);
516 } else {
517 msg.address = pci_get_long(pdev->config +
518 pdev->msi_cap + PCI_MSI_ADDRESS_LO);
519 }
520
521 msg.data = pci_get_word(pdev->config + pdev->msi_cap +
522 (msi64bit ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32));
523 msg.data += vector;
524
525 return msg;
526 }
527
528 static void vfio_enable_msix(VFIODevice *vdev)
529 {
530 vfio_disable_interrupts(vdev);
531
532 vdev->msi_vectors = g_malloc0(vdev->msix->entries * sizeof(VFIOMSIVector));
533
534 vdev->interrupt = VFIO_INT_MSIX;
535
536 if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use,
537 vfio_msix_vector_release)) {
538 error_report("vfio: msix_set_vector_notifiers failed\n");
539 }
540
541 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
542 vdev->host.bus, vdev->host.slot, vdev->host.function);
543 }
544
545 static void vfio_enable_msi(VFIODevice *vdev)
546 {
547 int ret, i;
548
549 vfio_disable_interrupts(vdev);
550
551 vdev->nr_vectors = msi_nr_vectors_allocated(&vdev->pdev);
552 retry:
553 vdev->msi_vectors = g_malloc0(vdev->nr_vectors * sizeof(VFIOMSIVector));
554
555 for (i = 0; i < vdev->nr_vectors; i++) {
556 MSIMessage msg;
557 VFIOMSIVector *vector = &vdev->msi_vectors[i];
558
559 vector->vdev = vdev;
560 vector->use = true;
561
562 if (event_notifier_init(&vector->interrupt, 0)) {
563 error_report("vfio: Error: event_notifier_init failed\n");
564 }
565
566 msg = msi_get_msg(&vdev->pdev, i);
567
568 /*
569 * Attempt to enable route through KVM irqchip,
570 * default to userspace handling if unavailable.
571 */
572 vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
573 if (vector->virq < 0 ||
574 kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
575 vector->virq) < 0) {
576 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
577 vfio_msi_interrupt, NULL, vector);
578 }
579 }
580
581 ret = vfio_enable_vectors(vdev, false);
582 if (ret) {
583 if (ret < 0) {
584 error_report("vfio: Error: Failed to setup MSI fds: %m\n");
585 } else if (ret != vdev->nr_vectors) {
586 error_report("vfio: Error: Failed to enable %d "
587 "MSI vectors, retry with %d\n", vdev->nr_vectors, ret);
588 }
589
590 for (i = 0; i < vdev->nr_vectors; i++) {
591 VFIOMSIVector *vector = &vdev->msi_vectors[i];
592 if (vector->virq >= 0) {
593 kvm_irqchip_remove_irqfd_notifier(kvm_state, &vector->interrupt,
594 vector->virq);
595 kvm_irqchip_release_virq(kvm_state, vector->virq);
596 vector->virq = -1;
597 } else {
598 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
599 NULL, NULL, NULL);
600 }
601 event_notifier_cleanup(&vector->interrupt);
602 }
603
604 g_free(vdev->msi_vectors);
605
606 if (ret > 0 && ret != vdev->nr_vectors) {
607 vdev->nr_vectors = ret;
608 goto retry;
609 }
610 vdev->nr_vectors = 0;
611
612 return;
613 }
614
615 vdev->interrupt = VFIO_INT_MSI;
616
617 DPRINTF("%s(%04x:%02x:%02x.%x) Enabled %d MSI vectors\n", __func__,
618 vdev->host.domain, vdev->host.bus, vdev->host.slot,
619 vdev->host.function, vdev->nr_vectors);
620 }
621
622 static void vfio_disable_msi_common(VFIODevice *vdev)
623 {
624 g_free(vdev->msi_vectors);
625 vdev->msi_vectors = NULL;
626 vdev->nr_vectors = 0;
627 vdev->interrupt = VFIO_INT_NONE;
628
629 vfio_enable_intx(vdev);
630 }
631
632 static void vfio_disable_msix(VFIODevice *vdev)
633 {
634 msix_unset_vector_notifiers(&vdev->pdev);
635
636 if (vdev->nr_vectors) {
637 vfio_disable_irqindex(vdev, VFIO_PCI_MSIX_IRQ_INDEX);
638 }
639
640 vfio_disable_msi_common(vdev);
641
642 DPRINTF("%s(%04x:%02x:%02x.%x, msi%s)\n", __func__,
643 vdev->host.domain, vdev->host.bus, vdev->host.slot,
644 vdev->host.function, msix ? "x" : "");
645 }
646
647 static void vfio_disable_msi(VFIODevice *vdev)
648 {
649 int i;
650
651 vfio_disable_irqindex(vdev, VFIO_PCI_MSI_IRQ_INDEX);
652
653 for (i = 0; i < vdev->nr_vectors; i++) {
654 VFIOMSIVector *vector = &vdev->msi_vectors[i];
655
656 if (!vector->use) {
657 continue;
658 }
659
660 if (vector->virq >= 0) {
661 kvm_irqchip_remove_irqfd_notifier(kvm_state,
662 &vector->interrupt, vector->virq);
663 kvm_irqchip_release_virq(kvm_state, vector->virq);
664 vector->virq = -1;
665 } else {
666 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
667 NULL, NULL, NULL);
668 }
669
670 event_notifier_cleanup(&vector->interrupt);
671 }
672
673 vfio_disable_msi_common(vdev);
674
675 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
676 vdev->host.bus, vdev->host.slot, vdev->host.function);
677 }
678
679 /*
680 * IO Port/MMIO - Beware of the endians, VFIO is always little endian
681 */
682 static void vfio_bar_write(void *opaque, target_phys_addr_t addr,
683 uint64_t data, unsigned size)
684 {
685 VFIOBAR *bar = opaque;
686 union {
687 uint8_t byte;
688 uint16_t word;
689 uint32_t dword;
690 uint64_t qword;
691 } buf;
692
693 switch (size) {
694 case 1:
695 buf.byte = data;
696 break;
697 case 2:
698 buf.word = cpu_to_le16(data);
699 break;
700 case 4:
701 buf.dword = cpu_to_le32(data);
702 break;
703 default:
704 hw_error("vfio: unsupported write size, %d bytes\n", size);
705 break;
706 }
707
708 if (pwrite(bar->fd, &buf, size, bar->fd_offset + addr) != size) {
709 error_report("%s(,0x%"TARGET_PRIxPHYS", 0x%"PRIx64", %d) failed: %m\n",
710 __func__, addr, data, size);
711 }
712
713 DPRINTF("%s(BAR%d+0x%"TARGET_PRIxPHYS", 0x%"PRIx64", %d)\n",
714 __func__, bar->nr, addr, data, size);
715
716 /*
717 * A read or write to a BAR always signals an INTx EOI. This will
718 * do nothing if not pending (including not in INTx mode). We assume
719 * that a BAR access is in response to an interrupt and that BAR
720 * accesses will service the interrupt. Unfortunately, we don't know
721 * which access will service the interrupt, so we're potentially
722 * getting quite a few host interrupts per guest interrupt.
723 */
724 vfio_eoi(container_of(bar, VFIODevice, bars[bar->nr]));
725 }
726
727 static uint64_t vfio_bar_read(void *opaque,
728 target_phys_addr_t addr, unsigned size)
729 {
730 VFIOBAR *bar = opaque;
731 union {
732 uint8_t byte;
733 uint16_t word;
734 uint32_t dword;
735 uint64_t qword;
736 } buf;
737 uint64_t data = 0;
738
739 if (pread(bar->fd, &buf, size, bar->fd_offset + addr) != size) {
740 error_report("%s(,0x%"TARGET_PRIxPHYS", %d) failed: %m\n",
741 __func__, addr, size);
742 return (uint64_t)-1;
743 }
744
745 switch (size) {
746 case 1:
747 data = buf.byte;
748 break;
749 case 2:
750 data = le16_to_cpu(buf.word);
751 break;
752 case 4:
753 data = le32_to_cpu(buf.dword);
754 break;
755 default:
756 hw_error("vfio: unsupported read size, %d bytes\n", size);
757 break;
758 }
759
760 DPRINTF("%s(BAR%d+0x%"TARGET_PRIxPHYS", %d) = 0x%"PRIx64"\n",
761 __func__, bar->nr, addr, size, data);
762
763 /* Same as write above */
764 vfio_eoi(container_of(bar, VFIODevice, bars[bar->nr]));
765
766 return data;
767 }
768
769 static const MemoryRegionOps vfio_bar_ops = {
770 .read = vfio_bar_read,
771 .write = vfio_bar_write,
772 .endianness = DEVICE_LITTLE_ENDIAN,
773 };
774
775 /*
776 * PCI config space
777 */
778 static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
779 {
780 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
781 uint32_t val = 0;
782
783 /*
784 * We only need QEMU PCI config support for the ROM BAR, the MSI and MSIX
785 * capabilities, and the multifunction bit below. We let VFIO handle
786 * virtualizing everything else. Performance is not a concern here.
787 */
788 if (ranges_overlap(addr, len, PCI_ROM_ADDRESS, 4) ||
789 (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
790 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) ||
791 (pdev->cap_present & QEMU_PCI_CAP_MSI &&
792 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size))) {
793
794 val = pci_default_read_config(pdev, addr, len);
795 } else {
796 if (pread(vdev->fd, &val, len, vdev->config_offset + addr) != len) {
797 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x) failed: %m\n",
798 __func__, vdev->host.domain, vdev->host.bus,
799 vdev->host.slot, vdev->host.function, addr, len);
800 return -errno;
801 }
802 val = le32_to_cpu(val);
803 }
804
805 /* Multifunction bit is virualized in QEMU */
806 if (unlikely(ranges_overlap(addr, len, PCI_HEADER_TYPE, 1))) {
807 uint32_t mask = PCI_HEADER_TYPE_MULTI_FUNCTION;
808
809 if (len == 4) {
810 mask <<= 16;
811 }
812
813 if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) {
814 val |= mask;
815 } else {
816 val &= ~mask;
817 }
818 }
819
820 DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, len=0x%x) %x\n", __func__,
821 vdev->host.domain, vdev->host.bus, vdev->host.slot,
822 vdev->host.function, addr, len, val);
823
824 return val;
825 }
826
827 static void vfio_pci_write_config(PCIDevice *pdev, uint32_t addr,
828 uint32_t val, int len)
829 {
830 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
831 uint32_t val_le = cpu_to_le32(val);
832
833 DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, 0x%x, len=0x%x)\n", __func__,
834 vdev->host.domain, vdev->host.bus, vdev->host.slot,
835 vdev->host.function, addr, val, len);
836
837 /* Write everything to VFIO, let it filter out what we can't write */
838 if (pwrite(vdev->fd, &val_le, len, vdev->config_offset + addr) != len) {
839 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x, 0x%x) failed: %m\n",
840 __func__, vdev->host.domain, vdev->host.bus,
841 vdev->host.slot, vdev->host.function, addr, val, len);
842 }
843
844 /* Write standard header bits to emulation */
845 if (addr < PCI_CONFIG_HEADER_SIZE) {
846 pci_default_write_config(pdev, addr, val, len);
847 return;
848 }
849
850 /* MSI/MSI-X Enabling/Disabling */
851 if (pdev->cap_present & QEMU_PCI_CAP_MSI &&
852 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size)) {
853 int is_enabled, was_enabled = msi_enabled(pdev);
854
855 pci_default_write_config(pdev, addr, val, len);
856
857 is_enabled = msi_enabled(pdev);
858
859 if (!was_enabled && is_enabled) {
860 vfio_enable_msi(vdev);
861 } else if (was_enabled && !is_enabled) {
862 vfio_disable_msi(vdev);
863 }
864 }
865
866 if (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
867 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) {
868 int is_enabled, was_enabled = msix_enabled(pdev);
869
870 pci_default_write_config(pdev, addr, val, len);
871
872 is_enabled = msix_enabled(pdev);
873
874 if (!was_enabled && is_enabled) {
875 vfio_enable_msix(vdev);
876 } else if (was_enabled && !is_enabled) {
877 vfio_disable_msix(vdev);
878 }
879 }
880 }
881
882 /*
883 * DMA - Mapping and unmapping for the "type1" IOMMU interface used on x86
884 */
885 static int vfio_dma_unmap(VFIOContainer *container,
886 target_phys_addr_t iova, ram_addr_t size)
887 {
888 struct vfio_iommu_type1_dma_unmap unmap = {
889 .argsz = sizeof(unmap),
890 .flags = 0,
891 .iova = iova,
892 .size = size,
893 };
894
895 if (ioctl(container->fd, VFIO_IOMMU_UNMAP_DMA, &unmap)) {
896 DPRINTF("VFIO_UNMAP_DMA: %d\n", -errno);
897 return -errno;
898 }
899
900 return 0;
901 }
902
903 static int vfio_dma_map(VFIOContainer *container, target_phys_addr_t iova,
904 ram_addr_t size, void *vaddr, bool readonly)
905 {
906 struct vfio_iommu_type1_dma_map map = {
907 .argsz = sizeof(map),
908 .flags = VFIO_DMA_MAP_FLAG_READ,
909 .vaddr = (__u64)(uintptr_t)vaddr,
910 .iova = iova,
911 .size = size,
912 };
913
914 if (!readonly) {
915 map.flags |= VFIO_DMA_MAP_FLAG_WRITE;
916 }
917
918 /*
919 * Try the mapping, if it fails with EBUSY, unmap the region and try
920 * again. This shouldn't be necessary, but we sometimes see it in
921 * the the VGA ROM space.
922 */
923 if (ioctl(container->fd, VFIO_IOMMU_MAP_DMA, &map) == 0 ||
924 (errno == EBUSY && vfio_dma_unmap(container, iova, size) == 0 &&
925 ioctl(container->fd, VFIO_IOMMU_MAP_DMA, &map) == 0)) {
926 return 0;
927 }
928
929 DPRINTF("VFIO_MAP_DMA: %d\n", -errno);
930 return -errno;
931 }
932
933 static void vfio_listener_dummy1(MemoryListener *listener)
934 {
935 /* We don't do batching (begin/commit) or care about logging */
936 }
937
938 static void vfio_listener_dummy2(MemoryListener *listener,
939 MemoryRegionSection *section)
940 {
941 /* We don't do logging or care about nops */
942 }
943
944 static void vfio_listener_dummy3(MemoryListener *listener,
945 MemoryRegionSection *section,
946 bool match_data, uint64_t data,
947 EventNotifier *e)
948 {
949 /* We don't care about eventfds */
950 }
951
952 static bool vfio_listener_skipped_section(MemoryRegionSection *section)
953 {
954 return !memory_region_is_ram(section->mr);
955 }
956
957 static void vfio_listener_region_add(MemoryListener *listener,
958 MemoryRegionSection *section)
959 {
960 VFIOContainer *container = container_of(listener, VFIOContainer,
961 iommu_data.listener);
962 target_phys_addr_t iova, end;
963 void *vaddr;
964 int ret;
965
966 if (vfio_listener_skipped_section(section)) {
967 DPRINTF("vfio: SKIPPING region_add %"TARGET_PRIxPHYS" - %"PRIx64"\n",
968 section->offset_within_address_space,
969 section->offset_within_address_space + section->size - 1);
970 return;
971 }
972
973 if (unlikely((section->offset_within_address_space & ~TARGET_PAGE_MASK) !=
974 (section->offset_within_region & ~TARGET_PAGE_MASK))) {
975 error_report("%s received unaligned region\n", __func__);
976 return;
977 }
978
979 iova = TARGET_PAGE_ALIGN(section->offset_within_address_space);
980 end = (section->offset_within_address_space + section->size) &
981 TARGET_PAGE_MASK;
982
983 if (iova >= end) {
984 return;
985 }
986
987 vaddr = memory_region_get_ram_ptr(section->mr) +
988 section->offset_within_region +
989 (iova - section->offset_within_address_space);
990
991 DPRINTF("vfio: region_add %"TARGET_PRIxPHYS" - %"TARGET_PRIxPHYS" [%p]\n",
992 iova, end - 1, vaddr);
993
994 ret = vfio_dma_map(container, iova, end - iova, vaddr, section->readonly);
995 if (ret) {
996 error_report("vfio_dma_map(%p, 0x%"TARGET_PRIxPHYS", "
997 "0x%"TARGET_PRIxPHYS", %p) = %d (%m)\n",
998 container, iova, end - iova, vaddr, ret);
999 }
1000 }
1001
1002 static void vfio_listener_region_del(MemoryListener *listener,
1003 MemoryRegionSection *section)
1004 {
1005 VFIOContainer *container = container_of(listener, VFIOContainer,
1006 iommu_data.listener);
1007 target_phys_addr_t iova, end;
1008 int ret;
1009
1010 if (vfio_listener_skipped_section(section)) {
1011 DPRINTF("vfio: SKIPPING region_del %"TARGET_PRIxPHYS" - %"PRIx64"\n",
1012 section->offset_within_address_space,
1013 section->offset_within_address_space + section->size - 1);
1014 return;
1015 }
1016
1017 if (unlikely((section->offset_within_address_space & ~TARGET_PAGE_MASK) !=
1018 (section->offset_within_region & ~TARGET_PAGE_MASK))) {
1019 error_report("%s received unaligned region\n", __func__);
1020 return;
1021 }
1022
1023 iova = TARGET_PAGE_ALIGN(section->offset_within_address_space);
1024 end = (section->offset_within_address_space + section->size) &
1025 TARGET_PAGE_MASK;
1026
1027 if (iova >= end) {
1028 return;
1029 }
1030
1031 DPRINTF("vfio: region_del %"TARGET_PRIxPHYS" - %"TARGET_PRIxPHYS"\n",
1032 iova, end - 1);
1033
1034 ret = vfio_dma_unmap(container, iova, end - iova);
1035 if (ret) {
1036 error_report("vfio_dma_unmap(%p, 0x%"TARGET_PRIxPHYS", "
1037 "0x%"TARGET_PRIxPHYS") = %d (%m)\n",
1038 container, iova, end - iova, ret);
1039 }
1040 }
1041
1042 static MemoryListener vfio_memory_listener = {
1043 .begin = vfio_listener_dummy1,
1044 .commit = vfio_listener_dummy1,
1045 .region_add = vfio_listener_region_add,
1046 .region_del = vfio_listener_region_del,
1047 .region_nop = vfio_listener_dummy2,
1048 .log_start = vfio_listener_dummy2,
1049 .log_stop = vfio_listener_dummy2,
1050 .log_sync = vfio_listener_dummy2,
1051 .log_global_start = vfio_listener_dummy1,
1052 .log_global_stop = vfio_listener_dummy1,
1053 .eventfd_add = vfio_listener_dummy3,
1054 .eventfd_del = vfio_listener_dummy3,
1055 };
1056
1057 static void vfio_listener_release(VFIOContainer *container)
1058 {
1059 memory_listener_unregister(&container->iommu_data.listener);
1060 }
1061
1062 /*
1063 * Interrupt setup
1064 */
1065 static void vfio_disable_interrupts(VFIODevice *vdev)
1066 {
1067 switch (vdev->interrupt) {
1068 case VFIO_INT_INTx:
1069 vfio_disable_intx(vdev);
1070 break;
1071 case VFIO_INT_MSI:
1072 vfio_disable_msi(vdev);
1073 break;
1074 case VFIO_INT_MSIX:
1075 vfio_disable_msix(vdev);
1076 break;
1077 }
1078 }
1079
1080 static int vfio_setup_msi(VFIODevice *vdev, int pos)
1081 {
1082 uint16_t ctrl;
1083 bool msi_64bit, msi_maskbit;
1084 int ret, entries;
1085
1086 if (pread(vdev->fd, &ctrl, sizeof(ctrl),
1087 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1088 return -errno;
1089 }
1090 ctrl = le16_to_cpu(ctrl);
1091
1092 msi_64bit = !!(ctrl & PCI_MSI_FLAGS_64BIT);
1093 msi_maskbit = !!(ctrl & PCI_MSI_FLAGS_MASKBIT);
1094 entries = 1 << ((ctrl & PCI_MSI_FLAGS_QMASK) >> 1);
1095
1096 DPRINTF("%04x:%02x:%02x.%x PCI MSI CAP @0x%x\n", vdev->host.domain,
1097 vdev->host.bus, vdev->host.slot, vdev->host.function, pos);
1098
1099 ret = msi_init(&vdev->pdev, pos, entries, msi_64bit, msi_maskbit);
1100 if (ret < 0) {
1101 if (ret == -ENOTSUP) {
1102 return 0;
1103 }
1104 error_report("vfio: msi_init failed\n");
1105 return ret;
1106 }
1107 vdev->msi_cap_size = 0xa + (msi_maskbit ? 0xa : 0) + (msi_64bit ? 0x4 : 0);
1108
1109 return 0;
1110 }
1111
1112 /*
1113 * We don't have any control over how pci_add_capability() inserts
1114 * capabilities into the chain. In order to setup MSI-X we need a
1115 * MemoryRegion for the BAR. In order to setup the BAR and not
1116 * attempt to mmap the MSI-X table area, which VFIO won't allow, we
1117 * need to first look for where the MSI-X table lives. So we
1118 * unfortunately split MSI-X setup across two functions.
1119 */
1120 static int vfio_early_setup_msix(VFIODevice *vdev)
1121 {
1122 uint8_t pos;
1123 uint16_t ctrl;
1124 uint32_t table, pba;
1125
1126 pos = pci_find_capability(&vdev->pdev, PCI_CAP_ID_MSIX);
1127 if (!pos) {
1128 return 0;
1129 }
1130
1131 if (pread(vdev->fd, &ctrl, sizeof(ctrl),
1132 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1133 return -errno;
1134 }
1135
1136 if (pread(vdev->fd, &table, sizeof(table),
1137 vdev->config_offset + pos + PCI_MSIX_TABLE) != sizeof(table)) {
1138 return -errno;
1139 }
1140
1141 if (pread(vdev->fd, &pba, sizeof(pba),
1142 vdev->config_offset + pos + PCI_MSIX_PBA) != sizeof(pba)) {
1143 return -errno;
1144 }
1145
1146 ctrl = le16_to_cpu(ctrl);
1147 table = le32_to_cpu(table);
1148 pba = le32_to_cpu(pba);
1149
1150 vdev->msix = g_malloc0(sizeof(*(vdev->msix)));
1151 vdev->msix->table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
1152 vdev->msix->table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
1153 vdev->msix->pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
1154 vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
1155 vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
1156
1157 DPRINTF("%04x:%02x:%02x.%x "
1158 "PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d\n",
1159 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1160 vdev->host.function, pos, vdev->msix->table_bar,
1161 vdev->msix->table_offset, vdev->msix->entries);
1162
1163 return 0;
1164 }
1165
1166 static int vfio_setup_msix(VFIODevice *vdev, int pos)
1167 {
1168 int ret;
1169
1170 ret = msix_init(&vdev->pdev, vdev->msix->entries,
1171 &vdev->bars[vdev->msix->table_bar].mem,
1172 vdev->msix->table_bar, vdev->msix->table_offset,
1173 &vdev->bars[vdev->msix->pba_bar].mem,
1174 vdev->msix->pba_bar, vdev->msix->pba_offset, pos);
1175 if (ret < 0) {
1176 if (ret == -ENOTSUP) {
1177 return 0;
1178 }
1179 error_report("vfio: msix_init failed\n");
1180 return ret;
1181 }
1182
1183 return 0;
1184 }
1185
1186 static void vfio_teardown_msi(VFIODevice *vdev)
1187 {
1188 msi_uninit(&vdev->pdev);
1189
1190 if (vdev->msix) {
1191 msix_uninit(&vdev->pdev, &vdev->bars[vdev->msix->table_bar].mem,
1192 &vdev->bars[vdev->msix->pba_bar].mem);
1193 }
1194 }
1195
1196 /*
1197 * Resource setup
1198 */
1199 static void vfio_mmap_set_enabled(VFIODevice *vdev, bool enabled)
1200 {
1201 int i;
1202
1203 for (i = 0; i < PCI_ROM_SLOT; i++) {
1204 VFIOBAR *bar = &vdev->bars[i];
1205
1206 if (!bar->size) {
1207 continue;
1208 }
1209
1210 memory_region_set_enabled(&bar->mmap_mem, enabled);
1211 if (vdev->msix && vdev->msix->table_bar == i) {
1212 memory_region_set_enabled(&vdev->msix->mmap_mem, enabled);
1213 }
1214 }
1215 }
1216
1217 static void vfio_unmap_bar(VFIODevice *vdev, int nr)
1218 {
1219 VFIOBAR *bar = &vdev->bars[nr];
1220
1221 if (!bar->size) {
1222 return;
1223 }
1224
1225 memory_region_del_subregion(&bar->mem, &bar->mmap_mem);
1226 munmap(bar->mmap, memory_region_size(&bar->mmap_mem));
1227
1228 if (vdev->msix && vdev->msix->table_bar == nr) {
1229 memory_region_del_subregion(&bar->mem, &vdev->msix->mmap_mem);
1230 munmap(vdev->msix->mmap, memory_region_size(&vdev->msix->mmap_mem));
1231 }
1232
1233 memory_region_destroy(&bar->mem);
1234 }
1235
1236 static int vfio_mmap_bar(VFIOBAR *bar, MemoryRegion *mem, MemoryRegion *submem,
1237 void **map, size_t size, off_t offset,
1238 const char *name)
1239 {
1240 int ret = 0;
1241
1242 if (size && bar->flags & VFIO_REGION_INFO_FLAG_MMAP) {
1243 int prot = 0;
1244
1245 if (bar->flags & VFIO_REGION_INFO_FLAG_READ) {
1246 prot |= PROT_READ;
1247 }
1248
1249 if (bar->flags & VFIO_REGION_INFO_FLAG_WRITE) {
1250 prot |= PROT_WRITE;
1251 }
1252
1253 *map = mmap(NULL, size, prot, MAP_SHARED,
1254 bar->fd, bar->fd_offset + offset);
1255 if (*map == MAP_FAILED) {
1256 *map = NULL;
1257 ret = -errno;
1258 goto empty_region;
1259 }
1260
1261 memory_region_init_ram_ptr(submem, name, size, *map);
1262 } else {
1263 empty_region:
1264 /* Create a zero sized sub-region to make cleanup easy. */
1265 memory_region_init(submem, name, 0);
1266 }
1267
1268 memory_region_add_subregion(mem, offset, submem);
1269
1270 return ret;
1271 }
1272
1273 static void vfio_map_bar(VFIODevice *vdev, int nr)
1274 {
1275 VFIOBAR *bar = &vdev->bars[nr];
1276 unsigned size = bar->size;
1277 char name[64];
1278 uint32_t pci_bar;
1279 uint8_t type;
1280 int ret;
1281
1282 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */
1283 if (!size) {
1284 return;
1285 }
1286
1287 snprintf(name, sizeof(name), "VFIO %04x:%02x:%02x.%x BAR %d",
1288 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1289 vdev->host.function, nr);
1290
1291 /* Determine what type of BAR this is for registration */
1292 ret = pread(vdev->fd, &pci_bar, sizeof(pci_bar),
1293 vdev->config_offset + PCI_BASE_ADDRESS_0 + (4 * nr));
1294 if (ret != sizeof(pci_bar)) {
1295 error_report("vfio: Failed to read BAR %d (%m)\n", nr);
1296 return;
1297 }
1298
1299 pci_bar = le32_to_cpu(pci_bar);
1300 type = pci_bar & (pci_bar & PCI_BASE_ADDRESS_SPACE_IO ?
1301 ~PCI_BASE_ADDRESS_IO_MASK : ~PCI_BASE_ADDRESS_MEM_MASK);
1302
1303 /* A "slow" read/write mapping underlies all BARs */
1304 memory_region_init_io(&bar->mem, &vfio_bar_ops, bar, name, size);
1305 pci_register_bar(&vdev->pdev, nr, type, &bar->mem);
1306
1307 /*
1308 * We can't mmap areas overlapping the MSIX vector table, so we
1309 * potentially insert a direct-mapped subregion before and after it.
1310 */
1311 if (vdev->msix && vdev->msix->table_bar == nr) {
1312 size = vdev->msix->table_offset & TARGET_PAGE_MASK;
1313 }
1314
1315 strncat(name, " mmap", sizeof(name) - strlen(name) - 1);
1316 if (vfio_mmap_bar(bar, &bar->mem,
1317 &bar->mmap_mem, &bar->mmap, size, 0, name)) {
1318 error_report("%s unsupported. Performance may be slow\n", name);
1319 }
1320
1321 if (vdev->msix && vdev->msix->table_bar == nr) {
1322 unsigned start;
1323
1324 start = TARGET_PAGE_ALIGN(vdev->msix->table_offset +
1325 (vdev->msix->entries * PCI_MSIX_ENTRY_SIZE));
1326
1327 size = start < bar->size ? bar->size - start : 0;
1328 strncat(name, " msix-hi", sizeof(name) - strlen(name) - 1);
1329 /* VFIOMSIXInfo contains another MemoryRegion for this mapping */
1330 if (vfio_mmap_bar(bar, &bar->mem, &vdev->msix->mmap_mem,
1331 &vdev->msix->mmap, size, start, name)) {
1332 error_report("%s unsupported. Performance may be slow\n", name);
1333 }
1334 }
1335 }
1336
1337 static void vfio_map_bars(VFIODevice *vdev)
1338 {
1339 int i;
1340
1341 for (i = 0; i < PCI_ROM_SLOT; i++) {
1342 vfio_map_bar(vdev, i);
1343 }
1344 }
1345
1346 static void vfio_unmap_bars(VFIODevice *vdev)
1347 {
1348 int i;
1349
1350 for (i = 0; i < PCI_ROM_SLOT; i++) {
1351 vfio_unmap_bar(vdev, i);
1352 }
1353 }
1354
1355 /*
1356 * General setup
1357 */
1358 static uint8_t vfio_std_cap_max_size(PCIDevice *pdev, uint8_t pos)
1359 {
1360 uint8_t tmp, next = 0xff;
1361
1362 for (tmp = pdev->config[PCI_CAPABILITY_LIST]; tmp;
1363 tmp = pdev->config[tmp + 1]) {
1364 if (tmp > pos && tmp < next) {
1365 next = tmp;
1366 }
1367 }
1368
1369 return next - pos;
1370 }
1371
1372 static int vfio_add_std_cap(VFIODevice *vdev, uint8_t pos)
1373 {
1374 PCIDevice *pdev = &vdev->pdev;
1375 uint8_t cap_id, next, size;
1376 int ret;
1377
1378 cap_id = pdev->config[pos];
1379 next = pdev->config[pos + 1];
1380
1381 /*
1382 * If it becomes important to configure capabilities to their actual
1383 * size, use this as the default when it's something we don't recognize.
1384 * Since QEMU doesn't actually handle many of the config accesses,
1385 * exact size doesn't seem worthwhile.
1386 */
1387 size = vfio_std_cap_max_size(pdev, pos);
1388
1389 /*
1390 * pci_add_capability always inserts the new capability at the head
1391 * of the chain. Therefore to end up with a chain that matches the
1392 * physical device, we insert from the end by making this recursive.
1393 * This is also why we pre-caclulate size above as cached config space
1394 * will be changed as we unwind the stack.
1395 */
1396 if (next) {
1397 ret = vfio_add_std_cap(vdev, next);
1398 if (ret) {
1399 return ret;
1400 }
1401 } else {
1402 pdev->config[PCI_CAPABILITY_LIST] = 0; /* Begin the rebuild */
1403 }
1404
1405 switch (cap_id) {
1406 case PCI_CAP_ID_MSI:
1407 ret = vfio_setup_msi(vdev, pos);
1408 break;
1409 case PCI_CAP_ID_MSIX:
1410 ret = vfio_setup_msix(vdev, pos);
1411 break;
1412 default:
1413 ret = pci_add_capability(pdev, cap_id, pos, size);
1414 break;
1415 }
1416
1417 if (ret < 0) {
1418 error_report("vfio: %04x:%02x:%02x.%x Error adding PCI capability "
1419 "0x%x[0x%x]@0x%x: %d\n", vdev->host.domain,
1420 vdev->host.bus, vdev->host.slot, vdev->host.function,
1421 cap_id, size, pos, ret);
1422 return ret;
1423 }
1424
1425 return 0;
1426 }
1427
1428 static int vfio_add_capabilities(VFIODevice *vdev)
1429 {
1430 PCIDevice *pdev = &vdev->pdev;
1431
1432 if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST) ||
1433 !pdev->config[PCI_CAPABILITY_LIST]) {
1434 return 0; /* Nothing to add */
1435 }
1436
1437 return vfio_add_std_cap(vdev, pdev->config[PCI_CAPABILITY_LIST]);
1438 }
1439
1440 static int vfio_load_rom(VFIODevice *vdev)
1441 {
1442 uint64_t size = vdev->rom_size;
1443 char name[32];
1444 off_t off = 0, voff = vdev->rom_offset;
1445 ssize_t bytes;
1446 void *ptr;
1447
1448 /* If loading ROM from file, pci handles it */
1449 if (vdev->pdev.romfile || !vdev->pdev.rom_bar || !size) {
1450 return 0;
1451 }
1452
1453 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
1454 vdev->host.bus, vdev->host.slot, vdev->host.function);
1455
1456 snprintf(name, sizeof(name), "vfio[%04x:%02x:%02x.%x].rom",
1457 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1458 vdev->host.function);
1459 memory_region_init_ram(&vdev->pdev.rom, name, size);
1460 ptr = memory_region_get_ram_ptr(&vdev->pdev.rom);
1461 memset(ptr, 0xff, size);
1462
1463 while (size) {
1464 bytes = pread(vdev->fd, ptr + off, size, voff + off);
1465 if (bytes == 0) {
1466 break; /* expect that we could get back less than the ROM BAR */
1467 } else if (bytes > 0) {
1468 off += bytes;
1469 size -= bytes;
1470 } else {
1471 if (errno == EINTR || errno == EAGAIN) {
1472 continue;
1473 }
1474 error_report("vfio: Error reading device ROM: %m\n");
1475 memory_region_destroy(&vdev->pdev.rom);
1476 return -errno;
1477 }
1478 }
1479
1480 pci_register_bar(&vdev->pdev, PCI_ROM_SLOT, 0, &vdev->pdev.rom);
1481 vdev->pdev.has_rom = true;
1482 return 0;
1483 }
1484
1485 static int vfio_connect_container(VFIOGroup *group)
1486 {
1487 VFIOContainer *container;
1488 int ret, fd;
1489
1490 if (group->container) {
1491 return 0;
1492 }
1493
1494 QLIST_FOREACH(container, &container_list, next) {
1495 if (!ioctl(group->fd, VFIO_GROUP_SET_CONTAINER, &container->fd)) {
1496 group->container = container;
1497 QLIST_INSERT_HEAD(&container->group_list, group, container_next);
1498 return 0;
1499 }
1500 }
1501
1502 fd = qemu_open("/dev/vfio/vfio", O_RDWR);
1503 if (fd < 0) {
1504 error_report("vfio: failed to open /dev/vfio/vfio: %m\n");
1505 return -errno;
1506 }
1507
1508 ret = ioctl(fd, VFIO_GET_API_VERSION);
1509 if (ret != VFIO_API_VERSION) {
1510 error_report("vfio: supported vfio version: %d, "
1511 "reported version: %d\n", VFIO_API_VERSION, ret);
1512 close(fd);
1513 return -EINVAL;
1514 }
1515
1516 container = g_malloc0(sizeof(*container));
1517 container->fd = fd;
1518
1519 if (ioctl(fd, VFIO_CHECK_EXTENSION, VFIO_TYPE1_IOMMU)) {
1520 ret = ioctl(group->fd, VFIO_GROUP_SET_CONTAINER, &fd);
1521 if (ret) {
1522 error_report("vfio: failed to set group container: %m\n");
1523 g_free(container);
1524 close(fd);
1525 return -errno;
1526 }
1527
1528 ret = ioctl(fd, VFIO_SET_IOMMU, VFIO_TYPE1_IOMMU);
1529 if (ret) {
1530 error_report("vfio: failed to set iommu for container: %m\n");
1531 g_free(container);
1532 close(fd);
1533 return -errno;
1534 }
1535
1536 container->iommu_data.listener = vfio_memory_listener;
1537 container->iommu_data.release = vfio_listener_release;
1538
1539 memory_listener_register(&container->iommu_data.listener,
1540 get_system_memory());
1541 } else {
1542 error_report("vfio: No available IOMMU models\n");
1543 g_free(container);
1544 close(fd);
1545 return -EINVAL;
1546 }
1547
1548 QLIST_INIT(&container->group_list);
1549 QLIST_INSERT_HEAD(&container_list, container, next);
1550
1551 group->container = container;
1552 QLIST_INSERT_HEAD(&container->group_list, group, container_next);
1553
1554 return 0;
1555 }
1556
1557 static void vfio_disconnect_container(VFIOGroup *group)
1558 {
1559 VFIOContainer *container = group->container;
1560
1561 if (ioctl(group->fd, VFIO_GROUP_UNSET_CONTAINER, &container->fd)) {
1562 error_report("vfio: error disconnecting group %d from container\n",
1563 group->groupid);
1564 }
1565
1566 QLIST_REMOVE(group, container_next);
1567 group->container = NULL;
1568
1569 if (QLIST_EMPTY(&container->group_list)) {
1570 if (container->iommu_data.release) {
1571 container->iommu_data.release(container);
1572 }
1573 QLIST_REMOVE(container, next);
1574 DPRINTF("vfio_disconnect_container: close container->fd\n");
1575 close(container->fd);
1576 g_free(container);
1577 }
1578 }
1579
1580 static VFIOGroup *vfio_get_group(int groupid)
1581 {
1582 VFIOGroup *group;
1583 char path[32];
1584 struct vfio_group_status status = { .argsz = sizeof(status) };
1585
1586 QLIST_FOREACH(group, &group_list, next) {
1587 if (group->groupid == groupid) {
1588 return group;
1589 }
1590 }
1591
1592 group = g_malloc0(sizeof(*group));
1593
1594 snprintf(path, sizeof(path), "/dev/vfio/%d", groupid);
1595 group->fd = qemu_open(path, O_RDWR);
1596 if (group->fd < 0) {
1597 error_report("vfio: error opening %s: %m\n", path);
1598 g_free(group);
1599 return NULL;
1600 }
1601
1602 if (ioctl(group->fd, VFIO_GROUP_GET_STATUS, &status)) {
1603 error_report("vfio: error getting group status: %m\n");
1604 close(group->fd);
1605 g_free(group);
1606 return NULL;
1607 }
1608
1609 if (!(status.flags & VFIO_GROUP_FLAGS_VIABLE)) {
1610 error_report("vfio: error, group %d is not viable, please ensure "
1611 "all devices within the iommu_group are bound to their "
1612 "vfio bus driver.\n", groupid);
1613 close(group->fd);
1614 g_free(group);
1615 return NULL;
1616 }
1617
1618 group->groupid = groupid;
1619 QLIST_INIT(&group->device_list);
1620
1621 if (vfio_connect_container(group)) {
1622 error_report("vfio: failed to setup container for group %d\n", groupid);
1623 close(group->fd);
1624 g_free(group);
1625 return NULL;
1626 }
1627
1628 QLIST_INSERT_HEAD(&group_list, group, next);
1629
1630 return group;
1631 }
1632
1633 static void vfio_put_group(VFIOGroup *group)
1634 {
1635 if (!QLIST_EMPTY(&group->device_list)) {
1636 return;
1637 }
1638
1639 vfio_disconnect_container(group);
1640 QLIST_REMOVE(group, next);
1641 DPRINTF("vfio_put_group: close group->fd\n");
1642 close(group->fd);
1643 g_free(group);
1644 }
1645
1646 static int vfio_get_device(VFIOGroup *group, const char *name, VFIODevice *vdev)
1647 {
1648 struct vfio_device_info dev_info = { .argsz = sizeof(dev_info) };
1649 struct vfio_region_info reg_info = { .argsz = sizeof(reg_info) };
1650 int ret, i;
1651
1652 ret = ioctl(group->fd, VFIO_GROUP_GET_DEVICE_FD, name);
1653 if (ret < 0) {
1654 error_report("vfio: error getting device %s from group %d: %m\n",
1655 name, group->groupid);
1656 error_report("Verify all devices in group %d are bound to vfio-pci "
1657 "or pci-stub and not already in use\n", group->groupid);
1658 return ret;
1659 }
1660
1661 vdev->fd = ret;
1662 vdev->group = group;
1663 QLIST_INSERT_HEAD(&group->device_list, vdev, next);
1664
1665 /* Sanity check device */
1666 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_INFO, &dev_info);
1667 if (ret) {
1668 error_report("vfio: error getting device info: %m\n");
1669 goto error;
1670 }
1671
1672 DPRINTF("Device %s flags: %u, regions: %u, irgs: %u\n", name,
1673 dev_info.flags, dev_info.num_regions, dev_info.num_irqs);
1674
1675 if (!(dev_info.flags & VFIO_DEVICE_FLAGS_PCI)) {
1676 error_report("vfio: Um, this isn't a PCI device\n");
1677 goto error;
1678 }
1679
1680 vdev->reset_works = !!(dev_info.flags & VFIO_DEVICE_FLAGS_RESET);
1681 if (!vdev->reset_works) {
1682 error_report("Warning, device %s does not support reset\n", name);
1683 }
1684
1685 if (dev_info.num_regions != VFIO_PCI_NUM_REGIONS) {
1686 error_report("vfio: unexpected number of io regions %u\n",
1687 dev_info.num_regions);
1688 goto error;
1689 }
1690
1691 if (dev_info.num_irqs != VFIO_PCI_NUM_IRQS) {
1692 error_report("vfio: unexpected number of irqs %u\n", dev_info.num_irqs);
1693 goto error;
1694 }
1695
1696 for (i = VFIO_PCI_BAR0_REGION_INDEX; i < VFIO_PCI_ROM_REGION_INDEX; i++) {
1697 reg_info.index = i;
1698
1699 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1700 if (ret) {
1701 error_report("vfio: Error getting region %d info: %m\n", i);
1702 goto error;
1703 }
1704
1705 DPRINTF("Device %s region %d:\n", name, i);
1706 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1707 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1708 (unsigned long)reg_info.flags);
1709
1710 vdev->bars[i].flags = reg_info.flags;
1711 vdev->bars[i].size = reg_info.size;
1712 vdev->bars[i].fd_offset = reg_info.offset;
1713 vdev->bars[i].fd = vdev->fd;
1714 vdev->bars[i].nr = i;
1715 }
1716
1717 reg_info.index = VFIO_PCI_ROM_REGION_INDEX;
1718
1719 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1720 if (ret) {
1721 error_report("vfio: Error getting ROM info: %m\n");
1722 goto error;
1723 }
1724
1725 DPRINTF("Device %s ROM:\n", name);
1726 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1727 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1728 (unsigned long)reg_info.flags);
1729
1730 vdev->rom_size = reg_info.size;
1731 vdev->rom_offset = reg_info.offset;
1732
1733 reg_info.index = VFIO_PCI_CONFIG_REGION_INDEX;
1734
1735 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1736 if (ret) {
1737 error_report("vfio: Error getting config info: %m\n");
1738 goto error;
1739 }
1740
1741 DPRINTF("Device %s config:\n", name);
1742 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1743 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1744 (unsigned long)reg_info.flags);
1745
1746 vdev->config_size = reg_info.size;
1747 vdev->config_offset = reg_info.offset;
1748
1749 error:
1750 if (ret) {
1751 QLIST_REMOVE(vdev, next);
1752 vdev->group = NULL;
1753 close(vdev->fd);
1754 }
1755 return ret;
1756 }
1757
1758 static void vfio_put_device(VFIODevice *vdev)
1759 {
1760 QLIST_REMOVE(vdev, next);
1761 vdev->group = NULL;
1762 DPRINTF("vfio_put_device: close vdev->fd\n");
1763 close(vdev->fd);
1764 if (vdev->msix) {
1765 g_free(vdev->msix);
1766 vdev->msix = NULL;
1767 }
1768 }
1769
1770 static int vfio_initfn(PCIDevice *pdev)
1771 {
1772 VFIODevice *pvdev, *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
1773 VFIOGroup *group;
1774 char path[PATH_MAX], iommu_group_path[PATH_MAX], *group_name;
1775 ssize_t len;
1776 struct stat st;
1777 int groupid;
1778 int ret;
1779
1780 /* Check that the host device exists */
1781 snprintf(path, sizeof(path),
1782 "/sys/bus/pci/devices/%04x:%02x:%02x.%01x/",
1783 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1784 vdev->host.function);
1785 if (stat(path, &st) < 0) {
1786 error_report("vfio: error: no such host device: %s\n", path);
1787 return -errno;
1788 }
1789
1790 strncat(path, "iommu_group", sizeof(path) - strlen(path) - 1);
1791
1792 len = readlink(path, iommu_group_path, PATH_MAX);
1793 if (len <= 0) {
1794 error_report("vfio: error no iommu_group for device\n");
1795 return -errno;
1796 }
1797
1798 iommu_group_path[len] = 0;
1799 group_name = basename(iommu_group_path);
1800
1801 if (sscanf(group_name, "%d", &groupid) != 1) {
1802 error_report("vfio: error reading %s: %m\n", path);
1803 return -errno;
1804 }
1805
1806 DPRINTF("%s(%04x:%02x:%02x.%x) group %d\n", __func__, vdev->host.domain,
1807 vdev->host.bus, vdev->host.slot, vdev->host.function, groupid);
1808
1809 group = vfio_get_group(groupid);
1810 if (!group) {
1811 error_report("vfio: failed to get group %d\n", groupid);
1812 return -ENOENT;
1813 }
1814
1815 snprintf(path, sizeof(path), "%04x:%02x:%02x.%01x",
1816 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1817 vdev->host.function);
1818
1819 QLIST_FOREACH(pvdev, &group->device_list, next) {
1820 if (pvdev->host.domain == vdev->host.domain &&
1821 pvdev->host.bus == vdev->host.bus &&
1822 pvdev->host.slot == vdev->host.slot &&
1823 pvdev->host.function == vdev->host.function) {
1824
1825 error_report("vfio: error: device %s is already attached\n", path);
1826 vfio_put_group(group);
1827 return -EBUSY;
1828 }
1829 }
1830
1831 ret = vfio_get_device(group, path, vdev);
1832 if (ret) {
1833 error_report("vfio: failed to get device %s\n", path);
1834 vfio_put_group(group);
1835 return ret;
1836 }
1837
1838 /* Get a copy of config space */
1839 ret = pread(vdev->fd, vdev->pdev.config,
1840 MIN(pci_config_size(&vdev->pdev), vdev->config_size),
1841 vdev->config_offset);
1842 if (ret < (int)MIN(pci_config_size(&vdev->pdev), vdev->config_size)) {
1843 ret = ret < 0 ? -errno : -EFAULT;
1844 error_report("vfio: Failed to read device config space\n");
1845 goto out_put;
1846 }
1847
1848 /*
1849 * Clear host resource mapping info. If we choose not to register a
1850 * BAR, such as might be the case with the option ROM, we can get
1851 * confusing, unwritable, residual addresses from the host here.
1852 */
1853 memset(&vdev->pdev.config[PCI_BASE_ADDRESS_0], 0, 24);
1854 memset(&vdev->pdev.config[PCI_ROM_ADDRESS], 0, 4);
1855
1856 vfio_load_rom(vdev);
1857
1858 ret = vfio_early_setup_msix(vdev);
1859 if (ret) {
1860 goto out_put;
1861 }
1862
1863 vfio_map_bars(vdev);
1864
1865 ret = vfio_add_capabilities(vdev);
1866 if (ret) {
1867 goto out_teardown;
1868 }
1869
1870 if (vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1)) {
1871 vdev->intx.mmap_timer = qemu_new_timer_ms(vm_clock,
1872 vfio_intx_mmap_enable, vdev);
1873 ret = vfio_enable_intx(vdev);
1874 if (ret) {
1875 goto out_teardown;
1876 }
1877 }
1878
1879 return 0;
1880
1881 out_teardown:
1882 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
1883 vfio_teardown_msi(vdev);
1884 vfio_unmap_bars(vdev);
1885 out_put:
1886 vfio_put_device(vdev);
1887 vfio_put_group(group);
1888 return ret;
1889 }
1890
1891 static void vfio_exitfn(PCIDevice *pdev)
1892 {
1893 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
1894 VFIOGroup *group = vdev->group;
1895
1896 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
1897 vfio_disable_interrupts(vdev);
1898 if (vdev->intx.mmap_timer) {
1899 qemu_free_timer(vdev->intx.mmap_timer);
1900 }
1901 vfio_teardown_msi(vdev);
1902 vfio_unmap_bars(vdev);
1903 vfio_put_device(vdev);
1904 vfio_put_group(group);
1905 }
1906
1907 static void vfio_pci_reset(DeviceState *dev)
1908 {
1909 PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, dev);
1910 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
1911 uint16_t cmd;
1912
1913 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
1914 vdev->host.bus, vdev->host.slot, vdev->host.function);
1915
1916 vfio_disable_interrupts(vdev);
1917
1918 /*
1919 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
1920 * Also put INTx Disable in known state.
1921 */
1922 cmd = vfio_pci_read_config(pdev, PCI_COMMAND, 2);
1923 cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
1924 PCI_COMMAND_INTX_DISABLE);
1925 vfio_pci_write_config(pdev, PCI_COMMAND, cmd, 2);
1926
1927 if (vdev->reset_works) {
1928 if (ioctl(vdev->fd, VFIO_DEVICE_RESET)) {
1929 error_report("vfio: Error unable to reset physical device "
1930 "(%04x:%02x:%02x.%x): %m\n", vdev->host.domain,
1931 vdev->host.bus, vdev->host.slot, vdev->host.function);
1932 }
1933 }
1934
1935 vfio_enable_intx(vdev);
1936 }
1937
1938 static Property vfio_pci_dev_properties[] = {
1939 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIODevice, host),
1940 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIODevice,
1941 intx.mmap_timeout, 1100),
1942 /*
1943 * TODO - support passed fds... is this necessary?
1944 * DEFINE_PROP_STRING("vfiofd", VFIODevice, vfiofd_name),
1945 * DEFINE_PROP_STRING("vfiogroupfd, VFIODevice, vfiogroupfd_name),
1946 */
1947 DEFINE_PROP_END_OF_LIST(),
1948 };
1949
1950
1951 static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
1952 {
1953 DeviceClass *dc = DEVICE_CLASS(klass);
1954 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
1955
1956 dc->reset = vfio_pci_reset;
1957 dc->props = vfio_pci_dev_properties;
1958 pdc->init = vfio_initfn;
1959 pdc->exit = vfio_exitfn;
1960 pdc->config_read = vfio_pci_read_config;
1961 pdc->config_write = vfio_pci_write_config;
1962 }
1963
1964 static const TypeInfo vfio_pci_dev_info = {
1965 .name = "vfio-pci",
1966 .parent = TYPE_PCI_DEVICE,
1967 .instance_size = sizeof(VFIODevice),
1968 .class_init = vfio_pci_dev_class_init,
1969 };
1970
1971 static void register_vfio_pci_dev_type(void)
1972 {
1973 type_register_static(&vfio_pci_dev_info);
1974 }
1975
1976 type_init(register_vfio_pci_dev_type)