hw/virtio-pci.c

   1 /*
   2  * Virtio PCI Bindings
   3  *
   4  * Copyright IBM, Corp. 2007
   5  * Copyright (c) 2009 CodeSourcery
   6  *
   7  * Authors:
   8  *  Anthony Liguori   <aliguori@us.ibm.com>
   9  *  Paul Brook        <paul@codesourcery.com>
  10  *
  11  * This work is licensed under the terms of the GNU GPL, version 2.  See
  12  * the COPYING file in the top-level directory.
  13  *
  14  */
  15
  16 #include <inttypes.h>
  17
  18 #include "virtio.h"
  19 #include "pci.h"
  20 #include "sysemu.h"
  21 #include "msix.h"
  22 #include "net.h"
  23 #include "loader.h"
  24
  25 /* from Linux's linux/virtio_pci.h */
  26
  27 /* A 32-bit r/o bitmask of the features supported by the host */
  28 #define VIRTIO_PCI_HOST_FEATURES        0
  29
  30 /* A 32-bit r/w bitmask of features activated by the guest */
  31 #define VIRTIO_PCI_GUEST_FEATURES       4
  32
  33 /* A 32-bit r/w PFN for the currently selected queue */
  34 #define VIRTIO_PCI_QUEUE_PFN            8
  35
  36 /* A 16-bit r/o queue size for the currently selected queue */
  37 #define VIRTIO_PCI_QUEUE_NUM            12
  38
  39 /* A 16-bit r/w queue selector */
  40 #define VIRTIO_PCI_QUEUE_SEL            14
  41
  42 /* A 16-bit r/w queue notifier */
  43 #define VIRTIO_PCI_QUEUE_NOTIFY         16
  44
  45 /* An 8-bit device status register.  */
  46 #define VIRTIO_PCI_STATUS               18
  47
  48 /* An 8-bit r/o interrupt status register.  Reading the value will return the
  49  * current contents of the ISR and will also clear it.  This is effectively
  50  * a read-and-acknowledge. */
  51 #define VIRTIO_PCI_ISR                  19
  52
  53 /* MSI-X registers: only enabled if MSI-X is enabled. */
  54 /* A 16-bit vector for configuration changes. */
  55 #define VIRTIO_MSI_CONFIG_VECTOR        20
  56 /* A 16-bit vector for selected queue notifications. */
  57 #define VIRTIO_MSI_QUEUE_VECTOR         22
  58
  59 /* Config space size */
  60 #define VIRTIO_PCI_CONFIG_NOMSI         20
  61 #define VIRTIO_PCI_CONFIG_MSI           24
  62 #define VIRTIO_PCI_REGION_SIZE(dev)     (msix_present(dev) ? \
  63                                          VIRTIO_PCI_CONFIG_MSI : \
  64                                          VIRTIO_PCI_CONFIG_NOMSI)
  65
  66 /* The remaining space is defined by each driver as the per-driver
  67  * configuration space */
  68 #define VIRTIO_PCI_CONFIG(dev)          (msix_enabled(dev) ? \
  69                                          VIRTIO_PCI_CONFIG_MSI : \
  70                                          VIRTIO_PCI_CONFIG_NOMSI)
  71
  72 /* Virtio ABI version, if we increment this, we break the guest driver. */
  73 #define VIRTIO_PCI_ABI_VERSION          0
  74
  75 /* How many bits to shift physical queue address written to QUEUE_PFN.
  76  * 12 is historical, and due to x86 page size. */
  77 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT    12
  78
  79 /* QEMU doesn't strictly need write barriers since everything runs in
  80  * lock-step.  We'll leave the calls to wmb() in though to make it obvious for
  81  * KVM or if kqemu gets SMP support.
  82  */
  83 #define wmb() do { } while (0)
  84
  85 /* PCI bindings.  */
  86
  87 typedef struct {
  88     PCIDevice pci_dev;
  89     VirtIODevice *vdev;
  90     uint32_t addr;
  91     uint32_t class_code;
  92     uint32_t nvectors;
  93     DriveInfo *dinfo;
  94     NICConf nic;
  95 } VirtIOPCIProxy;
  96
  97 /* virtio device */
  98
  99 static void virtio_pci_notify(void *opaque, uint16_t vector)
 100 {
 101     VirtIOPCIProxy *proxy = opaque;
 102     if (msix_enabled(&proxy->pci_dev))
 103         msix_notify(&proxy->pci_dev, vector);
 104     else
 105         qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
 106 }
 107
 108 static void virtio_pci_save_config(void * opaque, QEMUFile *f)
 109 {
 110     VirtIOPCIProxy *proxy = opaque;
 111     pci_device_save(&proxy->pci_dev, f);
 112     msix_save(&proxy->pci_dev, f);
 113     if (msix_present(&proxy->pci_dev))
 114         qemu_put_be16(f, proxy->vdev->config_vector);
 115 }
 116
 117 static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
 118 {
 119     VirtIOPCIProxy *proxy = opaque;
 120     if (msix_present(&proxy->pci_dev))
 121         qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
 122 }
 123
 124 static int virtio_pci_load_config(void * opaque, QEMUFile *f)
 125 {
 126     VirtIOPCIProxy *proxy = opaque;
 127     int ret;
 128     ret = pci_device_load(&proxy->pci_dev, f);
 129     if (ret) {
 130         return ret;
 131     }
 132     msix_load(&proxy->pci_dev, f);
 133     if (msix_present(&proxy->pci_dev)) {
 134         qemu_get_be16s(f, &proxy->vdev->config_vector);
 135     } else {
 136         proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
 137     }
 138     if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
 139         return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
 140     }
 141     return 0;
 142 }
 143
 144 static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
 145 {
 146     VirtIOPCIProxy *proxy = opaque;
 147     uint16_t vector;
 148     if (msix_present(&proxy->pci_dev)) {
 149         qemu_get_be16s(f, &vector);
 150     } else {
 151         vector = VIRTIO_NO_VECTOR;
 152     }
 153     virtio_queue_set_vector(proxy->vdev, n, vector);
 154     if (vector != VIRTIO_NO_VECTOR) {
 155         return msix_vector_use(&proxy->pci_dev, vector);
 156     }
 157     return 0;
 158 }
 159
 160 static void virtio_pci_reset(DeviceState *d)
 161 {
 162     VirtIOPCIProxy *proxy = container_of(d, VirtIOPCIProxy, pci_dev.qdev);
 163     virtio_reset(proxy->vdev);
 164     msix_reset(&proxy->pci_dev);
 165 }
 166
 167 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
 168 {
 169     VirtIOPCIProxy *proxy = opaque;
 170     VirtIODevice *vdev = proxy->vdev;
 171     target_phys_addr_t pa;
 172
 173     switch (addr) {
 174     case VIRTIO_PCI_GUEST_FEATURES:
 175         /* Guest does not negotiate properly?  We have to assume nothing. */
 176         if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
 177             if (vdev->bad_features)
 178                 val = vdev->bad_features(vdev);
 179             else
 180                 val = 0;
 181         }
 182         if (vdev->set_features)
 183             vdev->set_features(vdev, val);
 184         vdev->features = val;
 185         break;
 186     case VIRTIO_PCI_QUEUE_PFN:
 187         pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
 188         if (pa == 0)
 189             virtio_pci_reset(&proxy->pci_dev.qdev);
 190         else
 191             virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
 192         break;
 193     case VIRTIO_PCI_QUEUE_SEL:
 194         if (val < VIRTIO_PCI_QUEUE_MAX)
 195             vdev->queue_sel = val;
 196         break;
 197     case VIRTIO_PCI_QUEUE_NOTIFY:
 198         virtio_queue_notify(vdev, val);
 199         break;
 200     case VIRTIO_PCI_STATUS:
 201         vdev->status = val & 0xFF;
 202         if (vdev->status == 0)
 203             virtio_pci_reset(&proxy->pci_dev.qdev);
 204         break;
 205     case VIRTIO_MSI_CONFIG_VECTOR:
 206         msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
 207         /* Make it possible for guest to discover an error took place. */
 208         if (msix_vector_use(&proxy->pci_dev, val) < 0)
 209             val = VIRTIO_NO_VECTOR;
 210         vdev->config_vector = val;
 211         break;
 212     case VIRTIO_MSI_QUEUE_VECTOR:
 213         msix_vector_unuse(&proxy->pci_dev,
 214                           virtio_queue_vector(vdev, vdev->queue_sel));
 215         /* Make it possible for guest to discover an error took place. */
 216         if (msix_vector_use(&proxy->pci_dev, val) < 0)
 217             val = VIRTIO_NO_VECTOR;
 218         virtio_queue_set_vector(vdev, vdev->queue_sel, val);
 219         break;
 220     default:
 221         fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
 222                 __func__, addr, val);
 223         break;
 224     }
 225 }
 226
 227 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
 228 {
 229     VirtIODevice *vdev = proxy->vdev;
 230     uint32_t ret = 0xFFFFFFFF;
 231
 232     switch (addr) {
 233     case VIRTIO_PCI_HOST_FEATURES:
 234         ret = vdev->get_features(vdev);
 235         ret |= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
 236         ret |= (1 << VIRTIO_RING_F_INDIRECT_DESC);
 237         ret |= (1 << VIRTIO_F_BAD_FEATURE);
 238         break;
 239     case VIRTIO_PCI_GUEST_FEATURES:
 240         ret = vdev->features;
 241         break;
 242     case VIRTIO_PCI_QUEUE_PFN:
 243         ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
 244               >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
 245         break;
 246     case VIRTIO_PCI_QUEUE_NUM:
 247         ret = virtio_queue_get_num(vdev, vdev->queue_sel);
 248         break;
 249     case VIRTIO_PCI_QUEUE_SEL:
 250         ret = vdev->queue_sel;
 251         break;
 252     case VIRTIO_PCI_STATUS:
 253         ret = vdev->status;
 254         break;
 255     case VIRTIO_PCI_ISR:
 256         /* reading from the ISR also clears it. */
 257         ret = vdev->isr;
 258         vdev->isr = 0;
 259         qemu_set_irq(proxy->pci_dev.irq[0], 0);
 260         break;
 261     case VIRTIO_MSI_CONFIG_VECTOR:
 262         ret = vdev->config_vector;
 263         break;
 264     case VIRTIO_MSI_QUEUE_VECTOR:
 265         ret = virtio_queue_vector(vdev, vdev->queue_sel);
 266         break;
 267     default:
 268         break;
 269     }
 270
 271     return ret;
 272 }
 273
 274 static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
 275 {
 276     VirtIOPCIProxy *proxy = opaque;
 277     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 278     addr -= proxy->addr;
 279     if (addr < config)
 280         return virtio_ioport_read(proxy, addr);
 281     addr -= config;
 282     return virtio_config_readb(proxy->vdev, addr);
 283 }
 284
 285 static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
 286 {
 287     VirtIOPCIProxy *proxy = opaque;
 288     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 289     addr -= proxy->addr;
 290     if (addr < config)
 291         return virtio_ioport_read(proxy, addr);
 292     addr -= config;
 293     return virtio_config_readw(proxy->vdev, addr);
 294 }
 295
 296 static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
 297 {
 298     VirtIOPCIProxy *proxy = opaque;
 299     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 300     addr -= proxy->addr;
 301     if (addr < config)
 302         return virtio_ioport_read(proxy, addr);
 303     addr -= config;
 304     return virtio_config_readl(proxy->vdev, addr);
 305 }
 306
 307 static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
 308 {
 309     VirtIOPCIProxy *proxy = opaque;
 310     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 311     addr -= proxy->addr;
 312     if (addr < config) {
 313         virtio_ioport_write(proxy, addr, val);
 314         return;
 315     }
 316     addr -= config;
 317     virtio_config_writeb(proxy->vdev, addr, val);
 318 }
 319
 320 static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
 321 {
 322     VirtIOPCIProxy *proxy = opaque;
 323     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 324     addr -= proxy->addr;
 325     if (addr < config) {
 326         virtio_ioport_write(proxy, addr, val);
 327         return;
 328     }
 329     addr -= config;
 330     virtio_config_writew(proxy->vdev, addr, val);
 331 }
 332
 333 static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
 334 {
 335     VirtIOPCIProxy *proxy = opaque;
 336     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 337     addr -= proxy->addr;
 338     if (addr < config) {
 339         virtio_ioport_write(proxy, addr, val);
 340         return;
 341     }
 342     addr -= config;
 343     virtio_config_writel(proxy->vdev, addr, val);
 344 }
 345
 346 static void virtio_map(PCIDevice *pci_dev, int region_num,
 347                        uint32_t addr, uint32_t size, int type)
 348 {
 349     VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
 350     VirtIODevice *vdev = proxy->vdev;
 351     unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
 352
 353     proxy->addr = addr;
 354
 355     register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
 356     register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
 357     register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
 358     register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
 359     register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
 360     register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
 361
 362     if (vdev->config_len)
 363         vdev->get_config(vdev, vdev->config);
 364 }
 365
 366 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
 367                                 uint32_t val, int len)
 368 {
 369     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 370
 371     if (PCI_COMMAND == address) {
 372         if (!(val & PCI_COMMAND_MASTER)) {
 373             proxy->vdev->status &= !VIRTIO_CONFIG_S_DRIVER_OK;
 374         }
 375     }
 376
 377     pci_default_write_config(pci_dev, address, val, len);
 378     msix_write_config(pci_dev, address, val, len);
 379 }
 380
 381 static const VirtIOBindings virtio_pci_bindings = {
 382     .notify = virtio_pci_notify,
 383     .save_config = virtio_pci_save_config,
 384     .load_config = virtio_pci_load_config,
 385     .save_queue = virtio_pci_save_queue,
 386     .load_queue = virtio_pci_load_queue,
 387 };
 388
 389 static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
 390                             uint16_t vendor, uint16_t device,
 391                             uint16_t class_code, uint8_t pif)
 392 {
 393     uint8_t *config;
 394     uint32_t size;
 395
 396     proxy->vdev = vdev;
 397
 398     config = proxy->pci_dev.config;
 399     pci_config_set_vendor_id(config, vendor);
 400     pci_config_set_device_id(config, device);
 401
 402     config[0x08] = VIRTIO_PCI_ABI_VERSION;
 403
 404     config[0x09] = pif;
 405     pci_config_set_class(config, class_code);
 406     config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
 407
 408     config[0x2c] = vendor & 0xFF;
 409     config[0x2d] = (vendor >> 8) & 0xFF;
 410     config[0x2e] = vdev->device_id & 0xFF;
 411     config[0x2f] = (vdev->device_id >> 8) & 0xFF;
 412
 413     config[0x3d] = 1;
 414
 415     if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
 416         pci_register_bar(&proxy->pci_dev, 1,
 417                          msix_bar_size(&proxy->pci_dev),
 418                          PCI_BASE_ADDRESS_SPACE_MEMORY,
 419                          msix_mmio_map);
 420     } else
 421         vdev->nvectors = 0;
 422
 423     proxy->pci_dev.config_write = virtio_write_config;
 424
 425     size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
 426     if (size & (size-1))
 427         size = 1 << qemu_fls(size);
 428
 429     pci_register_bar(&proxy->pci_dev, 0, size, PCI_BASE_ADDRESS_SPACE_IO,
 430                            virtio_map);
 431
 432     virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
 433 }
 434
 435 static int virtio_blk_init_pci(PCIDevice *pci_dev)
 436 {
 437     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 438     VirtIODevice *vdev;
 439
 440     if (proxy->class_code != PCI_CLASS_STORAGE_SCSI &&
 441         proxy->class_code != PCI_CLASS_STORAGE_OTHER)
 442         proxy->class_code = PCI_CLASS_STORAGE_SCSI;
 443
 444     if (!proxy->dinfo) {
 445         qemu_error("virtio-blk-pci: drive property not set\n");
 446         return -1;
 447     }
 448     vdev = virtio_blk_init(&pci_dev->qdev, proxy->dinfo);
 449     vdev->nvectors = proxy->nvectors;
 450     virtio_init_pci(proxy, vdev,
 451                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 452                     PCI_DEVICE_ID_VIRTIO_BLOCK,
 453                     proxy->class_code, 0x00);
 454     /* make the actual value visible */
 455     proxy->nvectors = vdev->nvectors;
 456     return 0;
 457 }
 458
 459 static int virtio_exit_pci(PCIDevice *pci_dev)
 460 {
 461     return msix_uninit(pci_dev);
 462 }
 463
 464 static int virtio_blk_exit_pci(PCIDevice *pci_dev)
 465 {
 466     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 467
 468     drive_uninit(proxy->dinfo);
 469     return virtio_exit_pci(pci_dev);
 470 }
 471
 472 static int virtio_console_init_pci(PCIDevice *pci_dev)
 473 {
 474     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 475     VirtIODevice *vdev;
 476
 477     if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
 478         proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
 479         proxy->class_code != PCI_CLASS_OTHERS)          /* qemu-kvm  */
 480         proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;
 481
 482     vdev = virtio_console_init(&pci_dev->qdev);
 483     if (!vdev) {
 484         return -1;
 485     }
 486     virtio_init_pci(proxy, vdev,
 487                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 488                     PCI_DEVICE_ID_VIRTIO_CONSOLE,
 489                     proxy->class_code, 0x00);
 490     return 0;
 491 }
 492
 493 static int virtio_net_init_pci(PCIDevice *pci_dev)
 494 {
 495     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 496     VirtIODevice *vdev;
 497
 498     vdev = virtio_net_init(&pci_dev->qdev, &proxy->nic);
 499
 500     vdev->nvectors = proxy->nvectors;
 501     virtio_init_pci(proxy, vdev,
 502                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 503                     PCI_DEVICE_ID_VIRTIO_NET,
 504                     PCI_CLASS_NETWORK_ETHERNET,
 505                     0x00);
 506
 507     /* make the actual value visible */
 508     proxy->nvectors = vdev->nvectors;
 509
 510     if (!pci_dev->qdev.hotplugged) {
 511         static int loaded = 0;
 512         if (!loaded) {
 513             rom_add_option("pxe-virtio.bin");
 514             loaded = 1;
 515         }
 516     }
 517     return 0;
 518 }
 519
 520 static int virtio_net_exit_pci(PCIDevice *pci_dev)
 521 {
 522     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 523
 524     virtio_net_exit(proxy->vdev);
 525     return virtio_exit_pci(pci_dev);
 526 }
 527
 528 static int virtio_balloon_init_pci(PCIDevice *pci_dev)
 529 {
 530     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 531     VirtIODevice *vdev;
 532
 533     vdev = virtio_balloon_init(&pci_dev->qdev);
 534     virtio_init_pci(proxy, vdev,
 535                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 536                     PCI_DEVICE_ID_VIRTIO_BALLOON,
 537                     PCI_CLASS_MEMORY_RAM,
 538                     0x00);
 539     return 0;
 540 }
 541
 542 static PCIDeviceInfo virtio_info[] = {
 543     {
 544         .qdev.name = "virtio-blk-pci",
 545         .qdev.size = sizeof(VirtIOPCIProxy),
 546         .init      = virtio_blk_init_pci,
 547         .exit      = virtio_blk_exit_pci,
 548         .qdev.props = (Property[]) {
 549             DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
 550             DEFINE_PROP_DRIVE("drive", VirtIOPCIProxy, dinfo),
 551             DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
 552             DEFINE_PROP_END_OF_LIST(),
 553         },
 554         .qdev.reset = virtio_pci_reset,
 555     },{
 556         .qdev.name  = "virtio-net-pci",
 557         .qdev.size  = sizeof(VirtIOPCIProxy),
 558         .init       = virtio_net_init_pci,
 559         .exit       = virtio_net_exit_pci,
 560         .qdev.props = (Property[]) {
 561             DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
 562             DEFINE_NIC_PROPERTIES(VirtIOPCIProxy, nic),
 563             DEFINE_PROP_END_OF_LIST(),
 564         },
 565         .qdev.reset = virtio_pci_reset,
 566     },{
 567         .qdev.name = "virtio-console-pci",
 568         .qdev.size = sizeof(VirtIOPCIProxy),
 569         .init      = virtio_console_init_pci,
 570         .exit      = virtio_exit_pci,
 571         .qdev.props = (Property[]) {
 572             DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
 573             DEFINE_PROP_END_OF_LIST(),
 574         },
 575         .qdev.reset = virtio_pci_reset,
 576     },{
 577         .qdev.name = "virtio-balloon-pci",
 578         .qdev.size = sizeof(VirtIOPCIProxy),
 579         .init      = virtio_balloon_init_pci,
 580         .exit      = virtio_exit_pci,
 581         .qdev.reset = virtio_pci_reset,
 582     },{
 583         /* end of list */
 584     }
 585 };
 586
 587 static void virtio_pci_register_devices(void)
 588 {
 589     pci_qdev_register_many(virtio_info);
 590 }
 591
 592 device_init(virtio_pci_register_devices)