2 * XEN platform pci device, formerly known as the event channel device
4 * Copyright (c) 2003-2004 Intel Corp.
5 * Copyright (c) 2006 XenSource
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "hw/i386/pc.h"
30 #include "hw/pci/pci.h"
32 #include "hw/xen/xen_common.h"
33 #include "hw/xen/xen_backend.h"
35 #include "exec/address-spaces.h"
39 //#define DEBUG_PLATFORM
42 #define DPRINTF(fmt, ...) do { \
43 fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
46 #define DPRINTF(fmt, ...) do { } while (0)
49 #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
51 typedef struct PCIXenPlatformState
{
53 MemoryRegion fixed_io
;
55 MemoryRegion mmio_bar
;
56 uint8_t flags
; /* used only for version_id == 2 */
57 int drivers_blacklisted
;
58 uint16_t driver_product_version
;
60 /* Log from guest drivers */
61 char log_buffer
[4096];
63 } PCIXenPlatformState
;
65 #define XEN_PLATFORM_IOPORT 0x10
67 /* Send bytes to syslog */
68 static void log_writeb(PCIXenPlatformState
*s
, char val
)
70 if (val
== '\n' || s
->log_buffer_off
== sizeof(s
->log_buffer
) - 1) {
72 s
->log_buffer
[s
->log_buffer_off
] = 0;
73 trace_xen_platform_log(s
->log_buffer
);
74 s
->log_buffer_off
= 0;
76 s
->log_buffer
[s
->log_buffer_off
++] = val
;
80 /* Xen Platform, Fixed IOPort */
81 #define UNPLUG_ALL_IDE_DISKS 1
82 #define UNPLUG_ALL_NICS 2
83 #define UNPLUG_AUX_IDE_DISKS 4
85 static void unplug_nic(PCIBus
*b
, PCIDevice
*d
, void *o
)
87 /* We have to ignore passthrough devices */
88 if (pci_get_word(d
->config
+ PCI_CLASS_DEVICE
) ==
89 PCI_CLASS_NETWORK_ETHERNET
90 && strcmp(d
->name
, "xen-pci-passthrough") != 0) {
95 static void pci_unplug_nics(PCIBus
*bus
)
97 pci_for_each_device(bus
, 0, unplug_nic
, NULL
);
100 static void unplug_disks(PCIBus
*b
, PCIDevice
*d
, void *o
)
102 /* We have to ignore passthrough devices */
103 if (pci_get_word(d
->config
+ PCI_CLASS_DEVICE
) ==
104 PCI_CLASS_STORAGE_IDE
105 && strcmp(d
->name
, "xen-pci-passthrough") != 0) {
106 qdev_unplug(&(d
->qdev
), NULL
);
110 static void pci_unplug_disks(PCIBus
*bus
)
112 pci_for_each_device(bus
, 0, unplug_disks
, NULL
);
115 static void platform_fixed_ioport_writew(void *opaque
, uint32_t addr
, uint32_t val
)
117 PCIXenPlatformState
*s
= opaque
;
121 /* Unplug devices. Value is a bitmask of which devices to
122 unplug, with bit 0 the IDE devices, bit 1 the network
123 devices, and bit 2 the non-primary-master IDE devices. */
124 if (val
& UNPLUG_ALL_IDE_DISKS
) {
125 DPRINTF("unplug disks\n");
128 pci_unplug_disks(s
->pci_dev
.bus
);
130 if (val
& UNPLUG_ALL_NICS
) {
131 DPRINTF("unplug nics\n");
132 pci_unplug_nics(s
->pci_dev
.bus
);
134 if (val
& UNPLUG_AUX_IDE_DISKS
) {
135 DPRINTF("unplug auxiliary disks not supported\n");
141 DPRINTF("Citrix Windows PV drivers loaded in guest\n");
144 DPRINTF("Guest claimed to be running PV product 0?\n");
147 DPRINTF("Unknown PV product %d loaded in guest\n", val
);
150 s
->driver_product_version
= val
;
155 static void platform_fixed_ioport_writel(void *opaque
, uint32_t addr
,
160 /* PV driver version */
165 static void platform_fixed_ioport_writeb(void *opaque
, uint32_t addr
, uint32_t val
)
167 PCIXenPlatformState
*s
= opaque
;
170 case 0: /* Platform flags */ {
171 hvmmem_type_t mem_type
= (val
& PFFLAG_ROM_LOCK
) ?
172 HVMMEM_ram_ro
: HVMMEM_ram_rw
;
173 if (xc_hvm_set_mem_type(xen_xc
, xen_domid
, mem_type
, 0xc0, 0x40)) {
174 DPRINTF("unable to change ro/rw state of ROM memory area!\n");
176 s
->flags
= val
& PFFLAG_ROM_LOCK
;
177 DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
178 (mem_type
== HVMMEM_ram_ro
? "ro":"rw"));
188 static uint32_t platform_fixed_ioport_readw(void *opaque
, uint32_t addr
)
190 PCIXenPlatformState
*s
= opaque
;
194 if (s
->drivers_blacklisted
) {
195 /* The drivers will recognise this magic number and refuse
199 /* Magic value so that you can identify the interface. */
207 static uint32_t platform_fixed_ioport_readb(void *opaque
, uint32_t addr
)
209 PCIXenPlatformState
*s
= opaque
;
223 static void platform_fixed_ioport_reset(void *opaque
)
225 PCIXenPlatformState
*s
= opaque
;
227 platform_fixed_ioport_writeb(s
, 0, 0);
230 static uint64_t platform_fixed_ioport_read(void *opaque
,
236 return platform_fixed_ioport_readb(opaque
, addr
);
238 return platform_fixed_ioport_readw(opaque
, addr
);
244 static void platform_fixed_ioport_write(void *opaque
, hwaddr addr
,
246 uint64_t val
, unsigned size
)
250 platform_fixed_ioport_writeb(opaque
, addr
, val
);
253 platform_fixed_ioport_writew(opaque
, addr
, val
);
256 platform_fixed_ioport_writel(opaque
, addr
, val
);
262 static const MemoryRegionOps platform_fixed_io_ops
= {
263 .read
= platform_fixed_ioport_read
,
264 .write
= platform_fixed_ioport_write
,
269 .min_access_size
= 1,
270 .max_access_size
= 4,
273 .endianness
= DEVICE_LITTLE_ENDIAN
,
276 static void platform_fixed_ioport_init(PCIXenPlatformState
* s
)
278 memory_region_init_io(&s
->fixed_io
, OBJECT(s
), &platform_fixed_io_ops
, s
,
280 memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT
,
284 /* Xen Platform PCI Device */
286 static uint64_t xen_platform_ioport_readb(void *opaque
, hwaddr addr
,
290 return platform_fixed_ioport_readb(opaque
, 0);
296 static void xen_platform_ioport_writeb(void *opaque
, hwaddr addr
,
297 uint64_t val
, unsigned int size
)
299 PCIXenPlatformState
*s
= opaque
;
302 case 0: /* Platform flags */
303 platform_fixed_ioport_writeb(opaque
, 0, (uint32_t)val
);
306 log_writeb(s
, (uint32_t)val
);
313 static const MemoryRegionOps xen_pci_io_ops
= {
314 .read
= xen_platform_ioport_readb
,
315 .write
= xen_platform_ioport_writeb
,
316 .impl
.min_access_size
= 1,
317 .impl
.max_access_size
= 1,
320 static void platform_ioport_bar_setup(PCIXenPlatformState
*d
)
322 memory_region_init_io(&d
->bar
, OBJECT(d
), &xen_pci_io_ops
, d
,
326 static uint64_t platform_mmio_read(void *opaque
, hwaddr addr
,
329 DPRINTF("Warning: attempted read from physical address "
330 "0x" TARGET_FMT_plx
" in xen platform mmio space\n", addr
);
335 static void platform_mmio_write(void *opaque
, hwaddr addr
,
336 uint64_t val
, unsigned size
)
338 DPRINTF("Warning: attempted write of 0x%"PRIx64
" to physical "
339 "address 0x" TARGET_FMT_plx
" in xen platform mmio space\n",
343 static const MemoryRegionOps platform_mmio_handler
= {
344 .read
= &platform_mmio_read
,
345 .write
= &platform_mmio_write
,
346 .endianness
= DEVICE_NATIVE_ENDIAN
,
349 static void platform_mmio_setup(PCIXenPlatformState
*d
)
351 memory_region_init_io(&d
->mmio_bar
, OBJECT(d
), &platform_mmio_handler
, d
,
352 "xen-mmio", 0x1000000);
355 static int xen_platform_post_load(void *opaque
, int version_id
)
357 PCIXenPlatformState
*s
= opaque
;
359 platform_fixed_ioport_writeb(s
, 0, s
->flags
);
364 static const VMStateDescription vmstate_xen_platform
= {
367 .minimum_version_id
= 4,
368 .minimum_version_id_old
= 4,
369 .post_load
= xen_platform_post_load
,
370 .fields
= (VMStateField
[]) {
371 VMSTATE_PCI_DEVICE(pci_dev
, PCIXenPlatformState
),
372 VMSTATE_UINT8(flags
, PCIXenPlatformState
),
373 VMSTATE_END_OF_LIST()
377 static int xen_platform_initfn(PCIDevice
*dev
)
379 PCIXenPlatformState
*d
= DO_UPCAST(PCIXenPlatformState
, pci_dev
, dev
);
382 pci_conf
= d
->pci_dev
.config
;
384 pci_set_word(pci_conf
+ PCI_COMMAND
, PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
);
386 pci_config_set_prog_interface(pci_conf
, 0);
388 pci_conf
[PCI_INTERRUPT_PIN
] = 1;
390 platform_ioport_bar_setup(d
);
391 pci_register_bar(&d
->pci_dev
, 0, PCI_BASE_ADDRESS_SPACE_IO
, &d
->bar
);
393 /* reserve 16MB mmio address for share memory*/
394 platform_mmio_setup(d
);
395 pci_register_bar(&d
->pci_dev
, 1, PCI_BASE_ADDRESS_MEM_PREFETCH
,
398 platform_fixed_ioport_init(d
);
403 static void platform_reset(DeviceState
*dev
)
405 PCIXenPlatformState
*s
= DO_UPCAST(PCIXenPlatformState
, pci_dev
.qdev
, dev
);
407 platform_fixed_ioport_reset(s
);
410 static void xen_platform_class_init(ObjectClass
*klass
, void *data
)
412 DeviceClass
*dc
= DEVICE_CLASS(klass
);
413 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
415 k
->init
= xen_platform_initfn
;
416 k
->vendor_id
= PCI_VENDOR_ID_XEN
;
417 k
->device_id
= PCI_DEVICE_ID_XEN_PLATFORM
;
418 k
->class_id
= PCI_CLASS_OTHERS
<< 8 | 0x80;
419 k
->subsystem_vendor_id
= PCI_VENDOR_ID_XEN
;
420 k
->subsystem_id
= PCI_DEVICE_ID_XEN_PLATFORM
;
422 dc
->desc
= "XEN platform pci device";
423 dc
->reset
= platform_reset
;
424 dc
->vmsd
= &vmstate_xen_platform
;
427 static const TypeInfo xen_platform_info
= {
428 .name
= "xen-platform",
429 .parent
= TYPE_PCI_DEVICE
,
430 .instance_size
= sizeof(PCIXenPlatformState
),
431 .class_init
= xen_platform_class_init
,
434 static void xen_platform_register_types(void)
436 type_register_static(&xen_platform_info
);
439 type_init(xen_platform_register_types
)