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Multithreaded locking fixes.
[qemu.git] / linux-user / main.c
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26
27 #include "qemu.h"
28 #include "qemu-common.h"
29 /* For tb_lock */
30 #include "exec-all.h"
31
32 #define DEBUG_LOGFILE "/tmp/qemu.log"
33
34 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
35 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
36
37 #if defined(__i386__) && !defined(CONFIG_STATIC)
38 /* Force usage of an ELF interpreter even if it is an ELF shared
39 object ! */
40 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
41 #endif
42
43 /* for recent libc, we add these dummy symbols which are not declared
44 when generating a linked object (bug in ld ?) */
45 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
46 asm(".globl __preinit_array_start\n"
47 ".globl __preinit_array_end\n"
48 ".globl __init_array_start\n"
49 ".globl __init_array_end\n"
50 ".globl __fini_array_start\n"
51 ".globl __fini_array_end\n"
52 ".section \".rodata\"\n"
53 "__preinit_array_start:\n"
54 "__preinit_array_end:\n"
55 "__init_array_start:\n"
56 "__init_array_end:\n"
57 "__fini_array_start:\n"
58 "__fini_array_end:\n"
59 ".long 0\n"
60 ".previous\n");
61 #endif
62
63 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
64 we allocate a bigger stack. Need a better solution, for example
65 by remapping the process stack directly at the right place */
66 unsigned long x86_stack_size = 512 * 1024;
67
68 void gemu_log(const char *fmt, ...)
69 {
70 va_list ap;
71
72 va_start(ap, fmt);
73 vfprintf(stderr, fmt, ap);
74 va_end(ap);
75 }
76
77 void cpu_outb(CPUState *env, int addr, int val)
78 {
79 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
80 }
81
82 void cpu_outw(CPUState *env, int addr, int val)
83 {
84 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
85 }
86
87 void cpu_outl(CPUState *env, int addr, int val)
88 {
89 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
90 }
91
92 int cpu_inb(CPUState *env, int addr)
93 {
94 fprintf(stderr, "inb: port=0x%04x\n", addr);
95 return 0;
96 }
97
98 int cpu_inw(CPUState *env, int addr)
99 {
100 fprintf(stderr, "inw: port=0x%04x\n", addr);
101 return 0;
102 }
103
104 int cpu_inl(CPUState *env, int addr)
105 {
106 fprintf(stderr, "inl: port=0x%04x\n", addr);
107 return 0;
108 }
109
110 int cpu_get_pic_interrupt(CPUState *env)
111 {
112 return -1;
113 }
114
115 /* timers for rdtsc */
116
117 #if 0
118
119 static uint64_t emu_time;
120
121 int64_t cpu_get_real_ticks(void)
122 {
123 return emu_time++;
124 }
125
126 #endif
127
128 #if defined(USE_NPTL)
129 /***********************************************************/
130 /* Helper routines for implementing atomic operations. */
131
132 /* To implement exclusive operations we force all cpus to syncronise.
133 We don't require a full sync, only that no cpus are executing guest code.
134 The alternative is to map target atomic ops onto host equivalents,
135 which requires quite a lot of per host/target work. */
136 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
137 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
138 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
139 static int pending_cpus;
140
141 /* Make sure everything is in a consistent state for calling fork(). */
142 void fork_start(void)
143 {
144 mmap_fork_start();
145 pthread_mutex_lock(&tb_lock);
146 pthread_mutex_lock(&exclusive_lock);
147 }
148
149 void fork_end(int child)
150 {
151 if (child) {
152 /* Child processes created by fork() only have a single thread.
153 Discard information about the parent threads. */
154 first_cpu = thread_env;
155 thread_env->next_cpu = NULL;
156 pending_cpus = 0;
157 pthread_mutex_init(&exclusive_lock, NULL);
158 pthread_cond_init(&exclusive_cond, NULL);
159 pthread_cond_init(&exclusive_resume, NULL);
160 pthread_mutex_init(&tb_lock, NULL);
161 } else {
162 pthread_mutex_unlock(&exclusive_lock);
163 pthread_mutex_unlock(&tb_lock);
164 }
165 mmap_fork_end(child);
166 }
167
168 /* Wait for pending exclusive operations to complete. The exclusive lock
169 must be held. */
170 static inline void exclusive_idle(void)
171 {
172 while (pending_cpus) {
173 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
174 }
175 }
176
177 /* Start an exclusive operation.
178 Must only be called from outside cpu_arm_exec. */
179 static inline void start_exclusive(void)
180 {
181 CPUState *other;
182 pthread_mutex_lock(&exclusive_lock);
183 exclusive_idle();
184
185 pending_cpus = 1;
186 /* Make all other cpus stop executing. */
187 for (other = first_cpu; other; other = other->next_cpu) {
188 if (other->running) {
189 pending_cpus++;
190 cpu_interrupt(other, CPU_INTERRUPT_EXIT);
191 }
192 }
193 if (pending_cpus > 1) {
194 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
195 }
196 }
197
198 /* Finish an exclusive operation. */
199 static inline void end_exclusive(void)
200 {
201 pending_cpus = 0;
202 pthread_cond_broadcast(&exclusive_resume);
203 pthread_mutex_unlock(&exclusive_lock);
204 }
205
206 /* Wait for exclusive ops to finish, and begin cpu execution. */
207 static inline void cpu_exec_start(CPUState *env)
208 {
209 pthread_mutex_lock(&exclusive_lock);
210 exclusive_idle();
211 env->running = 1;
212 pthread_mutex_unlock(&exclusive_lock);
213 }
214
215 /* Mark cpu as not executing, and release pending exclusive ops. */
216 static inline void cpu_exec_end(CPUState *env)
217 {
218 pthread_mutex_lock(&exclusive_lock);
219 env->running = 0;
220 if (pending_cpus > 1) {
221 pending_cpus--;
222 if (pending_cpus == 1) {
223 pthread_cond_signal(&exclusive_cond);
224 }
225 }
226 exclusive_idle();
227 pthread_mutex_unlock(&exclusive_lock);
228 }
229 #else /* if !USE_NPTL */
230 /* These are no-ops because we are not threadsafe. */
231 static inline void cpu_exec_start(CPUState *env)
232 {
233 }
234
235 static inline void cpu_exec_end(CPUState *env)
236 {
237 }
238
239 static inline void start_exclusive(void)
240 {
241 }
242
243 static inline void end_exclusive(void)
244 {
245 }
246
247 void fork_start(void)
248 {
249 }
250
251 void fork_end(int child)
252 {
253 }
254 #endif
255
256
257 #ifdef TARGET_I386
258 /***********************************************************/
259 /* CPUX86 core interface */
260
261 void cpu_smm_update(CPUState *env)
262 {
263 }
264
265 uint64_t cpu_get_tsc(CPUX86State *env)
266 {
267 return cpu_get_real_ticks();
268 }
269
270 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
271 int flags)
272 {
273 unsigned int e1, e2;
274 uint32_t *p;
275 e1 = (addr << 16) | (limit & 0xffff);
276 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
277 e2 |= flags;
278 p = ptr;
279 p[0] = tswapl(e1);
280 p[1] = tswapl(e2);
281 }
282
283 #if TARGET_X86_64
284 uint64_t idt_table[512];
285
286 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
287 uint64_t addr, unsigned int sel)
288 {
289 uint32_t *p, e1, e2;
290 e1 = (addr & 0xffff) | (sel << 16);
291 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
292 p = ptr;
293 p[0] = tswap32(e1);
294 p[1] = tswap32(e2);
295 p[2] = tswap32(addr >> 32);
296 p[3] = 0;
297 }
298 /* only dpl matters as we do only user space emulation */
299 static void set_idt(int n, unsigned int dpl)
300 {
301 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
302 }
303 #else
304 uint64_t idt_table[256];
305
306 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
307 uint32_t addr, unsigned int sel)
308 {
309 uint32_t *p, e1, e2;
310 e1 = (addr & 0xffff) | (sel << 16);
311 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
312 p = ptr;
313 p[0] = tswap32(e1);
314 p[1] = tswap32(e2);
315 }
316
317 /* only dpl matters as we do only user space emulation */
318 static void set_idt(int n, unsigned int dpl)
319 {
320 set_gate(idt_table + n, 0, dpl, 0, 0);
321 }
322 #endif
323
324 void cpu_loop(CPUX86State *env)
325 {
326 int trapnr;
327 abi_ulong pc;
328 target_siginfo_t info;
329
330 for(;;) {
331 trapnr = cpu_x86_exec(env);
332 switch(trapnr) {
333 case 0x80:
334 /* linux syscall from int $0x80 */
335 env->regs[R_EAX] = do_syscall(env,
336 env->regs[R_EAX],
337 env->regs[R_EBX],
338 env->regs[R_ECX],
339 env->regs[R_EDX],
340 env->regs[R_ESI],
341 env->regs[R_EDI],
342 env->regs[R_EBP]);
343 break;
344 #ifndef TARGET_ABI32
345 case EXCP_SYSCALL:
346 /* linux syscall from syscall intruction */
347 env->regs[R_EAX] = do_syscall(env,
348 env->regs[R_EAX],
349 env->regs[R_EDI],
350 env->regs[R_ESI],
351 env->regs[R_EDX],
352 env->regs[10],
353 env->regs[8],
354 env->regs[9]);
355 env->eip = env->exception_next_eip;
356 break;
357 #endif
358 case EXCP0B_NOSEG:
359 case EXCP0C_STACK:
360 info.si_signo = SIGBUS;
361 info.si_errno = 0;
362 info.si_code = TARGET_SI_KERNEL;
363 info._sifields._sigfault._addr = 0;
364 queue_signal(env, info.si_signo, &info);
365 break;
366 case EXCP0D_GPF:
367 /* XXX: potential problem if ABI32 */
368 #ifndef TARGET_X86_64
369 if (env->eflags & VM_MASK) {
370 handle_vm86_fault(env);
371 } else
372 #endif
373 {
374 info.si_signo = SIGSEGV;
375 info.si_errno = 0;
376 info.si_code = TARGET_SI_KERNEL;
377 info._sifields._sigfault._addr = 0;
378 queue_signal(env, info.si_signo, &info);
379 }
380 break;
381 case EXCP0E_PAGE:
382 info.si_signo = SIGSEGV;
383 info.si_errno = 0;
384 if (!(env->error_code & 1))
385 info.si_code = TARGET_SEGV_MAPERR;
386 else
387 info.si_code = TARGET_SEGV_ACCERR;
388 info._sifields._sigfault._addr = env->cr[2];
389 queue_signal(env, info.si_signo, &info);
390 break;
391 case EXCP00_DIVZ:
392 #ifndef TARGET_X86_64
393 if (env->eflags & VM_MASK) {
394 handle_vm86_trap(env, trapnr);
395 } else
396 #endif
397 {
398 /* division by zero */
399 info.si_signo = SIGFPE;
400 info.si_errno = 0;
401 info.si_code = TARGET_FPE_INTDIV;
402 info._sifields._sigfault._addr = env->eip;
403 queue_signal(env, info.si_signo, &info);
404 }
405 break;
406 case EXCP01_SSTP:
407 case EXCP03_INT3:
408 #ifndef TARGET_X86_64
409 if (env->eflags & VM_MASK) {
410 handle_vm86_trap(env, trapnr);
411 } else
412 #endif
413 {
414 info.si_signo = SIGTRAP;
415 info.si_errno = 0;
416 if (trapnr == EXCP01_SSTP) {
417 info.si_code = TARGET_TRAP_BRKPT;
418 info._sifields._sigfault._addr = env->eip;
419 } else {
420 info.si_code = TARGET_SI_KERNEL;
421 info._sifields._sigfault._addr = 0;
422 }
423 queue_signal(env, info.si_signo, &info);
424 }
425 break;
426 case EXCP04_INTO:
427 case EXCP05_BOUND:
428 #ifndef TARGET_X86_64
429 if (env->eflags & VM_MASK) {
430 handle_vm86_trap(env, trapnr);
431 } else
432 #endif
433 {
434 info.si_signo = SIGSEGV;
435 info.si_errno = 0;
436 info.si_code = TARGET_SI_KERNEL;
437 info._sifields._sigfault._addr = 0;
438 queue_signal(env, info.si_signo, &info);
439 }
440 break;
441 case EXCP06_ILLOP:
442 info.si_signo = SIGILL;
443 info.si_errno = 0;
444 info.si_code = TARGET_ILL_ILLOPN;
445 info._sifields._sigfault._addr = env->eip;
446 queue_signal(env, info.si_signo, &info);
447 break;
448 case EXCP_INTERRUPT:
449 /* just indicate that signals should be handled asap */
450 break;
451 case EXCP_DEBUG:
452 {
453 int sig;
454
455 sig = gdb_handlesig (env, TARGET_SIGTRAP);
456 if (sig)
457 {
458 info.si_signo = sig;
459 info.si_errno = 0;
460 info.si_code = TARGET_TRAP_BRKPT;
461 queue_signal(env, info.si_signo, &info);
462 }
463 }
464 break;
465 default:
466 pc = env->segs[R_CS].base + env->eip;
467 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
468 (long)pc, trapnr);
469 abort();
470 }
471 process_pending_signals(env);
472 }
473 }
474 #endif
475
476 #ifdef TARGET_ARM
477
478 /* XXX: find a better solution */
479 extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end);
480
481 static void arm_cache_flush(abi_ulong start, abi_ulong last)
482 {
483 abi_ulong addr, last1;
484
485 if (last < start)
486 return;
487 addr = start;
488 for(;;) {
489 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
490 if (last1 > last)
491 last1 = last;
492 tb_invalidate_page_range(addr, last1 + 1);
493 if (last1 == last)
494 break;
495 addr = last1 + 1;
496 }
497 }
498
499 /* Handle a jump to the kernel code page. */
500 static int
501 do_kernel_trap(CPUARMState *env)
502 {
503 uint32_t addr;
504 uint32_t cpsr;
505 uint32_t val;
506
507 switch (env->regs[15]) {
508 case 0xffff0fa0: /* __kernel_memory_barrier */
509 /* ??? No-op. Will need to do better for SMP. */
510 break;
511 case 0xffff0fc0: /* __kernel_cmpxchg */
512 /* XXX: This only works between threads, not between processes.
513 It's probably possible to implement this with native host
514 operations. However things like ldrex/strex are much harder so
515 there's not much point trying. */
516 start_exclusive();
517 cpsr = cpsr_read(env);
518 addr = env->regs[2];
519 /* FIXME: This should SEGV if the access fails. */
520 if (get_user_u32(val, addr))
521 val = ~env->regs[0];
522 if (val == env->regs[0]) {
523 val = env->regs[1];
524 /* FIXME: Check for segfaults. */
525 put_user_u32(val, addr);
526 env->regs[0] = 0;
527 cpsr |= CPSR_C;
528 } else {
529 env->regs[0] = -1;
530 cpsr &= ~CPSR_C;
531 }
532 cpsr_write(env, cpsr, CPSR_C);
533 end_exclusive();
534 break;
535 case 0xffff0fe0: /* __kernel_get_tls */
536 env->regs[0] = env->cp15.c13_tls2;
537 break;
538 default:
539 return 1;
540 }
541 /* Jump back to the caller. */
542 addr = env->regs[14];
543 if (addr & 1) {
544 env->thumb = 1;
545 addr &= ~1;
546 }
547 env->regs[15] = addr;
548
549 return 0;
550 }
551
552 void cpu_loop(CPUARMState *env)
553 {
554 int trapnr;
555 unsigned int n, insn;
556 target_siginfo_t info;
557 uint32_t addr;
558
559 for(;;) {
560 cpu_exec_start(env);
561 trapnr = cpu_arm_exec(env);
562 cpu_exec_end(env);
563 switch(trapnr) {
564 case EXCP_UDEF:
565 {
566 TaskState *ts = env->opaque;
567 uint32_t opcode;
568 int rc;
569
570 /* we handle the FPU emulation here, as Linux */
571 /* we get the opcode */
572 /* FIXME - what to do if get_user() fails? */
573 get_user_u32(opcode, env->regs[15]);
574
575 rc = EmulateAll(opcode, &ts->fpa, env);
576 if (rc == 0) { /* illegal instruction */
577 info.si_signo = SIGILL;
578 info.si_errno = 0;
579 info.si_code = TARGET_ILL_ILLOPN;
580 info._sifields._sigfault._addr = env->regs[15];
581 queue_signal(env, info.si_signo, &info);
582 } else if (rc < 0) { /* FP exception */
583 int arm_fpe=0;
584
585 /* translate softfloat flags to FPSR flags */
586 if (-rc & float_flag_invalid)
587 arm_fpe |= BIT_IOC;
588 if (-rc & float_flag_divbyzero)
589 arm_fpe |= BIT_DZC;
590 if (-rc & float_flag_overflow)
591 arm_fpe |= BIT_OFC;
592 if (-rc & float_flag_underflow)
593 arm_fpe |= BIT_UFC;
594 if (-rc & float_flag_inexact)
595 arm_fpe |= BIT_IXC;
596
597 FPSR fpsr = ts->fpa.fpsr;
598 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
599
600 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
601 info.si_signo = SIGFPE;
602 info.si_errno = 0;
603
604 /* ordered by priority, least first */
605 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
606 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
607 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
608 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
609 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
610
611 info._sifields._sigfault._addr = env->regs[15];
612 queue_signal(env, info.si_signo, &info);
613 } else {
614 env->regs[15] += 4;
615 }
616
617 /* accumulate unenabled exceptions */
618 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
619 fpsr |= BIT_IXC;
620 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
621 fpsr |= BIT_UFC;
622 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
623 fpsr |= BIT_OFC;
624 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
625 fpsr |= BIT_DZC;
626 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
627 fpsr |= BIT_IOC;
628 ts->fpa.fpsr=fpsr;
629 } else { /* everything OK */
630 /* increment PC */
631 env->regs[15] += 4;
632 }
633 }
634 break;
635 case EXCP_SWI:
636 case EXCP_BKPT:
637 {
638 env->eabi = 1;
639 /* system call */
640 if (trapnr == EXCP_BKPT) {
641 if (env->thumb) {
642 /* FIXME - what to do if get_user() fails? */
643 get_user_u16(insn, env->regs[15]);
644 n = insn & 0xff;
645 env->regs[15] += 2;
646 } else {
647 /* FIXME - what to do if get_user() fails? */
648 get_user_u32(insn, env->regs[15]);
649 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
650 env->regs[15] += 4;
651 }
652 } else {
653 if (env->thumb) {
654 /* FIXME - what to do if get_user() fails? */
655 get_user_u16(insn, env->regs[15] - 2);
656 n = insn & 0xff;
657 } else {
658 /* FIXME - what to do if get_user() fails? */
659 get_user_u32(insn, env->regs[15] - 4);
660 n = insn & 0xffffff;
661 }
662 }
663
664 if (n == ARM_NR_cacheflush) {
665 arm_cache_flush(env->regs[0], env->regs[1]);
666 } else if (n == ARM_NR_semihosting
667 || n == ARM_NR_thumb_semihosting) {
668 env->regs[0] = do_arm_semihosting (env);
669 } else if (n == 0 || n >= ARM_SYSCALL_BASE
670 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
671 /* linux syscall */
672 if (env->thumb || n == 0) {
673 n = env->regs[7];
674 } else {
675 n -= ARM_SYSCALL_BASE;
676 env->eabi = 0;
677 }
678 if ( n > ARM_NR_BASE) {
679 switch (n) {
680 case ARM_NR_cacheflush:
681 arm_cache_flush(env->regs[0], env->regs[1]);
682 break;
683 case ARM_NR_set_tls:
684 cpu_set_tls(env, env->regs[0]);
685 env->regs[0] = 0;
686 break;
687 default:
688 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
689 n);
690 env->regs[0] = -TARGET_ENOSYS;
691 break;
692 }
693 } else {
694 env->regs[0] = do_syscall(env,
695 n,
696 env->regs[0],
697 env->regs[1],
698 env->regs[2],
699 env->regs[3],
700 env->regs[4],
701 env->regs[5]);
702 }
703 } else {
704 goto error;
705 }
706 }
707 break;
708 case EXCP_INTERRUPT:
709 /* just indicate that signals should be handled asap */
710 break;
711 case EXCP_PREFETCH_ABORT:
712 addr = env->cp15.c6_data;
713 goto do_segv;
714 case EXCP_DATA_ABORT:
715 addr = env->cp15.c6_insn;
716 goto do_segv;
717 do_segv:
718 {
719 info.si_signo = SIGSEGV;
720 info.si_errno = 0;
721 /* XXX: check env->error_code */
722 info.si_code = TARGET_SEGV_MAPERR;
723 info._sifields._sigfault._addr = addr;
724 queue_signal(env, info.si_signo, &info);
725 }
726 break;
727 case EXCP_DEBUG:
728 {
729 int sig;
730
731 sig = gdb_handlesig (env, TARGET_SIGTRAP);
732 if (sig)
733 {
734 info.si_signo = sig;
735 info.si_errno = 0;
736 info.si_code = TARGET_TRAP_BRKPT;
737 queue_signal(env, info.si_signo, &info);
738 }
739 }
740 break;
741 case EXCP_KERNEL_TRAP:
742 if (do_kernel_trap(env))
743 goto error;
744 break;
745 default:
746 error:
747 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
748 trapnr);
749 cpu_dump_state(env, stderr, fprintf, 0);
750 abort();
751 }
752 process_pending_signals(env);
753 }
754 }
755
756 #endif
757
758 #ifdef TARGET_SPARC
759
760 //#define DEBUG_WIN
761
762 /* WARNING: dealing with register windows _is_ complicated. More info
763 can be found at http://www.sics.se/~psm/sparcstack.html */
764 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
765 {
766 index = (index + cwp * 16) % (16 * env->nwindows);
767 /* wrap handling : if cwp is on the last window, then we use the
768 registers 'after' the end */
769 if (index < 8 && env->cwp == env->nwindows - 1)
770 index += 16 * env->nwindows;
771 return index;
772 }
773
774 /* save the register window 'cwp1' */
775 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
776 {
777 unsigned int i;
778 abi_ulong sp_ptr;
779
780 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
781 #if defined(DEBUG_WIN)
782 printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
783 (int)sp_ptr, cwp1);
784 #endif
785 for(i = 0; i < 16; i++) {
786 /* FIXME - what to do if put_user() fails? */
787 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
788 sp_ptr += sizeof(abi_ulong);
789 }
790 }
791
792 static void save_window(CPUSPARCState *env)
793 {
794 #ifndef TARGET_SPARC64
795 unsigned int new_wim;
796 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
797 ((1LL << env->nwindows) - 1);
798 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
799 env->wim = new_wim;
800 #else
801 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
802 env->cansave++;
803 env->canrestore--;
804 #endif
805 }
806
807 static void restore_window(CPUSPARCState *env)
808 {
809 unsigned int new_wim, i, cwp1;
810 abi_ulong sp_ptr;
811
812 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
813 ((1LL << env->nwindows) - 1);
814
815 /* restore the invalid window */
816 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
817 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
818 #if defined(DEBUG_WIN)
819 printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
820 (int)sp_ptr, cwp1);
821 #endif
822 for(i = 0; i < 16; i++) {
823 /* FIXME - what to do if get_user() fails? */
824 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
825 sp_ptr += sizeof(abi_ulong);
826 }
827 env->wim = new_wim;
828 #ifdef TARGET_SPARC64
829 env->canrestore++;
830 if (env->cleanwin < env->nwindows - 1)
831 env->cleanwin++;
832 env->cansave--;
833 #endif
834 }
835
836 static void flush_windows(CPUSPARCState *env)
837 {
838 int offset, cwp1;
839
840 offset = 1;
841 for(;;) {
842 /* if restore would invoke restore_window(), then we can stop */
843 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
844 if (env->wim & (1 << cwp1))
845 break;
846 save_window_offset(env, cwp1);
847 offset++;
848 }
849 /* set wim so that restore will reload the registers */
850 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
851 env->wim = 1 << cwp1;
852 #if defined(DEBUG_WIN)
853 printf("flush_windows: nb=%d\n", offset - 1);
854 #endif
855 }
856
857 void cpu_loop (CPUSPARCState *env)
858 {
859 int trapnr, ret;
860 target_siginfo_t info;
861
862 while (1) {
863 trapnr = cpu_sparc_exec (env);
864
865 switch (trapnr) {
866 #ifndef TARGET_SPARC64
867 case 0x88:
868 case 0x90:
869 #else
870 case 0x110:
871 case 0x16d:
872 #endif
873 ret = do_syscall (env, env->gregs[1],
874 env->regwptr[0], env->regwptr[1],
875 env->regwptr[2], env->regwptr[3],
876 env->regwptr[4], env->regwptr[5]);
877 if ((unsigned int)ret >= (unsigned int)(-515)) {
878 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
879 env->xcc |= PSR_CARRY;
880 #else
881 env->psr |= PSR_CARRY;
882 #endif
883 ret = -ret;
884 } else {
885 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
886 env->xcc &= ~PSR_CARRY;
887 #else
888 env->psr &= ~PSR_CARRY;
889 #endif
890 }
891 env->regwptr[0] = ret;
892 /* next instruction */
893 env->pc = env->npc;
894 env->npc = env->npc + 4;
895 break;
896 case 0x83: /* flush windows */
897 #ifdef TARGET_ABI32
898 case 0x103:
899 #endif
900 flush_windows(env);
901 /* next instruction */
902 env->pc = env->npc;
903 env->npc = env->npc + 4;
904 break;
905 #ifndef TARGET_SPARC64
906 case TT_WIN_OVF: /* window overflow */
907 save_window(env);
908 break;
909 case TT_WIN_UNF: /* window underflow */
910 restore_window(env);
911 break;
912 case TT_TFAULT:
913 case TT_DFAULT:
914 {
915 info.si_signo = SIGSEGV;
916 info.si_errno = 0;
917 /* XXX: check env->error_code */
918 info.si_code = TARGET_SEGV_MAPERR;
919 info._sifields._sigfault._addr = env->mmuregs[4];
920 queue_signal(env, info.si_signo, &info);
921 }
922 break;
923 #else
924 case TT_SPILL: /* window overflow */
925 save_window(env);
926 break;
927 case TT_FILL: /* window underflow */
928 restore_window(env);
929 break;
930 case TT_TFAULT:
931 case TT_DFAULT:
932 {
933 info.si_signo = SIGSEGV;
934 info.si_errno = 0;
935 /* XXX: check env->error_code */
936 info.si_code = TARGET_SEGV_MAPERR;
937 if (trapnr == TT_DFAULT)
938 info._sifields._sigfault._addr = env->dmmuregs[4];
939 else
940 info._sifields._sigfault._addr = env->tsptr->tpc;
941 queue_signal(env, info.si_signo, &info);
942 }
943 break;
944 #ifndef TARGET_ABI32
945 case 0x16e:
946 flush_windows(env);
947 sparc64_get_context(env);
948 break;
949 case 0x16f:
950 flush_windows(env);
951 sparc64_set_context(env);
952 break;
953 #endif
954 #endif
955 case EXCP_INTERRUPT:
956 /* just indicate that signals should be handled asap */
957 break;
958 case EXCP_DEBUG:
959 {
960 int sig;
961
962 sig = gdb_handlesig (env, TARGET_SIGTRAP);
963 if (sig)
964 {
965 info.si_signo = sig;
966 info.si_errno = 0;
967 info.si_code = TARGET_TRAP_BRKPT;
968 queue_signal(env, info.si_signo, &info);
969 }
970 }
971 break;
972 default:
973 printf ("Unhandled trap: 0x%x\n", trapnr);
974 cpu_dump_state(env, stderr, fprintf, 0);
975 exit (1);
976 }
977 process_pending_signals (env);
978 }
979 }
980
981 #endif
982
983 #ifdef TARGET_PPC
984 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
985 {
986 /* TO FIX */
987 return 0;
988 }
989
990 uint32_t cpu_ppc_load_tbl (CPUState *env)
991 {
992 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
993 }
994
995 uint32_t cpu_ppc_load_tbu (CPUState *env)
996 {
997 return cpu_ppc_get_tb(env) >> 32;
998 }
999
1000 uint32_t cpu_ppc_load_atbl (CPUState *env)
1001 {
1002 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1003 }
1004
1005 uint32_t cpu_ppc_load_atbu (CPUState *env)
1006 {
1007 return cpu_ppc_get_tb(env) >> 32;
1008 }
1009
1010 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1011 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1012
1013 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1014 {
1015 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1016 }
1017
1018 /* XXX: to be fixed */
1019 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1020 {
1021 return -1;
1022 }
1023
1024 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1025 {
1026 return -1;
1027 }
1028
1029 #define EXCP_DUMP(env, fmt, args...) \
1030 do { \
1031 fprintf(stderr, fmt , ##args); \
1032 cpu_dump_state(env, stderr, fprintf, 0); \
1033 if (loglevel != 0) { \
1034 fprintf(logfile, fmt , ##args); \
1035 cpu_dump_state(env, logfile, fprintf, 0); \
1036 } \
1037 } while (0)
1038
1039 void cpu_loop(CPUPPCState *env)
1040 {
1041 target_siginfo_t info;
1042 int trapnr;
1043 uint32_t ret;
1044
1045 for(;;) {
1046 trapnr = cpu_ppc_exec(env);
1047 switch(trapnr) {
1048 case POWERPC_EXCP_NONE:
1049 /* Just go on */
1050 break;
1051 case POWERPC_EXCP_CRITICAL: /* Critical input */
1052 cpu_abort(env, "Critical interrupt while in user mode. "
1053 "Aborting\n");
1054 break;
1055 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1056 cpu_abort(env, "Machine check exception while in user mode. "
1057 "Aborting\n");
1058 break;
1059 case POWERPC_EXCP_DSI: /* Data storage exception */
1060 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1061 env->spr[SPR_DAR]);
1062 /* XXX: check this. Seems bugged */
1063 switch (env->error_code & 0xFF000000) {
1064 case 0x40000000:
1065 info.si_signo = TARGET_SIGSEGV;
1066 info.si_errno = 0;
1067 info.si_code = TARGET_SEGV_MAPERR;
1068 break;
1069 case 0x04000000:
1070 info.si_signo = TARGET_SIGILL;
1071 info.si_errno = 0;
1072 info.si_code = TARGET_ILL_ILLADR;
1073 break;
1074 case 0x08000000:
1075 info.si_signo = TARGET_SIGSEGV;
1076 info.si_errno = 0;
1077 info.si_code = TARGET_SEGV_ACCERR;
1078 break;
1079 default:
1080 /* Let's send a regular segfault... */
1081 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1082 env->error_code);
1083 info.si_signo = TARGET_SIGSEGV;
1084 info.si_errno = 0;
1085 info.si_code = TARGET_SEGV_MAPERR;
1086 break;
1087 }
1088 info._sifields._sigfault._addr = env->nip;
1089 queue_signal(env, info.si_signo, &info);
1090 break;
1091 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1092 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1093 env->spr[SPR_SRR0]);
1094 /* XXX: check this */
1095 switch (env->error_code & 0xFF000000) {
1096 case 0x40000000:
1097 info.si_signo = TARGET_SIGSEGV;
1098 info.si_errno = 0;
1099 info.si_code = TARGET_SEGV_MAPERR;
1100 break;
1101 case 0x10000000:
1102 case 0x08000000:
1103 info.si_signo = TARGET_SIGSEGV;
1104 info.si_errno = 0;
1105 info.si_code = TARGET_SEGV_ACCERR;
1106 break;
1107 default:
1108 /* Let's send a regular segfault... */
1109 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1110 env->error_code);
1111 info.si_signo = TARGET_SIGSEGV;
1112 info.si_errno = 0;
1113 info.si_code = TARGET_SEGV_MAPERR;
1114 break;
1115 }
1116 info._sifields._sigfault._addr = env->nip - 4;
1117 queue_signal(env, info.si_signo, &info);
1118 break;
1119 case POWERPC_EXCP_EXTERNAL: /* External input */
1120 cpu_abort(env, "External interrupt while in user mode. "
1121 "Aborting\n");
1122 break;
1123 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1124 EXCP_DUMP(env, "Unaligned memory access\n");
1125 /* XXX: check this */
1126 info.si_signo = TARGET_SIGBUS;
1127 info.si_errno = 0;
1128 info.si_code = TARGET_BUS_ADRALN;
1129 info._sifields._sigfault._addr = env->nip - 4;
1130 queue_signal(env, info.si_signo, &info);
1131 break;
1132 case POWERPC_EXCP_PROGRAM: /* Program exception */
1133 /* XXX: check this */
1134 switch (env->error_code & ~0xF) {
1135 case POWERPC_EXCP_FP:
1136 EXCP_DUMP(env, "Floating point program exception\n");
1137 info.si_signo = TARGET_SIGFPE;
1138 info.si_errno = 0;
1139 switch (env->error_code & 0xF) {
1140 case POWERPC_EXCP_FP_OX:
1141 info.si_code = TARGET_FPE_FLTOVF;
1142 break;
1143 case POWERPC_EXCP_FP_UX:
1144 info.si_code = TARGET_FPE_FLTUND;
1145 break;
1146 case POWERPC_EXCP_FP_ZX:
1147 case POWERPC_EXCP_FP_VXZDZ:
1148 info.si_code = TARGET_FPE_FLTDIV;
1149 break;
1150 case POWERPC_EXCP_FP_XX:
1151 info.si_code = TARGET_FPE_FLTRES;
1152 break;
1153 case POWERPC_EXCP_FP_VXSOFT:
1154 info.si_code = TARGET_FPE_FLTINV;
1155 break;
1156 case POWERPC_EXCP_FP_VXSNAN:
1157 case POWERPC_EXCP_FP_VXISI:
1158 case POWERPC_EXCP_FP_VXIDI:
1159 case POWERPC_EXCP_FP_VXIMZ:
1160 case POWERPC_EXCP_FP_VXVC:
1161 case POWERPC_EXCP_FP_VXSQRT:
1162 case POWERPC_EXCP_FP_VXCVI:
1163 info.si_code = TARGET_FPE_FLTSUB;
1164 break;
1165 default:
1166 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1167 env->error_code);
1168 break;
1169 }
1170 break;
1171 case POWERPC_EXCP_INVAL:
1172 EXCP_DUMP(env, "Invalid instruction\n");
1173 info.si_signo = TARGET_SIGILL;
1174 info.si_errno = 0;
1175 switch (env->error_code & 0xF) {
1176 case POWERPC_EXCP_INVAL_INVAL:
1177 info.si_code = TARGET_ILL_ILLOPC;
1178 break;
1179 case POWERPC_EXCP_INVAL_LSWX:
1180 info.si_code = TARGET_ILL_ILLOPN;
1181 break;
1182 case POWERPC_EXCP_INVAL_SPR:
1183 info.si_code = TARGET_ILL_PRVREG;
1184 break;
1185 case POWERPC_EXCP_INVAL_FP:
1186 info.si_code = TARGET_ILL_COPROC;
1187 break;
1188 default:
1189 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1190 env->error_code & 0xF);
1191 info.si_code = TARGET_ILL_ILLADR;
1192 break;
1193 }
1194 break;
1195 case POWERPC_EXCP_PRIV:
1196 EXCP_DUMP(env, "Privilege violation\n");
1197 info.si_signo = TARGET_SIGILL;
1198 info.si_errno = 0;
1199 switch (env->error_code & 0xF) {
1200 case POWERPC_EXCP_PRIV_OPC:
1201 info.si_code = TARGET_ILL_PRVOPC;
1202 break;
1203 case POWERPC_EXCP_PRIV_REG:
1204 info.si_code = TARGET_ILL_PRVREG;
1205 break;
1206 default:
1207 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1208 env->error_code & 0xF);
1209 info.si_code = TARGET_ILL_PRVOPC;
1210 break;
1211 }
1212 break;
1213 case POWERPC_EXCP_TRAP:
1214 cpu_abort(env, "Tried to call a TRAP\n");
1215 break;
1216 default:
1217 /* Should not happen ! */
1218 cpu_abort(env, "Unknown program exception (%02x)\n",
1219 env->error_code);
1220 break;
1221 }
1222 info._sifields._sigfault._addr = env->nip - 4;
1223 queue_signal(env, info.si_signo, &info);
1224 break;
1225 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1226 EXCP_DUMP(env, "No floating point allowed\n");
1227 info.si_signo = TARGET_SIGILL;
1228 info.si_errno = 0;
1229 info.si_code = TARGET_ILL_COPROC;
1230 info._sifields._sigfault._addr = env->nip - 4;
1231 queue_signal(env, info.si_signo, &info);
1232 break;
1233 case POWERPC_EXCP_SYSCALL: /* System call exception */
1234 cpu_abort(env, "Syscall exception while in user mode. "
1235 "Aborting\n");
1236 break;
1237 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1238 EXCP_DUMP(env, "No APU instruction allowed\n");
1239 info.si_signo = TARGET_SIGILL;
1240 info.si_errno = 0;
1241 info.si_code = TARGET_ILL_COPROC;
1242 info._sifields._sigfault._addr = env->nip - 4;
1243 queue_signal(env, info.si_signo, &info);
1244 break;
1245 case POWERPC_EXCP_DECR: /* Decrementer exception */
1246 cpu_abort(env, "Decrementer interrupt while in user mode. "
1247 "Aborting\n");
1248 break;
1249 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1250 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1251 "Aborting\n");
1252 break;
1253 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1254 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1255 "Aborting\n");
1256 break;
1257 case POWERPC_EXCP_DTLB: /* Data TLB error */
1258 cpu_abort(env, "Data TLB exception while in user mode. "
1259 "Aborting\n");
1260 break;
1261 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1262 cpu_abort(env, "Instruction TLB exception while in user mode. "
1263 "Aborting\n");
1264 break;
1265 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
1266 /* XXX: check this */
1267 {
1268 int sig;
1269
1270 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1271 if (sig) {
1272 info.si_signo = sig;
1273 info.si_errno = 0;
1274 info.si_code = TARGET_TRAP_BRKPT;
1275 queue_signal(env, info.si_signo, &info);
1276 }
1277 }
1278 break;
1279 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1280 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1281 info.si_signo = TARGET_SIGILL;
1282 info.si_errno = 0;
1283 info.si_code = TARGET_ILL_COPROC;
1284 info._sifields._sigfault._addr = env->nip - 4;
1285 queue_signal(env, info.si_signo, &info);
1286 break;
1287 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1288 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1289 break;
1290 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1291 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1292 break;
1293 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1294 cpu_abort(env, "Performance monitor exception not handled\n");
1295 break;
1296 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1297 cpu_abort(env, "Doorbell interrupt while in user mode. "
1298 "Aborting\n");
1299 break;
1300 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1301 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1302 "Aborting\n");
1303 break;
1304 case POWERPC_EXCP_RESET: /* System reset exception */
1305 cpu_abort(env, "Reset interrupt while in user mode. "
1306 "Aborting\n");
1307 break;
1308 case POWERPC_EXCP_DSEG: /* Data segment exception */
1309 cpu_abort(env, "Data segment exception while in user mode. "
1310 "Aborting\n");
1311 break;
1312 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1313 cpu_abort(env, "Instruction segment exception "
1314 "while in user mode. Aborting\n");
1315 break;
1316 /* PowerPC 64 with hypervisor mode support */
1317 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1318 cpu_abort(env, "Hypervisor decrementer interrupt "
1319 "while in user mode. Aborting\n");
1320 break;
1321 case POWERPC_EXCP_TRACE: /* Trace exception */
1322 /* Nothing to do:
1323 * we use this exception to emulate step-by-step execution mode.
1324 */
1325 break;
1326 /* PowerPC 64 with hypervisor mode support */
1327 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1328 cpu_abort(env, "Hypervisor data storage exception "
1329 "while in user mode. Aborting\n");
1330 break;
1331 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1332 cpu_abort(env, "Hypervisor instruction storage exception "
1333 "while in user mode. Aborting\n");
1334 break;
1335 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1336 cpu_abort(env, "Hypervisor data segment exception "
1337 "while in user mode. Aborting\n");
1338 break;
1339 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1340 cpu_abort(env, "Hypervisor instruction segment exception "
1341 "while in user mode. Aborting\n");
1342 break;
1343 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1344 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1345 info.si_signo = TARGET_SIGILL;
1346 info.si_errno = 0;
1347 info.si_code = TARGET_ILL_COPROC;
1348 info._sifields._sigfault._addr = env->nip - 4;
1349 queue_signal(env, info.si_signo, &info);
1350 break;
1351 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1352 cpu_abort(env, "Programable interval timer interrupt "
1353 "while in user mode. Aborting\n");
1354 break;
1355 case POWERPC_EXCP_IO: /* IO error exception */
1356 cpu_abort(env, "IO error exception while in user mode. "
1357 "Aborting\n");
1358 break;
1359 case POWERPC_EXCP_RUNM: /* Run mode exception */
1360 cpu_abort(env, "Run mode exception while in user mode. "
1361 "Aborting\n");
1362 break;
1363 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1364 cpu_abort(env, "Emulation trap exception not handled\n");
1365 break;
1366 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1367 cpu_abort(env, "Instruction fetch TLB exception "
1368 "while in user-mode. Aborting");
1369 break;
1370 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1371 cpu_abort(env, "Data load TLB exception while in user-mode. "
1372 "Aborting");
1373 break;
1374 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1375 cpu_abort(env, "Data store TLB exception while in user-mode. "
1376 "Aborting");
1377 break;
1378 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1379 cpu_abort(env, "Floating-point assist exception not handled\n");
1380 break;
1381 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1382 cpu_abort(env, "Instruction address breakpoint exception "
1383 "not handled\n");
1384 break;
1385 case POWERPC_EXCP_SMI: /* System management interrupt */
1386 cpu_abort(env, "System management interrupt while in user mode. "
1387 "Aborting\n");
1388 break;
1389 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1390 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1391 "Aborting\n");
1392 break;
1393 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1394 cpu_abort(env, "Performance monitor exception not handled\n");
1395 break;
1396 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1397 cpu_abort(env, "Vector assist exception not handled\n");
1398 break;
1399 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1400 cpu_abort(env, "Soft patch exception not handled\n");
1401 break;
1402 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1403 cpu_abort(env, "Maintenance exception while in user mode. "
1404 "Aborting\n");
1405 break;
1406 case POWERPC_EXCP_STOP: /* stop translation */
1407 /* We did invalidate the instruction cache. Go on */
1408 break;
1409 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1410 /* We just stopped because of a branch. Go on */
1411 break;
1412 case POWERPC_EXCP_SYSCALL_USER:
1413 /* system call in user-mode emulation */
1414 /* WARNING:
1415 * PPC ABI uses overflow flag in cr0 to signal an error
1416 * in syscalls.
1417 */
1418 #if 0
1419 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1420 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1421 #endif
1422 env->crf[0] &= ~0x1;
1423 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1424 env->gpr[5], env->gpr[6], env->gpr[7],
1425 env->gpr[8]);
1426 if (ret > (uint32_t)(-515)) {
1427 env->crf[0] |= 0x1;
1428 ret = -ret;
1429 }
1430 env->gpr[3] = ret;
1431 #if 0
1432 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1433 #endif
1434 break;
1435 case EXCP_INTERRUPT:
1436 /* just indicate that signals should be handled asap */
1437 break;
1438 default:
1439 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1440 break;
1441 }
1442 process_pending_signals(env);
1443 }
1444 }
1445 #endif
1446
1447 #ifdef TARGET_MIPS
1448
1449 #define MIPS_SYS(name, args) args,
1450
1451 static const uint8_t mips_syscall_args[] = {
1452 MIPS_SYS(sys_syscall , 0) /* 4000 */
1453 MIPS_SYS(sys_exit , 1)
1454 MIPS_SYS(sys_fork , 0)
1455 MIPS_SYS(sys_read , 3)
1456 MIPS_SYS(sys_write , 3)
1457 MIPS_SYS(sys_open , 3) /* 4005 */
1458 MIPS_SYS(sys_close , 1)
1459 MIPS_SYS(sys_waitpid , 3)
1460 MIPS_SYS(sys_creat , 2)
1461 MIPS_SYS(sys_link , 2)
1462 MIPS_SYS(sys_unlink , 1) /* 4010 */
1463 MIPS_SYS(sys_execve , 0)
1464 MIPS_SYS(sys_chdir , 1)
1465 MIPS_SYS(sys_time , 1)
1466 MIPS_SYS(sys_mknod , 3)
1467 MIPS_SYS(sys_chmod , 2) /* 4015 */
1468 MIPS_SYS(sys_lchown , 3)
1469 MIPS_SYS(sys_ni_syscall , 0)
1470 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1471 MIPS_SYS(sys_lseek , 3)
1472 MIPS_SYS(sys_getpid , 0) /* 4020 */
1473 MIPS_SYS(sys_mount , 5)
1474 MIPS_SYS(sys_oldumount , 1)
1475 MIPS_SYS(sys_setuid , 1)
1476 MIPS_SYS(sys_getuid , 0)
1477 MIPS_SYS(sys_stime , 1) /* 4025 */
1478 MIPS_SYS(sys_ptrace , 4)
1479 MIPS_SYS(sys_alarm , 1)
1480 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1481 MIPS_SYS(sys_pause , 0)
1482 MIPS_SYS(sys_utime , 2) /* 4030 */
1483 MIPS_SYS(sys_ni_syscall , 0)
1484 MIPS_SYS(sys_ni_syscall , 0)
1485 MIPS_SYS(sys_access , 2)
1486 MIPS_SYS(sys_nice , 1)
1487 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1488 MIPS_SYS(sys_sync , 0)
1489 MIPS_SYS(sys_kill , 2)
1490 MIPS_SYS(sys_rename , 2)
1491 MIPS_SYS(sys_mkdir , 2)
1492 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1493 MIPS_SYS(sys_dup , 1)
1494 MIPS_SYS(sys_pipe , 0)
1495 MIPS_SYS(sys_times , 1)
1496 MIPS_SYS(sys_ni_syscall , 0)
1497 MIPS_SYS(sys_brk , 1) /* 4045 */
1498 MIPS_SYS(sys_setgid , 1)
1499 MIPS_SYS(sys_getgid , 0)
1500 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1501 MIPS_SYS(sys_geteuid , 0)
1502 MIPS_SYS(sys_getegid , 0) /* 4050 */
1503 MIPS_SYS(sys_acct , 0)
1504 MIPS_SYS(sys_umount , 2)
1505 MIPS_SYS(sys_ni_syscall , 0)
1506 MIPS_SYS(sys_ioctl , 3)
1507 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1508 MIPS_SYS(sys_ni_syscall , 2)
1509 MIPS_SYS(sys_setpgid , 2)
1510 MIPS_SYS(sys_ni_syscall , 0)
1511 MIPS_SYS(sys_olduname , 1)
1512 MIPS_SYS(sys_umask , 1) /* 4060 */
1513 MIPS_SYS(sys_chroot , 1)
1514 MIPS_SYS(sys_ustat , 2)
1515 MIPS_SYS(sys_dup2 , 2)
1516 MIPS_SYS(sys_getppid , 0)
1517 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1518 MIPS_SYS(sys_setsid , 0)
1519 MIPS_SYS(sys_sigaction , 3)
1520 MIPS_SYS(sys_sgetmask , 0)
1521 MIPS_SYS(sys_ssetmask , 1)
1522 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1523 MIPS_SYS(sys_setregid , 2)
1524 MIPS_SYS(sys_sigsuspend , 0)
1525 MIPS_SYS(sys_sigpending , 1)
1526 MIPS_SYS(sys_sethostname , 2)
1527 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1528 MIPS_SYS(sys_getrlimit , 2)
1529 MIPS_SYS(sys_getrusage , 2)
1530 MIPS_SYS(sys_gettimeofday, 2)
1531 MIPS_SYS(sys_settimeofday, 2)
1532 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1533 MIPS_SYS(sys_setgroups , 2)
1534 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1535 MIPS_SYS(sys_symlink , 2)
1536 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1537 MIPS_SYS(sys_readlink , 3) /* 4085 */
1538 MIPS_SYS(sys_uselib , 1)
1539 MIPS_SYS(sys_swapon , 2)
1540 MIPS_SYS(sys_reboot , 3)
1541 MIPS_SYS(old_readdir , 3)
1542 MIPS_SYS(old_mmap , 6) /* 4090 */
1543 MIPS_SYS(sys_munmap , 2)
1544 MIPS_SYS(sys_truncate , 2)
1545 MIPS_SYS(sys_ftruncate , 2)
1546 MIPS_SYS(sys_fchmod , 2)
1547 MIPS_SYS(sys_fchown , 3) /* 4095 */
1548 MIPS_SYS(sys_getpriority , 2)
1549 MIPS_SYS(sys_setpriority , 3)
1550 MIPS_SYS(sys_ni_syscall , 0)
1551 MIPS_SYS(sys_statfs , 2)
1552 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1553 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1554 MIPS_SYS(sys_socketcall , 2)
1555 MIPS_SYS(sys_syslog , 3)
1556 MIPS_SYS(sys_setitimer , 3)
1557 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1558 MIPS_SYS(sys_newstat , 2)
1559 MIPS_SYS(sys_newlstat , 2)
1560 MIPS_SYS(sys_newfstat , 2)
1561 MIPS_SYS(sys_uname , 1)
1562 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1563 MIPS_SYS(sys_vhangup , 0)
1564 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1565 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1566 MIPS_SYS(sys_wait4 , 4)
1567 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1568 MIPS_SYS(sys_sysinfo , 1)
1569 MIPS_SYS(sys_ipc , 6)
1570 MIPS_SYS(sys_fsync , 1)
1571 MIPS_SYS(sys_sigreturn , 0)
1572 MIPS_SYS(sys_clone , 0) /* 4120 */
1573 MIPS_SYS(sys_setdomainname, 2)
1574 MIPS_SYS(sys_newuname , 1)
1575 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1576 MIPS_SYS(sys_adjtimex , 1)
1577 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1578 MIPS_SYS(sys_sigprocmask , 3)
1579 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1580 MIPS_SYS(sys_init_module , 5)
1581 MIPS_SYS(sys_delete_module, 1)
1582 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1583 MIPS_SYS(sys_quotactl , 0)
1584 MIPS_SYS(sys_getpgid , 1)
1585 MIPS_SYS(sys_fchdir , 1)
1586 MIPS_SYS(sys_bdflush , 2)
1587 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1588 MIPS_SYS(sys_personality , 1)
1589 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1590 MIPS_SYS(sys_setfsuid , 1)
1591 MIPS_SYS(sys_setfsgid , 1)
1592 MIPS_SYS(sys_llseek , 5) /* 4140 */
1593 MIPS_SYS(sys_getdents , 3)
1594 MIPS_SYS(sys_select , 5)
1595 MIPS_SYS(sys_flock , 2)
1596 MIPS_SYS(sys_msync , 3)
1597 MIPS_SYS(sys_readv , 3) /* 4145 */
1598 MIPS_SYS(sys_writev , 3)
1599 MIPS_SYS(sys_cacheflush , 3)
1600 MIPS_SYS(sys_cachectl , 3)
1601 MIPS_SYS(sys_sysmips , 4)
1602 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1603 MIPS_SYS(sys_getsid , 1)
1604 MIPS_SYS(sys_fdatasync , 0)
1605 MIPS_SYS(sys_sysctl , 1)
1606 MIPS_SYS(sys_mlock , 2)
1607 MIPS_SYS(sys_munlock , 2) /* 4155 */
1608 MIPS_SYS(sys_mlockall , 1)
1609 MIPS_SYS(sys_munlockall , 0)
1610 MIPS_SYS(sys_sched_setparam, 2)
1611 MIPS_SYS(sys_sched_getparam, 2)
1612 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1613 MIPS_SYS(sys_sched_getscheduler, 1)
1614 MIPS_SYS(sys_sched_yield , 0)
1615 MIPS_SYS(sys_sched_get_priority_max, 1)
1616 MIPS_SYS(sys_sched_get_priority_min, 1)
1617 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1618 MIPS_SYS(sys_nanosleep, 2)
1619 MIPS_SYS(sys_mremap , 4)
1620 MIPS_SYS(sys_accept , 3)
1621 MIPS_SYS(sys_bind , 3)
1622 MIPS_SYS(sys_connect , 3) /* 4170 */
1623 MIPS_SYS(sys_getpeername , 3)
1624 MIPS_SYS(sys_getsockname , 3)
1625 MIPS_SYS(sys_getsockopt , 5)
1626 MIPS_SYS(sys_listen , 2)
1627 MIPS_SYS(sys_recv , 4) /* 4175 */
1628 MIPS_SYS(sys_recvfrom , 6)
1629 MIPS_SYS(sys_recvmsg , 3)
1630 MIPS_SYS(sys_send , 4)
1631 MIPS_SYS(sys_sendmsg , 3)
1632 MIPS_SYS(sys_sendto , 6) /* 4180 */
1633 MIPS_SYS(sys_setsockopt , 5)
1634 MIPS_SYS(sys_shutdown , 2)
1635 MIPS_SYS(sys_socket , 3)
1636 MIPS_SYS(sys_socketpair , 4)
1637 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1638 MIPS_SYS(sys_getresuid , 3)
1639 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1640 MIPS_SYS(sys_poll , 3)
1641 MIPS_SYS(sys_nfsservctl , 3)
1642 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1643 MIPS_SYS(sys_getresgid , 3)
1644 MIPS_SYS(sys_prctl , 5)
1645 MIPS_SYS(sys_rt_sigreturn, 0)
1646 MIPS_SYS(sys_rt_sigaction, 4)
1647 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1648 MIPS_SYS(sys_rt_sigpending, 2)
1649 MIPS_SYS(sys_rt_sigtimedwait, 4)
1650 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1651 MIPS_SYS(sys_rt_sigsuspend, 0)
1652 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1653 MIPS_SYS(sys_pwrite64 , 6)
1654 MIPS_SYS(sys_chown , 3)
1655 MIPS_SYS(sys_getcwd , 2)
1656 MIPS_SYS(sys_capget , 2)
1657 MIPS_SYS(sys_capset , 2) /* 4205 */
1658 MIPS_SYS(sys_sigaltstack , 0)
1659 MIPS_SYS(sys_sendfile , 4)
1660 MIPS_SYS(sys_ni_syscall , 0)
1661 MIPS_SYS(sys_ni_syscall , 0)
1662 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1663 MIPS_SYS(sys_truncate64 , 4)
1664 MIPS_SYS(sys_ftruncate64 , 4)
1665 MIPS_SYS(sys_stat64 , 2)
1666 MIPS_SYS(sys_lstat64 , 2)
1667 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1668 MIPS_SYS(sys_pivot_root , 2)
1669 MIPS_SYS(sys_mincore , 3)
1670 MIPS_SYS(sys_madvise , 3)
1671 MIPS_SYS(sys_getdents64 , 3)
1672 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1673 MIPS_SYS(sys_ni_syscall , 0)
1674 MIPS_SYS(sys_gettid , 0)
1675 MIPS_SYS(sys_readahead , 5)
1676 MIPS_SYS(sys_setxattr , 5)
1677 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1678 MIPS_SYS(sys_fsetxattr , 5)
1679 MIPS_SYS(sys_getxattr , 4)
1680 MIPS_SYS(sys_lgetxattr , 4)
1681 MIPS_SYS(sys_fgetxattr , 4)
1682 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1683 MIPS_SYS(sys_llistxattr , 3)
1684 MIPS_SYS(sys_flistxattr , 3)
1685 MIPS_SYS(sys_removexattr , 2)
1686 MIPS_SYS(sys_lremovexattr, 2)
1687 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1688 MIPS_SYS(sys_tkill , 2)
1689 MIPS_SYS(sys_sendfile64 , 5)
1690 MIPS_SYS(sys_futex , 2)
1691 MIPS_SYS(sys_sched_setaffinity, 3)
1692 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1693 MIPS_SYS(sys_io_setup , 2)
1694 MIPS_SYS(sys_io_destroy , 1)
1695 MIPS_SYS(sys_io_getevents, 5)
1696 MIPS_SYS(sys_io_submit , 3)
1697 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1698 MIPS_SYS(sys_exit_group , 1)
1699 MIPS_SYS(sys_lookup_dcookie, 3)
1700 MIPS_SYS(sys_epoll_create, 1)
1701 MIPS_SYS(sys_epoll_ctl , 4)
1702 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1703 MIPS_SYS(sys_remap_file_pages, 5)
1704 MIPS_SYS(sys_set_tid_address, 1)
1705 MIPS_SYS(sys_restart_syscall, 0)
1706 MIPS_SYS(sys_fadvise64_64, 7)
1707 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1708 MIPS_SYS(sys_fstatfs64 , 2)
1709 MIPS_SYS(sys_timer_create, 3)
1710 MIPS_SYS(sys_timer_settime, 4)
1711 MIPS_SYS(sys_timer_gettime, 2)
1712 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1713 MIPS_SYS(sys_timer_delete, 1)
1714 MIPS_SYS(sys_clock_settime, 2)
1715 MIPS_SYS(sys_clock_gettime, 2)
1716 MIPS_SYS(sys_clock_getres, 2)
1717 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1718 MIPS_SYS(sys_tgkill , 3)
1719 MIPS_SYS(sys_utimes , 2)
1720 MIPS_SYS(sys_mbind , 4)
1721 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1722 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1723 MIPS_SYS(sys_mq_open , 4)
1724 MIPS_SYS(sys_mq_unlink , 1)
1725 MIPS_SYS(sys_mq_timedsend, 5)
1726 MIPS_SYS(sys_mq_timedreceive, 5)
1727 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1728 MIPS_SYS(sys_mq_getsetattr, 3)
1729 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1730 MIPS_SYS(sys_waitid , 4)
1731 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1732 MIPS_SYS(sys_add_key , 5)
1733 MIPS_SYS(sys_request_key, 4)
1734 MIPS_SYS(sys_keyctl , 5)
1735 MIPS_SYS(sys_set_thread_area, 1)
1736 MIPS_SYS(sys_inotify_init, 0)
1737 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1738 MIPS_SYS(sys_inotify_rm_watch, 2)
1739 MIPS_SYS(sys_migrate_pages, 4)
1740 MIPS_SYS(sys_openat, 4)
1741 MIPS_SYS(sys_mkdirat, 3)
1742 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1743 MIPS_SYS(sys_fchownat, 5)
1744 MIPS_SYS(sys_futimesat, 3)
1745 MIPS_SYS(sys_fstatat64, 4)
1746 MIPS_SYS(sys_unlinkat, 3)
1747 MIPS_SYS(sys_renameat, 4) /* 4295 */
1748 MIPS_SYS(sys_linkat, 5)
1749 MIPS_SYS(sys_symlinkat, 3)
1750 MIPS_SYS(sys_readlinkat, 4)
1751 MIPS_SYS(sys_fchmodat, 3)
1752 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1753 MIPS_SYS(sys_pselect6, 6)
1754 MIPS_SYS(sys_ppoll, 5)
1755 MIPS_SYS(sys_unshare, 1)
1756 MIPS_SYS(sys_splice, 4)
1757 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1758 MIPS_SYS(sys_tee, 4)
1759 MIPS_SYS(sys_vmsplice, 4)
1760 MIPS_SYS(sys_move_pages, 6)
1761 MIPS_SYS(sys_set_robust_list, 2)
1762 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1763 MIPS_SYS(sys_kexec_load, 4)
1764 MIPS_SYS(sys_getcpu, 3)
1765 MIPS_SYS(sys_epoll_pwait, 6)
1766 MIPS_SYS(sys_ioprio_set, 3)
1767 MIPS_SYS(sys_ioprio_get, 2)
1768 };
1769
1770 #undef MIPS_SYS
1771
1772 void cpu_loop(CPUMIPSState *env)
1773 {
1774 target_siginfo_t info;
1775 int trapnr, ret;
1776 unsigned int syscall_num;
1777
1778 for(;;) {
1779 trapnr = cpu_mips_exec(env);
1780 switch(trapnr) {
1781 case EXCP_SYSCALL:
1782 syscall_num = env->gpr[env->current_tc][2] - 4000;
1783 env->PC[env->current_tc] += 4;
1784 if (syscall_num >= sizeof(mips_syscall_args)) {
1785 ret = -ENOSYS;
1786 } else {
1787 int nb_args;
1788 abi_ulong sp_reg;
1789 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1790
1791 nb_args = mips_syscall_args[syscall_num];
1792 sp_reg = env->gpr[env->current_tc][29];
1793 switch (nb_args) {
1794 /* these arguments are taken from the stack */
1795 /* FIXME - what to do if get_user() fails? */
1796 case 8: get_user_ual(arg8, sp_reg + 28);
1797 case 7: get_user_ual(arg7, sp_reg + 24);
1798 case 6: get_user_ual(arg6, sp_reg + 20);
1799 case 5: get_user_ual(arg5, sp_reg + 16);
1800 default:
1801 break;
1802 }
1803 ret = do_syscall(env, env->gpr[env->current_tc][2],
1804 env->gpr[env->current_tc][4],
1805 env->gpr[env->current_tc][5],
1806 env->gpr[env->current_tc][6],
1807 env->gpr[env->current_tc][7],
1808 arg5, arg6/*, arg7, arg8*/);
1809 }
1810 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1811 env->gpr[env->current_tc][7] = 1; /* error flag */
1812 ret = -ret;
1813 } else {
1814 env->gpr[env->current_tc][7] = 0; /* error flag */
1815 }
1816 env->gpr[env->current_tc][2] = ret;
1817 break;
1818 case EXCP_TLBL:
1819 case EXCP_TLBS:
1820 case EXCP_CpU:
1821 case EXCP_RI:
1822 info.si_signo = TARGET_SIGILL;
1823 info.si_errno = 0;
1824 info.si_code = 0;
1825 queue_signal(env, info.si_signo, &info);
1826 break;
1827 case EXCP_INTERRUPT:
1828 /* just indicate that signals should be handled asap */
1829 break;
1830 case EXCP_DEBUG:
1831 {
1832 int sig;
1833
1834 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1835 if (sig)
1836 {
1837 info.si_signo = sig;
1838 info.si_errno = 0;
1839 info.si_code = TARGET_TRAP_BRKPT;
1840 queue_signal(env, info.si_signo, &info);
1841 }
1842 }
1843 break;
1844 default:
1845 // error:
1846 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1847 trapnr);
1848 cpu_dump_state(env, stderr, fprintf, 0);
1849 abort();
1850 }
1851 process_pending_signals(env);
1852 }
1853 }
1854 #endif
1855
1856 #ifdef TARGET_SH4
1857 void cpu_loop (CPUState *env)
1858 {
1859 int trapnr, ret;
1860 target_siginfo_t info;
1861
1862 while (1) {
1863 trapnr = cpu_sh4_exec (env);
1864
1865 switch (trapnr) {
1866 case 0x160:
1867 ret = do_syscall(env,
1868 env->gregs[3],
1869 env->gregs[4],
1870 env->gregs[5],
1871 env->gregs[6],
1872 env->gregs[7],
1873 env->gregs[0],
1874 env->gregs[1]);
1875 env->gregs[0] = ret;
1876 env->pc += 2;
1877 break;
1878 case EXCP_INTERRUPT:
1879 /* just indicate that signals should be handled asap */
1880 break;
1881 case EXCP_DEBUG:
1882 {
1883 int sig;
1884
1885 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1886 if (sig)
1887 {
1888 info.si_signo = sig;
1889 info.si_errno = 0;
1890 info.si_code = TARGET_TRAP_BRKPT;
1891 queue_signal(env, info.si_signo, &info);
1892 }
1893 }
1894 break;
1895 case 0xa0:
1896 case 0xc0:
1897 info.si_signo = SIGSEGV;
1898 info.si_errno = 0;
1899 info.si_code = TARGET_SEGV_MAPERR;
1900 info._sifields._sigfault._addr = env->tea;
1901 queue_signal(env, info.si_signo, &info);
1902 break;
1903
1904 default:
1905 printf ("Unhandled trap: 0x%x\n", trapnr);
1906 cpu_dump_state(env, stderr, fprintf, 0);
1907 exit (1);
1908 }
1909 process_pending_signals (env);
1910 }
1911 }
1912 #endif
1913
1914 #ifdef TARGET_CRIS
1915 void cpu_loop (CPUState *env)
1916 {
1917 int trapnr, ret;
1918 target_siginfo_t info;
1919
1920 while (1) {
1921 trapnr = cpu_cris_exec (env);
1922 switch (trapnr) {
1923 case 0xaa:
1924 {
1925 info.si_signo = SIGSEGV;
1926 info.si_errno = 0;
1927 /* XXX: check env->error_code */
1928 info.si_code = TARGET_SEGV_MAPERR;
1929 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1930 queue_signal(env, info.si_signo, &info);
1931 }
1932 break;
1933 case EXCP_INTERRUPT:
1934 /* just indicate that signals should be handled asap */
1935 break;
1936 case EXCP_BREAK:
1937 ret = do_syscall(env,
1938 env->regs[9],
1939 env->regs[10],
1940 env->regs[11],
1941 env->regs[12],
1942 env->regs[13],
1943 env->pregs[7],
1944 env->pregs[11]);
1945 env->regs[10] = ret;
1946 env->pc += 2;
1947 break;
1948 case EXCP_DEBUG:
1949 {
1950 int sig;
1951
1952 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1953 if (sig)
1954 {
1955 info.si_signo = sig;
1956 info.si_errno = 0;
1957 info.si_code = TARGET_TRAP_BRKPT;
1958 queue_signal(env, info.si_signo, &info);
1959 }
1960 }
1961 break;
1962 default:
1963 printf ("Unhandled trap: 0x%x\n", trapnr);
1964 cpu_dump_state(env, stderr, fprintf, 0);
1965 exit (1);
1966 }
1967 process_pending_signals (env);
1968 }
1969 }
1970 #endif
1971
1972 #ifdef TARGET_M68K
1973
1974 void cpu_loop(CPUM68KState *env)
1975 {
1976 int trapnr;
1977 unsigned int n;
1978 target_siginfo_t info;
1979 TaskState *ts = env->opaque;
1980
1981 for(;;) {
1982 trapnr = cpu_m68k_exec(env);
1983 switch(trapnr) {
1984 case EXCP_ILLEGAL:
1985 {
1986 if (ts->sim_syscalls) {
1987 uint16_t nr;
1988 nr = lduw(env->pc + 2);
1989 env->pc += 4;
1990 do_m68k_simcall(env, nr);
1991 } else {
1992 goto do_sigill;
1993 }
1994 }
1995 break;
1996 case EXCP_HALT_INSN:
1997 /* Semihosing syscall. */
1998 env->pc += 4;
1999 do_m68k_semihosting(env, env->dregs[0]);
2000 break;
2001 case EXCP_LINEA:
2002 case EXCP_LINEF:
2003 case EXCP_UNSUPPORTED:
2004 do_sigill:
2005 info.si_signo = SIGILL;
2006 info.si_errno = 0;
2007 info.si_code = TARGET_ILL_ILLOPN;
2008 info._sifields._sigfault._addr = env->pc;
2009 queue_signal(env, info.si_signo, &info);
2010 break;
2011 case EXCP_TRAP0:
2012 {
2013 ts->sim_syscalls = 0;
2014 n = env->dregs[0];
2015 env->pc += 2;
2016 env->dregs[0] = do_syscall(env,
2017 n,
2018 env->dregs[1],
2019 env->dregs[2],
2020 env->dregs[3],
2021 env->dregs[4],
2022 env->dregs[5],
2023 env->aregs[0]);
2024 }
2025 break;
2026 case EXCP_INTERRUPT:
2027 /* just indicate that signals should be handled asap */
2028 break;
2029 case EXCP_ACCESS:
2030 {
2031 info.si_signo = SIGSEGV;
2032 info.si_errno = 0;
2033 /* XXX: check env->error_code */
2034 info.si_code = TARGET_SEGV_MAPERR;
2035 info._sifields._sigfault._addr = env->mmu.ar;
2036 queue_signal(env, info.si_signo, &info);
2037 }
2038 break;
2039 case EXCP_DEBUG:
2040 {
2041 int sig;
2042
2043 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2044 if (sig)
2045 {
2046 info.si_signo = sig;
2047 info.si_errno = 0;
2048 info.si_code = TARGET_TRAP_BRKPT;
2049 queue_signal(env, info.si_signo, &info);
2050 }
2051 }
2052 break;
2053 default:
2054 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2055 trapnr);
2056 cpu_dump_state(env, stderr, fprintf, 0);
2057 abort();
2058 }
2059 process_pending_signals(env);
2060 }
2061 }
2062 #endif /* TARGET_M68K */
2063
2064 #ifdef TARGET_ALPHA
2065 void cpu_loop (CPUState *env)
2066 {
2067 int trapnr;
2068 target_siginfo_t info;
2069
2070 while (1) {
2071 trapnr = cpu_alpha_exec (env);
2072
2073 switch (trapnr) {
2074 case EXCP_RESET:
2075 fprintf(stderr, "Reset requested. Exit\n");
2076 exit(1);
2077 break;
2078 case EXCP_MCHK:
2079 fprintf(stderr, "Machine check exception. Exit\n");
2080 exit(1);
2081 break;
2082 case EXCP_ARITH:
2083 fprintf(stderr, "Arithmetic trap.\n");
2084 exit(1);
2085 break;
2086 case EXCP_HW_INTERRUPT:
2087 fprintf(stderr, "External interrupt. Exit\n");
2088 exit(1);
2089 break;
2090 case EXCP_DFAULT:
2091 fprintf(stderr, "MMU data fault\n");
2092 exit(1);
2093 break;
2094 case EXCP_DTB_MISS_PAL:
2095 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2096 exit(1);
2097 break;
2098 case EXCP_ITB_MISS:
2099 fprintf(stderr, "MMU instruction TLB miss\n");
2100 exit(1);
2101 break;
2102 case EXCP_ITB_ACV:
2103 fprintf(stderr, "MMU instruction access violation\n");
2104 exit(1);
2105 break;
2106 case EXCP_DTB_MISS_NATIVE:
2107 fprintf(stderr, "MMU data TLB miss\n");
2108 exit(1);
2109 break;
2110 case EXCP_UNALIGN:
2111 fprintf(stderr, "Unaligned access\n");
2112 exit(1);
2113 break;
2114 case EXCP_OPCDEC:
2115 fprintf(stderr, "Invalid instruction\n");
2116 exit(1);
2117 break;
2118 case EXCP_FEN:
2119 fprintf(stderr, "Floating-point not allowed\n");
2120 exit(1);
2121 break;
2122 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2123 fprintf(stderr, "Call to PALcode\n");
2124 call_pal(env, (trapnr >> 6) | 0x80);
2125 break;
2126 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2127 fprintf(stderr, "Privileged call to PALcode\n");
2128 exit(1);
2129 break;
2130 case EXCP_DEBUG:
2131 {
2132 int sig;
2133
2134 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2135 if (sig)
2136 {
2137 info.si_signo = sig;
2138 info.si_errno = 0;
2139 info.si_code = TARGET_TRAP_BRKPT;
2140 queue_signal(env, info.si_signo, &info);
2141 }
2142 }
2143 break;
2144 default:
2145 printf ("Unhandled trap: 0x%x\n", trapnr);
2146 cpu_dump_state(env, stderr, fprintf, 0);
2147 exit (1);
2148 }
2149 process_pending_signals (env);
2150 }
2151 }
2152 #endif /* TARGET_ALPHA */
2153
2154 void usage(void)
2155 {
2156 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2157 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2158 "Linux CPU emulator (compiled for %s emulation)\n"
2159 "\n"
2160 "Standard options:\n"
2161 "-h print this help\n"
2162 "-g port wait gdb connection to port\n"
2163 "-L path set the elf interpreter prefix (default=%s)\n"
2164 "-s size set the stack size in bytes (default=%ld)\n"
2165 "-cpu model select CPU (-cpu ? for list)\n"
2166 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2167 "\n"
2168 "Debug options:\n"
2169 "-d options activate log (logfile=%s)\n"
2170 "-p pagesize set the host page size to 'pagesize'\n"
2171 "-strace log system calls\n"
2172 "\n"
2173 "Environment variables:\n"
2174 "QEMU_STRACE Print system calls and arguments similar to the\n"
2175 " 'strace' program. Enable by setting to any value.\n"
2176 ,
2177 TARGET_ARCH,
2178 interp_prefix,
2179 x86_stack_size,
2180 DEBUG_LOGFILE);
2181 _exit(1);
2182 }
2183
2184 THREAD CPUState *thread_env;
2185
2186 void init_task_state(TaskState *ts)
2187 {
2188 int i;
2189
2190 memset(ts, 0, sizeof(TaskState));
2191 ts->used = 1;
2192 ts->first_free = ts->sigqueue_table;
2193 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2194 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2195 }
2196 ts->sigqueue_table[i].next = NULL;
2197 }
2198
2199 int main(int argc, char **argv)
2200 {
2201 const char *filename;
2202 const char *cpu_model;
2203 struct target_pt_regs regs1, *regs = &regs1;
2204 struct image_info info1, *info = &info1;
2205 TaskState ts1, *ts = &ts1;
2206 CPUState *env;
2207 int optind;
2208 const char *r;
2209 int gdbstub_port = 0;
2210 int drop_ld_preload = 0, environ_count = 0;
2211 char **target_environ, **wrk, **dst;
2212
2213 if (argc <= 1)
2214 usage();
2215
2216 /* init debug */
2217 cpu_set_log_filename(DEBUG_LOGFILE);
2218
2219 cpu_model = NULL;
2220 optind = 1;
2221 for(;;) {
2222 if (optind >= argc)
2223 break;
2224 r = argv[optind];
2225 if (r[0] != '-')
2226 break;
2227 optind++;
2228 r++;
2229 if (!strcmp(r, "-")) {
2230 break;
2231 } else if (!strcmp(r, "d")) {
2232 int mask;
2233 CPULogItem *item;
2234
2235 if (optind >= argc)
2236 break;
2237
2238 r = argv[optind++];
2239 mask = cpu_str_to_log_mask(r);
2240 if (!mask) {
2241 printf("Log items (comma separated):\n");
2242 for(item = cpu_log_items; item->mask != 0; item++) {
2243 printf("%-10s %s\n", item->name, item->help);
2244 }
2245 exit(1);
2246 }
2247 cpu_set_log(mask);
2248 } else if (!strcmp(r, "s")) {
2249 r = argv[optind++];
2250 x86_stack_size = strtol(r, (char **)&r, 0);
2251 if (x86_stack_size <= 0)
2252 usage();
2253 if (*r == 'M')
2254 x86_stack_size *= 1024 * 1024;
2255 else if (*r == 'k' || *r == 'K')
2256 x86_stack_size *= 1024;
2257 } else if (!strcmp(r, "L")) {
2258 interp_prefix = argv[optind++];
2259 } else if (!strcmp(r, "p")) {
2260 qemu_host_page_size = atoi(argv[optind++]);
2261 if (qemu_host_page_size == 0 ||
2262 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2263 fprintf(stderr, "page size must be a power of two\n");
2264 exit(1);
2265 }
2266 } else if (!strcmp(r, "g")) {
2267 gdbstub_port = atoi(argv[optind++]);
2268 } else if (!strcmp(r, "r")) {
2269 qemu_uname_release = argv[optind++];
2270 } else if (!strcmp(r, "cpu")) {
2271 cpu_model = argv[optind++];
2272 if (strcmp(cpu_model, "?") == 0) {
2273 /* XXX: implement xxx_cpu_list for targets that still miss it */
2274 #if defined(cpu_list)
2275 cpu_list(stdout, &fprintf);
2276 #endif
2277 _exit(1);
2278 }
2279 } else if (!strcmp(r, "drop-ld-preload")) {
2280 drop_ld_preload = 1;
2281 } else if (!strcmp(r, "strace")) {
2282 do_strace = 1;
2283 } else
2284 {
2285 usage();
2286 }
2287 }
2288 if (optind >= argc)
2289 usage();
2290 filename = argv[optind];
2291
2292 /* Zero out regs */
2293 memset(regs, 0, sizeof(struct target_pt_regs));
2294
2295 /* Zero out image_info */
2296 memset(info, 0, sizeof(struct image_info));
2297
2298 /* Scan interp_prefix dir for replacement files. */
2299 init_paths(interp_prefix);
2300
2301 if (cpu_model == NULL) {
2302 #if defined(TARGET_I386)
2303 #ifdef TARGET_X86_64
2304 cpu_model = "qemu64";
2305 #else
2306 cpu_model = "qemu32";
2307 #endif
2308 #elif defined(TARGET_ARM)
2309 cpu_model = "arm926";
2310 #elif defined(TARGET_M68K)
2311 cpu_model = "any";
2312 #elif defined(TARGET_SPARC)
2313 #ifdef TARGET_SPARC64
2314 cpu_model = "TI UltraSparc II";
2315 #else
2316 cpu_model = "Fujitsu MB86904";
2317 #endif
2318 #elif defined(TARGET_MIPS)
2319 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2320 cpu_model = "20Kc";
2321 #else
2322 cpu_model = "24Kf";
2323 #endif
2324 #elif defined(TARGET_PPC)
2325 #ifdef TARGET_PPC64
2326 cpu_model = "970";
2327 #else
2328 cpu_model = "750";
2329 #endif
2330 #else
2331 cpu_model = "any";
2332 #endif
2333 }
2334 cpu_exec_init_all(0);
2335 /* NOTE: we need to init the CPU at this stage to get
2336 qemu_host_page_size */
2337 env = cpu_init(cpu_model);
2338 if (!env) {
2339 fprintf(stderr, "Unable to find CPU definition\n");
2340 exit(1);
2341 }
2342 thread_env = env;
2343
2344 if (getenv("QEMU_STRACE")) {
2345 do_strace = 1;
2346 }
2347
2348 wrk = environ;
2349 while (*(wrk++))
2350 environ_count++;
2351
2352 target_environ = malloc((environ_count + 1) * sizeof(char *));
2353 if (!target_environ)
2354 abort();
2355 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
2356 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
2357 continue;
2358 *(dst++) = strdup(*wrk);
2359 }
2360 *dst = NULL; /* NULL terminate target_environ */
2361
2362 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2363 printf("Error loading %s\n", filename);
2364 _exit(1);
2365 }
2366
2367 for (wrk = target_environ; *wrk; wrk++) {
2368 free(*wrk);
2369 }
2370
2371 free(target_environ);
2372
2373 if (loglevel) {
2374 page_dump(logfile);
2375
2376 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2377 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2378 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
2379 info->start_code);
2380 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
2381 info->start_data);
2382 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2383 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
2384 info->start_stack);
2385 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2386 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2387 }
2388
2389 target_set_brk(info->brk);
2390 syscall_init();
2391 signal_init();
2392
2393 /* build Task State */
2394 memset(ts, 0, sizeof(TaskState));
2395 init_task_state(ts);
2396 ts->info = info;
2397 env->opaque = ts;
2398 env->user_mode_only = 1;
2399
2400 #if defined(TARGET_I386)
2401 cpu_x86_set_cpl(env, 3);
2402
2403 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2404 env->hflags |= HF_PE_MASK;
2405 if (env->cpuid_features & CPUID_SSE) {
2406 env->cr[4] |= CR4_OSFXSR_MASK;
2407 env->hflags |= HF_OSFXSR_MASK;
2408 }
2409 #ifndef TARGET_ABI32
2410 /* enable 64 bit mode if possible */
2411 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2412 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2413 exit(1);
2414 }
2415 env->cr[4] |= CR4_PAE_MASK;
2416 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2417 env->hflags |= HF_LMA_MASK;
2418 #endif
2419
2420 /* flags setup : we activate the IRQs by default as in user mode */
2421 env->eflags |= IF_MASK;
2422
2423 /* linux register setup */
2424 #ifndef TARGET_ABI32
2425 env->regs[R_EAX] = regs->rax;
2426 env->regs[R_EBX] = regs->rbx;
2427 env->regs[R_ECX] = regs->rcx;
2428 env->regs[R_EDX] = regs->rdx;
2429 env->regs[R_ESI] = regs->rsi;
2430 env->regs[R_EDI] = regs->rdi;
2431 env->regs[R_EBP] = regs->rbp;
2432 env->regs[R_ESP] = regs->rsp;
2433 env->eip = regs->rip;
2434 #else
2435 env->regs[R_EAX] = regs->eax;
2436 env->regs[R_EBX] = regs->ebx;
2437 env->regs[R_ECX] = regs->ecx;
2438 env->regs[R_EDX] = regs->edx;
2439 env->regs[R_ESI] = regs->esi;
2440 env->regs[R_EDI] = regs->edi;
2441 env->regs[R_EBP] = regs->ebp;
2442 env->regs[R_ESP] = regs->esp;
2443 env->eip = regs->eip;
2444 #endif
2445
2446 /* linux interrupt setup */
2447 env->idt.base = h2g(idt_table);
2448 env->idt.limit = sizeof(idt_table) - 1;
2449 set_idt(0, 0);
2450 set_idt(1, 0);
2451 set_idt(2, 0);
2452 set_idt(3, 3);
2453 set_idt(4, 3);
2454 set_idt(5, 0);
2455 set_idt(6, 0);
2456 set_idt(7, 0);
2457 set_idt(8, 0);
2458 set_idt(9, 0);
2459 set_idt(10, 0);
2460 set_idt(11, 0);
2461 set_idt(12, 0);
2462 set_idt(13, 0);
2463 set_idt(14, 0);
2464 set_idt(15, 0);
2465 set_idt(16, 0);
2466 set_idt(17, 0);
2467 set_idt(18, 0);
2468 set_idt(19, 0);
2469 set_idt(0x80, 3);
2470
2471 /* linux segment setup */
2472 {
2473 uint64_t *gdt_table;
2474 gdt_table = qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES);
2475 env->gdt.base = h2g((unsigned long)gdt_table);
2476 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2477 #ifdef TARGET_ABI32
2478 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2479 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2480 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2481 #else
2482 /* 64 bit code segment */
2483 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2484 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2485 DESC_L_MASK |
2486 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2487 #endif
2488 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2489 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2490 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2491 }
2492 cpu_x86_load_seg(env, R_CS, __USER_CS);
2493 cpu_x86_load_seg(env, R_SS, __USER_DS);
2494 #ifdef TARGET_ABI32
2495 cpu_x86_load_seg(env, R_DS, __USER_DS);
2496 cpu_x86_load_seg(env, R_ES, __USER_DS);
2497 cpu_x86_load_seg(env, R_FS, __USER_DS);
2498 cpu_x86_load_seg(env, R_GS, __USER_DS);
2499 /* This hack makes Wine work... */
2500 env->segs[R_FS].selector = 0;
2501 #else
2502 cpu_x86_load_seg(env, R_DS, 0);
2503 cpu_x86_load_seg(env, R_ES, 0);
2504 cpu_x86_load_seg(env, R_FS, 0);
2505 cpu_x86_load_seg(env, R_GS, 0);
2506 #endif
2507 #elif defined(TARGET_ARM)
2508 {
2509 int i;
2510 cpsr_write(env, regs->uregs[16], 0xffffffff);
2511 for(i = 0; i < 16; i++) {
2512 env->regs[i] = regs->uregs[i];
2513 }
2514 }
2515 #elif defined(TARGET_SPARC)
2516 {
2517 int i;
2518 env->pc = regs->pc;
2519 env->npc = regs->npc;
2520 env->y = regs->y;
2521 for(i = 0; i < 8; i++)
2522 env->gregs[i] = regs->u_regs[i];
2523 for(i = 0; i < 8; i++)
2524 env->regwptr[i] = regs->u_regs[i + 8];
2525 }
2526 #elif defined(TARGET_PPC)
2527 {
2528 int i;
2529
2530 #if defined(TARGET_PPC64)
2531 #if defined(TARGET_ABI32)
2532 env->msr &= ~((target_ulong)1 << MSR_SF);
2533 #else
2534 env->msr |= (target_ulong)1 << MSR_SF;
2535 #endif
2536 #endif
2537 env->nip = regs->nip;
2538 for(i = 0; i < 32; i++) {
2539 env->gpr[i] = regs->gpr[i];
2540 }
2541 }
2542 #elif defined(TARGET_M68K)
2543 {
2544 env->pc = regs->pc;
2545 env->dregs[0] = regs->d0;
2546 env->dregs[1] = regs->d1;
2547 env->dregs[2] = regs->d2;
2548 env->dregs[3] = regs->d3;
2549 env->dregs[4] = regs->d4;
2550 env->dregs[5] = regs->d5;
2551 env->dregs[6] = regs->d6;
2552 env->dregs[7] = regs->d7;
2553 env->aregs[0] = regs->a0;
2554 env->aregs[1] = regs->a1;
2555 env->aregs[2] = regs->a2;
2556 env->aregs[3] = regs->a3;
2557 env->aregs[4] = regs->a4;
2558 env->aregs[5] = regs->a5;
2559 env->aregs[6] = regs->a6;
2560 env->aregs[7] = regs->usp;
2561 env->sr = regs->sr;
2562 ts->sim_syscalls = 1;
2563 }
2564 #elif defined(TARGET_MIPS)
2565 {
2566 int i;
2567
2568 for(i = 0; i < 32; i++) {
2569 env->gpr[env->current_tc][i] = regs->regs[i];
2570 }
2571 env->PC[env->current_tc] = regs->cp0_epc;
2572 }
2573 #elif defined(TARGET_SH4)
2574 {
2575 int i;
2576
2577 for(i = 0; i < 16; i++) {
2578 env->gregs[i] = regs->regs[i];
2579 }
2580 env->pc = regs->pc;
2581 }
2582 #elif defined(TARGET_ALPHA)
2583 {
2584 int i;
2585
2586 for(i = 0; i < 28; i++) {
2587 env->ir[i] = ((abi_ulong *)regs)[i];
2588 }
2589 env->ipr[IPR_USP] = regs->usp;
2590 env->ir[30] = regs->usp;
2591 env->pc = regs->pc;
2592 env->unique = regs->unique;
2593 }
2594 #elif defined(TARGET_CRIS)
2595 {
2596 env->regs[0] = regs->r0;
2597 env->regs[1] = regs->r1;
2598 env->regs[2] = regs->r2;
2599 env->regs[3] = regs->r3;
2600 env->regs[4] = regs->r4;
2601 env->regs[5] = regs->r5;
2602 env->regs[6] = regs->r6;
2603 env->regs[7] = regs->r7;
2604 env->regs[8] = regs->r8;
2605 env->regs[9] = regs->r9;
2606 env->regs[10] = regs->r10;
2607 env->regs[11] = regs->r11;
2608 env->regs[12] = regs->r12;
2609 env->regs[13] = regs->r13;
2610 env->regs[14] = info->start_stack;
2611 env->regs[15] = regs->acr;
2612 env->pc = regs->erp;
2613 }
2614 #else
2615 #error unsupported target CPU
2616 #endif
2617
2618 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2619 ts->stack_base = info->start_stack;
2620 ts->heap_base = info->brk;
2621 /* This will be filled in on the first SYS_HEAPINFO call. */
2622 ts->heap_limit = 0;
2623 #endif
2624
2625 if (gdbstub_port) {
2626 gdbserver_start (gdbstub_port);
2627 gdb_handlesig(env, 0);
2628 }
2629 cpu_loop(env);
2630 /* never exits */
2631 return 0;
2632 }
Qemu copy for testing