4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
30 #include "qemu-common.h"
31 #include "cache-utils.h"
35 #include "qemu-timer.h"
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
43 unsigned long mmap_min_addr
;
44 #if defined(CONFIG_USE_GUEST_BASE)
45 unsigned long guest_base
;
47 unsigned long reserved_va
;
50 static const char *interp_prefix
= CONFIG_QEMU_INTERP_PREFIX
;
51 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
53 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
54 we allocate a bigger stack. Need a better solution, for example
55 by remapping the process stack directly at the right place */
56 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
58 void gemu_log(const char *fmt
, ...)
63 vfprintf(stderr
, fmt
, ap
);
67 #if defined(TARGET_I386)
68 int cpu_get_pic_interrupt(CPUState
*env
)
74 /* timers for rdtsc */
78 static uint64_t emu_time
;
80 int64_t cpu_get_real_ticks(void)
87 #if defined(CONFIG_USE_NPTL)
88 /***********************************************************/
89 /* Helper routines for implementing atomic operations. */
91 /* To implement exclusive operations we force all cpus to syncronise.
92 We don't require a full sync, only that no cpus are executing guest code.
93 The alternative is to map target atomic ops onto host equivalents,
94 which requires quite a lot of per host/target work. */
95 static pthread_mutex_t cpu_list_mutex
= PTHREAD_MUTEX_INITIALIZER
;
96 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
97 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
98 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
99 static int pending_cpus
;
101 /* Make sure everything is in a consistent state for calling fork(). */
102 void fork_start(void)
104 pthread_mutex_lock(&tb_lock
);
105 pthread_mutex_lock(&exclusive_lock
);
109 void fork_end(int child
)
111 mmap_fork_end(child
);
113 /* Child processes created by fork() only have a single thread.
114 Discard information about the parent threads. */
115 first_cpu
= thread_env
;
116 thread_env
->next_cpu
= NULL
;
118 pthread_mutex_init(&exclusive_lock
, NULL
);
119 pthread_mutex_init(&cpu_list_mutex
, NULL
);
120 pthread_cond_init(&exclusive_cond
, NULL
);
121 pthread_cond_init(&exclusive_resume
, NULL
);
122 pthread_mutex_init(&tb_lock
, NULL
);
123 gdbserver_fork(thread_env
);
125 pthread_mutex_unlock(&exclusive_lock
);
126 pthread_mutex_unlock(&tb_lock
);
130 /* Wait for pending exclusive operations to complete. The exclusive lock
132 static inline void exclusive_idle(void)
134 while (pending_cpus
) {
135 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
139 /* Start an exclusive operation.
140 Must only be called from outside cpu_arm_exec. */
141 static inline void start_exclusive(void)
144 pthread_mutex_lock(&exclusive_lock
);
148 /* Make all other cpus stop executing. */
149 for (other
= first_cpu
; other
; other
= other
->next_cpu
) {
150 if (other
->running
) {
155 if (pending_cpus
> 1) {
156 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
160 /* Finish an exclusive operation. */
161 static inline void end_exclusive(void)
164 pthread_cond_broadcast(&exclusive_resume
);
165 pthread_mutex_unlock(&exclusive_lock
);
168 /* Wait for exclusive ops to finish, and begin cpu execution. */
169 static inline void cpu_exec_start(CPUState
*env
)
171 pthread_mutex_lock(&exclusive_lock
);
174 pthread_mutex_unlock(&exclusive_lock
);
177 /* Mark cpu as not executing, and release pending exclusive ops. */
178 static inline void cpu_exec_end(CPUState
*env
)
180 pthread_mutex_lock(&exclusive_lock
);
182 if (pending_cpus
> 1) {
184 if (pending_cpus
== 1) {
185 pthread_cond_signal(&exclusive_cond
);
189 pthread_mutex_unlock(&exclusive_lock
);
192 void cpu_list_lock(void)
194 pthread_mutex_lock(&cpu_list_mutex
);
197 void cpu_list_unlock(void)
199 pthread_mutex_unlock(&cpu_list_mutex
);
201 #else /* if !CONFIG_USE_NPTL */
202 /* These are no-ops because we are not threadsafe. */
203 static inline void cpu_exec_start(CPUState
*env
)
207 static inline void cpu_exec_end(CPUState
*env
)
211 static inline void start_exclusive(void)
215 static inline void end_exclusive(void)
219 void fork_start(void)
223 void fork_end(int child
)
226 gdbserver_fork(thread_env
);
230 void cpu_list_lock(void)
234 void cpu_list_unlock(void)
241 /***********************************************************/
242 /* CPUX86 core interface */
244 void cpu_smm_update(CPUState
*env
)
248 uint64_t cpu_get_tsc(CPUX86State
*env
)
250 return cpu_get_real_ticks();
253 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
258 e1
= (addr
<< 16) | (limit
& 0xffff);
259 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
266 static uint64_t *idt_table
;
268 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
269 uint64_t addr
, unsigned int sel
)
272 e1
= (addr
& 0xffff) | (sel
<< 16);
273 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
277 p
[2] = tswap32(addr
>> 32);
280 /* only dpl matters as we do only user space emulation */
281 static void set_idt(int n
, unsigned int dpl
)
283 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
286 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
287 uint32_t addr
, unsigned int sel
)
290 e1
= (addr
& 0xffff) | (sel
<< 16);
291 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
297 /* only dpl matters as we do only user space emulation */
298 static void set_idt(int n
, unsigned int dpl
)
300 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
304 void cpu_loop(CPUX86State
*env
)
308 target_siginfo_t info
;
311 trapnr
= cpu_x86_exec(env
);
314 /* linux syscall from int $0x80 */
315 env
->regs
[R_EAX
] = do_syscall(env
,
327 /* linux syscall from syscall instruction */
328 env
->regs
[R_EAX
] = do_syscall(env
,
337 env
->eip
= env
->exception_next_eip
;
342 info
.si_signo
= SIGBUS
;
344 info
.si_code
= TARGET_SI_KERNEL
;
345 info
._sifields
._sigfault
._addr
= 0;
346 queue_signal(env
, info
.si_signo
, &info
);
349 /* XXX: potential problem if ABI32 */
350 #ifndef TARGET_X86_64
351 if (env
->eflags
& VM_MASK
) {
352 handle_vm86_fault(env
);
356 info
.si_signo
= SIGSEGV
;
358 info
.si_code
= TARGET_SI_KERNEL
;
359 info
._sifields
._sigfault
._addr
= 0;
360 queue_signal(env
, info
.si_signo
, &info
);
364 info
.si_signo
= SIGSEGV
;
366 if (!(env
->error_code
& 1))
367 info
.si_code
= TARGET_SEGV_MAPERR
;
369 info
.si_code
= TARGET_SEGV_ACCERR
;
370 info
._sifields
._sigfault
._addr
= env
->cr
[2];
371 queue_signal(env
, info
.si_signo
, &info
);
374 #ifndef TARGET_X86_64
375 if (env
->eflags
& VM_MASK
) {
376 handle_vm86_trap(env
, trapnr
);
380 /* division by zero */
381 info
.si_signo
= SIGFPE
;
383 info
.si_code
= TARGET_FPE_INTDIV
;
384 info
._sifields
._sigfault
._addr
= env
->eip
;
385 queue_signal(env
, info
.si_signo
, &info
);
390 #ifndef TARGET_X86_64
391 if (env
->eflags
& VM_MASK
) {
392 handle_vm86_trap(env
, trapnr
);
396 info
.si_signo
= SIGTRAP
;
398 if (trapnr
== EXCP01_DB
) {
399 info
.si_code
= TARGET_TRAP_BRKPT
;
400 info
._sifields
._sigfault
._addr
= env
->eip
;
402 info
.si_code
= TARGET_SI_KERNEL
;
403 info
._sifields
._sigfault
._addr
= 0;
405 queue_signal(env
, info
.si_signo
, &info
);
410 #ifndef TARGET_X86_64
411 if (env
->eflags
& VM_MASK
) {
412 handle_vm86_trap(env
, trapnr
);
416 info
.si_signo
= SIGSEGV
;
418 info
.si_code
= TARGET_SI_KERNEL
;
419 info
._sifields
._sigfault
._addr
= 0;
420 queue_signal(env
, info
.si_signo
, &info
);
424 info
.si_signo
= SIGILL
;
426 info
.si_code
= TARGET_ILL_ILLOPN
;
427 info
._sifields
._sigfault
._addr
= env
->eip
;
428 queue_signal(env
, info
.si_signo
, &info
);
431 /* just indicate that signals should be handled asap */
437 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
442 info
.si_code
= TARGET_TRAP_BRKPT
;
443 queue_signal(env
, info
.si_signo
, &info
);
448 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
449 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
453 process_pending_signals(env
);
460 /* Handle a jump to the kernel code page. */
462 do_kernel_trap(CPUARMState
*env
)
468 switch (env
->regs
[15]) {
469 case 0xffff0fa0: /* __kernel_memory_barrier */
470 /* ??? No-op. Will need to do better for SMP. */
472 case 0xffff0fc0: /* __kernel_cmpxchg */
473 /* XXX: This only works between threads, not between processes.
474 It's probably possible to implement this with native host
475 operations. However things like ldrex/strex are much harder so
476 there's not much point trying. */
478 cpsr
= cpsr_read(env
);
480 /* FIXME: This should SEGV if the access fails. */
481 if (get_user_u32(val
, addr
))
483 if (val
== env
->regs
[0]) {
485 /* FIXME: Check for segfaults. */
486 put_user_u32(val
, addr
);
493 cpsr_write(env
, cpsr
, CPSR_C
);
496 case 0xffff0fe0: /* __kernel_get_tls */
497 env
->regs
[0] = env
->cp15
.c13_tls2
;
502 /* Jump back to the caller. */
503 addr
= env
->regs
[14];
508 env
->regs
[15] = addr
;
513 static int do_strex(CPUARMState
*env
)
521 addr
= env
->exclusive_addr
;
522 if (addr
!= env
->exclusive_test
) {
525 size
= env
->exclusive_info
& 0xf;
528 segv
= get_user_u8(val
, addr
);
531 segv
= get_user_u16(val
, addr
);
535 segv
= get_user_u32(val
, addr
);
541 env
->cp15
.c6_data
= addr
;
544 if (val
!= env
->exclusive_val
) {
548 segv
= get_user_u32(val
, addr
+ 4);
550 env
->cp15
.c6_data
= addr
+ 4;
553 if (val
!= env
->exclusive_high
) {
557 val
= env
->regs
[(env
->exclusive_info
>> 8) & 0xf];
560 segv
= put_user_u8(val
, addr
);
563 segv
= put_user_u16(val
, addr
);
567 segv
= put_user_u32(val
, addr
);
571 env
->cp15
.c6_data
= addr
;
575 val
= env
->regs
[(env
->exclusive_info
>> 12) & 0xf];
576 segv
= put_user_u32(val
, addr
+ 4);
578 env
->cp15
.c6_data
= addr
+ 4;
585 env
->regs
[(env
->exclusive_info
>> 4) & 0xf] = rc
;
591 void cpu_loop(CPUARMState
*env
)
594 unsigned int n
, insn
;
595 target_siginfo_t info
;
600 trapnr
= cpu_arm_exec(env
);
605 TaskState
*ts
= env
->opaque
;
609 /* we handle the FPU emulation here, as Linux */
610 /* we get the opcode */
611 /* FIXME - what to do if get_user() fails? */
612 get_user_u32(opcode
, env
->regs
[15]);
614 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
615 if (rc
== 0) { /* illegal instruction */
616 info
.si_signo
= SIGILL
;
618 info
.si_code
= TARGET_ILL_ILLOPN
;
619 info
._sifields
._sigfault
._addr
= env
->regs
[15];
620 queue_signal(env
, info
.si_signo
, &info
);
621 } else if (rc
< 0) { /* FP exception */
624 /* translate softfloat flags to FPSR flags */
625 if (-rc
& float_flag_invalid
)
627 if (-rc
& float_flag_divbyzero
)
629 if (-rc
& float_flag_overflow
)
631 if (-rc
& float_flag_underflow
)
633 if (-rc
& float_flag_inexact
)
636 FPSR fpsr
= ts
->fpa
.fpsr
;
637 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
639 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
640 info
.si_signo
= SIGFPE
;
643 /* ordered by priority, least first */
644 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
645 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
646 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
647 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
648 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
650 info
._sifields
._sigfault
._addr
= env
->regs
[15];
651 queue_signal(env
, info
.si_signo
, &info
);
656 /* accumulate unenabled exceptions */
657 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
659 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
661 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
663 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
665 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
668 } else { /* everything OK */
679 if (trapnr
== EXCP_BKPT
) {
681 /* FIXME - what to do if get_user() fails? */
682 get_user_u16(insn
, env
->regs
[15]);
686 /* FIXME - what to do if get_user() fails? */
687 get_user_u32(insn
, env
->regs
[15]);
688 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
693 /* FIXME - what to do if get_user() fails? */
694 get_user_u16(insn
, env
->regs
[15] - 2);
697 /* FIXME - what to do if get_user() fails? */
698 get_user_u32(insn
, env
->regs
[15] - 4);
703 if (n
== ARM_NR_cacheflush
) {
705 } else if (n
== ARM_NR_semihosting
706 || n
== ARM_NR_thumb_semihosting
) {
707 env
->regs
[0] = do_arm_semihosting (env
);
708 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
709 || (env
->thumb
&& n
== ARM_THUMB_SYSCALL
)) {
711 if (env
->thumb
|| n
== 0) {
714 n
-= ARM_SYSCALL_BASE
;
717 if ( n
> ARM_NR_BASE
) {
719 case ARM_NR_cacheflush
:
723 cpu_set_tls(env
, env
->regs
[0]);
727 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
729 env
->regs
[0] = -TARGET_ENOSYS
;
733 env
->regs
[0] = do_syscall(env
,
749 /* just indicate that signals should be handled asap */
751 case EXCP_PREFETCH_ABORT
:
752 addr
= env
->cp15
.c6_insn
;
754 case EXCP_DATA_ABORT
:
755 addr
= env
->cp15
.c6_data
;
759 info
.si_signo
= SIGSEGV
;
761 /* XXX: check env->error_code */
762 info
.si_code
= TARGET_SEGV_MAPERR
;
763 info
._sifields
._sigfault
._addr
= addr
;
764 queue_signal(env
, info
.si_signo
, &info
);
771 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
776 info
.si_code
= TARGET_TRAP_BRKPT
;
777 queue_signal(env
, info
.si_signo
, &info
);
781 case EXCP_KERNEL_TRAP
:
782 if (do_kernel_trap(env
))
787 addr
= env
->cp15
.c6_data
;
793 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
795 cpu_dump_state(env
, stderr
, fprintf
, 0);
798 process_pending_signals(env
);
804 #ifdef TARGET_UNICORE32
806 void cpu_loop(CPUState
*env
)
809 unsigned int n
, insn
;
810 target_siginfo_t info
;
814 trapnr
= uc32_cpu_exec(env
);
820 get_user_u32(insn
, env
->regs
[31] - 4);
823 if (n
>= UC32_SYSCALL_BASE
) {
825 n
-= UC32_SYSCALL_BASE
;
826 if (n
== UC32_SYSCALL_NR_set_tls
) {
827 cpu_set_tls(env
, env
->regs
[0]);
830 env
->regs
[0] = do_syscall(env
,
846 info
.si_signo
= SIGSEGV
;
848 /* XXX: check env->error_code */
849 info
.si_code
= TARGET_SEGV_MAPERR
;
850 info
._sifields
._sigfault
._addr
= env
->cp0
.c4_faultaddr
;
851 queue_signal(env
, info
.si_signo
, &info
);
854 /* just indicate that signals should be handled asap */
860 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
864 info
.si_code
= TARGET_TRAP_BRKPT
;
865 queue_signal(env
, info
.si_signo
, &info
);
872 process_pending_signals(env
);
876 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
877 cpu_dump_state(env
, stderr
, fprintf
, 0);
883 #define SPARC64_STACK_BIAS 2047
887 /* WARNING: dealing with register windows _is_ complicated. More info
888 can be found at http://www.sics.se/~psm/sparcstack.html */
889 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
891 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
892 /* wrap handling : if cwp is on the last window, then we use the
893 registers 'after' the end */
894 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
895 index
+= 16 * env
->nwindows
;
899 /* save the register window 'cwp1' */
900 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
905 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
906 #ifdef TARGET_SPARC64
908 sp_ptr
+= SPARC64_STACK_BIAS
;
910 #if defined(DEBUG_WIN)
911 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
914 for(i
= 0; i
< 16; i
++) {
915 /* FIXME - what to do if put_user() fails? */
916 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
917 sp_ptr
+= sizeof(abi_ulong
);
921 static void save_window(CPUSPARCState
*env
)
923 #ifndef TARGET_SPARC64
924 unsigned int new_wim
;
925 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
926 ((1LL << env
->nwindows
) - 1);
927 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
930 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
936 static void restore_window(CPUSPARCState
*env
)
938 #ifndef TARGET_SPARC64
939 unsigned int new_wim
;
941 unsigned int i
, cwp1
;
944 #ifndef TARGET_SPARC64
945 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
946 ((1LL << env
->nwindows
) - 1);
949 /* restore the invalid window */
950 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
951 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
952 #ifdef TARGET_SPARC64
954 sp_ptr
+= SPARC64_STACK_BIAS
;
956 #if defined(DEBUG_WIN)
957 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
960 for(i
= 0; i
< 16; i
++) {
961 /* FIXME - what to do if get_user() fails? */
962 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
963 sp_ptr
+= sizeof(abi_ulong
);
965 #ifdef TARGET_SPARC64
967 if (env
->cleanwin
< env
->nwindows
- 1)
975 static void flush_windows(CPUSPARCState
*env
)
981 /* if restore would invoke restore_window(), then we can stop */
982 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
983 #ifndef TARGET_SPARC64
984 if (env
->wim
& (1 << cwp1
))
987 if (env
->canrestore
== 0)
992 save_window_offset(env
, cwp1
);
995 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
996 #ifndef TARGET_SPARC64
997 /* set wim so that restore will reload the registers */
998 env
->wim
= 1 << cwp1
;
1000 #if defined(DEBUG_WIN)
1001 printf("flush_windows: nb=%d\n", offset
- 1);
1005 void cpu_loop (CPUSPARCState
*env
)
1009 target_siginfo_t info
;
1012 trapnr
= cpu_sparc_exec (env
);
1015 #ifndef TARGET_SPARC64
1022 ret
= do_syscall (env
, env
->gregs
[1],
1023 env
->regwptr
[0], env
->regwptr
[1],
1024 env
->regwptr
[2], env
->regwptr
[3],
1025 env
->regwptr
[4], env
->regwptr
[5],
1027 if ((abi_ulong
)ret
>= (abi_ulong
)(-515)) {
1028 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1029 env
->xcc
|= PSR_CARRY
;
1031 env
->psr
|= PSR_CARRY
;
1035 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1036 env
->xcc
&= ~PSR_CARRY
;
1038 env
->psr
&= ~PSR_CARRY
;
1041 env
->regwptr
[0] = ret
;
1042 /* next instruction */
1044 env
->npc
= env
->npc
+ 4;
1046 case 0x83: /* flush windows */
1051 /* next instruction */
1053 env
->npc
= env
->npc
+ 4;
1055 #ifndef TARGET_SPARC64
1056 case TT_WIN_OVF
: /* window overflow */
1059 case TT_WIN_UNF
: /* window underflow */
1060 restore_window(env
);
1065 info
.si_signo
= SIGSEGV
;
1067 /* XXX: check env->error_code */
1068 info
.si_code
= TARGET_SEGV_MAPERR
;
1069 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1070 queue_signal(env
, info
.si_signo
, &info
);
1074 case TT_SPILL
: /* window overflow */
1077 case TT_FILL
: /* window underflow */
1078 restore_window(env
);
1083 info
.si_signo
= SIGSEGV
;
1085 /* XXX: check env->error_code */
1086 info
.si_code
= TARGET_SEGV_MAPERR
;
1087 if (trapnr
== TT_DFAULT
)
1088 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
1090 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1091 queue_signal(env
, info
.si_signo
, &info
);
1094 #ifndef TARGET_ABI32
1097 sparc64_get_context(env
);
1101 sparc64_set_context(env
);
1105 case EXCP_INTERRUPT
:
1106 /* just indicate that signals should be handled asap */
1112 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1115 info
.si_signo
= sig
;
1117 info
.si_code
= TARGET_TRAP_BRKPT
;
1118 queue_signal(env
, info
.si_signo
, &info
);
1123 printf ("Unhandled trap: 0x%x\n", trapnr
);
1124 cpu_dump_state(env
, stderr
, fprintf
, 0);
1127 process_pending_signals (env
);
1134 static inline uint64_t cpu_ppc_get_tb (CPUState
*env
)
1140 uint64_t cpu_ppc_load_tbl (CPUState
*env
)
1142 return cpu_ppc_get_tb(env
);
1145 uint32_t cpu_ppc_load_tbu (CPUState
*env
)
1147 return cpu_ppc_get_tb(env
) >> 32;
1150 uint64_t cpu_ppc_load_atbl (CPUState
*env
)
1152 return cpu_ppc_get_tb(env
);
1155 uint32_t cpu_ppc_load_atbu (CPUState
*env
)
1157 return cpu_ppc_get_tb(env
) >> 32;
1160 uint32_t cpu_ppc601_load_rtcu (CPUState
*env
)
1161 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1163 uint32_t cpu_ppc601_load_rtcl (CPUState
*env
)
1165 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1168 /* XXX: to be fixed */
1169 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1174 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1179 #define EXCP_DUMP(env, fmt, ...) \
1181 fprintf(stderr, fmt , ## __VA_ARGS__); \
1182 cpu_dump_state(env, stderr, fprintf, 0); \
1183 qemu_log(fmt, ## __VA_ARGS__); \
1185 log_cpu_state(env, 0); \
1188 static int do_store_exclusive(CPUPPCState
*env
)
1191 target_ulong page_addr
;
1196 addr
= env
->reserve_ea
;
1197 page_addr
= addr
& TARGET_PAGE_MASK
;
1200 flags
= page_get_flags(page_addr
);
1201 if ((flags
& PAGE_READ
) == 0) {
1204 int reg
= env
->reserve_info
& 0x1f;
1205 int size
= (env
->reserve_info
>> 5) & 0xf;
1208 if (addr
== env
->reserve_addr
) {
1210 case 1: segv
= get_user_u8(val
, addr
); break;
1211 case 2: segv
= get_user_u16(val
, addr
); break;
1212 case 4: segv
= get_user_u32(val
, addr
); break;
1213 #if defined(TARGET_PPC64)
1214 case 8: segv
= get_user_u64(val
, addr
); break;
1218 if (!segv
&& val
== env
->reserve_val
) {
1219 val
= env
->gpr
[reg
];
1221 case 1: segv
= put_user_u8(val
, addr
); break;
1222 case 2: segv
= put_user_u16(val
, addr
); break;
1223 case 4: segv
= put_user_u32(val
, addr
); break;
1224 #if defined(TARGET_PPC64)
1225 case 8: segv
= put_user_u64(val
, addr
); break;
1234 env
->crf
[0] = (stored
<< 1) | xer_so
;
1235 env
->reserve_addr
= (target_ulong
)-1;
1245 void cpu_loop(CPUPPCState
*env
)
1247 target_siginfo_t info
;
1252 cpu_exec_start(env
);
1253 trapnr
= cpu_ppc_exec(env
);
1256 case POWERPC_EXCP_NONE
:
1259 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1260 cpu_abort(env
, "Critical interrupt while in user mode. "
1263 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1264 cpu_abort(env
, "Machine check exception while in user mode. "
1267 case POWERPC_EXCP_DSI
: /* Data storage exception */
1268 EXCP_DUMP(env
, "Invalid data memory access: 0x" TARGET_FMT_lx
"\n",
1270 /* XXX: check this. Seems bugged */
1271 switch (env
->error_code
& 0xFF000000) {
1273 info
.si_signo
= TARGET_SIGSEGV
;
1275 info
.si_code
= TARGET_SEGV_MAPERR
;
1278 info
.si_signo
= TARGET_SIGILL
;
1280 info
.si_code
= TARGET_ILL_ILLADR
;
1283 info
.si_signo
= TARGET_SIGSEGV
;
1285 info
.si_code
= TARGET_SEGV_ACCERR
;
1288 /* Let's send a regular segfault... */
1289 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1291 info
.si_signo
= TARGET_SIGSEGV
;
1293 info
.si_code
= TARGET_SEGV_MAPERR
;
1296 info
._sifields
._sigfault
._addr
= env
->nip
;
1297 queue_signal(env
, info
.si_signo
, &info
);
1299 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1300 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1301 "\n", env
->spr
[SPR_SRR0
]);
1302 /* XXX: check this */
1303 switch (env
->error_code
& 0xFF000000) {
1305 info
.si_signo
= TARGET_SIGSEGV
;
1307 info
.si_code
= TARGET_SEGV_MAPERR
;
1311 info
.si_signo
= TARGET_SIGSEGV
;
1313 info
.si_code
= TARGET_SEGV_ACCERR
;
1316 /* Let's send a regular segfault... */
1317 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1319 info
.si_signo
= TARGET_SIGSEGV
;
1321 info
.si_code
= TARGET_SEGV_MAPERR
;
1324 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1325 queue_signal(env
, info
.si_signo
, &info
);
1327 case POWERPC_EXCP_EXTERNAL
: /* External input */
1328 cpu_abort(env
, "External interrupt while in user mode. "
1331 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1332 EXCP_DUMP(env
, "Unaligned memory access\n");
1333 /* XXX: check this */
1334 info
.si_signo
= TARGET_SIGBUS
;
1336 info
.si_code
= TARGET_BUS_ADRALN
;
1337 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1338 queue_signal(env
, info
.si_signo
, &info
);
1340 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1341 /* XXX: check this */
1342 switch (env
->error_code
& ~0xF) {
1343 case POWERPC_EXCP_FP
:
1344 EXCP_DUMP(env
, "Floating point program exception\n");
1345 info
.si_signo
= TARGET_SIGFPE
;
1347 switch (env
->error_code
& 0xF) {
1348 case POWERPC_EXCP_FP_OX
:
1349 info
.si_code
= TARGET_FPE_FLTOVF
;
1351 case POWERPC_EXCP_FP_UX
:
1352 info
.si_code
= TARGET_FPE_FLTUND
;
1354 case POWERPC_EXCP_FP_ZX
:
1355 case POWERPC_EXCP_FP_VXZDZ
:
1356 info
.si_code
= TARGET_FPE_FLTDIV
;
1358 case POWERPC_EXCP_FP_XX
:
1359 info
.si_code
= TARGET_FPE_FLTRES
;
1361 case POWERPC_EXCP_FP_VXSOFT
:
1362 info
.si_code
= TARGET_FPE_FLTINV
;
1364 case POWERPC_EXCP_FP_VXSNAN
:
1365 case POWERPC_EXCP_FP_VXISI
:
1366 case POWERPC_EXCP_FP_VXIDI
:
1367 case POWERPC_EXCP_FP_VXIMZ
:
1368 case POWERPC_EXCP_FP_VXVC
:
1369 case POWERPC_EXCP_FP_VXSQRT
:
1370 case POWERPC_EXCP_FP_VXCVI
:
1371 info
.si_code
= TARGET_FPE_FLTSUB
;
1374 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1379 case POWERPC_EXCP_INVAL
:
1380 EXCP_DUMP(env
, "Invalid instruction\n");
1381 info
.si_signo
= TARGET_SIGILL
;
1383 switch (env
->error_code
& 0xF) {
1384 case POWERPC_EXCP_INVAL_INVAL
:
1385 info
.si_code
= TARGET_ILL_ILLOPC
;
1387 case POWERPC_EXCP_INVAL_LSWX
:
1388 info
.si_code
= TARGET_ILL_ILLOPN
;
1390 case POWERPC_EXCP_INVAL_SPR
:
1391 info
.si_code
= TARGET_ILL_PRVREG
;
1393 case POWERPC_EXCP_INVAL_FP
:
1394 info
.si_code
= TARGET_ILL_COPROC
;
1397 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1398 env
->error_code
& 0xF);
1399 info
.si_code
= TARGET_ILL_ILLADR
;
1403 case POWERPC_EXCP_PRIV
:
1404 EXCP_DUMP(env
, "Privilege violation\n");
1405 info
.si_signo
= TARGET_SIGILL
;
1407 switch (env
->error_code
& 0xF) {
1408 case POWERPC_EXCP_PRIV_OPC
:
1409 info
.si_code
= TARGET_ILL_PRVOPC
;
1411 case POWERPC_EXCP_PRIV_REG
:
1412 info
.si_code
= TARGET_ILL_PRVREG
;
1415 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1416 env
->error_code
& 0xF);
1417 info
.si_code
= TARGET_ILL_PRVOPC
;
1421 case POWERPC_EXCP_TRAP
:
1422 cpu_abort(env
, "Tried to call a TRAP\n");
1425 /* Should not happen ! */
1426 cpu_abort(env
, "Unknown program exception (%02x)\n",
1430 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1431 queue_signal(env
, info
.si_signo
, &info
);
1433 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1434 EXCP_DUMP(env
, "No floating point allowed\n");
1435 info
.si_signo
= TARGET_SIGILL
;
1437 info
.si_code
= TARGET_ILL_COPROC
;
1438 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1439 queue_signal(env
, info
.si_signo
, &info
);
1441 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1442 cpu_abort(env
, "Syscall exception while in user mode. "
1445 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1446 EXCP_DUMP(env
, "No APU instruction allowed\n");
1447 info
.si_signo
= TARGET_SIGILL
;
1449 info
.si_code
= TARGET_ILL_COPROC
;
1450 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1451 queue_signal(env
, info
.si_signo
, &info
);
1453 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1454 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1457 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1458 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1461 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1462 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1465 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1466 cpu_abort(env
, "Data TLB exception while in user mode. "
1469 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1470 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1473 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1474 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1475 info
.si_signo
= TARGET_SIGILL
;
1477 info
.si_code
= TARGET_ILL_COPROC
;
1478 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1479 queue_signal(env
, info
.si_signo
, &info
);
1481 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1482 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1484 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1485 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1487 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1488 cpu_abort(env
, "Performance monitor exception not handled\n");
1490 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1491 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1494 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1495 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1498 case POWERPC_EXCP_RESET
: /* System reset exception */
1499 cpu_abort(env
, "Reset interrupt while in user mode. "
1502 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1503 cpu_abort(env
, "Data segment exception while in user mode. "
1506 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1507 cpu_abort(env
, "Instruction segment exception "
1508 "while in user mode. Aborting\n");
1510 /* PowerPC 64 with hypervisor mode support */
1511 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1512 cpu_abort(env
, "Hypervisor decrementer interrupt "
1513 "while in user mode. Aborting\n");
1515 case POWERPC_EXCP_TRACE
: /* Trace exception */
1517 * we use this exception to emulate step-by-step execution mode.
1520 /* PowerPC 64 with hypervisor mode support */
1521 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1522 cpu_abort(env
, "Hypervisor data storage exception "
1523 "while in user mode. Aborting\n");
1525 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1526 cpu_abort(env
, "Hypervisor instruction storage exception "
1527 "while in user mode. Aborting\n");
1529 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1530 cpu_abort(env
, "Hypervisor data segment exception "
1531 "while in user mode. Aborting\n");
1533 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1534 cpu_abort(env
, "Hypervisor instruction segment exception "
1535 "while in user mode. Aborting\n");
1537 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1538 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1539 info
.si_signo
= TARGET_SIGILL
;
1541 info
.si_code
= TARGET_ILL_COPROC
;
1542 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1543 queue_signal(env
, info
.si_signo
, &info
);
1545 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1546 cpu_abort(env
, "Programable interval timer interrupt "
1547 "while in user mode. Aborting\n");
1549 case POWERPC_EXCP_IO
: /* IO error exception */
1550 cpu_abort(env
, "IO error exception while in user mode. "
1553 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1554 cpu_abort(env
, "Run mode exception while in user mode. "
1557 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1558 cpu_abort(env
, "Emulation trap exception not handled\n");
1560 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1561 cpu_abort(env
, "Instruction fetch TLB exception "
1562 "while in user-mode. Aborting");
1564 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1565 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1568 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1569 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1572 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1573 cpu_abort(env
, "Floating-point assist exception not handled\n");
1575 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1576 cpu_abort(env
, "Instruction address breakpoint exception "
1579 case POWERPC_EXCP_SMI
: /* System management interrupt */
1580 cpu_abort(env
, "System management interrupt while in user mode. "
1583 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1584 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1587 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1588 cpu_abort(env
, "Performance monitor exception not handled\n");
1590 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1591 cpu_abort(env
, "Vector assist exception not handled\n");
1593 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1594 cpu_abort(env
, "Soft patch exception not handled\n");
1596 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1597 cpu_abort(env
, "Maintenance exception while in user mode. "
1600 case POWERPC_EXCP_STOP
: /* stop translation */
1601 /* We did invalidate the instruction cache. Go on */
1603 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1604 /* We just stopped because of a branch. Go on */
1606 case POWERPC_EXCP_SYSCALL_USER
:
1607 /* system call in user-mode emulation */
1609 * PPC ABI uses overflow flag in cr0 to signal an error
1613 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env
->gpr
[0],
1614 env
->gpr
[3], env
->gpr
[4], env
->gpr
[5], env
->gpr
[6]);
1616 env
->crf
[0] &= ~0x1;
1617 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1618 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1620 if (ret
== (uint32_t)(-TARGET_QEMU_ESIGRETURN
)) {
1621 /* Returning from a successful sigreturn syscall.
1622 Avoid corrupting register state. */
1625 if (ret
> (uint32_t)(-515)) {
1631 printf("syscall returned 0x%08x (%d)\n", ret
, ret
);
1634 case POWERPC_EXCP_STCX
:
1635 if (do_store_exclusive(env
)) {
1636 info
.si_signo
= TARGET_SIGSEGV
;
1638 info
.si_code
= TARGET_SEGV_MAPERR
;
1639 info
._sifields
._sigfault
._addr
= env
->nip
;
1640 queue_signal(env
, info
.si_signo
, &info
);
1647 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1649 info
.si_signo
= sig
;
1651 info
.si_code
= TARGET_TRAP_BRKPT
;
1652 queue_signal(env
, info
.si_signo
, &info
);
1656 case EXCP_INTERRUPT
:
1657 /* just indicate that signals should be handled asap */
1660 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1663 process_pending_signals(env
);
1670 #define MIPS_SYS(name, args) args,
1672 static const uint8_t mips_syscall_args
[] = {
1673 MIPS_SYS(sys_syscall
, 0) /* 4000 */
1674 MIPS_SYS(sys_exit
, 1)
1675 MIPS_SYS(sys_fork
, 0)
1676 MIPS_SYS(sys_read
, 3)
1677 MIPS_SYS(sys_write
, 3)
1678 MIPS_SYS(sys_open
, 3) /* 4005 */
1679 MIPS_SYS(sys_close
, 1)
1680 MIPS_SYS(sys_waitpid
, 3)
1681 MIPS_SYS(sys_creat
, 2)
1682 MIPS_SYS(sys_link
, 2)
1683 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1684 MIPS_SYS(sys_execve
, 0)
1685 MIPS_SYS(sys_chdir
, 1)
1686 MIPS_SYS(sys_time
, 1)
1687 MIPS_SYS(sys_mknod
, 3)
1688 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1689 MIPS_SYS(sys_lchown
, 3)
1690 MIPS_SYS(sys_ni_syscall
, 0)
1691 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1692 MIPS_SYS(sys_lseek
, 3)
1693 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1694 MIPS_SYS(sys_mount
, 5)
1695 MIPS_SYS(sys_oldumount
, 1)
1696 MIPS_SYS(sys_setuid
, 1)
1697 MIPS_SYS(sys_getuid
, 0)
1698 MIPS_SYS(sys_stime
, 1) /* 4025 */
1699 MIPS_SYS(sys_ptrace
, 4)
1700 MIPS_SYS(sys_alarm
, 1)
1701 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1702 MIPS_SYS(sys_pause
, 0)
1703 MIPS_SYS(sys_utime
, 2) /* 4030 */
1704 MIPS_SYS(sys_ni_syscall
, 0)
1705 MIPS_SYS(sys_ni_syscall
, 0)
1706 MIPS_SYS(sys_access
, 2)
1707 MIPS_SYS(sys_nice
, 1)
1708 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1709 MIPS_SYS(sys_sync
, 0)
1710 MIPS_SYS(sys_kill
, 2)
1711 MIPS_SYS(sys_rename
, 2)
1712 MIPS_SYS(sys_mkdir
, 2)
1713 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1714 MIPS_SYS(sys_dup
, 1)
1715 MIPS_SYS(sys_pipe
, 0)
1716 MIPS_SYS(sys_times
, 1)
1717 MIPS_SYS(sys_ni_syscall
, 0)
1718 MIPS_SYS(sys_brk
, 1) /* 4045 */
1719 MIPS_SYS(sys_setgid
, 1)
1720 MIPS_SYS(sys_getgid
, 0)
1721 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1722 MIPS_SYS(sys_geteuid
, 0)
1723 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1724 MIPS_SYS(sys_acct
, 0)
1725 MIPS_SYS(sys_umount
, 2)
1726 MIPS_SYS(sys_ni_syscall
, 0)
1727 MIPS_SYS(sys_ioctl
, 3)
1728 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1729 MIPS_SYS(sys_ni_syscall
, 2)
1730 MIPS_SYS(sys_setpgid
, 2)
1731 MIPS_SYS(sys_ni_syscall
, 0)
1732 MIPS_SYS(sys_olduname
, 1)
1733 MIPS_SYS(sys_umask
, 1) /* 4060 */
1734 MIPS_SYS(sys_chroot
, 1)
1735 MIPS_SYS(sys_ustat
, 2)
1736 MIPS_SYS(sys_dup2
, 2)
1737 MIPS_SYS(sys_getppid
, 0)
1738 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1739 MIPS_SYS(sys_setsid
, 0)
1740 MIPS_SYS(sys_sigaction
, 3)
1741 MIPS_SYS(sys_sgetmask
, 0)
1742 MIPS_SYS(sys_ssetmask
, 1)
1743 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1744 MIPS_SYS(sys_setregid
, 2)
1745 MIPS_SYS(sys_sigsuspend
, 0)
1746 MIPS_SYS(sys_sigpending
, 1)
1747 MIPS_SYS(sys_sethostname
, 2)
1748 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1749 MIPS_SYS(sys_getrlimit
, 2)
1750 MIPS_SYS(sys_getrusage
, 2)
1751 MIPS_SYS(sys_gettimeofday
, 2)
1752 MIPS_SYS(sys_settimeofday
, 2)
1753 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1754 MIPS_SYS(sys_setgroups
, 2)
1755 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1756 MIPS_SYS(sys_symlink
, 2)
1757 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1758 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1759 MIPS_SYS(sys_uselib
, 1)
1760 MIPS_SYS(sys_swapon
, 2)
1761 MIPS_SYS(sys_reboot
, 3)
1762 MIPS_SYS(old_readdir
, 3)
1763 MIPS_SYS(old_mmap
, 6) /* 4090 */
1764 MIPS_SYS(sys_munmap
, 2)
1765 MIPS_SYS(sys_truncate
, 2)
1766 MIPS_SYS(sys_ftruncate
, 2)
1767 MIPS_SYS(sys_fchmod
, 2)
1768 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1769 MIPS_SYS(sys_getpriority
, 2)
1770 MIPS_SYS(sys_setpriority
, 3)
1771 MIPS_SYS(sys_ni_syscall
, 0)
1772 MIPS_SYS(sys_statfs
, 2)
1773 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1774 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1775 MIPS_SYS(sys_socketcall
, 2)
1776 MIPS_SYS(sys_syslog
, 3)
1777 MIPS_SYS(sys_setitimer
, 3)
1778 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1779 MIPS_SYS(sys_newstat
, 2)
1780 MIPS_SYS(sys_newlstat
, 2)
1781 MIPS_SYS(sys_newfstat
, 2)
1782 MIPS_SYS(sys_uname
, 1)
1783 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1784 MIPS_SYS(sys_vhangup
, 0)
1785 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1786 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1787 MIPS_SYS(sys_wait4
, 4)
1788 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1789 MIPS_SYS(sys_sysinfo
, 1)
1790 MIPS_SYS(sys_ipc
, 6)
1791 MIPS_SYS(sys_fsync
, 1)
1792 MIPS_SYS(sys_sigreturn
, 0)
1793 MIPS_SYS(sys_clone
, 6) /* 4120 */
1794 MIPS_SYS(sys_setdomainname
, 2)
1795 MIPS_SYS(sys_newuname
, 1)
1796 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1797 MIPS_SYS(sys_adjtimex
, 1)
1798 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1799 MIPS_SYS(sys_sigprocmask
, 3)
1800 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1801 MIPS_SYS(sys_init_module
, 5)
1802 MIPS_SYS(sys_delete_module
, 1)
1803 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1804 MIPS_SYS(sys_quotactl
, 0)
1805 MIPS_SYS(sys_getpgid
, 1)
1806 MIPS_SYS(sys_fchdir
, 1)
1807 MIPS_SYS(sys_bdflush
, 2)
1808 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1809 MIPS_SYS(sys_personality
, 1)
1810 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1811 MIPS_SYS(sys_setfsuid
, 1)
1812 MIPS_SYS(sys_setfsgid
, 1)
1813 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1814 MIPS_SYS(sys_getdents
, 3)
1815 MIPS_SYS(sys_select
, 5)
1816 MIPS_SYS(sys_flock
, 2)
1817 MIPS_SYS(sys_msync
, 3)
1818 MIPS_SYS(sys_readv
, 3) /* 4145 */
1819 MIPS_SYS(sys_writev
, 3)
1820 MIPS_SYS(sys_cacheflush
, 3)
1821 MIPS_SYS(sys_cachectl
, 3)
1822 MIPS_SYS(sys_sysmips
, 4)
1823 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1824 MIPS_SYS(sys_getsid
, 1)
1825 MIPS_SYS(sys_fdatasync
, 0)
1826 MIPS_SYS(sys_sysctl
, 1)
1827 MIPS_SYS(sys_mlock
, 2)
1828 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1829 MIPS_SYS(sys_mlockall
, 1)
1830 MIPS_SYS(sys_munlockall
, 0)
1831 MIPS_SYS(sys_sched_setparam
, 2)
1832 MIPS_SYS(sys_sched_getparam
, 2)
1833 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1834 MIPS_SYS(sys_sched_getscheduler
, 1)
1835 MIPS_SYS(sys_sched_yield
, 0)
1836 MIPS_SYS(sys_sched_get_priority_max
, 1)
1837 MIPS_SYS(sys_sched_get_priority_min
, 1)
1838 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1839 MIPS_SYS(sys_nanosleep
, 2)
1840 MIPS_SYS(sys_mremap
, 4)
1841 MIPS_SYS(sys_accept
, 3)
1842 MIPS_SYS(sys_bind
, 3)
1843 MIPS_SYS(sys_connect
, 3) /* 4170 */
1844 MIPS_SYS(sys_getpeername
, 3)
1845 MIPS_SYS(sys_getsockname
, 3)
1846 MIPS_SYS(sys_getsockopt
, 5)
1847 MIPS_SYS(sys_listen
, 2)
1848 MIPS_SYS(sys_recv
, 4) /* 4175 */
1849 MIPS_SYS(sys_recvfrom
, 6)
1850 MIPS_SYS(sys_recvmsg
, 3)
1851 MIPS_SYS(sys_send
, 4)
1852 MIPS_SYS(sys_sendmsg
, 3)
1853 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1854 MIPS_SYS(sys_setsockopt
, 5)
1855 MIPS_SYS(sys_shutdown
, 2)
1856 MIPS_SYS(sys_socket
, 3)
1857 MIPS_SYS(sys_socketpair
, 4)
1858 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1859 MIPS_SYS(sys_getresuid
, 3)
1860 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1861 MIPS_SYS(sys_poll
, 3)
1862 MIPS_SYS(sys_nfsservctl
, 3)
1863 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1864 MIPS_SYS(sys_getresgid
, 3)
1865 MIPS_SYS(sys_prctl
, 5)
1866 MIPS_SYS(sys_rt_sigreturn
, 0)
1867 MIPS_SYS(sys_rt_sigaction
, 4)
1868 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1869 MIPS_SYS(sys_rt_sigpending
, 2)
1870 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1871 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1872 MIPS_SYS(sys_rt_sigsuspend
, 0)
1873 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1874 MIPS_SYS(sys_pwrite64
, 6)
1875 MIPS_SYS(sys_chown
, 3)
1876 MIPS_SYS(sys_getcwd
, 2)
1877 MIPS_SYS(sys_capget
, 2)
1878 MIPS_SYS(sys_capset
, 2) /* 4205 */
1879 MIPS_SYS(sys_sigaltstack
, 0)
1880 MIPS_SYS(sys_sendfile
, 4)
1881 MIPS_SYS(sys_ni_syscall
, 0)
1882 MIPS_SYS(sys_ni_syscall
, 0)
1883 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1884 MIPS_SYS(sys_truncate64
, 4)
1885 MIPS_SYS(sys_ftruncate64
, 4)
1886 MIPS_SYS(sys_stat64
, 2)
1887 MIPS_SYS(sys_lstat64
, 2)
1888 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
1889 MIPS_SYS(sys_pivot_root
, 2)
1890 MIPS_SYS(sys_mincore
, 3)
1891 MIPS_SYS(sys_madvise
, 3)
1892 MIPS_SYS(sys_getdents64
, 3)
1893 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
1894 MIPS_SYS(sys_ni_syscall
, 0)
1895 MIPS_SYS(sys_gettid
, 0)
1896 MIPS_SYS(sys_readahead
, 5)
1897 MIPS_SYS(sys_setxattr
, 5)
1898 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
1899 MIPS_SYS(sys_fsetxattr
, 5)
1900 MIPS_SYS(sys_getxattr
, 4)
1901 MIPS_SYS(sys_lgetxattr
, 4)
1902 MIPS_SYS(sys_fgetxattr
, 4)
1903 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
1904 MIPS_SYS(sys_llistxattr
, 3)
1905 MIPS_SYS(sys_flistxattr
, 3)
1906 MIPS_SYS(sys_removexattr
, 2)
1907 MIPS_SYS(sys_lremovexattr
, 2)
1908 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
1909 MIPS_SYS(sys_tkill
, 2)
1910 MIPS_SYS(sys_sendfile64
, 5)
1911 MIPS_SYS(sys_futex
, 2)
1912 MIPS_SYS(sys_sched_setaffinity
, 3)
1913 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
1914 MIPS_SYS(sys_io_setup
, 2)
1915 MIPS_SYS(sys_io_destroy
, 1)
1916 MIPS_SYS(sys_io_getevents
, 5)
1917 MIPS_SYS(sys_io_submit
, 3)
1918 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
1919 MIPS_SYS(sys_exit_group
, 1)
1920 MIPS_SYS(sys_lookup_dcookie
, 3)
1921 MIPS_SYS(sys_epoll_create
, 1)
1922 MIPS_SYS(sys_epoll_ctl
, 4)
1923 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
1924 MIPS_SYS(sys_remap_file_pages
, 5)
1925 MIPS_SYS(sys_set_tid_address
, 1)
1926 MIPS_SYS(sys_restart_syscall
, 0)
1927 MIPS_SYS(sys_fadvise64_64
, 7)
1928 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
1929 MIPS_SYS(sys_fstatfs64
, 2)
1930 MIPS_SYS(sys_timer_create
, 3)
1931 MIPS_SYS(sys_timer_settime
, 4)
1932 MIPS_SYS(sys_timer_gettime
, 2)
1933 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
1934 MIPS_SYS(sys_timer_delete
, 1)
1935 MIPS_SYS(sys_clock_settime
, 2)
1936 MIPS_SYS(sys_clock_gettime
, 2)
1937 MIPS_SYS(sys_clock_getres
, 2)
1938 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
1939 MIPS_SYS(sys_tgkill
, 3)
1940 MIPS_SYS(sys_utimes
, 2)
1941 MIPS_SYS(sys_mbind
, 4)
1942 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
1943 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
1944 MIPS_SYS(sys_mq_open
, 4)
1945 MIPS_SYS(sys_mq_unlink
, 1)
1946 MIPS_SYS(sys_mq_timedsend
, 5)
1947 MIPS_SYS(sys_mq_timedreceive
, 5)
1948 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
1949 MIPS_SYS(sys_mq_getsetattr
, 3)
1950 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
1951 MIPS_SYS(sys_waitid
, 4)
1952 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
1953 MIPS_SYS(sys_add_key
, 5)
1954 MIPS_SYS(sys_request_key
, 4)
1955 MIPS_SYS(sys_keyctl
, 5)
1956 MIPS_SYS(sys_set_thread_area
, 1)
1957 MIPS_SYS(sys_inotify_init
, 0)
1958 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
1959 MIPS_SYS(sys_inotify_rm_watch
, 2)
1960 MIPS_SYS(sys_migrate_pages
, 4)
1961 MIPS_SYS(sys_openat
, 4)
1962 MIPS_SYS(sys_mkdirat
, 3)
1963 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
1964 MIPS_SYS(sys_fchownat
, 5)
1965 MIPS_SYS(sys_futimesat
, 3)
1966 MIPS_SYS(sys_fstatat64
, 4)
1967 MIPS_SYS(sys_unlinkat
, 3)
1968 MIPS_SYS(sys_renameat
, 4) /* 4295 */
1969 MIPS_SYS(sys_linkat
, 5)
1970 MIPS_SYS(sys_symlinkat
, 3)
1971 MIPS_SYS(sys_readlinkat
, 4)
1972 MIPS_SYS(sys_fchmodat
, 3)
1973 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
1974 MIPS_SYS(sys_pselect6
, 6)
1975 MIPS_SYS(sys_ppoll
, 5)
1976 MIPS_SYS(sys_unshare
, 1)
1977 MIPS_SYS(sys_splice
, 4)
1978 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
1979 MIPS_SYS(sys_tee
, 4)
1980 MIPS_SYS(sys_vmsplice
, 4)
1981 MIPS_SYS(sys_move_pages
, 6)
1982 MIPS_SYS(sys_set_robust_list
, 2)
1983 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
1984 MIPS_SYS(sys_kexec_load
, 4)
1985 MIPS_SYS(sys_getcpu
, 3)
1986 MIPS_SYS(sys_epoll_pwait
, 6)
1987 MIPS_SYS(sys_ioprio_set
, 3)
1988 MIPS_SYS(sys_ioprio_get
, 2)
1993 static int do_store_exclusive(CPUMIPSState
*env
)
1996 target_ulong page_addr
;
2004 page_addr
= addr
& TARGET_PAGE_MASK
;
2007 flags
= page_get_flags(page_addr
);
2008 if ((flags
& PAGE_READ
) == 0) {
2011 reg
= env
->llreg
& 0x1f;
2012 d
= (env
->llreg
& 0x20) != 0;
2014 segv
= get_user_s64(val
, addr
);
2016 segv
= get_user_s32(val
, addr
);
2019 if (val
!= env
->llval
) {
2020 env
->active_tc
.gpr
[reg
] = 0;
2023 segv
= put_user_u64(env
->llnewval
, addr
);
2025 segv
= put_user_u32(env
->llnewval
, addr
);
2028 env
->active_tc
.gpr
[reg
] = 1;
2035 env
->active_tc
.PC
+= 4;
2042 void cpu_loop(CPUMIPSState
*env
)
2044 target_siginfo_t info
;
2046 unsigned int syscall_num
;
2049 cpu_exec_start(env
);
2050 trapnr
= cpu_mips_exec(env
);
2054 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
2055 env
->active_tc
.PC
+= 4;
2056 if (syscall_num
>= sizeof(mips_syscall_args
)) {
2061 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
2063 nb_args
= mips_syscall_args
[syscall_num
];
2064 sp_reg
= env
->active_tc
.gpr
[29];
2066 /* these arguments are taken from the stack */
2067 /* FIXME - what to do if get_user() fails? */
2068 case 8: get_user_ual(arg8
, sp_reg
+ 28);
2069 case 7: get_user_ual(arg7
, sp_reg
+ 24);
2070 case 6: get_user_ual(arg6
, sp_reg
+ 20);
2071 case 5: get_user_ual(arg5
, sp_reg
+ 16);
2075 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2076 env
->active_tc
.gpr
[4],
2077 env
->active_tc
.gpr
[5],
2078 env
->active_tc
.gpr
[6],
2079 env
->active_tc
.gpr
[7],
2080 arg5
, arg6
, arg7
, arg8
);
2082 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2083 /* Returning from a successful sigreturn syscall.
2084 Avoid clobbering register state. */
2087 if ((unsigned int)ret
>= (unsigned int)(-1133)) {
2088 env
->active_tc
.gpr
[7] = 1; /* error flag */
2091 env
->active_tc
.gpr
[7] = 0; /* error flag */
2093 env
->active_tc
.gpr
[2] = ret
;
2097 info
.si_signo
= TARGET_SIGSEGV
;
2099 /* XXX: check env->error_code */
2100 info
.si_code
= TARGET_SEGV_MAPERR
;
2101 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2102 queue_signal(env
, info
.si_signo
, &info
);
2106 info
.si_signo
= TARGET_SIGILL
;
2109 queue_signal(env
, info
.si_signo
, &info
);
2111 case EXCP_INTERRUPT
:
2112 /* just indicate that signals should be handled asap */
2118 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2121 info
.si_signo
= sig
;
2123 info
.si_code
= TARGET_TRAP_BRKPT
;
2124 queue_signal(env
, info
.si_signo
, &info
);
2129 if (do_store_exclusive(env
)) {
2130 info
.si_signo
= TARGET_SIGSEGV
;
2132 info
.si_code
= TARGET_SEGV_MAPERR
;
2133 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2134 queue_signal(env
, info
.si_signo
, &info
);
2139 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2141 cpu_dump_state(env
, stderr
, fprintf
, 0);
2144 process_pending_signals(env
);
2150 void cpu_loop (CPUState
*env
)
2153 target_siginfo_t info
;
2156 trapnr
= cpu_sh4_exec (env
);
2161 ret
= do_syscall(env
,
2170 env
->gregs
[0] = ret
;
2172 case EXCP_INTERRUPT
:
2173 /* just indicate that signals should be handled asap */
2179 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2182 info
.si_signo
= sig
;
2184 info
.si_code
= TARGET_TRAP_BRKPT
;
2185 queue_signal(env
, info
.si_signo
, &info
);
2191 info
.si_signo
= SIGSEGV
;
2193 info
.si_code
= TARGET_SEGV_MAPERR
;
2194 info
._sifields
._sigfault
._addr
= env
->tea
;
2195 queue_signal(env
, info
.si_signo
, &info
);
2199 printf ("Unhandled trap: 0x%x\n", trapnr
);
2200 cpu_dump_state(env
, stderr
, fprintf
, 0);
2203 process_pending_signals (env
);
2209 void cpu_loop (CPUState
*env
)
2212 target_siginfo_t info
;
2215 trapnr
= cpu_cris_exec (env
);
2219 info
.si_signo
= SIGSEGV
;
2221 /* XXX: check env->error_code */
2222 info
.si_code
= TARGET_SEGV_MAPERR
;
2223 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2224 queue_signal(env
, info
.si_signo
, &info
);
2227 case EXCP_INTERRUPT
:
2228 /* just indicate that signals should be handled asap */
2231 ret
= do_syscall(env
,
2240 env
->regs
[10] = ret
;
2246 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2249 info
.si_signo
= sig
;
2251 info
.si_code
= TARGET_TRAP_BRKPT
;
2252 queue_signal(env
, info
.si_signo
, &info
);
2257 printf ("Unhandled trap: 0x%x\n", trapnr
);
2258 cpu_dump_state(env
, stderr
, fprintf
, 0);
2261 process_pending_signals (env
);
2266 #ifdef TARGET_MICROBLAZE
2267 void cpu_loop (CPUState
*env
)
2270 target_siginfo_t info
;
2273 trapnr
= cpu_mb_exec (env
);
2277 info
.si_signo
= SIGSEGV
;
2279 /* XXX: check env->error_code */
2280 info
.si_code
= TARGET_SEGV_MAPERR
;
2281 info
._sifields
._sigfault
._addr
= 0;
2282 queue_signal(env
, info
.si_signo
, &info
);
2285 case EXCP_INTERRUPT
:
2286 /* just indicate that signals should be handled asap */
2289 /* Return address is 4 bytes after the call. */
2291 ret
= do_syscall(env
,
2301 env
->sregs
[SR_PC
] = env
->regs
[14];
2304 env
->regs
[17] = env
->sregs
[SR_PC
] + 4;
2305 if (env
->iflags
& D_FLAG
) {
2306 env
->sregs
[SR_ESR
] |= 1 << 12;
2307 env
->sregs
[SR_PC
] -= 4;
2308 /* FIXME: if branch was immed, replay the imm aswell. */
2311 env
->iflags
&= ~(IMM_FLAG
| D_FLAG
);
2313 switch (env
->sregs
[SR_ESR
] & 31) {
2315 info
.si_signo
= SIGFPE
;
2317 if (env
->sregs
[SR_FSR
] & FSR_IO
) {
2318 info
.si_code
= TARGET_FPE_FLTINV
;
2320 if (env
->sregs
[SR_FSR
] & FSR_DZ
) {
2321 info
.si_code
= TARGET_FPE_FLTDIV
;
2323 info
._sifields
._sigfault
._addr
= 0;
2324 queue_signal(env
, info
.si_signo
, &info
);
2327 printf ("Unhandled hw-exception: 0x%x\n",
2328 env
->sregs
[SR_ESR
] & ESR_EC_MASK
);
2329 cpu_dump_state(env
, stderr
, fprintf
, 0);
2338 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2341 info
.si_signo
= sig
;
2343 info
.si_code
= TARGET_TRAP_BRKPT
;
2344 queue_signal(env
, info
.si_signo
, &info
);
2349 printf ("Unhandled trap: 0x%x\n", trapnr
);
2350 cpu_dump_state(env
, stderr
, fprintf
, 0);
2353 process_pending_signals (env
);
2360 void cpu_loop(CPUM68KState
*env
)
2364 target_siginfo_t info
;
2365 TaskState
*ts
= env
->opaque
;
2368 trapnr
= cpu_m68k_exec(env
);
2372 if (ts
->sim_syscalls
) {
2374 nr
= lduw(env
->pc
+ 2);
2376 do_m68k_simcall(env
, nr
);
2382 case EXCP_HALT_INSN
:
2383 /* Semihosing syscall. */
2385 do_m68k_semihosting(env
, env
->dregs
[0]);
2389 case EXCP_UNSUPPORTED
:
2391 info
.si_signo
= SIGILL
;
2393 info
.si_code
= TARGET_ILL_ILLOPN
;
2394 info
._sifields
._sigfault
._addr
= env
->pc
;
2395 queue_signal(env
, info
.si_signo
, &info
);
2399 ts
->sim_syscalls
= 0;
2402 env
->dregs
[0] = do_syscall(env
,
2413 case EXCP_INTERRUPT
:
2414 /* just indicate that signals should be handled asap */
2418 info
.si_signo
= SIGSEGV
;
2420 /* XXX: check env->error_code */
2421 info
.si_code
= TARGET_SEGV_MAPERR
;
2422 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2423 queue_signal(env
, info
.si_signo
, &info
);
2430 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2433 info
.si_signo
= sig
;
2435 info
.si_code
= TARGET_TRAP_BRKPT
;
2436 queue_signal(env
, info
.si_signo
, &info
);
2441 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2443 cpu_dump_state(env
, stderr
, fprintf
, 0);
2446 process_pending_signals(env
);
2449 #endif /* TARGET_M68K */
2452 static void do_store_exclusive(CPUAlphaState
*env
, int reg
, int quad
)
2454 target_ulong addr
, val
, tmp
;
2455 target_siginfo_t info
;
2458 addr
= env
->lock_addr
;
2459 tmp
= env
->lock_st_addr
;
2460 env
->lock_addr
= -1;
2461 env
->lock_st_addr
= 0;
2467 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
2471 if (val
== env
->lock_value
) {
2473 if (quad
? put_user_u64(tmp
, addr
) : put_user_u32(tmp
, addr
)) {
2490 info
.si_signo
= TARGET_SIGSEGV
;
2492 info
.si_code
= TARGET_SEGV_MAPERR
;
2493 info
._sifields
._sigfault
._addr
= addr
;
2494 queue_signal(env
, TARGET_SIGSEGV
, &info
);
2497 void cpu_loop (CPUState
*env
)
2500 target_siginfo_t info
;
2504 trapnr
= cpu_alpha_exec (env
);
2506 /* All of the traps imply a transition through PALcode, which
2507 implies an REI instruction has been executed. Which means
2508 that the intr_flag should be cleared. */
2513 fprintf(stderr
, "Reset requested. Exit\n");
2517 fprintf(stderr
, "Machine check exception. Exit\n");
2520 case EXCP_SMP_INTERRUPT
:
2521 case EXCP_CLK_INTERRUPT
:
2522 case EXCP_DEV_INTERRUPT
:
2523 fprintf(stderr
, "External interrupt. Exit\n");
2527 env
->lock_addr
= -1;
2528 info
.si_signo
= TARGET_SIGSEGV
;
2530 info
.si_code
= (page_get_flags(env
->trap_arg0
) & PAGE_VALID
2531 ? TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
);
2532 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2533 queue_signal(env
, info
.si_signo
, &info
);
2536 env
->lock_addr
= -1;
2537 info
.si_signo
= TARGET_SIGBUS
;
2539 info
.si_code
= TARGET_BUS_ADRALN
;
2540 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2541 queue_signal(env
, info
.si_signo
, &info
);
2545 env
->lock_addr
= -1;
2546 info
.si_signo
= TARGET_SIGILL
;
2548 info
.si_code
= TARGET_ILL_ILLOPC
;
2549 info
._sifields
._sigfault
._addr
= env
->pc
;
2550 queue_signal(env
, info
.si_signo
, &info
);
2553 env
->lock_addr
= -1;
2554 info
.si_signo
= TARGET_SIGFPE
;
2556 info
.si_code
= TARGET_FPE_FLTINV
;
2557 info
._sifields
._sigfault
._addr
= env
->pc
;
2558 queue_signal(env
, info
.si_signo
, &info
);
2561 /* No-op. Linux simply re-enables the FPU. */
2564 env
->lock_addr
= -1;
2565 switch (env
->error_code
) {
2568 info
.si_signo
= TARGET_SIGTRAP
;
2570 info
.si_code
= TARGET_TRAP_BRKPT
;
2571 info
._sifields
._sigfault
._addr
= env
->pc
;
2572 queue_signal(env
, info
.si_signo
, &info
);
2576 info
.si_signo
= TARGET_SIGTRAP
;
2579 info
._sifields
._sigfault
._addr
= env
->pc
;
2580 queue_signal(env
, info
.si_signo
, &info
);
2584 trapnr
= env
->ir
[IR_V0
];
2585 sysret
= do_syscall(env
, trapnr
,
2586 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
2587 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
2588 env
->ir
[IR_A4
], env
->ir
[IR_A5
],
2590 if (trapnr
== TARGET_NR_sigreturn
2591 || trapnr
== TARGET_NR_rt_sigreturn
) {
2594 /* Syscall writes 0 to V0 to bypass error check, similar
2595 to how this is handled internal to Linux kernel. */
2596 if (env
->ir
[IR_V0
] == 0) {
2597 env
->ir
[IR_V0
] = sysret
;
2599 env
->ir
[IR_V0
] = (sysret
< 0 ? -sysret
: sysret
);
2600 env
->ir
[IR_A3
] = (sysret
< 0);
2605 /* ??? We can probably elide the code using page_unprotect
2606 that is checking for self-modifying code. Instead we
2607 could simply call tb_flush here. Until we work out the
2608 changes required to turn off the extra write protection,
2609 this can be a no-op. */
2613 /* Handled in the translator for usermode. */
2617 /* Handled in the translator for usermode. */
2621 info
.si_signo
= TARGET_SIGFPE
;
2622 switch (env
->ir
[IR_A0
]) {
2623 case TARGET_GEN_INTOVF
:
2624 info
.si_code
= TARGET_FPE_INTOVF
;
2626 case TARGET_GEN_INTDIV
:
2627 info
.si_code
= TARGET_FPE_INTDIV
;
2629 case TARGET_GEN_FLTOVF
:
2630 info
.si_code
= TARGET_FPE_FLTOVF
;
2632 case TARGET_GEN_FLTUND
:
2633 info
.si_code
= TARGET_FPE_FLTUND
;
2635 case TARGET_GEN_FLTINV
:
2636 info
.si_code
= TARGET_FPE_FLTINV
;
2638 case TARGET_GEN_FLTINE
:
2639 info
.si_code
= TARGET_FPE_FLTRES
;
2641 case TARGET_GEN_ROPRAND
:
2645 info
.si_signo
= TARGET_SIGTRAP
;
2650 info
._sifields
._sigfault
._addr
= env
->pc
;
2651 queue_signal(env
, info
.si_signo
, &info
);
2658 info
.si_signo
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2659 if (info
.si_signo
) {
2660 env
->lock_addr
= -1;
2662 info
.si_code
= TARGET_TRAP_BRKPT
;
2663 queue_signal(env
, info
.si_signo
, &info
);
2668 do_store_exclusive(env
, env
->error_code
, trapnr
- EXCP_STL_C
);
2671 printf ("Unhandled trap: 0x%x\n", trapnr
);
2672 cpu_dump_state(env
, stderr
, fprintf
, 0);
2675 process_pending_signals (env
);
2678 #endif /* TARGET_ALPHA */
2681 void cpu_loop(CPUS390XState
*env
)
2684 target_siginfo_t info
;
2687 trapnr
= cpu_s390x_exec (env
);
2690 case EXCP_INTERRUPT
:
2691 /* just indicate that signals should be handled asap */
2697 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2699 info
.si_signo
= sig
;
2701 info
.si_code
= TARGET_TRAP_BRKPT
;
2702 queue_signal(env
, info
.si_signo
, &info
);
2708 int n
= env
->int_svc_code
;
2710 /* syscalls > 255 */
2713 env
->psw
.addr
+= env
->int_svc_ilc
;
2714 env
->regs
[2] = do_syscall(env
, n
,
2726 info
.si_signo
= SIGSEGV
;
2728 /* XXX: check env->error_code */
2729 info
.si_code
= TARGET_SEGV_MAPERR
;
2730 info
._sifields
._sigfault
._addr
= env
->__excp_addr
;
2731 queue_signal(env
, info
.si_signo
, &info
);
2736 fprintf(stderr
,"specification exception insn 0x%08x%04x\n", ldl(env
->psw
.addr
), lduw(env
->psw
.addr
+ 4));
2737 info
.si_signo
= SIGILL
;
2739 info
.si_code
= TARGET_ILL_ILLOPC
;
2740 info
._sifields
._sigfault
._addr
= env
->__excp_addr
;
2741 queue_signal(env
, info
.si_signo
, &info
);
2745 printf ("Unhandled trap: 0x%x\n", trapnr
);
2746 cpu_dump_state(env
, stderr
, fprintf
, 0);
2749 process_pending_signals (env
);
2753 #endif /* TARGET_S390X */
2755 static void version(void)
2757 printf("qemu-" TARGET_ARCH
" version " QEMU_VERSION QEMU_PKGVERSION
2758 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
2761 static void usage(void)
2764 printf("usage: qemu-" TARGET_ARCH
" [options] program [arguments...]\n"
2765 "Linux CPU emulator (compiled for %s emulation)\n"
2767 "Standard options:\n"
2768 "-h print this help\n"
2769 "-version display version information and exit\n"
2770 "-g port wait gdb connection to port\n"
2771 "-L path set the elf interpreter prefix (default=%s)\n"
2772 "-s size set the stack size in bytes (default=%ld)\n"
2773 "-cpu model select CPU (-cpu ? for list)\n"
2774 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2775 "-E var=value sets/modifies targets environment variable(s)\n"
2776 "-U var unsets targets environment variable(s)\n"
2777 "-0 argv0 forces target process argv[0] to be argv0\n"
2778 #if defined(CONFIG_USE_GUEST_BASE)
2779 "-B address set guest_base address to address\n"
2780 "-R size reserve size bytes for guest virtual address space\n"
2784 "-d options activate log (logfile=%s)\n"
2785 "-p pagesize set the host page size to 'pagesize'\n"
2786 "-singlestep always run in singlestep mode\n"
2787 "-strace log system calls\n"
2789 "Environment variables:\n"
2790 "QEMU_STRACE Print system calls and arguments similar to the\n"
2791 " 'strace' program. Enable by setting to any value.\n"
2792 "You can use -E and -U options to set/unset environment variables\n"
2793 "for target process. It is possible to provide several variables\n"
2794 "by repeating the option. For example:\n"
2795 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2796 "Note that if you provide several changes to single variable\n"
2797 "last change will stay in effect.\n"
2806 THREAD CPUState
*thread_env
;
2808 void task_settid(TaskState
*ts
)
2810 if (ts
->ts_tid
== 0) {
2811 #ifdef CONFIG_USE_NPTL
2812 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
2814 /* when no threads are used, tid becomes pid */
2815 ts
->ts_tid
= getpid();
2820 void stop_all_tasks(void)
2823 * We trust that when using NPTL, start_exclusive()
2824 * handles thread stopping correctly.
2829 /* Assumes contents are already zeroed. */
2830 void init_task_state(TaskState
*ts
)
2835 ts
->first_free
= ts
->sigqueue_table
;
2836 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
2837 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
2839 ts
->sigqueue_table
[i
].next
= NULL
;
2842 int main(int argc
, char **argv
, char **envp
)
2844 const char *filename
;
2845 const char *cpu_model
;
2846 const char *log_file
= DEBUG_LOGFILE
;
2847 const char *log_mask
= NULL
;
2848 struct target_pt_regs regs1
, *regs
= ®s1
;
2849 struct image_info info1
, *info
= &info1
;
2850 struct linux_binprm bprm
;
2855 int gdbstub_port
= 0;
2856 char **target_environ
, **wrk
;
2859 envlist_t
*envlist
= NULL
;
2860 const char *argv0
= NULL
;
2867 qemu_cache_utils_init(envp
);
2869 if ((envlist
= envlist_create()) == NULL
) {
2870 (void) fprintf(stderr
, "Unable to allocate envlist\n");
2874 /* add current environment into the list */
2875 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
2876 (void) envlist_setenv(envlist
, *wrk
);
2879 /* Read the stack limit from the kernel. If it's "unlimited",
2880 then we can do little else besides use the default. */
2883 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
2884 && lim
.rlim_cur
!= RLIM_INFINITY
2885 && lim
.rlim_cur
== (target_long
)lim
.rlim_cur
) {
2886 guest_stack_size
= lim
.rlim_cur
;
2891 #if defined(cpudef_setup)
2892 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
2904 if (!strcmp(r
, "-")) {
2906 } else if (!strcmp(r
, "d")) {
2907 if (optind
>= argc
) {
2910 log_mask
= argv
[optind
++];
2911 } else if (!strcmp(r
, "D")) {
2912 if (optind
>= argc
) {
2915 log_file
= argv
[optind
++];
2916 } else if (!strcmp(r
, "E")) {
2918 if (envlist_setenv(envlist
, r
) != 0)
2920 } else if (!strcmp(r
, "ignore-environment")) {
2921 envlist_free(envlist
);
2922 if ((envlist
= envlist_create()) == NULL
) {
2923 (void) fprintf(stderr
, "Unable to allocate envlist\n");
2926 } else if (!strcmp(r
, "U")) {
2928 if (envlist_unsetenv(envlist
, r
) != 0)
2930 } else if (!strcmp(r
, "0")) {
2933 } else if (!strcmp(r
, "s")) {
2937 guest_stack_size
= strtoul(r
, (char **)&r
, 0);
2938 if (guest_stack_size
== 0)
2941 guest_stack_size
*= 1024 * 1024;
2942 else if (*r
== 'k' || *r
== 'K')
2943 guest_stack_size
*= 1024;
2944 } else if (!strcmp(r
, "L")) {
2945 interp_prefix
= argv
[optind
++];
2946 } else if (!strcmp(r
, "p")) {
2949 qemu_host_page_size
= atoi(argv
[optind
++]);
2950 if (qemu_host_page_size
== 0 ||
2951 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
2952 fprintf(stderr
, "page size must be a power of two\n");
2955 } else if (!strcmp(r
, "g")) {
2958 gdbstub_port
= atoi(argv
[optind
++]);
2959 } else if (!strcmp(r
, "r")) {
2960 qemu_uname_release
= argv
[optind
++];
2961 } else if (!strcmp(r
, "cpu")) {
2962 cpu_model
= argv
[optind
++];
2963 if (cpu_model
== NULL
|| strcmp(cpu_model
, "?") == 0) {
2964 /* XXX: implement xxx_cpu_list for targets that still miss it */
2965 #if defined(cpu_list_id)
2966 cpu_list_id(stdout
, &fprintf
, "");
2967 #elif defined(cpu_list)
2968 cpu_list(stdout
, &fprintf
); /* deprecated */
2972 #if defined(CONFIG_USE_GUEST_BASE)
2973 } else if (!strcmp(r
, "B")) {
2974 guest_base
= strtol(argv
[optind
++], NULL
, 0);
2975 have_guest_base
= 1;
2976 } else if (!strcmp(r
, "R")) {
2979 reserved_va
= strtoul(argv
[optind
++], &p
, 0);
2993 unsigned long unshifted
= reserved_va
;
2995 reserved_va
<<= shift
;
2996 if (((reserved_va
>> shift
) != unshifted
)
2997 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
2998 || (reserved_va
> (1ul << TARGET_VIRT_ADDR_SPACE_BITS
))
3001 fprintf(stderr
, "Reserved virtual address too big\n");
3006 fprintf(stderr
, "Unrecognised -R size suffix '%s'\n", p
);
3010 } else if (!strcmp(r
, "drop-ld-preload")) {
3011 (void) envlist_unsetenv(envlist
, "LD_PRELOAD");
3012 } else if (!strcmp(r
, "singlestep")) {
3014 } else if (!strcmp(r
, "strace")) {
3016 } else if (!strcmp(r
, "version")) {
3025 filename
= argv
[optind
];
3026 exec_path
= argv
[optind
];
3029 cpu_set_log_filename(log_file
);
3032 const CPULogItem
*item
;
3034 mask
= cpu_str_to_log_mask(r
);
3036 printf("Log items (comma separated):\n");
3037 for (item
= cpu_log_items
; item
->mask
!= 0; item
++) {
3038 printf("%-10s %s\n", item
->name
, item
->help
);
3046 memset(regs
, 0, sizeof(struct target_pt_regs
));
3048 /* Zero out image_info */
3049 memset(info
, 0, sizeof(struct image_info
));
3051 memset(&bprm
, 0, sizeof (bprm
));
3053 /* Scan interp_prefix dir for replacement files. */
3054 init_paths(interp_prefix
);
3056 if (cpu_model
== NULL
) {
3057 #if defined(TARGET_I386)
3058 #ifdef TARGET_X86_64
3059 cpu_model
= "qemu64";
3061 cpu_model
= "qemu32";
3063 #elif defined(TARGET_ARM)
3065 #elif defined(TARGET_UNICORE32)
3067 #elif defined(TARGET_M68K)
3069 #elif defined(TARGET_SPARC)
3070 #ifdef TARGET_SPARC64
3071 cpu_model
= "TI UltraSparc II";
3073 cpu_model
= "Fujitsu MB86904";
3075 #elif defined(TARGET_MIPS)
3076 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3081 #elif defined(TARGET_PPC)
3083 cpu_model
= "970fx";
3091 cpu_exec_init_all(0);
3092 /* NOTE: we need to init the CPU at this stage to get
3093 qemu_host_page_size */
3094 env
= cpu_init(cpu_model
);
3096 fprintf(stderr
, "Unable to find CPU definition\n");
3099 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
3105 if (getenv("QEMU_STRACE")) {
3109 target_environ
= envlist_to_environ(envlist
, NULL
);
3110 envlist_free(envlist
);
3112 #if defined(CONFIG_USE_GUEST_BASE)
3114 * Now that page sizes are configured in cpu_init() we can do
3115 * proper page alignment for guest_base.
3117 guest_base
= HOST_PAGE_ALIGN(guest_base
);
3123 flags
= MAP_ANONYMOUS
| MAP_PRIVATE
| MAP_NORESERVE
;
3124 if (have_guest_base
) {
3127 p
= mmap((void *)guest_base
, reserved_va
, PROT_NONE
, flags
, -1, 0);
3128 if (p
== MAP_FAILED
) {
3129 fprintf(stderr
, "Unable to reserve guest address space\n");
3132 guest_base
= (unsigned long)p
;
3133 /* Make sure the address is properly aligned. */
3134 if (guest_base
& ~qemu_host_page_mask
) {
3135 munmap(p
, reserved_va
);
3136 p
= mmap((void *)guest_base
, reserved_va
+ qemu_host_page_size
,
3137 PROT_NONE
, flags
, -1, 0);
3138 if (p
== MAP_FAILED
) {
3139 fprintf(stderr
, "Unable to reserve guest address space\n");
3142 guest_base
= HOST_PAGE_ALIGN((unsigned long)p
);
3144 qemu_log("Reserved 0x%lx bytes of guest address space\n", reserved_va
);
3146 #endif /* CONFIG_USE_GUEST_BASE */
3149 * Read in mmap_min_addr kernel parameter. This value is used
3150 * When loading the ELF image to determine whether guest_base
3151 * is needed. It is also used in mmap_find_vma.
3156 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
3158 if (fscanf(fp
, "%lu", &tmp
) == 1) {
3159 mmap_min_addr
= tmp
;
3160 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr
);
3167 * Prepare copy of argv vector for target.
3169 target_argc
= argc
- optind
;
3170 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
3171 if (target_argv
== NULL
) {
3172 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
3177 * If argv0 is specified (using '-0' switch) we replace
3178 * argv[0] pointer with the given one.
3181 if (argv0
!= NULL
) {
3182 target_argv
[i
++] = strdup(argv0
);
3184 for (; i
< target_argc
; i
++) {
3185 target_argv
[i
] = strdup(argv
[optind
+ i
]);
3187 target_argv
[target_argc
] = NULL
;
3189 ts
= qemu_mallocz (sizeof(TaskState
));
3190 init_task_state(ts
);
3191 /* build Task State */
3197 ret
= loader_exec(filename
, target_argv
, target_environ
, regs
,
3200 printf("Error %d while loading %s\n", ret
, filename
);
3204 for (i
= 0; i
< target_argc
; i
++) {
3205 free(target_argv
[i
]);
3209 for (wrk
= target_environ
; *wrk
; wrk
++) {
3213 free(target_environ
);
3215 if (qemu_log_enabled()) {
3216 #if defined(CONFIG_USE_GUEST_BASE)
3217 qemu_log("guest_base 0x%lx\n", guest_base
);
3221 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
3222 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
3223 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n",
3225 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n",
3227 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
3228 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n",
3230 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
3231 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
3234 target_set_brk(info
->brk
);
3238 #if defined(CONFIG_USE_GUEST_BASE)
3239 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3240 generating the prologue until now so that the prologue can take
3241 the real value of GUEST_BASE into account. */
3242 tcg_prologue_init(&tcg_ctx
);
3245 #if defined(TARGET_I386)
3246 cpu_x86_set_cpl(env
, 3);
3248 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
3249 env
->hflags
|= HF_PE_MASK
;
3250 if (env
->cpuid_features
& CPUID_SSE
) {
3251 env
->cr
[4] |= CR4_OSFXSR_MASK
;
3252 env
->hflags
|= HF_OSFXSR_MASK
;
3254 #ifndef TARGET_ABI32
3255 /* enable 64 bit mode if possible */
3256 if (!(env
->cpuid_ext2_features
& CPUID_EXT2_LM
)) {
3257 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
3260 env
->cr
[4] |= CR4_PAE_MASK
;
3261 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
3262 env
->hflags
|= HF_LMA_MASK
;
3265 /* flags setup : we activate the IRQs by default as in user mode */
3266 env
->eflags
|= IF_MASK
;
3268 /* linux register setup */
3269 #ifndef TARGET_ABI32
3270 env
->regs
[R_EAX
] = regs
->rax
;
3271 env
->regs
[R_EBX
] = regs
->rbx
;
3272 env
->regs
[R_ECX
] = regs
->rcx
;
3273 env
->regs
[R_EDX
] = regs
->rdx
;
3274 env
->regs
[R_ESI
] = regs
->rsi
;
3275 env
->regs
[R_EDI
] = regs
->rdi
;
3276 env
->regs
[R_EBP
] = regs
->rbp
;
3277 env
->regs
[R_ESP
] = regs
->rsp
;
3278 env
->eip
= regs
->rip
;
3280 env
->regs
[R_EAX
] = regs
->eax
;
3281 env
->regs
[R_EBX
] = regs
->ebx
;
3282 env
->regs
[R_ECX
] = regs
->ecx
;
3283 env
->regs
[R_EDX
] = regs
->edx
;
3284 env
->regs
[R_ESI
] = regs
->esi
;
3285 env
->regs
[R_EDI
] = regs
->edi
;
3286 env
->regs
[R_EBP
] = regs
->ebp
;
3287 env
->regs
[R_ESP
] = regs
->esp
;
3288 env
->eip
= regs
->eip
;
3291 /* linux interrupt setup */
3292 #ifndef TARGET_ABI32
3293 env
->idt
.limit
= 511;
3295 env
->idt
.limit
= 255;
3297 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
3298 PROT_READ
|PROT_WRITE
,
3299 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3300 idt_table
= g2h(env
->idt
.base
);
3323 /* linux segment setup */
3325 uint64_t *gdt_table
;
3326 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
3327 PROT_READ
|PROT_WRITE
,
3328 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3329 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
3330 gdt_table
= g2h(env
->gdt
.base
);
3332 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3333 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3334 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3336 /* 64 bit code segment */
3337 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3338 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3340 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3342 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
3343 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3344 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
3346 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
3347 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
3349 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
3350 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
3351 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
3352 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
3353 /* This hack makes Wine work... */
3354 env
->segs
[R_FS
].selector
= 0;
3356 cpu_x86_load_seg(env
, R_DS
, 0);
3357 cpu_x86_load_seg(env
, R_ES
, 0);
3358 cpu_x86_load_seg(env
, R_FS
, 0);
3359 cpu_x86_load_seg(env
, R_GS
, 0);
3361 #elif defined(TARGET_ARM)
3364 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
3365 for(i
= 0; i
< 16; i
++) {
3366 env
->regs
[i
] = regs
->uregs
[i
];
3369 #elif defined(TARGET_UNICORE32)
3372 cpu_asr_write(env
, regs
->uregs
[32], 0xffffffff);
3373 for (i
= 0; i
< 32; i
++) {
3374 env
->regs
[i
] = regs
->uregs
[i
];
3377 #elif defined(TARGET_SPARC)
3381 env
->npc
= regs
->npc
;
3383 for(i
= 0; i
< 8; i
++)
3384 env
->gregs
[i
] = regs
->u_regs
[i
];
3385 for(i
= 0; i
< 8; i
++)
3386 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
3388 #elif defined(TARGET_PPC)
3392 #if defined(TARGET_PPC64)
3393 #if defined(TARGET_ABI32)
3394 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
3396 env
->msr
|= (target_ulong
)1 << MSR_SF
;
3399 env
->nip
= regs
->nip
;
3400 for(i
= 0; i
< 32; i
++) {
3401 env
->gpr
[i
] = regs
->gpr
[i
];
3404 #elif defined(TARGET_M68K)
3407 env
->dregs
[0] = regs
->d0
;
3408 env
->dregs
[1] = regs
->d1
;
3409 env
->dregs
[2] = regs
->d2
;
3410 env
->dregs
[3] = regs
->d3
;
3411 env
->dregs
[4] = regs
->d4
;
3412 env
->dregs
[5] = regs
->d5
;
3413 env
->dregs
[6] = regs
->d6
;
3414 env
->dregs
[7] = regs
->d7
;
3415 env
->aregs
[0] = regs
->a0
;
3416 env
->aregs
[1] = regs
->a1
;
3417 env
->aregs
[2] = regs
->a2
;
3418 env
->aregs
[3] = regs
->a3
;
3419 env
->aregs
[4] = regs
->a4
;
3420 env
->aregs
[5] = regs
->a5
;
3421 env
->aregs
[6] = regs
->a6
;
3422 env
->aregs
[7] = regs
->usp
;
3424 ts
->sim_syscalls
= 1;
3426 #elif defined(TARGET_MICROBLAZE)
3428 env
->regs
[0] = regs
->r0
;
3429 env
->regs
[1] = regs
->r1
;
3430 env
->regs
[2] = regs
->r2
;
3431 env
->regs
[3] = regs
->r3
;
3432 env
->regs
[4] = regs
->r4
;
3433 env
->regs
[5] = regs
->r5
;
3434 env
->regs
[6] = regs
->r6
;
3435 env
->regs
[7] = regs
->r7
;
3436 env
->regs
[8] = regs
->r8
;
3437 env
->regs
[9] = regs
->r9
;
3438 env
->regs
[10] = regs
->r10
;
3439 env
->regs
[11] = regs
->r11
;
3440 env
->regs
[12] = regs
->r12
;
3441 env
->regs
[13] = regs
->r13
;
3442 env
->regs
[14] = regs
->r14
;
3443 env
->regs
[15] = regs
->r15
;
3444 env
->regs
[16] = regs
->r16
;
3445 env
->regs
[17] = regs
->r17
;
3446 env
->regs
[18] = regs
->r18
;
3447 env
->regs
[19] = regs
->r19
;
3448 env
->regs
[20] = regs
->r20
;
3449 env
->regs
[21] = regs
->r21
;
3450 env
->regs
[22] = regs
->r22
;
3451 env
->regs
[23] = regs
->r23
;
3452 env
->regs
[24] = regs
->r24
;
3453 env
->regs
[25] = regs
->r25
;
3454 env
->regs
[26] = regs
->r26
;
3455 env
->regs
[27] = regs
->r27
;
3456 env
->regs
[28] = regs
->r28
;
3457 env
->regs
[29] = regs
->r29
;
3458 env
->regs
[30] = regs
->r30
;
3459 env
->regs
[31] = regs
->r31
;
3460 env
->sregs
[SR_PC
] = regs
->pc
;
3462 #elif defined(TARGET_MIPS)
3466 for(i
= 0; i
< 32; i
++) {
3467 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
3469 env
->active_tc
.PC
= regs
->cp0_epc
& ~(target_ulong
)1;
3470 if (regs
->cp0_epc
& 1) {
3471 env
->hflags
|= MIPS_HFLAG_M16
;
3474 #elif defined(TARGET_SH4)
3478 for(i
= 0; i
< 16; i
++) {
3479 env
->gregs
[i
] = regs
->regs
[i
];
3483 #elif defined(TARGET_ALPHA)
3487 for(i
= 0; i
< 28; i
++) {
3488 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
3490 env
->ir
[IR_SP
] = regs
->usp
;
3493 #elif defined(TARGET_CRIS)
3495 env
->regs
[0] = regs
->r0
;
3496 env
->regs
[1] = regs
->r1
;
3497 env
->regs
[2] = regs
->r2
;
3498 env
->regs
[3] = regs
->r3
;
3499 env
->regs
[4] = regs
->r4
;
3500 env
->regs
[5] = regs
->r5
;
3501 env
->regs
[6] = regs
->r6
;
3502 env
->regs
[7] = regs
->r7
;
3503 env
->regs
[8] = regs
->r8
;
3504 env
->regs
[9] = regs
->r9
;
3505 env
->regs
[10] = regs
->r10
;
3506 env
->regs
[11] = regs
->r11
;
3507 env
->regs
[12] = regs
->r12
;
3508 env
->regs
[13] = regs
->r13
;
3509 env
->regs
[14] = info
->start_stack
;
3510 env
->regs
[15] = regs
->acr
;
3511 env
->pc
= regs
->erp
;
3513 #elif defined(TARGET_S390X)
3516 for (i
= 0; i
< 16; i
++) {
3517 env
->regs
[i
] = regs
->gprs
[i
];
3519 env
->psw
.mask
= regs
->psw
.mask
;
3520 env
->psw
.addr
= regs
->psw
.addr
;
3523 #error unsupported target CPU
3526 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
3527 ts
->stack_base
= info
->start_stack
;
3528 ts
->heap_base
= info
->brk
;
3529 /* This will be filled in on the first SYS_HEAPINFO call. */
3534 gdbserver_start (gdbstub_port
);
3535 gdb_handlesig(env
, 0);