4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
30 #include "qemu-common.h"
31 #include "qemu/cache-utils.h"
34 #include "qemu/timer.h"
35 #include "qemu/envlist.h"
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
47 const char *cpu_model
;
48 unsigned long mmap_min_addr
;
49 #if defined(CONFIG_USE_GUEST_BASE)
50 unsigned long guest_base
;
52 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
54 * When running 32-on-64 we should make sure we can fit all of the possible
55 * guest address space into a contiguous chunk of virtual host memory.
57 * This way we will never overlap with our own libraries or binaries or stack
58 * or anything else that QEMU maps.
61 /* MIPS only supports 31 bits of virtual address space for user space */
62 unsigned long reserved_va
= 0x77000000;
64 unsigned long reserved_va
= 0xf7000000;
67 unsigned long reserved_va
;
71 static void usage(void);
73 static const char *interp_prefix
= CONFIG_QEMU_INTERP_PREFIX
;
74 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
76 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
77 we allocate a bigger stack. Need a better solution, for example
78 by remapping the process stack directly at the right place */
79 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
81 void gemu_log(const char *fmt
, ...)
86 vfprintf(stderr
, fmt
, ap
);
90 #if defined(TARGET_I386)
91 int cpu_get_pic_interrupt(CPUX86State
*env
)
97 #if defined(CONFIG_USE_NPTL)
98 /***********************************************************/
99 /* Helper routines for implementing atomic operations. */
101 /* To implement exclusive operations we force all cpus to syncronise.
102 We don't require a full sync, only that no cpus are executing guest code.
103 The alternative is to map target atomic ops onto host equivalents,
104 which requires quite a lot of per host/target work. */
105 static pthread_mutex_t cpu_list_mutex
= PTHREAD_MUTEX_INITIALIZER
;
106 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
107 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
108 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
109 static int pending_cpus
;
111 /* Make sure everything is in a consistent state for calling fork(). */
112 void fork_start(void)
114 pthread_mutex_lock(&tb_lock
);
115 pthread_mutex_lock(&exclusive_lock
);
119 void fork_end(int child
)
121 mmap_fork_end(child
);
123 /* Child processes created by fork() only have a single thread.
124 Discard information about the parent threads. */
125 first_cpu
= thread_env
;
126 thread_env
->next_cpu
= NULL
;
128 pthread_mutex_init(&exclusive_lock
, NULL
);
129 pthread_mutex_init(&cpu_list_mutex
, NULL
);
130 pthread_cond_init(&exclusive_cond
, NULL
);
131 pthread_cond_init(&exclusive_resume
, NULL
);
132 pthread_mutex_init(&tb_lock
, NULL
);
133 gdbserver_fork(thread_env
);
135 pthread_mutex_unlock(&exclusive_lock
);
136 pthread_mutex_unlock(&tb_lock
);
140 /* Wait for pending exclusive operations to complete. The exclusive lock
142 static inline void exclusive_idle(void)
144 while (pending_cpus
) {
145 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
149 /* Start an exclusive operation.
150 Must only be called from outside cpu_arm_exec. */
151 static inline void start_exclusive(void)
154 pthread_mutex_lock(&exclusive_lock
);
158 /* Make all other cpus stop executing. */
159 for (other
= first_cpu
; other
; other
= other
->next_cpu
) {
160 if (other
->running
) {
165 if (pending_cpus
> 1) {
166 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
170 /* Finish an exclusive operation. */
171 static inline void end_exclusive(void)
174 pthread_cond_broadcast(&exclusive_resume
);
175 pthread_mutex_unlock(&exclusive_lock
);
178 /* Wait for exclusive ops to finish, and begin cpu execution. */
179 static inline void cpu_exec_start(CPUArchState
*env
)
181 pthread_mutex_lock(&exclusive_lock
);
184 pthread_mutex_unlock(&exclusive_lock
);
187 /* Mark cpu as not executing, and release pending exclusive ops. */
188 static inline void cpu_exec_end(CPUArchState
*env
)
190 pthread_mutex_lock(&exclusive_lock
);
192 if (pending_cpus
> 1) {
194 if (pending_cpus
== 1) {
195 pthread_cond_signal(&exclusive_cond
);
199 pthread_mutex_unlock(&exclusive_lock
);
202 void cpu_list_lock(void)
204 pthread_mutex_lock(&cpu_list_mutex
);
207 void cpu_list_unlock(void)
209 pthread_mutex_unlock(&cpu_list_mutex
);
211 #else /* if !CONFIG_USE_NPTL */
212 /* These are no-ops because we are not threadsafe. */
213 static inline void cpu_exec_start(CPUArchState
*env
)
217 static inline void cpu_exec_end(CPUArchState
*env
)
221 static inline void start_exclusive(void)
225 static inline void end_exclusive(void)
229 void fork_start(void)
233 void fork_end(int child
)
236 gdbserver_fork(thread_env
);
240 void cpu_list_lock(void)
244 void cpu_list_unlock(void)
251 /***********************************************************/
252 /* CPUX86 core interface */
254 void cpu_smm_update(CPUX86State
*env
)
258 uint64_t cpu_get_tsc(CPUX86State
*env
)
260 return cpu_get_real_ticks();
263 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
268 e1
= (addr
<< 16) | (limit
& 0xffff);
269 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
276 static uint64_t *idt_table
;
278 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
279 uint64_t addr
, unsigned int sel
)
282 e1
= (addr
& 0xffff) | (sel
<< 16);
283 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
287 p
[2] = tswap32(addr
>> 32);
290 /* only dpl matters as we do only user space emulation */
291 static void set_idt(int n
, unsigned int dpl
)
293 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
296 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
297 uint32_t addr
, unsigned int sel
)
300 e1
= (addr
& 0xffff) | (sel
<< 16);
301 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
307 /* only dpl matters as we do only user space emulation */
308 static void set_idt(int n
, unsigned int dpl
)
310 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
314 void cpu_loop(CPUX86State
*env
)
318 target_siginfo_t info
;
321 trapnr
= cpu_x86_exec(env
);
324 /* linux syscall from int $0x80 */
325 env
->regs
[R_EAX
] = do_syscall(env
,
337 /* linux syscall from syscall instruction */
338 env
->regs
[R_EAX
] = do_syscall(env
,
347 env
->eip
= env
->exception_next_eip
;
352 info
.si_signo
= SIGBUS
;
354 info
.si_code
= TARGET_SI_KERNEL
;
355 info
._sifields
._sigfault
._addr
= 0;
356 queue_signal(env
, info
.si_signo
, &info
);
359 /* XXX: potential problem if ABI32 */
360 #ifndef TARGET_X86_64
361 if (env
->eflags
& VM_MASK
) {
362 handle_vm86_fault(env
);
366 info
.si_signo
= SIGSEGV
;
368 info
.si_code
= TARGET_SI_KERNEL
;
369 info
._sifields
._sigfault
._addr
= 0;
370 queue_signal(env
, info
.si_signo
, &info
);
374 info
.si_signo
= SIGSEGV
;
376 if (!(env
->error_code
& 1))
377 info
.si_code
= TARGET_SEGV_MAPERR
;
379 info
.si_code
= TARGET_SEGV_ACCERR
;
380 info
._sifields
._sigfault
._addr
= env
->cr
[2];
381 queue_signal(env
, info
.si_signo
, &info
);
384 #ifndef TARGET_X86_64
385 if (env
->eflags
& VM_MASK
) {
386 handle_vm86_trap(env
, trapnr
);
390 /* division by zero */
391 info
.si_signo
= SIGFPE
;
393 info
.si_code
= TARGET_FPE_INTDIV
;
394 info
._sifields
._sigfault
._addr
= env
->eip
;
395 queue_signal(env
, info
.si_signo
, &info
);
400 #ifndef TARGET_X86_64
401 if (env
->eflags
& VM_MASK
) {
402 handle_vm86_trap(env
, trapnr
);
406 info
.si_signo
= SIGTRAP
;
408 if (trapnr
== EXCP01_DB
) {
409 info
.si_code
= TARGET_TRAP_BRKPT
;
410 info
._sifields
._sigfault
._addr
= env
->eip
;
412 info
.si_code
= TARGET_SI_KERNEL
;
413 info
._sifields
._sigfault
._addr
= 0;
415 queue_signal(env
, info
.si_signo
, &info
);
420 #ifndef TARGET_X86_64
421 if (env
->eflags
& VM_MASK
) {
422 handle_vm86_trap(env
, trapnr
);
426 info
.si_signo
= SIGSEGV
;
428 info
.si_code
= TARGET_SI_KERNEL
;
429 info
._sifields
._sigfault
._addr
= 0;
430 queue_signal(env
, info
.si_signo
, &info
);
434 info
.si_signo
= SIGILL
;
436 info
.si_code
= TARGET_ILL_ILLOPN
;
437 info
._sifields
._sigfault
._addr
= env
->eip
;
438 queue_signal(env
, info
.si_signo
, &info
);
441 /* just indicate that signals should be handled asap */
447 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
452 info
.si_code
= TARGET_TRAP_BRKPT
;
453 queue_signal(env
, info
.si_signo
, &info
);
458 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
459 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
463 process_pending_signals(env
);
470 #define get_user_code_u32(x, gaddr, doswap) \
471 ({ abi_long __r = get_user_u32((x), (gaddr)); \
472 if (!__r && (doswap)) { \
478 #define get_user_code_u16(x, gaddr, doswap) \
479 ({ abi_long __r = get_user_u16((x), (gaddr)); \
480 if (!__r && (doswap)) { \
487 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
489 * r0 = pointer to oldval
490 * r1 = pointer to newval
491 * r2 = pointer to target value
494 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
495 * C set if *ptr was changed, clear if no exchange happened
497 * Note segv's in kernel helpers are a bit tricky, we can set the
498 * data address sensibly but the PC address is just the entry point.
500 static void arm_kernel_cmpxchg64_helper(CPUARMState
*env
)
502 uint64_t oldval
, newval
, val
;
504 target_siginfo_t info
;
506 /* Based on the 32 bit code in do_kernel_trap */
508 /* XXX: This only works between threads, not between processes.
509 It's probably possible to implement this with native host
510 operations. However things like ldrex/strex are much harder so
511 there's not much point trying. */
513 cpsr
= cpsr_read(env
);
516 if (get_user_u64(oldval
, env
->regs
[0])) {
517 env
->cp15
.c6_data
= env
->regs
[0];
521 if (get_user_u64(newval
, env
->regs
[1])) {
522 env
->cp15
.c6_data
= env
->regs
[1];
526 if (get_user_u64(val
, addr
)) {
527 env
->cp15
.c6_data
= addr
;
534 if (put_user_u64(val
, addr
)) {
535 env
->cp15
.c6_data
= addr
;
545 cpsr_write(env
, cpsr
, CPSR_C
);
551 /* We get the PC of the entry address - which is as good as anything,
552 on a real kernel what you get depends on which mode it uses. */
553 info
.si_signo
= SIGSEGV
;
555 /* XXX: check env->error_code */
556 info
.si_code
= TARGET_SEGV_MAPERR
;
557 info
._sifields
._sigfault
._addr
= env
->cp15
.c6_data
;
558 queue_signal(env
, info
.si_signo
, &info
);
563 /* Handle a jump to the kernel code page. */
565 do_kernel_trap(CPUARMState
*env
)
571 switch (env
->regs
[15]) {
572 case 0xffff0fa0: /* __kernel_memory_barrier */
573 /* ??? No-op. Will need to do better for SMP. */
575 case 0xffff0fc0: /* __kernel_cmpxchg */
576 /* XXX: This only works between threads, not between processes.
577 It's probably possible to implement this with native host
578 operations. However things like ldrex/strex are much harder so
579 there's not much point trying. */
581 cpsr
= cpsr_read(env
);
583 /* FIXME: This should SEGV if the access fails. */
584 if (get_user_u32(val
, addr
))
586 if (val
== env
->regs
[0]) {
588 /* FIXME: Check for segfaults. */
589 put_user_u32(val
, addr
);
596 cpsr_write(env
, cpsr
, CPSR_C
);
599 case 0xffff0fe0: /* __kernel_get_tls */
600 env
->regs
[0] = env
->cp15
.c13_tls2
;
602 case 0xffff0f60: /* __kernel_cmpxchg64 */
603 arm_kernel_cmpxchg64_helper(env
);
609 /* Jump back to the caller. */
610 addr
= env
->regs
[14];
615 env
->regs
[15] = addr
;
620 static int do_strex(CPUARMState
*env
)
628 addr
= env
->exclusive_addr
;
629 if (addr
!= env
->exclusive_test
) {
632 size
= env
->exclusive_info
& 0xf;
635 segv
= get_user_u8(val
, addr
);
638 segv
= get_user_u16(val
, addr
);
642 segv
= get_user_u32(val
, addr
);
648 env
->cp15
.c6_data
= addr
;
651 if (val
!= env
->exclusive_val
) {
655 segv
= get_user_u32(val
, addr
+ 4);
657 env
->cp15
.c6_data
= addr
+ 4;
660 if (val
!= env
->exclusive_high
) {
664 val
= env
->regs
[(env
->exclusive_info
>> 8) & 0xf];
667 segv
= put_user_u8(val
, addr
);
670 segv
= put_user_u16(val
, addr
);
674 segv
= put_user_u32(val
, addr
);
678 env
->cp15
.c6_data
= addr
;
682 val
= env
->regs
[(env
->exclusive_info
>> 12) & 0xf];
683 segv
= put_user_u32(val
, addr
+ 4);
685 env
->cp15
.c6_data
= addr
+ 4;
692 env
->regs
[(env
->exclusive_info
>> 4) & 0xf] = rc
;
698 void cpu_loop(CPUARMState
*env
)
701 unsigned int n
, insn
;
702 target_siginfo_t info
;
707 trapnr
= cpu_arm_exec(env
);
712 TaskState
*ts
= env
->opaque
;
716 /* we handle the FPU emulation here, as Linux */
717 /* we get the opcode */
718 /* FIXME - what to do if get_user() fails? */
719 get_user_code_u32(opcode
, env
->regs
[15], env
->bswap_code
);
721 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
722 if (rc
== 0) { /* illegal instruction */
723 info
.si_signo
= SIGILL
;
725 info
.si_code
= TARGET_ILL_ILLOPN
;
726 info
._sifields
._sigfault
._addr
= env
->regs
[15];
727 queue_signal(env
, info
.si_signo
, &info
);
728 } else if (rc
< 0) { /* FP exception */
731 /* translate softfloat flags to FPSR flags */
732 if (-rc
& float_flag_invalid
)
734 if (-rc
& float_flag_divbyzero
)
736 if (-rc
& float_flag_overflow
)
738 if (-rc
& float_flag_underflow
)
740 if (-rc
& float_flag_inexact
)
743 FPSR fpsr
= ts
->fpa
.fpsr
;
744 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
746 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
747 info
.si_signo
= SIGFPE
;
750 /* ordered by priority, least first */
751 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
752 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
753 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
754 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
755 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
757 info
._sifields
._sigfault
._addr
= env
->regs
[15];
758 queue_signal(env
, info
.si_signo
, &info
);
763 /* accumulate unenabled exceptions */
764 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
766 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
768 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
770 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
772 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
775 } else { /* everything OK */
786 if (trapnr
== EXCP_BKPT
) {
788 /* FIXME - what to do if get_user() fails? */
789 get_user_code_u16(insn
, env
->regs
[15], env
->bswap_code
);
793 /* FIXME - what to do if get_user() fails? */
794 get_user_code_u32(insn
, env
->regs
[15], env
->bswap_code
);
795 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
800 /* FIXME - what to do if get_user() fails? */
801 get_user_code_u16(insn
, env
->regs
[15] - 2,
805 /* FIXME - what to do if get_user() fails? */
806 get_user_code_u32(insn
, env
->regs
[15] - 4,
812 if (n
== ARM_NR_cacheflush
) {
814 } else if (n
== ARM_NR_semihosting
815 || n
== ARM_NR_thumb_semihosting
) {
816 env
->regs
[0] = do_arm_semihosting (env
);
817 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
|| env
->thumb
) {
819 if (env
->thumb
|| n
== 0) {
822 n
-= ARM_SYSCALL_BASE
;
825 if ( n
> ARM_NR_BASE
) {
827 case ARM_NR_cacheflush
:
831 cpu_set_tls(env
, env
->regs
[0]);
835 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
837 env
->regs
[0] = -TARGET_ENOSYS
;
841 env
->regs
[0] = do_syscall(env
,
857 /* just indicate that signals should be handled asap */
859 case EXCP_PREFETCH_ABORT
:
860 addr
= env
->cp15
.c6_insn
;
862 case EXCP_DATA_ABORT
:
863 addr
= env
->cp15
.c6_data
;
866 info
.si_signo
= SIGSEGV
;
868 /* XXX: check env->error_code */
869 info
.si_code
= TARGET_SEGV_MAPERR
;
870 info
._sifields
._sigfault
._addr
= addr
;
871 queue_signal(env
, info
.si_signo
, &info
);
878 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
883 info
.si_code
= TARGET_TRAP_BRKPT
;
884 queue_signal(env
, info
.si_signo
, &info
);
888 case EXCP_KERNEL_TRAP
:
889 if (do_kernel_trap(env
))
894 addr
= env
->cp15
.c6_data
;
900 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
902 cpu_dump_state(env
, stderr
, fprintf
, 0);
905 process_pending_signals(env
);
911 #ifdef TARGET_UNICORE32
913 void cpu_loop(CPUUniCore32State
*env
)
916 unsigned int n
, insn
;
917 target_siginfo_t info
;
921 trapnr
= uc32_cpu_exec(env
);
927 get_user_u32(insn
, env
->regs
[31] - 4);
930 if (n
>= UC32_SYSCALL_BASE
) {
932 n
-= UC32_SYSCALL_BASE
;
933 if (n
== UC32_SYSCALL_NR_set_tls
) {
934 cpu_set_tls(env
, env
->regs
[0]);
937 env
->regs
[0] = do_syscall(env
,
952 case UC32_EXCP_DTRAP
:
953 case UC32_EXCP_ITRAP
:
954 info
.si_signo
= SIGSEGV
;
956 /* XXX: check env->error_code */
957 info
.si_code
= TARGET_SEGV_MAPERR
;
958 info
._sifields
._sigfault
._addr
= env
->cp0
.c4_faultaddr
;
959 queue_signal(env
, info
.si_signo
, &info
);
962 /* just indicate that signals should be handled asap */
968 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
972 info
.si_code
= TARGET_TRAP_BRKPT
;
973 queue_signal(env
, info
.si_signo
, &info
);
980 process_pending_signals(env
);
984 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
985 cpu_dump_state(env
, stderr
, fprintf
, 0);
991 #define SPARC64_STACK_BIAS 2047
995 /* WARNING: dealing with register windows _is_ complicated. More info
996 can be found at http://www.sics.se/~psm/sparcstack.html */
997 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
999 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
1000 /* wrap handling : if cwp is on the last window, then we use the
1001 registers 'after' the end */
1002 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
1003 index
+= 16 * env
->nwindows
;
1007 /* save the register window 'cwp1' */
1008 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
1013 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1014 #ifdef TARGET_SPARC64
1016 sp_ptr
+= SPARC64_STACK_BIAS
;
1018 #if defined(DEBUG_WIN)
1019 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
1022 for(i
= 0; i
< 16; i
++) {
1023 /* FIXME - what to do if put_user() fails? */
1024 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1025 sp_ptr
+= sizeof(abi_ulong
);
1029 static void save_window(CPUSPARCState
*env
)
1031 #ifndef TARGET_SPARC64
1032 unsigned int new_wim
;
1033 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
1034 ((1LL << env
->nwindows
) - 1);
1035 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1038 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1044 static void restore_window(CPUSPARCState
*env
)
1046 #ifndef TARGET_SPARC64
1047 unsigned int new_wim
;
1049 unsigned int i
, cwp1
;
1052 #ifndef TARGET_SPARC64
1053 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
1054 ((1LL << env
->nwindows
) - 1);
1057 /* restore the invalid window */
1058 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1059 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1060 #ifdef TARGET_SPARC64
1062 sp_ptr
+= SPARC64_STACK_BIAS
;
1064 #if defined(DEBUG_WIN)
1065 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
1068 for(i
= 0; i
< 16; i
++) {
1069 /* FIXME - what to do if get_user() fails? */
1070 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1071 sp_ptr
+= sizeof(abi_ulong
);
1073 #ifdef TARGET_SPARC64
1075 if (env
->cleanwin
< env
->nwindows
- 1)
1083 static void flush_windows(CPUSPARCState
*env
)
1089 /* if restore would invoke restore_window(), then we can stop */
1090 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
1091 #ifndef TARGET_SPARC64
1092 if (env
->wim
& (1 << cwp1
))
1095 if (env
->canrestore
== 0)
1100 save_window_offset(env
, cwp1
);
1103 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1104 #ifndef TARGET_SPARC64
1105 /* set wim so that restore will reload the registers */
1106 env
->wim
= 1 << cwp1
;
1108 #if defined(DEBUG_WIN)
1109 printf("flush_windows: nb=%d\n", offset
- 1);
1113 void cpu_loop (CPUSPARCState
*env
)
1117 target_siginfo_t info
;
1120 trapnr
= cpu_sparc_exec (env
);
1122 /* Compute PSR before exposing state. */
1123 if (env
->cc_op
!= CC_OP_FLAGS
) {
1128 #ifndef TARGET_SPARC64
1135 ret
= do_syscall (env
, env
->gregs
[1],
1136 env
->regwptr
[0], env
->regwptr
[1],
1137 env
->regwptr
[2], env
->regwptr
[3],
1138 env
->regwptr
[4], env
->regwptr
[5],
1140 if ((abi_ulong
)ret
>= (abi_ulong
)(-515)) {
1141 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1142 env
->xcc
|= PSR_CARRY
;
1144 env
->psr
|= PSR_CARRY
;
1148 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1149 env
->xcc
&= ~PSR_CARRY
;
1151 env
->psr
&= ~PSR_CARRY
;
1154 env
->regwptr
[0] = ret
;
1155 /* next instruction */
1157 env
->npc
= env
->npc
+ 4;
1159 case 0x83: /* flush windows */
1164 /* next instruction */
1166 env
->npc
= env
->npc
+ 4;
1168 #ifndef TARGET_SPARC64
1169 case TT_WIN_OVF
: /* window overflow */
1172 case TT_WIN_UNF
: /* window underflow */
1173 restore_window(env
);
1178 info
.si_signo
= TARGET_SIGSEGV
;
1180 /* XXX: check env->error_code */
1181 info
.si_code
= TARGET_SEGV_MAPERR
;
1182 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1183 queue_signal(env
, info
.si_signo
, &info
);
1187 case TT_SPILL
: /* window overflow */
1190 case TT_FILL
: /* window underflow */
1191 restore_window(env
);
1196 info
.si_signo
= TARGET_SIGSEGV
;
1198 /* XXX: check env->error_code */
1199 info
.si_code
= TARGET_SEGV_MAPERR
;
1200 if (trapnr
== TT_DFAULT
)
1201 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
1203 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1204 queue_signal(env
, info
.si_signo
, &info
);
1207 #ifndef TARGET_ABI32
1210 sparc64_get_context(env
);
1214 sparc64_set_context(env
);
1218 case EXCP_INTERRUPT
:
1219 /* just indicate that signals should be handled asap */
1223 info
.si_signo
= TARGET_SIGILL
;
1225 info
.si_code
= TARGET_ILL_ILLOPC
;
1226 info
._sifields
._sigfault
._addr
= env
->pc
;
1227 queue_signal(env
, info
.si_signo
, &info
);
1234 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1237 info
.si_signo
= sig
;
1239 info
.si_code
= TARGET_TRAP_BRKPT
;
1240 queue_signal(env
, info
.si_signo
, &info
);
1245 printf ("Unhandled trap: 0x%x\n", trapnr
);
1246 cpu_dump_state(env
, stderr
, fprintf
, 0);
1249 process_pending_signals (env
);
1256 static inline uint64_t cpu_ppc_get_tb(CPUPPCState
*env
)
1262 uint64_t cpu_ppc_load_tbl(CPUPPCState
*env
)
1264 return cpu_ppc_get_tb(env
);
1267 uint32_t cpu_ppc_load_tbu(CPUPPCState
*env
)
1269 return cpu_ppc_get_tb(env
) >> 32;
1272 uint64_t cpu_ppc_load_atbl(CPUPPCState
*env
)
1274 return cpu_ppc_get_tb(env
);
1277 uint32_t cpu_ppc_load_atbu(CPUPPCState
*env
)
1279 return cpu_ppc_get_tb(env
) >> 32;
1282 uint32_t cpu_ppc601_load_rtcu(CPUPPCState
*env
)
1283 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1285 uint32_t cpu_ppc601_load_rtcl(CPUPPCState
*env
)
1287 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1290 /* XXX: to be fixed */
1291 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1296 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1301 #define EXCP_DUMP(env, fmt, ...) \
1303 fprintf(stderr, fmt , ## __VA_ARGS__); \
1304 cpu_dump_state(env, stderr, fprintf, 0); \
1305 qemu_log(fmt, ## __VA_ARGS__); \
1306 if (qemu_log_enabled()) { \
1307 log_cpu_state(env, 0); \
1311 static int do_store_exclusive(CPUPPCState
*env
)
1314 target_ulong page_addr
;
1319 addr
= env
->reserve_ea
;
1320 page_addr
= addr
& TARGET_PAGE_MASK
;
1323 flags
= page_get_flags(page_addr
);
1324 if ((flags
& PAGE_READ
) == 0) {
1327 int reg
= env
->reserve_info
& 0x1f;
1328 int size
= (env
->reserve_info
>> 5) & 0xf;
1331 if (addr
== env
->reserve_addr
) {
1333 case 1: segv
= get_user_u8(val
, addr
); break;
1334 case 2: segv
= get_user_u16(val
, addr
); break;
1335 case 4: segv
= get_user_u32(val
, addr
); break;
1336 #if defined(TARGET_PPC64)
1337 case 8: segv
= get_user_u64(val
, addr
); break;
1341 if (!segv
&& val
== env
->reserve_val
) {
1342 val
= env
->gpr
[reg
];
1344 case 1: segv
= put_user_u8(val
, addr
); break;
1345 case 2: segv
= put_user_u16(val
, addr
); break;
1346 case 4: segv
= put_user_u32(val
, addr
); break;
1347 #if defined(TARGET_PPC64)
1348 case 8: segv
= put_user_u64(val
, addr
); break;
1357 env
->crf
[0] = (stored
<< 1) | xer_so
;
1358 env
->reserve_addr
= (target_ulong
)-1;
1368 void cpu_loop(CPUPPCState
*env
)
1370 target_siginfo_t info
;
1375 cpu_exec_start(env
);
1376 trapnr
= cpu_ppc_exec(env
);
1379 case POWERPC_EXCP_NONE
:
1382 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1383 cpu_abort(env
, "Critical interrupt while in user mode. "
1386 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1387 cpu_abort(env
, "Machine check exception while in user mode. "
1390 case POWERPC_EXCP_DSI
: /* Data storage exception */
1391 EXCP_DUMP(env
, "Invalid data memory access: 0x" TARGET_FMT_lx
"\n",
1393 /* XXX: check this. Seems bugged */
1394 switch (env
->error_code
& 0xFF000000) {
1396 info
.si_signo
= TARGET_SIGSEGV
;
1398 info
.si_code
= TARGET_SEGV_MAPERR
;
1401 info
.si_signo
= TARGET_SIGILL
;
1403 info
.si_code
= TARGET_ILL_ILLADR
;
1406 info
.si_signo
= TARGET_SIGSEGV
;
1408 info
.si_code
= TARGET_SEGV_ACCERR
;
1411 /* Let's send a regular segfault... */
1412 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1414 info
.si_signo
= TARGET_SIGSEGV
;
1416 info
.si_code
= TARGET_SEGV_MAPERR
;
1419 info
._sifields
._sigfault
._addr
= env
->nip
;
1420 queue_signal(env
, info
.si_signo
, &info
);
1422 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1423 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1424 "\n", env
->spr
[SPR_SRR0
]);
1425 /* XXX: check this */
1426 switch (env
->error_code
& 0xFF000000) {
1428 info
.si_signo
= TARGET_SIGSEGV
;
1430 info
.si_code
= TARGET_SEGV_MAPERR
;
1434 info
.si_signo
= TARGET_SIGSEGV
;
1436 info
.si_code
= TARGET_SEGV_ACCERR
;
1439 /* Let's send a regular segfault... */
1440 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1442 info
.si_signo
= TARGET_SIGSEGV
;
1444 info
.si_code
= TARGET_SEGV_MAPERR
;
1447 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1448 queue_signal(env
, info
.si_signo
, &info
);
1450 case POWERPC_EXCP_EXTERNAL
: /* External input */
1451 cpu_abort(env
, "External interrupt while in user mode. "
1454 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1455 EXCP_DUMP(env
, "Unaligned memory access\n");
1456 /* XXX: check this */
1457 info
.si_signo
= TARGET_SIGBUS
;
1459 info
.si_code
= TARGET_BUS_ADRALN
;
1460 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1461 queue_signal(env
, info
.si_signo
, &info
);
1463 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1464 /* XXX: check this */
1465 switch (env
->error_code
& ~0xF) {
1466 case POWERPC_EXCP_FP
:
1467 EXCP_DUMP(env
, "Floating point program exception\n");
1468 info
.si_signo
= TARGET_SIGFPE
;
1470 switch (env
->error_code
& 0xF) {
1471 case POWERPC_EXCP_FP_OX
:
1472 info
.si_code
= TARGET_FPE_FLTOVF
;
1474 case POWERPC_EXCP_FP_UX
:
1475 info
.si_code
= TARGET_FPE_FLTUND
;
1477 case POWERPC_EXCP_FP_ZX
:
1478 case POWERPC_EXCP_FP_VXZDZ
:
1479 info
.si_code
= TARGET_FPE_FLTDIV
;
1481 case POWERPC_EXCP_FP_XX
:
1482 info
.si_code
= TARGET_FPE_FLTRES
;
1484 case POWERPC_EXCP_FP_VXSOFT
:
1485 info
.si_code
= TARGET_FPE_FLTINV
;
1487 case POWERPC_EXCP_FP_VXSNAN
:
1488 case POWERPC_EXCP_FP_VXISI
:
1489 case POWERPC_EXCP_FP_VXIDI
:
1490 case POWERPC_EXCP_FP_VXIMZ
:
1491 case POWERPC_EXCP_FP_VXVC
:
1492 case POWERPC_EXCP_FP_VXSQRT
:
1493 case POWERPC_EXCP_FP_VXCVI
:
1494 info
.si_code
= TARGET_FPE_FLTSUB
;
1497 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1502 case POWERPC_EXCP_INVAL
:
1503 EXCP_DUMP(env
, "Invalid instruction\n");
1504 info
.si_signo
= TARGET_SIGILL
;
1506 switch (env
->error_code
& 0xF) {
1507 case POWERPC_EXCP_INVAL_INVAL
:
1508 info
.si_code
= TARGET_ILL_ILLOPC
;
1510 case POWERPC_EXCP_INVAL_LSWX
:
1511 info
.si_code
= TARGET_ILL_ILLOPN
;
1513 case POWERPC_EXCP_INVAL_SPR
:
1514 info
.si_code
= TARGET_ILL_PRVREG
;
1516 case POWERPC_EXCP_INVAL_FP
:
1517 info
.si_code
= TARGET_ILL_COPROC
;
1520 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1521 env
->error_code
& 0xF);
1522 info
.si_code
= TARGET_ILL_ILLADR
;
1526 case POWERPC_EXCP_PRIV
:
1527 EXCP_DUMP(env
, "Privilege violation\n");
1528 info
.si_signo
= TARGET_SIGILL
;
1530 switch (env
->error_code
& 0xF) {
1531 case POWERPC_EXCP_PRIV_OPC
:
1532 info
.si_code
= TARGET_ILL_PRVOPC
;
1534 case POWERPC_EXCP_PRIV_REG
:
1535 info
.si_code
= TARGET_ILL_PRVREG
;
1538 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1539 env
->error_code
& 0xF);
1540 info
.si_code
= TARGET_ILL_PRVOPC
;
1544 case POWERPC_EXCP_TRAP
:
1545 cpu_abort(env
, "Tried to call a TRAP\n");
1548 /* Should not happen ! */
1549 cpu_abort(env
, "Unknown program exception (%02x)\n",
1553 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1554 queue_signal(env
, info
.si_signo
, &info
);
1556 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1557 EXCP_DUMP(env
, "No floating point allowed\n");
1558 info
.si_signo
= TARGET_SIGILL
;
1560 info
.si_code
= TARGET_ILL_COPROC
;
1561 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1562 queue_signal(env
, info
.si_signo
, &info
);
1564 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1565 cpu_abort(env
, "Syscall exception while in user mode. "
1568 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1569 EXCP_DUMP(env
, "No APU instruction allowed\n");
1570 info
.si_signo
= TARGET_SIGILL
;
1572 info
.si_code
= TARGET_ILL_COPROC
;
1573 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1574 queue_signal(env
, info
.si_signo
, &info
);
1576 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1577 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1580 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1581 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1584 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1585 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1588 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1589 cpu_abort(env
, "Data TLB exception while in user mode. "
1592 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1593 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1596 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1597 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1598 info
.si_signo
= TARGET_SIGILL
;
1600 info
.si_code
= TARGET_ILL_COPROC
;
1601 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1602 queue_signal(env
, info
.si_signo
, &info
);
1604 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1605 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1607 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1608 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1610 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1611 cpu_abort(env
, "Performance monitor exception not handled\n");
1613 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1614 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1617 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1618 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1621 case POWERPC_EXCP_RESET
: /* System reset exception */
1622 cpu_abort(env
, "Reset interrupt while in user mode. "
1625 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1626 cpu_abort(env
, "Data segment exception while in user mode. "
1629 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1630 cpu_abort(env
, "Instruction segment exception "
1631 "while in user mode. Aborting\n");
1633 /* PowerPC 64 with hypervisor mode support */
1634 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1635 cpu_abort(env
, "Hypervisor decrementer interrupt "
1636 "while in user mode. Aborting\n");
1638 case POWERPC_EXCP_TRACE
: /* Trace exception */
1640 * we use this exception to emulate step-by-step execution mode.
1643 /* PowerPC 64 with hypervisor mode support */
1644 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1645 cpu_abort(env
, "Hypervisor data storage exception "
1646 "while in user mode. Aborting\n");
1648 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1649 cpu_abort(env
, "Hypervisor instruction storage exception "
1650 "while in user mode. Aborting\n");
1652 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1653 cpu_abort(env
, "Hypervisor data segment exception "
1654 "while in user mode. Aborting\n");
1656 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1657 cpu_abort(env
, "Hypervisor instruction segment exception "
1658 "while in user mode. Aborting\n");
1660 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1661 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1662 info
.si_signo
= TARGET_SIGILL
;
1664 info
.si_code
= TARGET_ILL_COPROC
;
1665 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1666 queue_signal(env
, info
.si_signo
, &info
);
1668 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1669 cpu_abort(env
, "Programmable interval timer interrupt "
1670 "while in user mode. Aborting\n");
1672 case POWERPC_EXCP_IO
: /* IO error exception */
1673 cpu_abort(env
, "IO error exception while in user mode. "
1676 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1677 cpu_abort(env
, "Run mode exception while in user mode. "
1680 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1681 cpu_abort(env
, "Emulation trap exception not handled\n");
1683 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1684 cpu_abort(env
, "Instruction fetch TLB exception "
1685 "while in user-mode. Aborting");
1687 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1688 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1691 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1692 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1695 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1696 cpu_abort(env
, "Floating-point assist exception not handled\n");
1698 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1699 cpu_abort(env
, "Instruction address breakpoint exception "
1702 case POWERPC_EXCP_SMI
: /* System management interrupt */
1703 cpu_abort(env
, "System management interrupt while in user mode. "
1706 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1707 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1710 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1711 cpu_abort(env
, "Performance monitor exception not handled\n");
1713 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1714 cpu_abort(env
, "Vector assist exception not handled\n");
1716 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1717 cpu_abort(env
, "Soft patch exception not handled\n");
1719 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1720 cpu_abort(env
, "Maintenance exception while in user mode. "
1723 case POWERPC_EXCP_STOP
: /* stop translation */
1724 /* We did invalidate the instruction cache. Go on */
1726 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1727 /* We just stopped because of a branch. Go on */
1729 case POWERPC_EXCP_SYSCALL_USER
:
1730 /* system call in user-mode emulation */
1732 * PPC ABI uses overflow flag in cr0 to signal an error
1735 env
->crf
[0] &= ~0x1;
1736 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1737 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1739 if (ret
== (target_ulong
)(-TARGET_QEMU_ESIGRETURN
)) {
1740 /* Returning from a successful sigreturn syscall.
1741 Avoid corrupting register state. */
1744 if (ret
> (target_ulong
)(-515)) {
1750 case POWERPC_EXCP_STCX
:
1751 if (do_store_exclusive(env
)) {
1752 info
.si_signo
= TARGET_SIGSEGV
;
1754 info
.si_code
= TARGET_SEGV_MAPERR
;
1755 info
._sifields
._sigfault
._addr
= env
->nip
;
1756 queue_signal(env
, info
.si_signo
, &info
);
1763 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1765 info
.si_signo
= sig
;
1767 info
.si_code
= TARGET_TRAP_BRKPT
;
1768 queue_signal(env
, info
.si_signo
, &info
);
1772 case EXCP_INTERRUPT
:
1773 /* just indicate that signals should be handled asap */
1776 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1779 process_pending_signals(env
);
1786 #define MIPS_SYS(name, args) args,
1788 static const uint8_t mips_syscall_args
[] = {
1789 MIPS_SYS(sys_syscall
, 8) /* 4000 */
1790 MIPS_SYS(sys_exit
, 1)
1791 MIPS_SYS(sys_fork
, 0)
1792 MIPS_SYS(sys_read
, 3)
1793 MIPS_SYS(sys_write
, 3)
1794 MIPS_SYS(sys_open
, 3) /* 4005 */
1795 MIPS_SYS(sys_close
, 1)
1796 MIPS_SYS(sys_waitpid
, 3)
1797 MIPS_SYS(sys_creat
, 2)
1798 MIPS_SYS(sys_link
, 2)
1799 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1800 MIPS_SYS(sys_execve
, 0)
1801 MIPS_SYS(sys_chdir
, 1)
1802 MIPS_SYS(sys_time
, 1)
1803 MIPS_SYS(sys_mknod
, 3)
1804 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1805 MIPS_SYS(sys_lchown
, 3)
1806 MIPS_SYS(sys_ni_syscall
, 0)
1807 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1808 MIPS_SYS(sys_lseek
, 3)
1809 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1810 MIPS_SYS(sys_mount
, 5)
1811 MIPS_SYS(sys_oldumount
, 1)
1812 MIPS_SYS(sys_setuid
, 1)
1813 MIPS_SYS(sys_getuid
, 0)
1814 MIPS_SYS(sys_stime
, 1) /* 4025 */
1815 MIPS_SYS(sys_ptrace
, 4)
1816 MIPS_SYS(sys_alarm
, 1)
1817 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1818 MIPS_SYS(sys_pause
, 0)
1819 MIPS_SYS(sys_utime
, 2) /* 4030 */
1820 MIPS_SYS(sys_ni_syscall
, 0)
1821 MIPS_SYS(sys_ni_syscall
, 0)
1822 MIPS_SYS(sys_access
, 2)
1823 MIPS_SYS(sys_nice
, 1)
1824 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1825 MIPS_SYS(sys_sync
, 0)
1826 MIPS_SYS(sys_kill
, 2)
1827 MIPS_SYS(sys_rename
, 2)
1828 MIPS_SYS(sys_mkdir
, 2)
1829 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1830 MIPS_SYS(sys_dup
, 1)
1831 MIPS_SYS(sys_pipe
, 0)
1832 MIPS_SYS(sys_times
, 1)
1833 MIPS_SYS(sys_ni_syscall
, 0)
1834 MIPS_SYS(sys_brk
, 1) /* 4045 */
1835 MIPS_SYS(sys_setgid
, 1)
1836 MIPS_SYS(sys_getgid
, 0)
1837 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1838 MIPS_SYS(sys_geteuid
, 0)
1839 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1840 MIPS_SYS(sys_acct
, 0)
1841 MIPS_SYS(sys_umount
, 2)
1842 MIPS_SYS(sys_ni_syscall
, 0)
1843 MIPS_SYS(sys_ioctl
, 3)
1844 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1845 MIPS_SYS(sys_ni_syscall
, 2)
1846 MIPS_SYS(sys_setpgid
, 2)
1847 MIPS_SYS(sys_ni_syscall
, 0)
1848 MIPS_SYS(sys_olduname
, 1)
1849 MIPS_SYS(sys_umask
, 1) /* 4060 */
1850 MIPS_SYS(sys_chroot
, 1)
1851 MIPS_SYS(sys_ustat
, 2)
1852 MIPS_SYS(sys_dup2
, 2)
1853 MIPS_SYS(sys_getppid
, 0)
1854 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1855 MIPS_SYS(sys_setsid
, 0)
1856 MIPS_SYS(sys_sigaction
, 3)
1857 MIPS_SYS(sys_sgetmask
, 0)
1858 MIPS_SYS(sys_ssetmask
, 1)
1859 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1860 MIPS_SYS(sys_setregid
, 2)
1861 MIPS_SYS(sys_sigsuspend
, 0)
1862 MIPS_SYS(sys_sigpending
, 1)
1863 MIPS_SYS(sys_sethostname
, 2)
1864 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1865 MIPS_SYS(sys_getrlimit
, 2)
1866 MIPS_SYS(sys_getrusage
, 2)
1867 MIPS_SYS(sys_gettimeofday
, 2)
1868 MIPS_SYS(sys_settimeofday
, 2)
1869 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1870 MIPS_SYS(sys_setgroups
, 2)
1871 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1872 MIPS_SYS(sys_symlink
, 2)
1873 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1874 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1875 MIPS_SYS(sys_uselib
, 1)
1876 MIPS_SYS(sys_swapon
, 2)
1877 MIPS_SYS(sys_reboot
, 3)
1878 MIPS_SYS(old_readdir
, 3)
1879 MIPS_SYS(old_mmap
, 6) /* 4090 */
1880 MIPS_SYS(sys_munmap
, 2)
1881 MIPS_SYS(sys_truncate
, 2)
1882 MIPS_SYS(sys_ftruncate
, 2)
1883 MIPS_SYS(sys_fchmod
, 2)
1884 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1885 MIPS_SYS(sys_getpriority
, 2)
1886 MIPS_SYS(sys_setpriority
, 3)
1887 MIPS_SYS(sys_ni_syscall
, 0)
1888 MIPS_SYS(sys_statfs
, 2)
1889 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1890 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1891 MIPS_SYS(sys_socketcall
, 2)
1892 MIPS_SYS(sys_syslog
, 3)
1893 MIPS_SYS(sys_setitimer
, 3)
1894 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1895 MIPS_SYS(sys_newstat
, 2)
1896 MIPS_SYS(sys_newlstat
, 2)
1897 MIPS_SYS(sys_newfstat
, 2)
1898 MIPS_SYS(sys_uname
, 1)
1899 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1900 MIPS_SYS(sys_vhangup
, 0)
1901 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1902 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1903 MIPS_SYS(sys_wait4
, 4)
1904 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1905 MIPS_SYS(sys_sysinfo
, 1)
1906 MIPS_SYS(sys_ipc
, 6)
1907 MIPS_SYS(sys_fsync
, 1)
1908 MIPS_SYS(sys_sigreturn
, 0)
1909 MIPS_SYS(sys_clone
, 6) /* 4120 */
1910 MIPS_SYS(sys_setdomainname
, 2)
1911 MIPS_SYS(sys_newuname
, 1)
1912 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1913 MIPS_SYS(sys_adjtimex
, 1)
1914 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1915 MIPS_SYS(sys_sigprocmask
, 3)
1916 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1917 MIPS_SYS(sys_init_module
, 5)
1918 MIPS_SYS(sys_delete_module
, 1)
1919 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1920 MIPS_SYS(sys_quotactl
, 0)
1921 MIPS_SYS(sys_getpgid
, 1)
1922 MIPS_SYS(sys_fchdir
, 1)
1923 MIPS_SYS(sys_bdflush
, 2)
1924 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1925 MIPS_SYS(sys_personality
, 1)
1926 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1927 MIPS_SYS(sys_setfsuid
, 1)
1928 MIPS_SYS(sys_setfsgid
, 1)
1929 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1930 MIPS_SYS(sys_getdents
, 3)
1931 MIPS_SYS(sys_select
, 5)
1932 MIPS_SYS(sys_flock
, 2)
1933 MIPS_SYS(sys_msync
, 3)
1934 MIPS_SYS(sys_readv
, 3) /* 4145 */
1935 MIPS_SYS(sys_writev
, 3)
1936 MIPS_SYS(sys_cacheflush
, 3)
1937 MIPS_SYS(sys_cachectl
, 3)
1938 MIPS_SYS(sys_sysmips
, 4)
1939 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1940 MIPS_SYS(sys_getsid
, 1)
1941 MIPS_SYS(sys_fdatasync
, 0)
1942 MIPS_SYS(sys_sysctl
, 1)
1943 MIPS_SYS(sys_mlock
, 2)
1944 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1945 MIPS_SYS(sys_mlockall
, 1)
1946 MIPS_SYS(sys_munlockall
, 0)
1947 MIPS_SYS(sys_sched_setparam
, 2)
1948 MIPS_SYS(sys_sched_getparam
, 2)
1949 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1950 MIPS_SYS(sys_sched_getscheduler
, 1)
1951 MIPS_SYS(sys_sched_yield
, 0)
1952 MIPS_SYS(sys_sched_get_priority_max
, 1)
1953 MIPS_SYS(sys_sched_get_priority_min
, 1)
1954 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1955 MIPS_SYS(sys_nanosleep
, 2)
1956 MIPS_SYS(sys_mremap
, 4)
1957 MIPS_SYS(sys_accept
, 3)
1958 MIPS_SYS(sys_bind
, 3)
1959 MIPS_SYS(sys_connect
, 3) /* 4170 */
1960 MIPS_SYS(sys_getpeername
, 3)
1961 MIPS_SYS(sys_getsockname
, 3)
1962 MIPS_SYS(sys_getsockopt
, 5)
1963 MIPS_SYS(sys_listen
, 2)
1964 MIPS_SYS(sys_recv
, 4) /* 4175 */
1965 MIPS_SYS(sys_recvfrom
, 6)
1966 MIPS_SYS(sys_recvmsg
, 3)
1967 MIPS_SYS(sys_send
, 4)
1968 MIPS_SYS(sys_sendmsg
, 3)
1969 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1970 MIPS_SYS(sys_setsockopt
, 5)
1971 MIPS_SYS(sys_shutdown
, 2)
1972 MIPS_SYS(sys_socket
, 3)
1973 MIPS_SYS(sys_socketpair
, 4)
1974 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1975 MIPS_SYS(sys_getresuid
, 3)
1976 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1977 MIPS_SYS(sys_poll
, 3)
1978 MIPS_SYS(sys_nfsservctl
, 3)
1979 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1980 MIPS_SYS(sys_getresgid
, 3)
1981 MIPS_SYS(sys_prctl
, 5)
1982 MIPS_SYS(sys_rt_sigreturn
, 0)
1983 MIPS_SYS(sys_rt_sigaction
, 4)
1984 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1985 MIPS_SYS(sys_rt_sigpending
, 2)
1986 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1987 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1988 MIPS_SYS(sys_rt_sigsuspend
, 0)
1989 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1990 MIPS_SYS(sys_pwrite64
, 6)
1991 MIPS_SYS(sys_chown
, 3)
1992 MIPS_SYS(sys_getcwd
, 2)
1993 MIPS_SYS(sys_capget
, 2)
1994 MIPS_SYS(sys_capset
, 2) /* 4205 */
1995 MIPS_SYS(sys_sigaltstack
, 2)
1996 MIPS_SYS(sys_sendfile
, 4)
1997 MIPS_SYS(sys_ni_syscall
, 0)
1998 MIPS_SYS(sys_ni_syscall
, 0)
1999 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
2000 MIPS_SYS(sys_truncate64
, 4)
2001 MIPS_SYS(sys_ftruncate64
, 4)
2002 MIPS_SYS(sys_stat64
, 2)
2003 MIPS_SYS(sys_lstat64
, 2)
2004 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
2005 MIPS_SYS(sys_pivot_root
, 2)
2006 MIPS_SYS(sys_mincore
, 3)
2007 MIPS_SYS(sys_madvise
, 3)
2008 MIPS_SYS(sys_getdents64
, 3)
2009 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
2010 MIPS_SYS(sys_ni_syscall
, 0)
2011 MIPS_SYS(sys_gettid
, 0)
2012 MIPS_SYS(sys_readahead
, 5)
2013 MIPS_SYS(sys_setxattr
, 5)
2014 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
2015 MIPS_SYS(sys_fsetxattr
, 5)
2016 MIPS_SYS(sys_getxattr
, 4)
2017 MIPS_SYS(sys_lgetxattr
, 4)
2018 MIPS_SYS(sys_fgetxattr
, 4)
2019 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
2020 MIPS_SYS(sys_llistxattr
, 3)
2021 MIPS_SYS(sys_flistxattr
, 3)
2022 MIPS_SYS(sys_removexattr
, 2)
2023 MIPS_SYS(sys_lremovexattr
, 2)
2024 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
2025 MIPS_SYS(sys_tkill
, 2)
2026 MIPS_SYS(sys_sendfile64
, 5)
2027 MIPS_SYS(sys_futex
, 2)
2028 MIPS_SYS(sys_sched_setaffinity
, 3)
2029 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
2030 MIPS_SYS(sys_io_setup
, 2)
2031 MIPS_SYS(sys_io_destroy
, 1)
2032 MIPS_SYS(sys_io_getevents
, 5)
2033 MIPS_SYS(sys_io_submit
, 3)
2034 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
2035 MIPS_SYS(sys_exit_group
, 1)
2036 MIPS_SYS(sys_lookup_dcookie
, 3)
2037 MIPS_SYS(sys_epoll_create
, 1)
2038 MIPS_SYS(sys_epoll_ctl
, 4)
2039 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
2040 MIPS_SYS(sys_remap_file_pages
, 5)
2041 MIPS_SYS(sys_set_tid_address
, 1)
2042 MIPS_SYS(sys_restart_syscall
, 0)
2043 MIPS_SYS(sys_fadvise64_64
, 7)
2044 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
2045 MIPS_SYS(sys_fstatfs64
, 2)
2046 MIPS_SYS(sys_timer_create
, 3)
2047 MIPS_SYS(sys_timer_settime
, 4)
2048 MIPS_SYS(sys_timer_gettime
, 2)
2049 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
2050 MIPS_SYS(sys_timer_delete
, 1)
2051 MIPS_SYS(sys_clock_settime
, 2)
2052 MIPS_SYS(sys_clock_gettime
, 2)
2053 MIPS_SYS(sys_clock_getres
, 2)
2054 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
2055 MIPS_SYS(sys_tgkill
, 3)
2056 MIPS_SYS(sys_utimes
, 2)
2057 MIPS_SYS(sys_mbind
, 4)
2058 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
2059 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
2060 MIPS_SYS(sys_mq_open
, 4)
2061 MIPS_SYS(sys_mq_unlink
, 1)
2062 MIPS_SYS(sys_mq_timedsend
, 5)
2063 MIPS_SYS(sys_mq_timedreceive
, 5)
2064 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
2065 MIPS_SYS(sys_mq_getsetattr
, 3)
2066 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
2067 MIPS_SYS(sys_waitid
, 4)
2068 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
2069 MIPS_SYS(sys_add_key
, 5)
2070 MIPS_SYS(sys_request_key
, 4)
2071 MIPS_SYS(sys_keyctl
, 5)
2072 MIPS_SYS(sys_set_thread_area
, 1)
2073 MIPS_SYS(sys_inotify_init
, 0)
2074 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
2075 MIPS_SYS(sys_inotify_rm_watch
, 2)
2076 MIPS_SYS(sys_migrate_pages
, 4)
2077 MIPS_SYS(sys_openat
, 4)
2078 MIPS_SYS(sys_mkdirat
, 3)
2079 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
2080 MIPS_SYS(sys_fchownat
, 5)
2081 MIPS_SYS(sys_futimesat
, 3)
2082 MIPS_SYS(sys_fstatat64
, 4)
2083 MIPS_SYS(sys_unlinkat
, 3)
2084 MIPS_SYS(sys_renameat
, 4) /* 4295 */
2085 MIPS_SYS(sys_linkat
, 5)
2086 MIPS_SYS(sys_symlinkat
, 3)
2087 MIPS_SYS(sys_readlinkat
, 4)
2088 MIPS_SYS(sys_fchmodat
, 3)
2089 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
2090 MIPS_SYS(sys_pselect6
, 6)
2091 MIPS_SYS(sys_ppoll
, 5)
2092 MIPS_SYS(sys_unshare
, 1)
2093 MIPS_SYS(sys_splice
, 4)
2094 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
2095 MIPS_SYS(sys_tee
, 4)
2096 MIPS_SYS(sys_vmsplice
, 4)
2097 MIPS_SYS(sys_move_pages
, 6)
2098 MIPS_SYS(sys_set_robust_list
, 2)
2099 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
2100 MIPS_SYS(sys_kexec_load
, 4)
2101 MIPS_SYS(sys_getcpu
, 3)
2102 MIPS_SYS(sys_epoll_pwait
, 6)
2103 MIPS_SYS(sys_ioprio_set
, 3)
2104 MIPS_SYS(sys_ioprio_get
, 2)
2105 MIPS_SYS(sys_utimensat
, 4)
2106 MIPS_SYS(sys_signalfd
, 3)
2107 MIPS_SYS(sys_ni_syscall
, 0) /* was timerfd */
2108 MIPS_SYS(sys_eventfd
, 1)
2109 MIPS_SYS(sys_fallocate
, 6) /* 4320 */
2110 MIPS_SYS(sys_timerfd_create
, 2)
2111 MIPS_SYS(sys_timerfd_gettime
, 2)
2112 MIPS_SYS(sys_timerfd_settime
, 4)
2113 MIPS_SYS(sys_signalfd4
, 4)
2114 MIPS_SYS(sys_eventfd2
, 2) /* 4325 */
2115 MIPS_SYS(sys_epoll_create1
, 1)
2116 MIPS_SYS(sys_dup3
, 3)
2117 MIPS_SYS(sys_pipe2
, 2)
2118 MIPS_SYS(sys_inotify_init1
, 1)
2119 MIPS_SYS(sys_preadv
, 6) /* 4330 */
2120 MIPS_SYS(sys_pwritev
, 6)
2121 MIPS_SYS(sys_rt_tgsigqueueinfo
, 4)
2122 MIPS_SYS(sys_perf_event_open
, 5)
2123 MIPS_SYS(sys_accept4
, 4)
2124 MIPS_SYS(sys_recvmmsg
, 5) /* 4335 */
2125 MIPS_SYS(sys_fanotify_init
, 2)
2126 MIPS_SYS(sys_fanotify_mark
, 6)
2127 MIPS_SYS(sys_prlimit64
, 4)
2128 MIPS_SYS(sys_name_to_handle_at
, 5)
2129 MIPS_SYS(sys_open_by_handle_at
, 3) /* 4340 */
2130 MIPS_SYS(sys_clock_adjtime
, 2)
2131 MIPS_SYS(sys_syncfs
, 1)
2136 static int do_store_exclusive(CPUMIPSState
*env
)
2139 target_ulong page_addr
;
2147 page_addr
= addr
& TARGET_PAGE_MASK
;
2150 flags
= page_get_flags(page_addr
);
2151 if ((flags
& PAGE_READ
) == 0) {
2154 reg
= env
->llreg
& 0x1f;
2155 d
= (env
->llreg
& 0x20) != 0;
2157 segv
= get_user_s64(val
, addr
);
2159 segv
= get_user_s32(val
, addr
);
2162 if (val
!= env
->llval
) {
2163 env
->active_tc
.gpr
[reg
] = 0;
2166 segv
= put_user_u64(env
->llnewval
, addr
);
2168 segv
= put_user_u32(env
->llnewval
, addr
);
2171 env
->active_tc
.gpr
[reg
] = 1;
2178 env
->active_tc
.PC
+= 4;
2185 void cpu_loop(CPUMIPSState
*env
)
2187 target_siginfo_t info
;
2189 unsigned int syscall_num
;
2192 cpu_exec_start(env
);
2193 trapnr
= cpu_mips_exec(env
);
2197 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
2198 env
->active_tc
.PC
+= 4;
2199 if (syscall_num
>= sizeof(mips_syscall_args
)) {
2200 ret
= -TARGET_ENOSYS
;
2204 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
2206 nb_args
= mips_syscall_args
[syscall_num
];
2207 sp_reg
= env
->active_tc
.gpr
[29];
2209 /* these arguments are taken from the stack */
2211 if ((ret
= get_user_ual(arg8
, sp_reg
+ 28)) != 0) {
2215 if ((ret
= get_user_ual(arg7
, sp_reg
+ 24)) != 0) {
2219 if ((ret
= get_user_ual(arg6
, sp_reg
+ 20)) != 0) {
2223 if ((ret
= get_user_ual(arg5
, sp_reg
+ 16)) != 0) {
2229 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2230 env
->active_tc
.gpr
[4],
2231 env
->active_tc
.gpr
[5],
2232 env
->active_tc
.gpr
[6],
2233 env
->active_tc
.gpr
[7],
2234 arg5
, arg6
, arg7
, arg8
);
2237 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2238 /* Returning from a successful sigreturn syscall.
2239 Avoid clobbering register state. */
2242 if ((unsigned int)ret
>= (unsigned int)(-1133)) {
2243 env
->active_tc
.gpr
[7] = 1; /* error flag */
2246 env
->active_tc
.gpr
[7] = 0; /* error flag */
2248 env
->active_tc
.gpr
[2] = ret
;
2254 info
.si_signo
= TARGET_SIGSEGV
;
2256 /* XXX: check env->error_code */
2257 info
.si_code
= TARGET_SEGV_MAPERR
;
2258 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2259 queue_signal(env
, info
.si_signo
, &info
);
2263 info
.si_signo
= TARGET_SIGILL
;
2266 queue_signal(env
, info
.si_signo
, &info
);
2268 case EXCP_INTERRUPT
:
2269 /* just indicate that signals should be handled asap */
2275 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2278 info
.si_signo
= sig
;
2280 info
.si_code
= TARGET_TRAP_BRKPT
;
2281 queue_signal(env
, info
.si_signo
, &info
);
2286 if (do_store_exclusive(env
)) {
2287 info
.si_signo
= TARGET_SIGSEGV
;
2289 info
.si_code
= TARGET_SEGV_MAPERR
;
2290 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2291 queue_signal(env
, info
.si_signo
, &info
);
2295 info
.si_signo
= TARGET_SIGILL
;
2297 info
.si_code
= TARGET_ILL_ILLOPC
;
2298 queue_signal(env
, info
.si_signo
, &info
);
2302 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2304 cpu_dump_state(env
, stderr
, fprintf
, 0);
2307 process_pending_signals(env
);
2312 #ifdef TARGET_OPENRISC
2314 void cpu_loop(CPUOpenRISCState
*env
)
2319 trapnr
= cpu_exec(env
);
2324 qemu_log("\nReset request, exit, pc is %#x\n", env
->pc
);
2328 qemu_log("\nBus error, exit, pc is %#x\n", env
->pc
);
2333 cpu_dump_state(env
, stderr
, fprintf
, 0);
2334 gdbsig
= TARGET_SIGSEGV
;
2337 qemu_log("\nTick time interrupt pc is %#x\n", env
->pc
);
2340 qemu_log("\nAlignment pc is %#x\n", env
->pc
);
2344 qemu_log("\nIllegal instructionpc is %#x\n", env
->pc
);
2348 qemu_log("\nExternal interruptpc is %#x\n", env
->pc
);
2352 qemu_log("\nTLB miss\n");
2355 qemu_log("\nRange\n");
2359 env
->pc
+= 4; /* 0xc00; */
2360 env
->gpr
[11] = do_syscall(env
,
2361 env
->gpr
[11], /* return value */
2362 env
->gpr
[3], /* r3 - r7 are params */
2370 qemu_log("\nFloating point error\n");
2373 qemu_log("\nTrap\n");
2380 qemu_log("\nqemu: unhandled CPU exception %#x - aborting\n",
2382 cpu_dump_state(env
, stderr
, fprintf
, 0);
2383 gdbsig
= TARGET_SIGILL
;
2387 gdb_handlesig(env
, gdbsig
);
2388 if (gdbsig
!= TARGET_SIGTRAP
) {
2393 process_pending_signals(env
);
2397 #endif /* TARGET_OPENRISC */
2400 void cpu_loop(CPUSH4State
*env
)
2403 target_siginfo_t info
;
2406 trapnr
= cpu_sh4_exec (env
);
2411 ret
= do_syscall(env
,
2420 env
->gregs
[0] = ret
;
2422 case EXCP_INTERRUPT
:
2423 /* just indicate that signals should be handled asap */
2429 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2432 info
.si_signo
= sig
;
2434 info
.si_code
= TARGET_TRAP_BRKPT
;
2435 queue_signal(env
, info
.si_signo
, &info
);
2441 info
.si_signo
= SIGSEGV
;
2443 info
.si_code
= TARGET_SEGV_MAPERR
;
2444 info
._sifields
._sigfault
._addr
= env
->tea
;
2445 queue_signal(env
, info
.si_signo
, &info
);
2449 printf ("Unhandled trap: 0x%x\n", trapnr
);
2450 cpu_dump_state(env
, stderr
, fprintf
, 0);
2453 process_pending_signals (env
);
2459 void cpu_loop(CPUCRISState
*env
)
2462 target_siginfo_t info
;
2465 trapnr
= cpu_cris_exec (env
);
2469 info
.si_signo
= SIGSEGV
;
2471 /* XXX: check env->error_code */
2472 info
.si_code
= TARGET_SEGV_MAPERR
;
2473 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2474 queue_signal(env
, info
.si_signo
, &info
);
2477 case EXCP_INTERRUPT
:
2478 /* just indicate that signals should be handled asap */
2481 ret
= do_syscall(env
,
2490 env
->regs
[10] = ret
;
2496 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2499 info
.si_signo
= sig
;
2501 info
.si_code
= TARGET_TRAP_BRKPT
;
2502 queue_signal(env
, info
.si_signo
, &info
);
2507 printf ("Unhandled trap: 0x%x\n", trapnr
);
2508 cpu_dump_state(env
, stderr
, fprintf
, 0);
2511 process_pending_signals (env
);
2516 #ifdef TARGET_MICROBLAZE
2517 void cpu_loop(CPUMBState
*env
)
2520 target_siginfo_t info
;
2523 trapnr
= cpu_mb_exec (env
);
2527 info
.si_signo
= SIGSEGV
;
2529 /* XXX: check env->error_code */
2530 info
.si_code
= TARGET_SEGV_MAPERR
;
2531 info
._sifields
._sigfault
._addr
= 0;
2532 queue_signal(env
, info
.si_signo
, &info
);
2535 case EXCP_INTERRUPT
:
2536 /* just indicate that signals should be handled asap */
2539 /* Return address is 4 bytes after the call. */
2541 env
->sregs
[SR_PC
] = env
->regs
[14];
2542 ret
= do_syscall(env
,
2554 env
->regs
[17] = env
->sregs
[SR_PC
] + 4;
2555 if (env
->iflags
& D_FLAG
) {
2556 env
->sregs
[SR_ESR
] |= 1 << 12;
2557 env
->sregs
[SR_PC
] -= 4;
2558 /* FIXME: if branch was immed, replay the imm as well. */
2561 env
->iflags
&= ~(IMM_FLAG
| D_FLAG
);
2563 switch (env
->sregs
[SR_ESR
] & 31) {
2564 case ESR_EC_DIVZERO
:
2565 info
.si_signo
= SIGFPE
;
2567 info
.si_code
= TARGET_FPE_FLTDIV
;
2568 info
._sifields
._sigfault
._addr
= 0;
2569 queue_signal(env
, info
.si_signo
, &info
);
2572 info
.si_signo
= SIGFPE
;
2574 if (env
->sregs
[SR_FSR
] & FSR_IO
) {
2575 info
.si_code
= TARGET_FPE_FLTINV
;
2577 if (env
->sregs
[SR_FSR
] & FSR_DZ
) {
2578 info
.si_code
= TARGET_FPE_FLTDIV
;
2580 info
._sifields
._sigfault
._addr
= 0;
2581 queue_signal(env
, info
.si_signo
, &info
);
2584 printf ("Unhandled hw-exception: 0x%x\n",
2585 env
->sregs
[SR_ESR
] & ESR_EC_MASK
);
2586 cpu_dump_state(env
, stderr
, fprintf
, 0);
2595 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2598 info
.si_signo
= sig
;
2600 info
.si_code
= TARGET_TRAP_BRKPT
;
2601 queue_signal(env
, info
.si_signo
, &info
);
2606 printf ("Unhandled trap: 0x%x\n", trapnr
);
2607 cpu_dump_state(env
, stderr
, fprintf
, 0);
2610 process_pending_signals (env
);
2617 void cpu_loop(CPUM68KState
*env
)
2621 target_siginfo_t info
;
2622 TaskState
*ts
= env
->opaque
;
2625 trapnr
= cpu_m68k_exec(env
);
2629 if (ts
->sim_syscalls
) {
2631 nr
= lduw(env
->pc
+ 2);
2633 do_m68k_simcall(env
, nr
);
2639 case EXCP_HALT_INSN
:
2640 /* Semihosing syscall. */
2642 do_m68k_semihosting(env
, env
->dregs
[0]);
2646 case EXCP_UNSUPPORTED
:
2648 info
.si_signo
= SIGILL
;
2650 info
.si_code
= TARGET_ILL_ILLOPN
;
2651 info
._sifields
._sigfault
._addr
= env
->pc
;
2652 queue_signal(env
, info
.si_signo
, &info
);
2656 ts
->sim_syscalls
= 0;
2659 env
->dregs
[0] = do_syscall(env
,
2670 case EXCP_INTERRUPT
:
2671 /* just indicate that signals should be handled asap */
2675 info
.si_signo
= SIGSEGV
;
2677 /* XXX: check env->error_code */
2678 info
.si_code
= TARGET_SEGV_MAPERR
;
2679 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2680 queue_signal(env
, info
.si_signo
, &info
);
2687 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2690 info
.si_signo
= sig
;
2692 info
.si_code
= TARGET_TRAP_BRKPT
;
2693 queue_signal(env
, info
.si_signo
, &info
);
2698 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2700 cpu_dump_state(env
, stderr
, fprintf
, 0);
2703 process_pending_signals(env
);
2706 #endif /* TARGET_M68K */
2709 static void do_store_exclusive(CPUAlphaState
*env
, int reg
, int quad
)
2711 target_ulong addr
, val
, tmp
;
2712 target_siginfo_t info
;
2715 addr
= env
->lock_addr
;
2716 tmp
= env
->lock_st_addr
;
2717 env
->lock_addr
= -1;
2718 env
->lock_st_addr
= 0;
2724 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
2728 if (val
== env
->lock_value
) {
2730 if (quad
? put_user_u64(tmp
, addr
) : put_user_u32(tmp
, addr
)) {
2747 info
.si_signo
= TARGET_SIGSEGV
;
2749 info
.si_code
= TARGET_SEGV_MAPERR
;
2750 info
._sifields
._sigfault
._addr
= addr
;
2751 queue_signal(env
, TARGET_SIGSEGV
, &info
);
2754 void cpu_loop(CPUAlphaState
*env
)
2757 target_siginfo_t info
;
2761 trapnr
= cpu_alpha_exec (env
);
2763 /* All of the traps imply a transition through PALcode, which
2764 implies an REI instruction has been executed. Which means
2765 that the intr_flag should be cleared. */
2770 fprintf(stderr
, "Reset requested. Exit\n");
2774 fprintf(stderr
, "Machine check exception. Exit\n");
2777 case EXCP_SMP_INTERRUPT
:
2778 case EXCP_CLK_INTERRUPT
:
2779 case EXCP_DEV_INTERRUPT
:
2780 fprintf(stderr
, "External interrupt. Exit\n");
2784 env
->lock_addr
= -1;
2785 info
.si_signo
= TARGET_SIGSEGV
;
2787 info
.si_code
= (page_get_flags(env
->trap_arg0
) & PAGE_VALID
2788 ? TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
);
2789 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2790 queue_signal(env
, info
.si_signo
, &info
);
2793 env
->lock_addr
= -1;
2794 info
.si_signo
= TARGET_SIGBUS
;
2796 info
.si_code
= TARGET_BUS_ADRALN
;
2797 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2798 queue_signal(env
, info
.si_signo
, &info
);
2802 env
->lock_addr
= -1;
2803 info
.si_signo
= TARGET_SIGILL
;
2805 info
.si_code
= TARGET_ILL_ILLOPC
;
2806 info
._sifields
._sigfault
._addr
= env
->pc
;
2807 queue_signal(env
, info
.si_signo
, &info
);
2810 env
->lock_addr
= -1;
2811 info
.si_signo
= TARGET_SIGFPE
;
2813 info
.si_code
= TARGET_FPE_FLTINV
;
2814 info
._sifields
._sigfault
._addr
= env
->pc
;
2815 queue_signal(env
, info
.si_signo
, &info
);
2818 /* No-op. Linux simply re-enables the FPU. */
2821 env
->lock_addr
= -1;
2822 switch (env
->error_code
) {
2825 info
.si_signo
= TARGET_SIGTRAP
;
2827 info
.si_code
= TARGET_TRAP_BRKPT
;
2828 info
._sifields
._sigfault
._addr
= env
->pc
;
2829 queue_signal(env
, info
.si_signo
, &info
);
2833 info
.si_signo
= TARGET_SIGTRAP
;
2836 info
._sifields
._sigfault
._addr
= env
->pc
;
2837 queue_signal(env
, info
.si_signo
, &info
);
2841 trapnr
= env
->ir
[IR_V0
];
2842 sysret
= do_syscall(env
, trapnr
,
2843 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
2844 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
2845 env
->ir
[IR_A4
], env
->ir
[IR_A5
],
2847 if (trapnr
== TARGET_NR_sigreturn
2848 || trapnr
== TARGET_NR_rt_sigreturn
) {
2851 /* Syscall writes 0 to V0 to bypass error check, similar
2852 to how this is handled internal to Linux kernel.
2853 (Ab)use trapnr temporarily as boolean indicating error. */
2854 trapnr
= (env
->ir
[IR_V0
] != 0 && sysret
< 0);
2855 env
->ir
[IR_V0
] = (trapnr
? -sysret
: sysret
);
2856 env
->ir
[IR_A3
] = trapnr
;
2860 /* ??? We can probably elide the code using page_unprotect
2861 that is checking for self-modifying code. Instead we
2862 could simply call tb_flush here. Until we work out the
2863 changes required to turn off the extra write protection,
2864 this can be a no-op. */
2868 /* Handled in the translator for usermode. */
2872 /* Handled in the translator for usermode. */
2876 info
.si_signo
= TARGET_SIGFPE
;
2877 switch (env
->ir
[IR_A0
]) {
2878 case TARGET_GEN_INTOVF
:
2879 info
.si_code
= TARGET_FPE_INTOVF
;
2881 case TARGET_GEN_INTDIV
:
2882 info
.si_code
= TARGET_FPE_INTDIV
;
2884 case TARGET_GEN_FLTOVF
:
2885 info
.si_code
= TARGET_FPE_FLTOVF
;
2887 case TARGET_GEN_FLTUND
:
2888 info
.si_code
= TARGET_FPE_FLTUND
;
2890 case TARGET_GEN_FLTINV
:
2891 info
.si_code
= TARGET_FPE_FLTINV
;
2893 case TARGET_GEN_FLTINE
:
2894 info
.si_code
= TARGET_FPE_FLTRES
;
2896 case TARGET_GEN_ROPRAND
:
2900 info
.si_signo
= TARGET_SIGTRAP
;
2905 info
._sifields
._sigfault
._addr
= env
->pc
;
2906 queue_signal(env
, info
.si_signo
, &info
);
2913 info
.si_signo
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2914 if (info
.si_signo
) {
2915 env
->lock_addr
= -1;
2917 info
.si_code
= TARGET_TRAP_BRKPT
;
2918 queue_signal(env
, info
.si_signo
, &info
);
2923 do_store_exclusive(env
, env
->error_code
, trapnr
- EXCP_STL_C
);
2925 case EXCP_INTERRUPT
:
2926 /* Just indicate that signals should be handled asap. */
2929 printf ("Unhandled trap: 0x%x\n", trapnr
);
2930 cpu_dump_state(env
, stderr
, fprintf
, 0);
2933 process_pending_signals (env
);
2936 #endif /* TARGET_ALPHA */
2939 void cpu_loop(CPUS390XState
*env
)
2942 target_siginfo_t info
;
2945 trapnr
= cpu_s390x_exec (env
);
2948 case EXCP_INTERRUPT
:
2949 /* just indicate that signals should be handled asap */
2955 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2957 info
.si_signo
= sig
;
2959 info
.si_code
= TARGET_TRAP_BRKPT
;
2960 queue_signal(env
, info
.si_signo
, &info
);
2966 int n
= env
->int_svc_code
;
2968 /* syscalls > 255 */
2971 env
->psw
.addr
+= env
->int_svc_ilc
;
2972 env
->regs
[2] = do_syscall(env
, n
,
2984 info
.si_signo
= SIGSEGV
;
2986 /* XXX: check env->error_code */
2987 info
.si_code
= TARGET_SEGV_MAPERR
;
2988 info
._sifields
._sigfault
._addr
= env
->__excp_addr
;
2989 queue_signal(env
, info
.si_signo
, &info
);
2994 fprintf(stderr
,"specification exception insn 0x%08x%04x\n", ldl(env
->psw
.addr
), lduw(env
->psw
.addr
+ 4));
2995 info
.si_signo
= SIGILL
;
2997 info
.si_code
= TARGET_ILL_ILLOPC
;
2998 info
._sifields
._sigfault
._addr
= env
->__excp_addr
;
2999 queue_signal(env
, info
.si_signo
, &info
);
3003 printf ("Unhandled trap: 0x%x\n", trapnr
);
3004 cpu_dump_state(env
, stderr
, fprintf
, 0);
3007 process_pending_signals (env
);
3011 #endif /* TARGET_S390X */
3013 THREAD CPUArchState
*thread_env
;
3015 void task_settid(TaskState
*ts
)
3017 if (ts
->ts_tid
== 0) {
3018 #ifdef CONFIG_USE_NPTL
3019 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
3021 /* when no threads are used, tid becomes pid */
3022 ts
->ts_tid
= getpid();
3027 void stop_all_tasks(void)
3030 * We trust that when using NPTL, start_exclusive()
3031 * handles thread stopping correctly.
3036 /* Assumes contents are already zeroed. */
3037 void init_task_state(TaskState
*ts
)
3042 ts
->first_free
= ts
->sigqueue_table
;
3043 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
3044 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
3046 ts
->sigqueue_table
[i
].next
= NULL
;
3049 static void handle_arg_help(const char *arg
)
3054 static void handle_arg_log(const char *arg
)
3057 const CPULogItem
*item
;
3059 mask
= cpu_str_to_log_mask(arg
);
3061 printf("Log items (comma separated):\n");
3062 for (item
= cpu_log_items
; item
->mask
!= 0; item
++) {
3063 printf("%-10s %s\n", item
->name
, item
->help
);
3070 static void handle_arg_log_filename(const char *arg
)
3072 cpu_set_log_filename(arg
);
3075 static void handle_arg_set_env(const char *arg
)
3077 char *r
, *p
, *token
;
3078 r
= p
= strdup(arg
);
3079 while ((token
= strsep(&p
, ",")) != NULL
) {
3080 if (envlist_setenv(envlist
, token
) != 0) {
3087 static void handle_arg_unset_env(const char *arg
)
3089 char *r
, *p
, *token
;
3090 r
= p
= strdup(arg
);
3091 while ((token
= strsep(&p
, ",")) != NULL
) {
3092 if (envlist_unsetenv(envlist
, token
) != 0) {
3099 static void handle_arg_argv0(const char *arg
)
3101 argv0
= strdup(arg
);
3104 static void handle_arg_stack_size(const char *arg
)
3107 guest_stack_size
= strtoul(arg
, &p
, 0);
3108 if (guest_stack_size
== 0) {
3113 guest_stack_size
*= 1024 * 1024;
3114 } else if (*p
== 'k' || *p
== 'K') {
3115 guest_stack_size
*= 1024;
3119 static void handle_arg_ld_prefix(const char *arg
)
3121 interp_prefix
= strdup(arg
);
3124 static void handle_arg_pagesize(const char *arg
)
3126 qemu_host_page_size
= atoi(arg
);
3127 if (qemu_host_page_size
== 0 ||
3128 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
3129 fprintf(stderr
, "page size must be a power of two\n");
3134 static void handle_arg_gdb(const char *arg
)
3136 gdbstub_port
= atoi(arg
);
3139 static void handle_arg_uname(const char *arg
)
3141 qemu_uname_release
= strdup(arg
);
3144 static void handle_arg_cpu(const char *arg
)
3146 cpu_model
= strdup(arg
);
3147 if (cpu_model
== NULL
|| is_help_option(cpu_model
)) {
3148 /* XXX: implement xxx_cpu_list for targets that still miss it */
3149 #if defined(cpu_list)
3150 cpu_list(stdout
, &fprintf
);
3156 #if defined(CONFIG_USE_GUEST_BASE)
3157 static void handle_arg_guest_base(const char *arg
)
3159 guest_base
= strtol(arg
, NULL
, 0);
3160 have_guest_base
= 1;
3163 static void handle_arg_reserved_va(const char *arg
)
3167 reserved_va
= strtoul(arg
, &p
, 0);
3181 unsigned long unshifted
= reserved_va
;
3183 reserved_va
<<= shift
;
3184 if (((reserved_va
>> shift
) != unshifted
)
3185 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3186 || (reserved_va
> (1ul << TARGET_VIRT_ADDR_SPACE_BITS
))
3189 fprintf(stderr
, "Reserved virtual address too big\n");
3194 fprintf(stderr
, "Unrecognised -R size suffix '%s'\n", p
);
3200 static void handle_arg_singlestep(const char *arg
)
3205 static void handle_arg_strace(const char *arg
)
3210 static void handle_arg_version(const char *arg
)
3212 printf("qemu-" TARGET_ARCH
" version " QEMU_VERSION QEMU_PKGVERSION
3213 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
3217 struct qemu_argument
{
3221 void (*handle_opt
)(const char *arg
);
3222 const char *example
;
3226 static const struct qemu_argument arg_table
[] = {
3227 {"h", "", false, handle_arg_help
,
3228 "", "print this help"},
3229 {"g", "QEMU_GDB", true, handle_arg_gdb
,
3230 "port", "wait gdb connection to 'port'"},
3231 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix
,
3232 "path", "set the elf interpreter prefix to 'path'"},
3233 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size
,
3234 "size", "set the stack size to 'size' bytes"},
3235 {"cpu", "QEMU_CPU", true, handle_arg_cpu
,
3236 "model", "select CPU (-cpu help for list)"},
3237 {"E", "QEMU_SET_ENV", true, handle_arg_set_env
,
3238 "var=value", "sets targets environment variable (see below)"},
3239 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env
,
3240 "var", "unsets targets environment variable (see below)"},
3241 {"0", "QEMU_ARGV0", true, handle_arg_argv0
,
3242 "argv0", "forces target process argv[0] to be 'argv0'"},
3243 {"r", "QEMU_UNAME", true, handle_arg_uname
,
3244 "uname", "set qemu uname release string to 'uname'"},
3245 #if defined(CONFIG_USE_GUEST_BASE)
3246 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base
,
3247 "address", "set guest_base address to 'address'"},
3248 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va
,
3249 "size", "reserve 'size' bytes for guest virtual address space"},
3251 {"d", "QEMU_LOG", true, handle_arg_log
,
3252 "options", "activate log"},
3253 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename
,
3254 "logfile", "override default logfile location"},
3255 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize
,
3256 "pagesize", "set the host page size to 'pagesize'"},
3257 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep
,
3258 "", "run in singlestep mode"},
3259 {"strace", "QEMU_STRACE", false, handle_arg_strace
,
3260 "", "log system calls"},
3261 {"version", "QEMU_VERSION", false, handle_arg_version
,
3262 "", "display version information and exit"},
3263 {NULL
, NULL
, false, NULL
, NULL
, NULL
}
3266 static void usage(void)
3268 const struct qemu_argument
*arginfo
;
3272 printf("usage: qemu-" TARGET_ARCH
" [options] program [arguments...]\n"
3273 "Linux CPU emulator (compiled for " TARGET_ARCH
" emulation)\n"
3275 "Options and associated environment variables:\n"
3278 maxarglen
= maxenvlen
= 0;
3280 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3281 if (strlen(arginfo
->env
) > maxenvlen
) {
3282 maxenvlen
= strlen(arginfo
->env
);
3284 if (strlen(arginfo
->argv
) > maxarglen
) {
3285 maxarglen
= strlen(arginfo
->argv
);
3289 printf("%-*s%-*sDescription\n", maxarglen
+3, "Argument",
3290 maxenvlen
+1, "Env-variable");
3292 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3293 if (arginfo
->has_arg
) {
3294 printf("-%s %-*s %-*s %s\n", arginfo
->argv
,
3295 (int)(maxarglen
-strlen(arginfo
->argv
)), arginfo
->example
,
3296 maxenvlen
, arginfo
->env
, arginfo
->help
);
3298 printf("-%-*s %-*s %s\n", maxarglen
+1, arginfo
->argv
,
3299 maxenvlen
, arginfo
->env
,
3306 "QEMU_LD_PREFIX = %s\n"
3307 "QEMU_STACK_SIZE = %ld byte\n"
3314 "You can use -E and -U options or the QEMU_SET_ENV and\n"
3315 "QEMU_UNSET_ENV environment variables to set and unset\n"
3316 "environment variables for the target process.\n"
3317 "It is possible to provide several variables by separating them\n"
3318 "by commas in getsubopt(3) style. Additionally it is possible to\n"
3319 "provide the -E and -U options multiple times.\n"
3320 "The following lines are equivalent:\n"
3321 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
3322 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
3323 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
3324 "Note that if you provide several changes to a single variable\n"
3325 "the last change will stay in effect.\n");
3330 static int parse_args(int argc
, char **argv
)
3334 const struct qemu_argument
*arginfo
;
3336 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3337 if (arginfo
->env
== NULL
) {
3341 r
= getenv(arginfo
->env
);
3343 arginfo
->handle_opt(r
);
3349 if (optind
>= argc
) {
3358 if (!strcmp(r
, "-")) {
3362 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3363 if (!strcmp(r
, arginfo
->argv
)) {
3364 if (arginfo
->has_arg
) {
3365 if (optind
>= argc
) {
3368 arginfo
->handle_opt(argv
[optind
]);
3371 arginfo
->handle_opt(NULL
);
3377 /* no option matched the current argv */
3378 if (arginfo
->handle_opt
== NULL
) {
3383 if (optind
>= argc
) {
3387 filename
= argv
[optind
];
3388 exec_path
= argv
[optind
];
3393 int main(int argc
, char **argv
, char **envp
)
3395 const char *log_file
= DEBUG_LOGFILE
;
3396 struct target_pt_regs regs1
, *regs
= ®s1
;
3397 struct image_info info1
, *info
= &info1
;
3398 struct linux_binprm bprm
;
3402 char **target_environ
, **wrk
;
3408 module_call_init(MODULE_INIT_QOM
);
3410 qemu_cache_utils_init(envp
);
3412 if ((envlist
= envlist_create()) == NULL
) {
3413 (void) fprintf(stderr
, "Unable to allocate envlist\n");
3417 /* add current environment into the list */
3418 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
3419 (void) envlist_setenv(envlist
, *wrk
);
3422 /* Read the stack limit from the kernel. If it's "unlimited",
3423 then we can do little else besides use the default. */
3426 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
3427 && lim
.rlim_cur
!= RLIM_INFINITY
3428 && lim
.rlim_cur
== (target_long
)lim
.rlim_cur
) {
3429 guest_stack_size
= lim
.rlim_cur
;
3434 #if defined(cpudef_setup)
3435 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
3439 cpu_set_log_filename(log_file
);
3440 optind
= parse_args(argc
, argv
);
3443 memset(regs
, 0, sizeof(struct target_pt_regs
));
3445 /* Zero out image_info */
3446 memset(info
, 0, sizeof(struct image_info
));
3448 memset(&bprm
, 0, sizeof (bprm
));
3450 /* Scan interp_prefix dir for replacement files. */
3451 init_paths(interp_prefix
);
3453 if (cpu_model
== NULL
) {
3454 #if defined(TARGET_I386)
3455 #ifdef TARGET_X86_64
3456 cpu_model
= "qemu64";
3458 cpu_model
= "qemu32";
3460 #elif defined(TARGET_ARM)
3462 #elif defined(TARGET_UNICORE32)
3464 #elif defined(TARGET_M68K)
3466 #elif defined(TARGET_SPARC)
3467 #ifdef TARGET_SPARC64
3468 cpu_model
= "TI UltraSparc II";
3470 cpu_model
= "Fujitsu MB86904";
3472 #elif defined(TARGET_MIPS)
3473 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3478 #elif defined TARGET_OPENRISC
3479 cpu_model
= "or1200";
3480 #elif defined(TARGET_PPC)
3482 cpu_model
= "970fx";
3491 cpu_exec_init_all();
3492 /* NOTE: we need to init the CPU at this stage to get
3493 qemu_host_page_size */
3494 env
= cpu_init(cpu_model
);
3496 fprintf(stderr
, "Unable to find CPU definition\n");
3499 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
3500 cpu_reset(ENV_GET_CPU(env
));
3505 if (getenv("QEMU_STRACE")) {
3509 target_environ
= envlist_to_environ(envlist
, NULL
);
3510 envlist_free(envlist
);
3512 #if defined(CONFIG_USE_GUEST_BASE)
3514 * Now that page sizes are configured in cpu_init() we can do
3515 * proper page alignment for guest_base.
3517 guest_base
= HOST_PAGE_ALIGN(guest_base
);
3519 if (reserved_va
|| have_guest_base
) {
3520 guest_base
= init_guest_space(guest_base
, reserved_va
, 0,
3522 if (guest_base
== (unsigned long)-1) {
3523 fprintf(stderr
, "Unable to reserve 0x%lx bytes of virtual address "
3524 "space for use as guest address space (check your virtual "
3525 "memory ulimit setting or reserve less using -R option)\n",
3531 mmap_next_start
= reserved_va
;
3534 #endif /* CONFIG_USE_GUEST_BASE */
3537 * Read in mmap_min_addr kernel parameter. This value is used
3538 * When loading the ELF image to determine whether guest_base
3539 * is needed. It is also used in mmap_find_vma.
3544 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
3546 if (fscanf(fp
, "%lu", &tmp
) == 1) {
3547 mmap_min_addr
= tmp
;
3548 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr
);
3555 * Prepare copy of argv vector for target.
3557 target_argc
= argc
- optind
;
3558 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
3559 if (target_argv
== NULL
) {
3560 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
3565 * If argv0 is specified (using '-0' switch) we replace
3566 * argv[0] pointer with the given one.
3569 if (argv0
!= NULL
) {
3570 target_argv
[i
++] = strdup(argv0
);
3572 for (; i
< target_argc
; i
++) {
3573 target_argv
[i
] = strdup(argv
[optind
+ i
]);
3575 target_argv
[target_argc
] = NULL
;
3577 ts
= g_malloc0 (sizeof(TaskState
));
3578 init_task_state(ts
);
3579 /* build Task State */
3585 ret
= loader_exec(filename
, target_argv
, target_environ
, regs
,
3588 printf("Error while loading %s: %s\n", filename
, strerror(-ret
));
3592 for (wrk
= target_environ
; *wrk
; wrk
++) {
3596 free(target_environ
);
3598 if (qemu_log_enabled()) {
3599 #if defined(CONFIG_USE_GUEST_BASE)
3600 qemu_log("guest_base 0x%lx\n", guest_base
);
3604 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
3605 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
3606 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n",
3608 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n",
3610 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
3611 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n",
3613 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
3614 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
3617 target_set_brk(info
->brk
);
3621 #if defined(CONFIG_USE_GUEST_BASE)
3622 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3623 generating the prologue until now so that the prologue can take
3624 the real value of GUEST_BASE into account. */
3625 tcg_prologue_init(&tcg_ctx
);
3628 #if defined(TARGET_I386)
3629 cpu_x86_set_cpl(env
, 3);
3631 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
3632 env
->hflags
|= HF_PE_MASK
;
3633 if (env
->cpuid_features
& CPUID_SSE
) {
3634 env
->cr
[4] |= CR4_OSFXSR_MASK
;
3635 env
->hflags
|= HF_OSFXSR_MASK
;
3637 #ifndef TARGET_ABI32
3638 /* enable 64 bit mode if possible */
3639 if (!(env
->cpuid_ext2_features
& CPUID_EXT2_LM
)) {
3640 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
3643 env
->cr
[4] |= CR4_PAE_MASK
;
3644 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
3645 env
->hflags
|= HF_LMA_MASK
;
3648 /* flags setup : we activate the IRQs by default as in user mode */
3649 env
->eflags
|= IF_MASK
;
3651 /* linux register setup */
3652 #ifndef TARGET_ABI32
3653 env
->regs
[R_EAX
] = regs
->rax
;
3654 env
->regs
[R_EBX
] = regs
->rbx
;
3655 env
->regs
[R_ECX
] = regs
->rcx
;
3656 env
->regs
[R_EDX
] = regs
->rdx
;
3657 env
->regs
[R_ESI
] = regs
->rsi
;
3658 env
->regs
[R_EDI
] = regs
->rdi
;
3659 env
->regs
[R_EBP
] = regs
->rbp
;
3660 env
->regs
[R_ESP
] = regs
->rsp
;
3661 env
->eip
= regs
->rip
;
3663 env
->regs
[R_EAX
] = regs
->eax
;
3664 env
->regs
[R_EBX
] = regs
->ebx
;
3665 env
->regs
[R_ECX
] = regs
->ecx
;
3666 env
->regs
[R_EDX
] = regs
->edx
;
3667 env
->regs
[R_ESI
] = regs
->esi
;
3668 env
->regs
[R_EDI
] = regs
->edi
;
3669 env
->regs
[R_EBP
] = regs
->ebp
;
3670 env
->regs
[R_ESP
] = regs
->esp
;
3671 env
->eip
= regs
->eip
;
3674 /* linux interrupt setup */
3675 #ifndef TARGET_ABI32
3676 env
->idt
.limit
= 511;
3678 env
->idt
.limit
= 255;
3680 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
3681 PROT_READ
|PROT_WRITE
,
3682 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3683 idt_table
= g2h(env
->idt
.base
);
3706 /* linux segment setup */
3708 uint64_t *gdt_table
;
3709 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
3710 PROT_READ
|PROT_WRITE
,
3711 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3712 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
3713 gdt_table
= g2h(env
->gdt
.base
);
3715 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3716 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3717 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3719 /* 64 bit code segment */
3720 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3721 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3723 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3725 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
3726 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3727 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
3729 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
3730 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
3732 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
3733 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
3734 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
3735 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
3736 /* This hack makes Wine work... */
3737 env
->segs
[R_FS
].selector
= 0;
3739 cpu_x86_load_seg(env
, R_DS
, 0);
3740 cpu_x86_load_seg(env
, R_ES
, 0);
3741 cpu_x86_load_seg(env
, R_FS
, 0);
3742 cpu_x86_load_seg(env
, R_GS
, 0);
3744 #elif defined(TARGET_ARM)
3747 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
3748 for(i
= 0; i
< 16; i
++) {
3749 env
->regs
[i
] = regs
->uregs
[i
];
3752 if (EF_ARM_EABI_VERSION(info
->elf_flags
) >= EF_ARM_EABI_VER4
3753 && (info
->elf_flags
& EF_ARM_BE8
)) {
3754 env
->bswap_code
= 1;
3757 #elif defined(TARGET_UNICORE32)
3760 cpu_asr_write(env
, regs
->uregs
[32], 0xffffffff);
3761 for (i
= 0; i
< 32; i
++) {
3762 env
->regs
[i
] = regs
->uregs
[i
];
3765 #elif defined(TARGET_SPARC)
3769 env
->npc
= regs
->npc
;
3771 for(i
= 0; i
< 8; i
++)
3772 env
->gregs
[i
] = regs
->u_regs
[i
];
3773 for(i
= 0; i
< 8; i
++)
3774 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
3776 #elif defined(TARGET_PPC)
3780 #if defined(TARGET_PPC64)
3781 #if defined(TARGET_ABI32)
3782 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
3784 env
->msr
|= (target_ulong
)1 << MSR_SF
;
3787 env
->nip
= regs
->nip
;
3788 for(i
= 0; i
< 32; i
++) {
3789 env
->gpr
[i
] = regs
->gpr
[i
];
3792 #elif defined(TARGET_M68K)
3795 env
->dregs
[0] = regs
->d0
;
3796 env
->dregs
[1] = regs
->d1
;
3797 env
->dregs
[2] = regs
->d2
;
3798 env
->dregs
[3] = regs
->d3
;
3799 env
->dregs
[4] = regs
->d4
;
3800 env
->dregs
[5] = regs
->d5
;
3801 env
->dregs
[6] = regs
->d6
;
3802 env
->dregs
[7] = regs
->d7
;
3803 env
->aregs
[0] = regs
->a0
;
3804 env
->aregs
[1] = regs
->a1
;
3805 env
->aregs
[2] = regs
->a2
;
3806 env
->aregs
[3] = regs
->a3
;
3807 env
->aregs
[4] = regs
->a4
;
3808 env
->aregs
[5] = regs
->a5
;
3809 env
->aregs
[6] = regs
->a6
;
3810 env
->aregs
[7] = regs
->usp
;
3812 ts
->sim_syscalls
= 1;
3814 #elif defined(TARGET_MICROBLAZE)
3816 env
->regs
[0] = regs
->r0
;
3817 env
->regs
[1] = regs
->r1
;
3818 env
->regs
[2] = regs
->r2
;
3819 env
->regs
[3] = regs
->r3
;
3820 env
->regs
[4] = regs
->r4
;
3821 env
->regs
[5] = regs
->r5
;
3822 env
->regs
[6] = regs
->r6
;
3823 env
->regs
[7] = regs
->r7
;
3824 env
->regs
[8] = regs
->r8
;
3825 env
->regs
[9] = regs
->r9
;
3826 env
->regs
[10] = regs
->r10
;
3827 env
->regs
[11] = regs
->r11
;
3828 env
->regs
[12] = regs
->r12
;
3829 env
->regs
[13] = regs
->r13
;
3830 env
->regs
[14] = regs
->r14
;
3831 env
->regs
[15] = regs
->r15
;
3832 env
->regs
[16] = regs
->r16
;
3833 env
->regs
[17] = regs
->r17
;
3834 env
->regs
[18] = regs
->r18
;
3835 env
->regs
[19] = regs
->r19
;
3836 env
->regs
[20] = regs
->r20
;
3837 env
->regs
[21] = regs
->r21
;
3838 env
->regs
[22] = regs
->r22
;
3839 env
->regs
[23] = regs
->r23
;
3840 env
->regs
[24] = regs
->r24
;
3841 env
->regs
[25] = regs
->r25
;
3842 env
->regs
[26] = regs
->r26
;
3843 env
->regs
[27] = regs
->r27
;
3844 env
->regs
[28] = regs
->r28
;
3845 env
->regs
[29] = regs
->r29
;
3846 env
->regs
[30] = regs
->r30
;
3847 env
->regs
[31] = regs
->r31
;
3848 env
->sregs
[SR_PC
] = regs
->pc
;
3850 #elif defined(TARGET_MIPS)
3854 for(i
= 0; i
< 32; i
++) {
3855 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
3857 env
->active_tc
.PC
= regs
->cp0_epc
& ~(target_ulong
)1;
3858 if (regs
->cp0_epc
& 1) {
3859 env
->hflags
|= MIPS_HFLAG_M16
;
3862 #elif defined(TARGET_OPENRISC)
3866 for (i
= 0; i
< 32; i
++) {
3867 env
->gpr
[i
] = regs
->gpr
[i
];
3873 #elif defined(TARGET_SH4)
3877 for(i
= 0; i
< 16; i
++) {
3878 env
->gregs
[i
] = regs
->regs
[i
];
3882 #elif defined(TARGET_ALPHA)
3886 for(i
= 0; i
< 28; i
++) {
3887 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
3889 env
->ir
[IR_SP
] = regs
->usp
;
3892 #elif defined(TARGET_CRIS)
3894 env
->regs
[0] = regs
->r0
;
3895 env
->regs
[1] = regs
->r1
;
3896 env
->regs
[2] = regs
->r2
;
3897 env
->regs
[3] = regs
->r3
;
3898 env
->regs
[4] = regs
->r4
;
3899 env
->regs
[5] = regs
->r5
;
3900 env
->regs
[6] = regs
->r6
;
3901 env
->regs
[7] = regs
->r7
;
3902 env
->regs
[8] = regs
->r8
;
3903 env
->regs
[9] = regs
->r9
;
3904 env
->regs
[10] = regs
->r10
;
3905 env
->regs
[11] = regs
->r11
;
3906 env
->regs
[12] = regs
->r12
;
3907 env
->regs
[13] = regs
->r13
;
3908 env
->regs
[14] = info
->start_stack
;
3909 env
->regs
[15] = regs
->acr
;
3910 env
->pc
= regs
->erp
;
3912 #elif defined(TARGET_S390X)
3915 for (i
= 0; i
< 16; i
++) {
3916 env
->regs
[i
] = regs
->gprs
[i
];
3918 env
->psw
.mask
= regs
->psw
.mask
;
3919 env
->psw
.addr
= regs
->psw
.addr
;
3922 #error unsupported target CPU
3925 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
3926 ts
->stack_base
= info
->start_stack
;
3927 ts
->heap_base
= info
->brk
;
3928 /* This will be filled in on the first SYS_HEAPINFO call. */
3933 if (gdbserver_start(gdbstub_port
) < 0) {
3934 fprintf(stderr
, "qemu: could not open gdbserver on port %d\n",
3938 gdb_handlesig(env
, 0);