4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
30 #include "qemu-common.h"
31 #include "qemu/cache-utils.h"
34 #include "qemu/timer.h"
35 #include "qemu/envlist.h"
45 const char *cpu_model
;
46 unsigned long mmap_min_addr
;
47 #if defined(CONFIG_USE_GUEST_BASE)
48 unsigned long guest_base
;
50 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
52 * When running 32-on-64 we should make sure we can fit all of the possible
53 * guest address space into a contiguous chunk of virtual host memory.
55 * This way we will never overlap with our own libraries or binaries or stack
56 * or anything else that QEMU maps.
59 /* MIPS only supports 31 bits of virtual address space for user space */
60 unsigned long reserved_va
= 0x77000000;
62 unsigned long reserved_va
= 0xf7000000;
65 unsigned long reserved_va
;
69 static void usage(void);
71 static const char *interp_prefix
= CONFIG_QEMU_INTERP_PREFIX
;
72 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
74 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
75 we allocate a bigger stack. Need a better solution, for example
76 by remapping the process stack directly at the right place */
77 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
79 void gemu_log(const char *fmt
, ...)
84 vfprintf(stderr
, fmt
, ap
);
88 #if defined(TARGET_I386)
89 int cpu_get_pic_interrupt(CPUX86State
*env
)
95 #if defined(CONFIG_USE_NPTL)
96 /***********************************************************/
97 /* Helper routines for implementing atomic operations. */
99 /* To implement exclusive operations we force all cpus to syncronise.
100 We don't require a full sync, only that no cpus are executing guest code.
101 The alternative is to map target atomic ops onto host equivalents,
102 which requires quite a lot of per host/target work. */
103 static pthread_mutex_t cpu_list_mutex
= PTHREAD_MUTEX_INITIALIZER
;
104 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
105 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
106 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
107 static int pending_cpus
;
109 /* Make sure everything is in a consistent state for calling fork(). */
110 void fork_start(void)
112 pthread_mutex_lock(&tcg_ctx
.tb_ctx
.tb_lock
);
113 pthread_mutex_lock(&exclusive_lock
);
117 void fork_end(int child
)
119 mmap_fork_end(child
);
121 /* Child processes created by fork() only have a single thread.
122 Discard information about the parent threads. */
123 first_cpu
= thread_env
;
124 thread_env
->next_cpu
= NULL
;
126 pthread_mutex_init(&exclusive_lock
, NULL
);
127 pthread_mutex_init(&cpu_list_mutex
, NULL
);
128 pthread_cond_init(&exclusive_cond
, NULL
);
129 pthread_cond_init(&exclusive_resume
, NULL
);
130 pthread_mutex_init(&tcg_ctx
.tb_ctx
.tb_lock
, NULL
);
131 gdbserver_fork(thread_env
);
133 pthread_mutex_unlock(&exclusive_lock
);
134 pthread_mutex_unlock(&tcg_ctx
.tb_ctx
.tb_lock
);
138 /* Wait for pending exclusive operations to complete. The exclusive lock
140 static inline void exclusive_idle(void)
142 while (pending_cpus
) {
143 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
147 /* Start an exclusive operation.
148 Must only be called from outside cpu_arm_exec. */
149 static inline void start_exclusive(void)
154 pthread_mutex_lock(&exclusive_lock
);
158 /* Make all other cpus stop executing. */
159 for (other
= first_cpu
; other
; other
= other
->next_cpu
) {
160 other_cpu
= ENV_GET_CPU(other
);
161 if (other_cpu
->running
) {
166 if (pending_cpus
> 1) {
167 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
171 /* Finish an exclusive operation. */
172 static inline void end_exclusive(void)
175 pthread_cond_broadcast(&exclusive_resume
);
176 pthread_mutex_unlock(&exclusive_lock
);
179 /* Wait for exclusive ops to finish, and begin cpu execution. */
180 static inline void cpu_exec_start(CPUState
*cpu
)
182 pthread_mutex_lock(&exclusive_lock
);
185 pthread_mutex_unlock(&exclusive_lock
);
188 /* Mark cpu as not executing, and release pending exclusive ops. */
189 static inline void cpu_exec_end(CPUState
*cpu
)
191 pthread_mutex_lock(&exclusive_lock
);
192 cpu
->running
= false;
193 if (pending_cpus
> 1) {
195 if (pending_cpus
== 1) {
196 pthread_cond_signal(&exclusive_cond
);
200 pthread_mutex_unlock(&exclusive_lock
);
203 void cpu_list_lock(void)
205 pthread_mutex_lock(&cpu_list_mutex
);
208 void cpu_list_unlock(void)
210 pthread_mutex_unlock(&cpu_list_mutex
);
212 #else /* if !CONFIG_USE_NPTL */
213 /* These are no-ops because we are not threadsafe. */
214 static inline void cpu_exec_start(CPUState
*cpu
)
218 static inline void cpu_exec_end(CPUState
*cpu
)
222 static inline void start_exclusive(void)
226 static inline void end_exclusive(void)
230 void fork_start(void)
234 void fork_end(int child
)
237 gdbserver_fork(thread_env
);
241 void cpu_list_lock(void)
245 void cpu_list_unlock(void)
252 /***********************************************************/
253 /* CPUX86 core interface */
255 void cpu_smm_update(CPUX86State
*env
)
259 uint64_t cpu_get_tsc(CPUX86State
*env
)
261 return cpu_get_real_ticks();
264 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
269 e1
= (addr
<< 16) | (limit
& 0xffff);
270 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
277 static uint64_t *idt_table
;
279 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
280 uint64_t addr
, unsigned int sel
)
283 e1
= (addr
& 0xffff) | (sel
<< 16);
284 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
288 p
[2] = tswap32(addr
>> 32);
291 /* only dpl matters as we do only user space emulation */
292 static void set_idt(int n
, unsigned int dpl
)
294 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
297 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
298 uint32_t addr
, unsigned int sel
)
301 e1
= (addr
& 0xffff) | (sel
<< 16);
302 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
308 /* only dpl matters as we do only user space emulation */
309 static void set_idt(int n
, unsigned int dpl
)
311 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
315 void cpu_loop(CPUX86State
*env
)
319 target_siginfo_t info
;
322 trapnr
= cpu_x86_exec(env
);
325 /* linux syscall from int $0x80 */
326 env
->regs
[R_EAX
] = do_syscall(env
,
338 /* linux syscall from syscall instruction */
339 env
->regs
[R_EAX
] = do_syscall(env
,
348 env
->eip
= env
->exception_next_eip
;
353 info
.si_signo
= SIGBUS
;
355 info
.si_code
= TARGET_SI_KERNEL
;
356 info
._sifields
._sigfault
._addr
= 0;
357 queue_signal(env
, info
.si_signo
, &info
);
360 /* XXX: potential problem if ABI32 */
361 #ifndef TARGET_X86_64
362 if (env
->eflags
& VM_MASK
) {
363 handle_vm86_fault(env
);
367 info
.si_signo
= SIGSEGV
;
369 info
.si_code
= TARGET_SI_KERNEL
;
370 info
._sifields
._sigfault
._addr
= 0;
371 queue_signal(env
, info
.si_signo
, &info
);
375 info
.si_signo
= SIGSEGV
;
377 if (!(env
->error_code
& 1))
378 info
.si_code
= TARGET_SEGV_MAPERR
;
380 info
.si_code
= TARGET_SEGV_ACCERR
;
381 info
._sifields
._sigfault
._addr
= env
->cr
[2];
382 queue_signal(env
, info
.si_signo
, &info
);
385 #ifndef TARGET_X86_64
386 if (env
->eflags
& VM_MASK
) {
387 handle_vm86_trap(env
, trapnr
);
391 /* division by zero */
392 info
.si_signo
= SIGFPE
;
394 info
.si_code
= TARGET_FPE_INTDIV
;
395 info
._sifields
._sigfault
._addr
= env
->eip
;
396 queue_signal(env
, info
.si_signo
, &info
);
401 #ifndef TARGET_X86_64
402 if (env
->eflags
& VM_MASK
) {
403 handle_vm86_trap(env
, trapnr
);
407 info
.si_signo
= SIGTRAP
;
409 if (trapnr
== EXCP01_DB
) {
410 info
.si_code
= TARGET_TRAP_BRKPT
;
411 info
._sifields
._sigfault
._addr
= env
->eip
;
413 info
.si_code
= TARGET_SI_KERNEL
;
414 info
._sifields
._sigfault
._addr
= 0;
416 queue_signal(env
, info
.si_signo
, &info
);
421 #ifndef TARGET_X86_64
422 if (env
->eflags
& VM_MASK
) {
423 handle_vm86_trap(env
, trapnr
);
427 info
.si_signo
= SIGSEGV
;
429 info
.si_code
= TARGET_SI_KERNEL
;
430 info
._sifields
._sigfault
._addr
= 0;
431 queue_signal(env
, info
.si_signo
, &info
);
435 info
.si_signo
= SIGILL
;
437 info
.si_code
= TARGET_ILL_ILLOPN
;
438 info
._sifields
._sigfault
._addr
= env
->eip
;
439 queue_signal(env
, info
.si_signo
, &info
);
442 /* just indicate that signals should be handled asap */
448 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
453 info
.si_code
= TARGET_TRAP_BRKPT
;
454 queue_signal(env
, info
.si_signo
, &info
);
459 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
460 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
464 process_pending_signals(env
);
471 #define get_user_code_u32(x, gaddr, doswap) \
472 ({ abi_long __r = get_user_u32((x), (gaddr)); \
473 if (!__r && (doswap)) { \
479 #define get_user_code_u16(x, gaddr, doswap) \
480 ({ abi_long __r = get_user_u16((x), (gaddr)); \
481 if (!__r && (doswap)) { \
488 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
490 * r0 = pointer to oldval
491 * r1 = pointer to newval
492 * r2 = pointer to target value
495 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
496 * C set if *ptr was changed, clear if no exchange happened
498 * Note segv's in kernel helpers are a bit tricky, we can set the
499 * data address sensibly but the PC address is just the entry point.
501 static void arm_kernel_cmpxchg64_helper(CPUARMState
*env
)
503 uint64_t oldval
, newval
, val
;
505 target_siginfo_t info
;
507 /* Based on the 32 bit code in do_kernel_trap */
509 /* XXX: This only works between threads, not between processes.
510 It's probably possible to implement this with native host
511 operations. However things like ldrex/strex are much harder so
512 there's not much point trying. */
514 cpsr
= cpsr_read(env
);
517 if (get_user_u64(oldval
, env
->regs
[0])) {
518 env
->cp15
.c6_data
= env
->regs
[0];
522 if (get_user_u64(newval
, env
->regs
[1])) {
523 env
->cp15
.c6_data
= env
->regs
[1];
527 if (get_user_u64(val
, addr
)) {
528 env
->cp15
.c6_data
= addr
;
535 if (put_user_u64(val
, addr
)) {
536 env
->cp15
.c6_data
= addr
;
546 cpsr_write(env
, cpsr
, CPSR_C
);
552 /* We get the PC of the entry address - which is as good as anything,
553 on a real kernel what you get depends on which mode it uses. */
554 info
.si_signo
= SIGSEGV
;
556 /* XXX: check env->error_code */
557 info
.si_code
= TARGET_SEGV_MAPERR
;
558 info
._sifields
._sigfault
._addr
= env
->cp15
.c6_data
;
559 queue_signal(env
, info
.si_signo
, &info
);
564 /* Handle a jump to the kernel code page. */
566 do_kernel_trap(CPUARMState
*env
)
572 switch (env
->regs
[15]) {
573 case 0xffff0fa0: /* __kernel_memory_barrier */
574 /* ??? No-op. Will need to do better for SMP. */
576 case 0xffff0fc0: /* __kernel_cmpxchg */
577 /* XXX: This only works between threads, not between processes.
578 It's probably possible to implement this with native host
579 operations. However things like ldrex/strex are much harder so
580 there's not much point trying. */
582 cpsr
= cpsr_read(env
);
584 /* FIXME: This should SEGV if the access fails. */
585 if (get_user_u32(val
, addr
))
587 if (val
== env
->regs
[0]) {
589 /* FIXME: Check for segfaults. */
590 put_user_u32(val
, addr
);
597 cpsr_write(env
, cpsr
, CPSR_C
);
600 case 0xffff0fe0: /* __kernel_get_tls */
601 env
->regs
[0] = env
->cp15
.c13_tls2
;
603 case 0xffff0f60: /* __kernel_cmpxchg64 */
604 arm_kernel_cmpxchg64_helper(env
);
610 /* Jump back to the caller. */
611 addr
= env
->regs
[14];
616 env
->regs
[15] = addr
;
621 static int do_strex(CPUARMState
*env
)
629 addr
= env
->exclusive_addr
;
630 if (addr
!= env
->exclusive_test
) {
633 size
= env
->exclusive_info
& 0xf;
636 segv
= get_user_u8(val
, addr
);
639 segv
= get_user_u16(val
, addr
);
643 segv
= get_user_u32(val
, addr
);
649 env
->cp15
.c6_data
= addr
;
652 if (val
!= env
->exclusive_val
) {
656 segv
= get_user_u32(val
, addr
+ 4);
658 env
->cp15
.c6_data
= addr
+ 4;
661 if (val
!= env
->exclusive_high
) {
665 val
= env
->regs
[(env
->exclusive_info
>> 8) & 0xf];
668 segv
= put_user_u8(val
, addr
);
671 segv
= put_user_u16(val
, addr
);
675 segv
= put_user_u32(val
, addr
);
679 env
->cp15
.c6_data
= addr
;
683 val
= env
->regs
[(env
->exclusive_info
>> 12) & 0xf];
684 segv
= put_user_u32(val
, addr
+ 4);
686 env
->cp15
.c6_data
= addr
+ 4;
693 env
->regs
[(env
->exclusive_info
>> 4) & 0xf] = rc
;
699 void cpu_loop(CPUARMState
*env
)
701 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
703 unsigned int n
, insn
;
704 target_siginfo_t info
;
709 trapnr
= cpu_arm_exec(env
);
714 TaskState
*ts
= env
->opaque
;
718 /* we handle the FPU emulation here, as Linux */
719 /* we get the opcode */
720 /* FIXME - what to do if get_user() fails? */
721 get_user_code_u32(opcode
, env
->regs
[15], env
->bswap_code
);
723 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
724 if (rc
== 0) { /* illegal instruction */
725 info
.si_signo
= SIGILL
;
727 info
.si_code
= TARGET_ILL_ILLOPN
;
728 info
._sifields
._sigfault
._addr
= env
->regs
[15];
729 queue_signal(env
, info
.si_signo
, &info
);
730 } else if (rc
< 0) { /* FP exception */
733 /* translate softfloat flags to FPSR flags */
734 if (-rc
& float_flag_invalid
)
736 if (-rc
& float_flag_divbyzero
)
738 if (-rc
& float_flag_overflow
)
740 if (-rc
& float_flag_underflow
)
742 if (-rc
& float_flag_inexact
)
745 FPSR fpsr
= ts
->fpa
.fpsr
;
746 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
748 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
749 info
.si_signo
= SIGFPE
;
752 /* ordered by priority, least first */
753 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
754 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
755 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
756 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
757 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
759 info
._sifields
._sigfault
._addr
= env
->regs
[15];
760 queue_signal(env
, info
.si_signo
, &info
);
765 /* accumulate unenabled exceptions */
766 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
768 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
770 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
772 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
774 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
777 } else { /* everything OK */
788 if (trapnr
== EXCP_BKPT
) {
790 /* FIXME - what to do if get_user() fails? */
791 get_user_code_u16(insn
, env
->regs
[15], env
->bswap_code
);
795 /* FIXME - what to do if get_user() fails? */
796 get_user_code_u32(insn
, env
->regs
[15], env
->bswap_code
);
797 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
802 /* FIXME - what to do if get_user() fails? */
803 get_user_code_u16(insn
, env
->regs
[15] - 2,
807 /* FIXME - what to do if get_user() fails? */
808 get_user_code_u32(insn
, env
->regs
[15] - 4,
814 if (n
== ARM_NR_cacheflush
) {
816 } else if (n
== ARM_NR_semihosting
817 || n
== ARM_NR_thumb_semihosting
) {
818 env
->regs
[0] = do_arm_semihosting (env
);
819 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
|| env
->thumb
) {
821 if (env
->thumb
|| n
== 0) {
824 n
-= ARM_SYSCALL_BASE
;
827 if ( n
> ARM_NR_BASE
) {
829 case ARM_NR_cacheflush
:
833 cpu_set_tls(env
, env
->regs
[0]);
837 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
839 env
->regs
[0] = -TARGET_ENOSYS
;
843 env
->regs
[0] = do_syscall(env
,
859 /* just indicate that signals should be handled asap */
861 case EXCP_PREFETCH_ABORT
:
862 addr
= env
->cp15
.c6_insn
;
864 case EXCP_DATA_ABORT
:
865 addr
= env
->cp15
.c6_data
;
868 info
.si_signo
= SIGSEGV
;
870 /* XXX: check env->error_code */
871 info
.si_code
= TARGET_SEGV_MAPERR
;
872 info
._sifields
._sigfault
._addr
= addr
;
873 queue_signal(env
, info
.si_signo
, &info
);
880 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
885 info
.si_code
= TARGET_TRAP_BRKPT
;
886 queue_signal(env
, info
.si_signo
, &info
);
890 case EXCP_KERNEL_TRAP
:
891 if (do_kernel_trap(env
))
896 addr
= env
->cp15
.c6_data
;
902 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
904 cpu_dump_state(cs
, stderr
, fprintf
, 0);
907 process_pending_signals(env
);
913 #ifdef TARGET_UNICORE32
915 void cpu_loop(CPUUniCore32State
*env
)
917 CPUState
*cs
= CPU(uc32_env_get_cpu(env
));
919 unsigned int n
, insn
;
920 target_siginfo_t info
;
924 trapnr
= uc32_cpu_exec(env
);
930 get_user_u32(insn
, env
->regs
[31] - 4);
933 if (n
>= UC32_SYSCALL_BASE
) {
935 n
-= UC32_SYSCALL_BASE
;
936 if (n
== UC32_SYSCALL_NR_set_tls
) {
937 cpu_set_tls(env
, env
->regs
[0]);
940 env
->regs
[0] = do_syscall(env
,
955 case UC32_EXCP_DTRAP
:
956 case UC32_EXCP_ITRAP
:
957 info
.si_signo
= SIGSEGV
;
959 /* XXX: check env->error_code */
960 info
.si_code
= TARGET_SEGV_MAPERR
;
961 info
._sifields
._sigfault
._addr
= env
->cp0
.c4_faultaddr
;
962 queue_signal(env
, info
.si_signo
, &info
);
965 /* just indicate that signals should be handled asap */
971 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
975 info
.si_code
= TARGET_TRAP_BRKPT
;
976 queue_signal(env
, info
.si_signo
, &info
);
983 process_pending_signals(env
);
987 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
988 cpu_dump_state(cs
, stderr
, fprintf
, 0);
994 #define SPARC64_STACK_BIAS 2047
998 /* WARNING: dealing with register windows _is_ complicated. More info
999 can be found at http://www.sics.se/~psm/sparcstack.html */
1000 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
1002 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
1003 /* wrap handling : if cwp is on the last window, then we use the
1004 registers 'after' the end */
1005 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
1006 index
+= 16 * env
->nwindows
;
1010 /* save the register window 'cwp1' */
1011 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
1016 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1017 #ifdef TARGET_SPARC64
1019 sp_ptr
+= SPARC64_STACK_BIAS
;
1021 #if defined(DEBUG_WIN)
1022 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
1025 for(i
= 0; i
< 16; i
++) {
1026 /* FIXME - what to do if put_user() fails? */
1027 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1028 sp_ptr
+= sizeof(abi_ulong
);
1032 static void save_window(CPUSPARCState
*env
)
1034 #ifndef TARGET_SPARC64
1035 unsigned int new_wim
;
1036 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
1037 ((1LL << env
->nwindows
) - 1);
1038 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1041 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1047 static void restore_window(CPUSPARCState
*env
)
1049 #ifndef TARGET_SPARC64
1050 unsigned int new_wim
;
1052 unsigned int i
, cwp1
;
1055 #ifndef TARGET_SPARC64
1056 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
1057 ((1LL << env
->nwindows
) - 1);
1060 /* restore the invalid window */
1061 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1062 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1063 #ifdef TARGET_SPARC64
1065 sp_ptr
+= SPARC64_STACK_BIAS
;
1067 #if defined(DEBUG_WIN)
1068 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
1071 for(i
= 0; i
< 16; i
++) {
1072 /* FIXME - what to do if get_user() fails? */
1073 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1074 sp_ptr
+= sizeof(abi_ulong
);
1076 #ifdef TARGET_SPARC64
1078 if (env
->cleanwin
< env
->nwindows
- 1)
1086 static void flush_windows(CPUSPARCState
*env
)
1092 /* if restore would invoke restore_window(), then we can stop */
1093 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
1094 #ifndef TARGET_SPARC64
1095 if (env
->wim
& (1 << cwp1
))
1098 if (env
->canrestore
== 0)
1103 save_window_offset(env
, cwp1
);
1106 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1107 #ifndef TARGET_SPARC64
1108 /* set wim so that restore will reload the registers */
1109 env
->wim
= 1 << cwp1
;
1111 #if defined(DEBUG_WIN)
1112 printf("flush_windows: nb=%d\n", offset
- 1);
1116 void cpu_loop (CPUSPARCState
*env
)
1118 CPUState
*cs
= CPU(sparc_env_get_cpu(env
));
1121 target_siginfo_t info
;
1124 trapnr
= cpu_sparc_exec (env
);
1126 /* Compute PSR before exposing state. */
1127 if (env
->cc_op
!= CC_OP_FLAGS
) {
1132 #ifndef TARGET_SPARC64
1139 ret
= do_syscall (env
, env
->gregs
[1],
1140 env
->regwptr
[0], env
->regwptr
[1],
1141 env
->regwptr
[2], env
->regwptr
[3],
1142 env
->regwptr
[4], env
->regwptr
[5],
1144 if ((abi_ulong
)ret
>= (abi_ulong
)(-515)) {
1145 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1146 env
->xcc
|= PSR_CARRY
;
1148 env
->psr
|= PSR_CARRY
;
1152 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1153 env
->xcc
&= ~PSR_CARRY
;
1155 env
->psr
&= ~PSR_CARRY
;
1158 env
->regwptr
[0] = ret
;
1159 /* next instruction */
1161 env
->npc
= env
->npc
+ 4;
1163 case 0x83: /* flush windows */
1168 /* next instruction */
1170 env
->npc
= env
->npc
+ 4;
1172 #ifndef TARGET_SPARC64
1173 case TT_WIN_OVF
: /* window overflow */
1176 case TT_WIN_UNF
: /* window underflow */
1177 restore_window(env
);
1182 info
.si_signo
= TARGET_SIGSEGV
;
1184 /* XXX: check env->error_code */
1185 info
.si_code
= TARGET_SEGV_MAPERR
;
1186 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1187 queue_signal(env
, info
.si_signo
, &info
);
1191 case TT_SPILL
: /* window overflow */
1194 case TT_FILL
: /* window underflow */
1195 restore_window(env
);
1200 info
.si_signo
= TARGET_SIGSEGV
;
1202 /* XXX: check env->error_code */
1203 info
.si_code
= TARGET_SEGV_MAPERR
;
1204 if (trapnr
== TT_DFAULT
)
1205 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
1207 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1208 queue_signal(env
, info
.si_signo
, &info
);
1211 #ifndef TARGET_ABI32
1214 sparc64_get_context(env
);
1218 sparc64_set_context(env
);
1222 case EXCP_INTERRUPT
:
1223 /* just indicate that signals should be handled asap */
1227 info
.si_signo
= TARGET_SIGILL
;
1229 info
.si_code
= TARGET_ILL_ILLOPC
;
1230 info
._sifields
._sigfault
._addr
= env
->pc
;
1231 queue_signal(env
, info
.si_signo
, &info
);
1238 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1241 info
.si_signo
= sig
;
1243 info
.si_code
= TARGET_TRAP_BRKPT
;
1244 queue_signal(env
, info
.si_signo
, &info
);
1249 printf ("Unhandled trap: 0x%x\n", trapnr
);
1250 cpu_dump_state(cs
, stderr
, fprintf
, 0);
1253 process_pending_signals (env
);
1260 static inline uint64_t cpu_ppc_get_tb(CPUPPCState
*env
)
1266 uint64_t cpu_ppc_load_tbl(CPUPPCState
*env
)
1268 return cpu_ppc_get_tb(env
);
1271 uint32_t cpu_ppc_load_tbu(CPUPPCState
*env
)
1273 return cpu_ppc_get_tb(env
) >> 32;
1276 uint64_t cpu_ppc_load_atbl(CPUPPCState
*env
)
1278 return cpu_ppc_get_tb(env
);
1281 uint32_t cpu_ppc_load_atbu(CPUPPCState
*env
)
1283 return cpu_ppc_get_tb(env
) >> 32;
1286 uint32_t cpu_ppc601_load_rtcu(CPUPPCState
*env
)
1287 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1289 uint32_t cpu_ppc601_load_rtcl(CPUPPCState
*env
)
1291 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1294 /* XXX: to be fixed */
1295 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1300 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1305 #define EXCP_DUMP(env, fmt, ...) \
1307 fprintf(stderr, fmt , ## __VA_ARGS__); \
1308 cpu_dump_state(ENV_GET_CPU(env), stderr, fprintf, 0); \
1309 qemu_log(fmt, ## __VA_ARGS__); \
1310 if (qemu_log_enabled()) { \
1311 log_cpu_state(env, 0); \
1315 static int do_store_exclusive(CPUPPCState
*env
)
1318 target_ulong page_addr
;
1323 addr
= env
->reserve_ea
;
1324 page_addr
= addr
& TARGET_PAGE_MASK
;
1327 flags
= page_get_flags(page_addr
);
1328 if ((flags
& PAGE_READ
) == 0) {
1331 int reg
= env
->reserve_info
& 0x1f;
1332 int size
= (env
->reserve_info
>> 5) & 0xf;
1335 if (addr
== env
->reserve_addr
) {
1337 case 1: segv
= get_user_u8(val
, addr
); break;
1338 case 2: segv
= get_user_u16(val
, addr
); break;
1339 case 4: segv
= get_user_u32(val
, addr
); break;
1340 #if defined(TARGET_PPC64)
1341 case 8: segv
= get_user_u64(val
, addr
); break;
1345 if (!segv
&& val
== env
->reserve_val
) {
1346 val
= env
->gpr
[reg
];
1348 case 1: segv
= put_user_u8(val
, addr
); break;
1349 case 2: segv
= put_user_u16(val
, addr
); break;
1350 case 4: segv
= put_user_u32(val
, addr
); break;
1351 #if defined(TARGET_PPC64)
1352 case 8: segv
= put_user_u64(val
, addr
); break;
1361 env
->crf
[0] = (stored
<< 1) | xer_so
;
1362 env
->reserve_addr
= (target_ulong
)-1;
1372 void cpu_loop(CPUPPCState
*env
)
1374 CPUState
*cs
= CPU(ppc_env_get_cpu(env
));
1375 target_siginfo_t info
;
1381 trapnr
= cpu_ppc_exec(env
);
1384 case POWERPC_EXCP_NONE
:
1387 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1388 cpu_abort(env
, "Critical interrupt while in user mode. "
1391 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1392 cpu_abort(env
, "Machine check exception while in user mode. "
1395 case POWERPC_EXCP_DSI
: /* Data storage exception */
1396 EXCP_DUMP(env
, "Invalid data memory access: 0x" TARGET_FMT_lx
"\n",
1398 /* XXX: check this. Seems bugged */
1399 switch (env
->error_code
& 0xFF000000) {
1401 info
.si_signo
= TARGET_SIGSEGV
;
1403 info
.si_code
= TARGET_SEGV_MAPERR
;
1406 info
.si_signo
= TARGET_SIGILL
;
1408 info
.si_code
= TARGET_ILL_ILLADR
;
1411 info
.si_signo
= TARGET_SIGSEGV
;
1413 info
.si_code
= TARGET_SEGV_ACCERR
;
1416 /* Let's send a regular segfault... */
1417 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1419 info
.si_signo
= TARGET_SIGSEGV
;
1421 info
.si_code
= TARGET_SEGV_MAPERR
;
1424 info
._sifields
._sigfault
._addr
= env
->nip
;
1425 queue_signal(env
, info
.si_signo
, &info
);
1427 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1428 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1429 "\n", env
->spr
[SPR_SRR0
]);
1430 /* XXX: check this */
1431 switch (env
->error_code
& 0xFF000000) {
1433 info
.si_signo
= TARGET_SIGSEGV
;
1435 info
.si_code
= TARGET_SEGV_MAPERR
;
1439 info
.si_signo
= TARGET_SIGSEGV
;
1441 info
.si_code
= TARGET_SEGV_ACCERR
;
1444 /* Let's send a regular segfault... */
1445 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1447 info
.si_signo
= TARGET_SIGSEGV
;
1449 info
.si_code
= TARGET_SEGV_MAPERR
;
1452 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1453 queue_signal(env
, info
.si_signo
, &info
);
1455 case POWERPC_EXCP_EXTERNAL
: /* External input */
1456 cpu_abort(env
, "External interrupt while in user mode. "
1459 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1460 EXCP_DUMP(env
, "Unaligned memory access\n");
1461 /* XXX: check this */
1462 info
.si_signo
= TARGET_SIGBUS
;
1464 info
.si_code
= TARGET_BUS_ADRALN
;
1465 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1466 queue_signal(env
, info
.si_signo
, &info
);
1468 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1469 /* XXX: check this */
1470 switch (env
->error_code
& ~0xF) {
1471 case POWERPC_EXCP_FP
:
1472 EXCP_DUMP(env
, "Floating point program exception\n");
1473 info
.si_signo
= TARGET_SIGFPE
;
1475 switch (env
->error_code
& 0xF) {
1476 case POWERPC_EXCP_FP_OX
:
1477 info
.si_code
= TARGET_FPE_FLTOVF
;
1479 case POWERPC_EXCP_FP_UX
:
1480 info
.si_code
= TARGET_FPE_FLTUND
;
1482 case POWERPC_EXCP_FP_ZX
:
1483 case POWERPC_EXCP_FP_VXZDZ
:
1484 info
.si_code
= TARGET_FPE_FLTDIV
;
1486 case POWERPC_EXCP_FP_XX
:
1487 info
.si_code
= TARGET_FPE_FLTRES
;
1489 case POWERPC_EXCP_FP_VXSOFT
:
1490 info
.si_code
= TARGET_FPE_FLTINV
;
1492 case POWERPC_EXCP_FP_VXSNAN
:
1493 case POWERPC_EXCP_FP_VXISI
:
1494 case POWERPC_EXCP_FP_VXIDI
:
1495 case POWERPC_EXCP_FP_VXIMZ
:
1496 case POWERPC_EXCP_FP_VXVC
:
1497 case POWERPC_EXCP_FP_VXSQRT
:
1498 case POWERPC_EXCP_FP_VXCVI
:
1499 info
.si_code
= TARGET_FPE_FLTSUB
;
1502 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1507 case POWERPC_EXCP_INVAL
:
1508 EXCP_DUMP(env
, "Invalid instruction\n");
1509 info
.si_signo
= TARGET_SIGILL
;
1511 switch (env
->error_code
& 0xF) {
1512 case POWERPC_EXCP_INVAL_INVAL
:
1513 info
.si_code
= TARGET_ILL_ILLOPC
;
1515 case POWERPC_EXCP_INVAL_LSWX
:
1516 info
.si_code
= TARGET_ILL_ILLOPN
;
1518 case POWERPC_EXCP_INVAL_SPR
:
1519 info
.si_code
= TARGET_ILL_PRVREG
;
1521 case POWERPC_EXCP_INVAL_FP
:
1522 info
.si_code
= TARGET_ILL_COPROC
;
1525 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1526 env
->error_code
& 0xF);
1527 info
.si_code
= TARGET_ILL_ILLADR
;
1531 case POWERPC_EXCP_PRIV
:
1532 EXCP_DUMP(env
, "Privilege violation\n");
1533 info
.si_signo
= TARGET_SIGILL
;
1535 switch (env
->error_code
& 0xF) {
1536 case POWERPC_EXCP_PRIV_OPC
:
1537 info
.si_code
= TARGET_ILL_PRVOPC
;
1539 case POWERPC_EXCP_PRIV_REG
:
1540 info
.si_code
= TARGET_ILL_PRVREG
;
1543 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1544 env
->error_code
& 0xF);
1545 info
.si_code
= TARGET_ILL_PRVOPC
;
1549 case POWERPC_EXCP_TRAP
:
1550 cpu_abort(env
, "Tried to call a TRAP\n");
1553 /* Should not happen ! */
1554 cpu_abort(env
, "Unknown program exception (%02x)\n",
1558 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1559 queue_signal(env
, info
.si_signo
, &info
);
1561 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1562 EXCP_DUMP(env
, "No floating point allowed\n");
1563 info
.si_signo
= TARGET_SIGILL
;
1565 info
.si_code
= TARGET_ILL_COPROC
;
1566 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1567 queue_signal(env
, info
.si_signo
, &info
);
1569 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1570 cpu_abort(env
, "Syscall exception while in user mode. "
1573 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1574 EXCP_DUMP(env
, "No APU instruction allowed\n");
1575 info
.si_signo
= TARGET_SIGILL
;
1577 info
.si_code
= TARGET_ILL_COPROC
;
1578 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1579 queue_signal(env
, info
.si_signo
, &info
);
1581 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1582 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1585 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1586 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1589 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1590 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1593 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1594 cpu_abort(env
, "Data TLB exception while in user mode. "
1597 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1598 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1601 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1602 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1603 info
.si_signo
= TARGET_SIGILL
;
1605 info
.si_code
= TARGET_ILL_COPROC
;
1606 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1607 queue_signal(env
, info
.si_signo
, &info
);
1609 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1610 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1612 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1613 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1615 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1616 cpu_abort(env
, "Performance monitor exception not handled\n");
1618 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1619 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1622 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1623 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1626 case POWERPC_EXCP_RESET
: /* System reset exception */
1627 cpu_abort(env
, "Reset interrupt while in user mode. "
1630 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1631 cpu_abort(env
, "Data segment exception while in user mode. "
1634 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1635 cpu_abort(env
, "Instruction segment exception "
1636 "while in user mode. Aborting\n");
1638 /* PowerPC 64 with hypervisor mode support */
1639 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1640 cpu_abort(env
, "Hypervisor decrementer interrupt "
1641 "while in user mode. Aborting\n");
1643 case POWERPC_EXCP_TRACE
: /* Trace exception */
1645 * we use this exception to emulate step-by-step execution mode.
1648 /* PowerPC 64 with hypervisor mode support */
1649 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1650 cpu_abort(env
, "Hypervisor data storage exception "
1651 "while in user mode. Aborting\n");
1653 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1654 cpu_abort(env
, "Hypervisor instruction storage exception "
1655 "while in user mode. Aborting\n");
1657 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1658 cpu_abort(env
, "Hypervisor data segment exception "
1659 "while in user mode. Aborting\n");
1661 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1662 cpu_abort(env
, "Hypervisor instruction segment exception "
1663 "while in user mode. Aborting\n");
1665 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1666 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1667 info
.si_signo
= TARGET_SIGILL
;
1669 info
.si_code
= TARGET_ILL_COPROC
;
1670 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1671 queue_signal(env
, info
.si_signo
, &info
);
1673 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1674 cpu_abort(env
, "Programmable interval timer interrupt "
1675 "while in user mode. Aborting\n");
1677 case POWERPC_EXCP_IO
: /* IO error exception */
1678 cpu_abort(env
, "IO error exception while in user mode. "
1681 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1682 cpu_abort(env
, "Run mode exception while in user mode. "
1685 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1686 cpu_abort(env
, "Emulation trap exception not handled\n");
1688 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1689 cpu_abort(env
, "Instruction fetch TLB exception "
1690 "while in user-mode. Aborting");
1692 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1693 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1696 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1697 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1700 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1701 cpu_abort(env
, "Floating-point assist exception not handled\n");
1703 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1704 cpu_abort(env
, "Instruction address breakpoint exception "
1707 case POWERPC_EXCP_SMI
: /* System management interrupt */
1708 cpu_abort(env
, "System management interrupt while in user mode. "
1711 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1712 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1715 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1716 cpu_abort(env
, "Performance monitor exception not handled\n");
1718 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1719 cpu_abort(env
, "Vector assist exception not handled\n");
1721 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1722 cpu_abort(env
, "Soft patch exception not handled\n");
1724 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1725 cpu_abort(env
, "Maintenance exception while in user mode. "
1728 case POWERPC_EXCP_STOP
: /* stop translation */
1729 /* We did invalidate the instruction cache. Go on */
1731 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1732 /* We just stopped because of a branch. Go on */
1734 case POWERPC_EXCP_SYSCALL_USER
:
1735 /* system call in user-mode emulation */
1737 * PPC ABI uses overflow flag in cr0 to signal an error
1740 env
->crf
[0] &= ~0x1;
1741 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1742 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1744 if (ret
== (target_ulong
)(-TARGET_QEMU_ESIGRETURN
)) {
1745 /* Returning from a successful sigreturn syscall.
1746 Avoid corrupting register state. */
1749 if (ret
> (target_ulong
)(-515)) {
1755 case POWERPC_EXCP_STCX
:
1756 if (do_store_exclusive(env
)) {
1757 info
.si_signo
= TARGET_SIGSEGV
;
1759 info
.si_code
= TARGET_SEGV_MAPERR
;
1760 info
._sifields
._sigfault
._addr
= env
->nip
;
1761 queue_signal(env
, info
.si_signo
, &info
);
1768 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1770 info
.si_signo
= sig
;
1772 info
.si_code
= TARGET_TRAP_BRKPT
;
1773 queue_signal(env
, info
.si_signo
, &info
);
1777 case EXCP_INTERRUPT
:
1778 /* just indicate that signals should be handled asap */
1781 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1784 process_pending_signals(env
);
1791 # ifdef TARGET_ABI_MIPSO32
1792 # define MIPS_SYS(name, args) args,
1793 static const uint8_t mips_syscall_args
[] = {
1794 MIPS_SYS(sys_syscall
, 8) /* 4000 */
1795 MIPS_SYS(sys_exit
, 1)
1796 MIPS_SYS(sys_fork
, 0)
1797 MIPS_SYS(sys_read
, 3)
1798 MIPS_SYS(sys_write
, 3)
1799 MIPS_SYS(sys_open
, 3) /* 4005 */
1800 MIPS_SYS(sys_close
, 1)
1801 MIPS_SYS(sys_waitpid
, 3)
1802 MIPS_SYS(sys_creat
, 2)
1803 MIPS_SYS(sys_link
, 2)
1804 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1805 MIPS_SYS(sys_execve
, 0)
1806 MIPS_SYS(sys_chdir
, 1)
1807 MIPS_SYS(sys_time
, 1)
1808 MIPS_SYS(sys_mknod
, 3)
1809 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1810 MIPS_SYS(sys_lchown
, 3)
1811 MIPS_SYS(sys_ni_syscall
, 0)
1812 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1813 MIPS_SYS(sys_lseek
, 3)
1814 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1815 MIPS_SYS(sys_mount
, 5)
1816 MIPS_SYS(sys_oldumount
, 1)
1817 MIPS_SYS(sys_setuid
, 1)
1818 MIPS_SYS(sys_getuid
, 0)
1819 MIPS_SYS(sys_stime
, 1) /* 4025 */
1820 MIPS_SYS(sys_ptrace
, 4)
1821 MIPS_SYS(sys_alarm
, 1)
1822 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1823 MIPS_SYS(sys_pause
, 0)
1824 MIPS_SYS(sys_utime
, 2) /* 4030 */
1825 MIPS_SYS(sys_ni_syscall
, 0)
1826 MIPS_SYS(sys_ni_syscall
, 0)
1827 MIPS_SYS(sys_access
, 2)
1828 MIPS_SYS(sys_nice
, 1)
1829 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1830 MIPS_SYS(sys_sync
, 0)
1831 MIPS_SYS(sys_kill
, 2)
1832 MIPS_SYS(sys_rename
, 2)
1833 MIPS_SYS(sys_mkdir
, 2)
1834 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1835 MIPS_SYS(sys_dup
, 1)
1836 MIPS_SYS(sys_pipe
, 0)
1837 MIPS_SYS(sys_times
, 1)
1838 MIPS_SYS(sys_ni_syscall
, 0)
1839 MIPS_SYS(sys_brk
, 1) /* 4045 */
1840 MIPS_SYS(sys_setgid
, 1)
1841 MIPS_SYS(sys_getgid
, 0)
1842 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1843 MIPS_SYS(sys_geteuid
, 0)
1844 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1845 MIPS_SYS(sys_acct
, 0)
1846 MIPS_SYS(sys_umount
, 2)
1847 MIPS_SYS(sys_ni_syscall
, 0)
1848 MIPS_SYS(sys_ioctl
, 3)
1849 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1850 MIPS_SYS(sys_ni_syscall
, 2)
1851 MIPS_SYS(sys_setpgid
, 2)
1852 MIPS_SYS(sys_ni_syscall
, 0)
1853 MIPS_SYS(sys_olduname
, 1)
1854 MIPS_SYS(sys_umask
, 1) /* 4060 */
1855 MIPS_SYS(sys_chroot
, 1)
1856 MIPS_SYS(sys_ustat
, 2)
1857 MIPS_SYS(sys_dup2
, 2)
1858 MIPS_SYS(sys_getppid
, 0)
1859 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1860 MIPS_SYS(sys_setsid
, 0)
1861 MIPS_SYS(sys_sigaction
, 3)
1862 MIPS_SYS(sys_sgetmask
, 0)
1863 MIPS_SYS(sys_ssetmask
, 1)
1864 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1865 MIPS_SYS(sys_setregid
, 2)
1866 MIPS_SYS(sys_sigsuspend
, 0)
1867 MIPS_SYS(sys_sigpending
, 1)
1868 MIPS_SYS(sys_sethostname
, 2)
1869 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1870 MIPS_SYS(sys_getrlimit
, 2)
1871 MIPS_SYS(sys_getrusage
, 2)
1872 MIPS_SYS(sys_gettimeofday
, 2)
1873 MIPS_SYS(sys_settimeofday
, 2)
1874 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1875 MIPS_SYS(sys_setgroups
, 2)
1876 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1877 MIPS_SYS(sys_symlink
, 2)
1878 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1879 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1880 MIPS_SYS(sys_uselib
, 1)
1881 MIPS_SYS(sys_swapon
, 2)
1882 MIPS_SYS(sys_reboot
, 3)
1883 MIPS_SYS(old_readdir
, 3)
1884 MIPS_SYS(old_mmap
, 6) /* 4090 */
1885 MIPS_SYS(sys_munmap
, 2)
1886 MIPS_SYS(sys_truncate
, 2)
1887 MIPS_SYS(sys_ftruncate
, 2)
1888 MIPS_SYS(sys_fchmod
, 2)
1889 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1890 MIPS_SYS(sys_getpriority
, 2)
1891 MIPS_SYS(sys_setpriority
, 3)
1892 MIPS_SYS(sys_ni_syscall
, 0)
1893 MIPS_SYS(sys_statfs
, 2)
1894 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1895 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1896 MIPS_SYS(sys_socketcall
, 2)
1897 MIPS_SYS(sys_syslog
, 3)
1898 MIPS_SYS(sys_setitimer
, 3)
1899 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1900 MIPS_SYS(sys_newstat
, 2)
1901 MIPS_SYS(sys_newlstat
, 2)
1902 MIPS_SYS(sys_newfstat
, 2)
1903 MIPS_SYS(sys_uname
, 1)
1904 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1905 MIPS_SYS(sys_vhangup
, 0)
1906 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1907 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1908 MIPS_SYS(sys_wait4
, 4)
1909 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1910 MIPS_SYS(sys_sysinfo
, 1)
1911 MIPS_SYS(sys_ipc
, 6)
1912 MIPS_SYS(sys_fsync
, 1)
1913 MIPS_SYS(sys_sigreturn
, 0)
1914 MIPS_SYS(sys_clone
, 6) /* 4120 */
1915 MIPS_SYS(sys_setdomainname
, 2)
1916 MIPS_SYS(sys_newuname
, 1)
1917 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1918 MIPS_SYS(sys_adjtimex
, 1)
1919 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1920 MIPS_SYS(sys_sigprocmask
, 3)
1921 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1922 MIPS_SYS(sys_init_module
, 5)
1923 MIPS_SYS(sys_delete_module
, 1)
1924 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1925 MIPS_SYS(sys_quotactl
, 0)
1926 MIPS_SYS(sys_getpgid
, 1)
1927 MIPS_SYS(sys_fchdir
, 1)
1928 MIPS_SYS(sys_bdflush
, 2)
1929 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1930 MIPS_SYS(sys_personality
, 1)
1931 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1932 MIPS_SYS(sys_setfsuid
, 1)
1933 MIPS_SYS(sys_setfsgid
, 1)
1934 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1935 MIPS_SYS(sys_getdents
, 3)
1936 MIPS_SYS(sys_select
, 5)
1937 MIPS_SYS(sys_flock
, 2)
1938 MIPS_SYS(sys_msync
, 3)
1939 MIPS_SYS(sys_readv
, 3) /* 4145 */
1940 MIPS_SYS(sys_writev
, 3)
1941 MIPS_SYS(sys_cacheflush
, 3)
1942 MIPS_SYS(sys_cachectl
, 3)
1943 MIPS_SYS(sys_sysmips
, 4)
1944 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1945 MIPS_SYS(sys_getsid
, 1)
1946 MIPS_SYS(sys_fdatasync
, 0)
1947 MIPS_SYS(sys_sysctl
, 1)
1948 MIPS_SYS(sys_mlock
, 2)
1949 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1950 MIPS_SYS(sys_mlockall
, 1)
1951 MIPS_SYS(sys_munlockall
, 0)
1952 MIPS_SYS(sys_sched_setparam
, 2)
1953 MIPS_SYS(sys_sched_getparam
, 2)
1954 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1955 MIPS_SYS(sys_sched_getscheduler
, 1)
1956 MIPS_SYS(sys_sched_yield
, 0)
1957 MIPS_SYS(sys_sched_get_priority_max
, 1)
1958 MIPS_SYS(sys_sched_get_priority_min
, 1)
1959 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1960 MIPS_SYS(sys_nanosleep
, 2)
1961 MIPS_SYS(sys_mremap
, 4)
1962 MIPS_SYS(sys_accept
, 3)
1963 MIPS_SYS(sys_bind
, 3)
1964 MIPS_SYS(sys_connect
, 3) /* 4170 */
1965 MIPS_SYS(sys_getpeername
, 3)
1966 MIPS_SYS(sys_getsockname
, 3)
1967 MIPS_SYS(sys_getsockopt
, 5)
1968 MIPS_SYS(sys_listen
, 2)
1969 MIPS_SYS(sys_recv
, 4) /* 4175 */
1970 MIPS_SYS(sys_recvfrom
, 6)
1971 MIPS_SYS(sys_recvmsg
, 3)
1972 MIPS_SYS(sys_send
, 4)
1973 MIPS_SYS(sys_sendmsg
, 3)
1974 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1975 MIPS_SYS(sys_setsockopt
, 5)
1976 MIPS_SYS(sys_shutdown
, 2)
1977 MIPS_SYS(sys_socket
, 3)
1978 MIPS_SYS(sys_socketpair
, 4)
1979 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1980 MIPS_SYS(sys_getresuid
, 3)
1981 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1982 MIPS_SYS(sys_poll
, 3)
1983 MIPS_SYS(sys_nfsservctl
, 3)
1984 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1985 MIPS_SYS(sys_getresgid
, 3)
1986 MIPS_SYS(sys_prctl
, 5)
1987 MIPS_SYS(sys_rt_sigreturn
, 0)
1988 MIPS_SYS(sys_rt_sigaction
, 4)
1989 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1990 MIPS_SYS(sys_rt_sigpending
, 2)
1991 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1992 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1993 MIPS_SYS(sys_rt_sigsuspend
, 0)
1994 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1995 MIPS_SYS(sys_pwrite64
, 6)
1996 MIPS_SYS(sys_chown
, 3)
1997 MIPS_SYS(sys_getcwd
, 2)
1998 MIPS_SYS(sys_capget
, 2)
1999 MIPS_SYS(sys_capset
, 2) /* 4205 */
2000 MIPS_SYS(sys_sigaltstack
, 2)
2001 MIPS_SYS(sys_sendfile
, 4)
2002 MIPS_SYS(sys_ni_syscall
, 0)
2003 MIPS_SYS(sys_ni_syscall
, 0)
2004 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
2005 MIPS_SYS(sys_truncate64
, 4)
2006 MIPS_SYS(sys_ftruncate64
, 4)
2007 MIPS_SYS(sys_stat64
, 2)
2008 MIPS_SYS(sys_lstat64
, 2)
2009 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
2010 MIPS_SYS(sys_pivot_root
, 2)
2011 MIPS_SYS(sys_mincore
, 3)
2012 MIPS_SYS(sys_madvise
, 3)
2013 MIPS_SYS(sys_getdents64
, 3)
2014 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
2015 MIPS_SYS(sys_ni_syscall
, 0)
2016 MIPS_SYS(sys_gettid
, 0)
2017 MIPS_SYS(sys_readahead
, 5)
2018 MIPS_SYS(sys_setxattr
, 5)
2019 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
2020 MIPS_SYS(sys_fsetxattr
, 5)
2021 MIPS_SYS(sys_getxattr
, 4)
2022 MIPS_SYS(sys_lgetxattr
, 4)
2023 MIPS_SYS(sys_fgetxattr
, 4)
2024 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
2025 MIPS_SYS(sys_llistxattr
, 3)
2026 MIPS_SYS(sys_flistxattr
, 3)
2027 MIPS_SYS(sys_removexattr
, 2)
2028 MIPS_SYS(sys_lremovexattr
, 2)
2029 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
2030 MIPS_SYS(sys_tkill
, 2)
2031 MIPS_SYS(sys_sendfile64
, 5)
2032 MIPS_SYS(sys_futex
, 2)
2033 MIPS_SYS(sys_sched_setaffinity
, 3)
2034 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
2035 MIPS_SYS(sys_io_setup
, 2)
2036 MIPS_SYS(sys_io_destroy
, 1)
2037 MIPS_SYS(sys_io_getevents
, 5)
2038 MIPS_SYS(sys_io_submit
, 3)
2039 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
2040 MIPS_SYS(sys_exit_group
, 1)
2041 MIPS_SYS(sys_lookup_dcookie
, 3)
2042 MIPS_SYS(sys_epoll_create
, 1)
2043 MIPS_SYS(sys_epoll_ctl
, 4)
2044 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
2045 MIPS_SYS(sys_remap_file_pages
, 5)
2046 MIPS_SYS(sys_set_tid_address
, 1)
2047 MIPS_SYS(sys_restart_syscall
, 0)
2048 MIPS_SYS(sys_fadvise64_64
, 7)
2049 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
2050 MIPS_SYS(sys_fstatfs64
, 2)
2051 MIPS_SYS(sys_timer_create
, 3)
2052 MIPS_SYS(sys_timer_settime
, 4)
2053 MIPS_SYS(sys_timer_gettime
, 2)
2054 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
2055 MIPS_SYS(sys_timer_delete
, 1)
2056 MIPS_SYS(sys_clock_settime
, 2)
2057 MIPS_SYS(sys_clock_gettime
, 2)
2058 MIPS_SYS(sys_clock_getres
, 2)
2059 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
2060 MIPS_SYS(sys_tgkill
, 3)
2061 MIPS_SYS(sys_utimes
, 2)
2062 MIPS_SYS(sys_mbind
, 4)
2063 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
2064 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
2065 MIPS_SYS(sys_mq_open
, 4)
2066 MIPS_SYS(sys_mq_unlink
, 1)
2067 MIPS_SYS(sys_mq_timedsend
, 5)
2068 MIPS_SYS(sys_mq_timedreceive
, 5)
2069 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
2070 MIPS_SYS(sys_mq_getsetattr
, 3)
2071 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
2072 MIPS_SYS(sys_waitid
, 4)
2073 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
2074 MIPS_SYS(sys_add_key
, 5)
2075 MIPS_SYS(sys_request_key
, 4)
2076 MIPS_SYS(sys_keyctl
, 5)
2077 MIPS_SYS(sys_set_thread_area
, 1)
2078 MIPS_SYS(sys_inotify_init
, 0)
2079 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
2080 MIPS_SYS(sys_inotify_rm_watch
, 2)
2081 MIPS_SYS(sys_migrate_pages
, 4)
2082 MIPS_SYS(sys_openat
, 4)
2083 MIPS_SYS(sys_mkdirat
, 3)
2084 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
2085 MIPS_SYS(sys_fchownat
, 5)
2086 MIPS_SYS(sys_futimesat
, 3)
2087 MIPS_SYS(sys_fstatat64
, 4)
2088 MIPS_SYS(sys_unlinkat
, 3)
2089 MIPS_SYS(sys_renameat
, 4) /* 4295 */
2090 MIPS_SYS(sys_linkat
, 5)
2091 MIPS_SYS(sys_symlinkat
, 3)
2092 MIPS_SYS(sys_readlinkat
, 4)
2093 MIPS_SYS(sys_fchmodat
, 3)
2094 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
2095 MIPS_SYS(sys_pselect6
, 6)
2096 MIPS_SYS(sys_ppoll
, 5)
2097 MIPS_SYS(sys_unshare
, 1)
2098 MIPS_SYS(sys_splice
, 4)
2099 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
2100 MIPS_SYS(sys_tee
, 4)
2101 MIPS_SYS(sys_vmsplice
, 4)
2102 MIPS_SYS(sys_move_pages
, 6)
2103 MIPS_SYS(sys_set_robust_list
, 2)
2104 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
2105 MIPS_SYS(sys_kexec_load
, 4)
2106 MIPS_SYS(sys_getcpu
, 3)
2107 MIPS_SYS(sys_epoll_pwait
, 6)
2108 MIPS_SYS(sys_ioprio_set
, 3)
2109 MIPS_SYS(sys_ioprio_get
, 2)
2110 MIPS_SYS(sys_utimensat
, 4)
2111 MIPS_SYS(sys_signalfd
, 3)
2112 MIPS_SYS(sys_ni_syscall
, 0) /* was timerfd */
2113 MIPS_SYS(sys_eventfd
, 1)
2114 MIPS_SYS(sys_fallocate
, 6) /* 4320 */
2115 MIPS_SYS(sys_timerfd_create
, 2)
2116 MIPS_SYS(sys_timerfd_gettime
, 2)
2117 MIPS_SYS(sys_timerfd_settime
, 4)
2118 MIPS_SYS(sys_signalfd4
, 4)
2119 MIPS_SYS(sys_eventfd2
, 2) /* 4325 */
2120 MIPS_SYS(sys_epoll_create1
, 1)
2121 MIPS_SYS(sys_dup3
, 3)
2122 MIPS_SYS(sys_pipe2
, 2)
2123 MIPS_SYS(sys_inotify_init1
, 1)
2124 MIPS_SYS(sys_preadv
, 6) /* 4330 */
2125 MIPS_SYS(sys_pwritev
, 6)
2126 MIPS_SYS(sys_rt_tgsigqueueinfo
, 4)
2127 MIPS_SYS(sys_perf_event_open
, 5)
2128 MIPS_SYS(sys_accept4
, 4)
2129 MIPS_SYS(sys_recvmmsg
, 5) /* 4335 */
2130 MIPS_SYS(sys_fanotify_init
, 2)
2131 MIPS_SYS(sys_fanotify_mark
, 6)
2132 MIPS_SYS(sys_prlimit64
, 4)
2133 MIPS_SYS(sys_name_to_handle_at
, 5)
2134 MIPS_SYS(sys_open_by_handle_at
, 3) /* 4340 */
2135 MIPS_SYS(sys_clock_adjtime
, 2)
2136 MIPS_SYS(sys_syncfs
, 1)
2141 static int do_store_exclusive(CPUMIPSState
*env
)
2144 target_ulong page_addr
;
2152 page_addr
= addr
& TARGET_PAGE_MASK
;
2155 flags
= page_get_flags(page_addr
);
2156 if ((flags
& PAGE_READ
) == 0) {
2159 reg
= env
->llreg
& 0x1f;
2160 d
= (env
->llreg
& 0x20) != 0;
2162 segv
= get_user_s64(val
, addr
);
2164 segv
= get_user_s32(val
, addr
);
2167 if (val
!= env
->llval
) {
2168 env
->active_tc
.gpr
[reg
] = 0;
2171 segv
= put_user_u64(env
->llnewval
, addr
);
2173 segv
= put_user_u32(env
->llnewval
, addr
);
2176 env
->active_tc
.gpr
[reg
] = 1;
2183 env
->active_tc
.PC
+= 4;
2196 static int do_break(CPUMIPSState
*env
, target_siginfo_t
*info
,
2204 info
->si_signo
= TARGET_SIGFPE
;
2206 info
->si_code
= (code
== BRK_OVERFLOW
) ? FPE_INTOVF
: FPE_INTDIV
;
2207 queue_signal(env
, info
->si_signo
, &*info
);
2217 void cpu_loop(CPUMIPSState
*env
)
2219 CPUState
*cs
= CPU(mips_env_get_cpu(env
));
2220 target_siginfo_t info
;
2223 # ifdef TARGET_ABI_MIPSO32
2224 unsigned int syscall_num
;
2229 trapnr
= cpu_mips_exec(env
);
2233 env
->active_tc
.PC
+= 4;
2234 # ifdef TARGET_ABI_MIPSO32
2235 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
2236 if (syscall_num
>= sizeof(mips_syscall_args
)) {
2237 ret
= -TARGET_ENOSYS
;
2241 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
2243 nb_args
= mips_syscall_args
[syscall_num
];
2244 sp_reg
= env
->active_tc
.gpr
[29];
2246 /* these arguments are taken from the stack */
2248 if ((ret
= get_user_ual(arg8
, sp_reg
+ 28)) != 0) {
2252 if ((ret
= get_user_ual(arg7
, sp_reg
+ 24)) != 0) {
2256 if ((ret
= get_user_ual(arg6
, sp_reg
+ 20)) != 0) {
2260 if ((ret
= get_user_ual(arg5
, sp_reg
+ 16)) != 0) {
2266 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2267 env
->active_tc
.gpr
[4],
2268 env
->active_tc
.gpr
[5],
2269 env
->active_tc
.gpr
[6],
2270 env
->active_tc
.gpr
[7],
2271 arg5
, arg6
, arg7
, arg8
);
2275 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2276 env
->active_tc
.gpr
[4], env
->active_tc
.gpr
[5],
2277 env
->active_tc
.gpr
[6], env
->active_tc
.gpr
[7],
2278 env
->active_tc
.gpr
[8], env
->active_tc
.gpr
[9],
2279 env
->active_tc
.gpr
[10], env
->active_tc
.gpr
[11]);
2281 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2282 /* Returning from a successful sigreturn syscall.
2283 Avoid clobbering register state. */
2286 if ((abi_ulong
)ret
>= (abi_ulong
)-1133) {
2287 env
->active_tc
.gpr
[7] = 1; /* error flag */
2290 env
->active_tc
.gpr
[7] = 0; /* error flag */
2292 env
->active_tc
.gpr
[2] = ret
;
2298 info
.si_signo
= TARGET_SIGSEGV
;
2300 /* XXX: check env->error_code */
2301 info
.si_code
= TARGET_SEGV_MAPERR
;
2302 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2303 queue_signal(env
, info
.si_signo
, &info
);
2307 info
.si_signo
= TARGET_SIGILL
;
2310 queue_signal(env
, info
.si_signo
, &info
);
2312 case EXCP_INTERRUPT
:
2313 /* just indicate that signals should be handled asap */
2319 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2322 info
.si_signo
= sig
;
2324 info
.si_code
= TARGET_TRAP_BRKPT
;
2325 queue_signal(env
, info
.si_signo
, &info
);
2330 if (do_store_exclusive(env
)) {
2331 info
.si_signo
= TARGET_SIGSEGV
;
2333 info
.si_code
= TARGET_SEGV_MAPERR
;
2334 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2335 queue_signal(env
, info
.si_signo
, &info
);
2339 info
.si_signo
= TARGET_SIGILL
;
2341 info
.si_code
= TARGET_ILL_ILLOPC
;
2342 queue_signal(env
, info
.si_signo
, &info
);
2344 /* The code below was inspired by the MIPS Linux kernel trap
2345 * handling code in arch/mips/kernel/traps.c.
2349 abi_ulong trap_instr
;
2352 ret
= get_user_ual(trap_instr
, env
->active_tc
.PC
);
2357 /* As described in the original Linux kernel code, the
2358 * below checks on 'code' are to work around an old
2361 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2362 if (code
>= (1 << 10)) {
2366 if (do_break(env
, &info
, code
) != 0) {
2373 abi_ulong trap_instr
;
2374 unsigned int code
= 0;
2376 ret
= get_user_ual(trap_instr
, env
->active_tc
.PC
);
2381 /* The immediate versions don't provide a code. */
2382 if (!(trap_instr
& 0xFC000000)) {
2383 code
= ((trap_instr
>> 6) & ((1 << 10) - 1));
2386 if (do_break(env
, &info
, code
) != 0) {
2393 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2395 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2398 process_pending_signals(env
);
2403 #ifdef TARGET_OPENRISC
2405 void cpu_loop(CPUOpenRISCState
*env
)
2407 CPUState
*cs
= CPU(openrisc_env_get_cpu(env
));
2411 trapnr
= cpu_exec(env
);
2416 qemu_log("\nReset request, exit, pc is %#x\n", env
->pc
);
2420 qemu_log("\nBus error, exit, pc is %#x\n", env
->pc
);
2425 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2426 gdbsig
= TARGET_SIGSEGV
;
2429 qemu_log("\nTick time interrupt pc is %#x\n", env
->pc
);
2432 qemu_log("\nAlignment pc is %#x\n", env
->pc
);
2436 qemu_log("\nIllegal instructionpc is %#x\n", env
->pc
);
2440 qemu_log("\nExternal interruptpc is %#x\n", env
->pc
);
2444 qemu_log("\nTLB miss\n");
2447 qemu_log("\nRange\n");
2451 env
->pc
+= 4; /* 0xc00; */
2452 env
->gpr
[11] = do_syscall(env
,
2453 env
->gpr
[11], /* return value */
2454 env
->gpr
[3], /* r3 - r7 are params */
2462 qemu_log("\nFloating point error\n");
2465 qemu_log("\nTrap\n");
2472 qemu_log("\nqemu: unhandled CPU exception %#x - aborting\n",
2474 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2475 gdbsig
= TARGET_SIGILL
;
2479 gdb_handlesig(env
, gdbsig
);
2480 if (gdbsig
!= TARGET_SIGTRAP
) {
2485 process_pending_signals(env
);
2489 #endif /* TARGET_OPENRISC */
2492 void cpu_loop(CPUSH4State
*env
)
2494 CPUState
*cs
= CPU(sh_env_get_cpu(env
));
2496 target_siginfo_t info
;
2499 trapnr
= cpu_sh4_exec (env
);
2504 ret
= do_syscall(env
,
2513 env
->gregs
[0] = ret
;
2515 case EXCP_INTERRUPT
:
2516 /* just indicate that signals should be handled asap */
2522 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2525 info
.si_signo
= sig
;
2527 info
.si_code
= TARGET_TRAP_BRKPT
;
2528 queue_signal(env
, info
.si_signo
, &info
);
2534 info
.si_signo
= SIGSEGV
;
2536 info
.si_code
= TARGET_SEGV_MAPERR
;
2537 info
._sifields
._sigfault
._addr
= env
->tea
;
2538 queue_signal(env
, info
.si_signo
, &info
);
2542 printf ("Unhandled trap: 0x%x\n", trapnr
);
2543 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2546 process_pending_signals (env
);
2552 void cpu_loop(CPUCRISState
*env
)
2554 CPUState
*cs
= CPU(cris_env_get_cpu(env
));
2556 target_siginfo_t info
;
2559 trapnr
= cpu_cris_exec (env
);
2563 info
.si_signo
= SIGSEGV
;
2565 /* XXX: check env->error_code */
2566 info
.si_code
= TARGET_SEGV_MAPERR
;
2567 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2568 queue_signal(env
, info
.si_signo
, &info
);
2571 case EXCP_INTERRUPT
:
2572 /* just indicate that signals should be handled asap */
2575 ret
= do_syscall(env
,
2584 env
->regs
[10] = ret
;
2590 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2593 info
.si_signo
= sig
;
2595 info
.si_code
= TARGET_TRAP_BRKPT
;
2596 queue_signal(env
, info
.si_signo
, &info
);
2601 printf ("Unhandled trap: 0x%x\n", trapnr
);
2602 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2605 process_pending_signals (env
);
2610 #ifdef TARGET_MICROBLAZE
2611 void cpu_loop(CPUMBState
*env
)
2613 CPUState
*cs
= CPU(mb_env_get_cpu(env
));
2615 target_siginfo_t info
;
2618 trapnr
= cpu_mb_exec (env
);
2622 info
.si_signo
= SIGSEGV
;
2624 /* XXX: check env->error_code */
2625 info
.si_code
= TARGET_SEGV_MAPERR
;
2626 info
._sifields
._sigfault
._addr
= 0;
2627 queue_signal(env
, info
.si_signo
, &info
);
2630 case EXCP_INTERRUPT
:
2631 /* just indicate that signals should be handled asap */
2634 /* Return address is 4 bytes after the call. */
2636 env
->sregs
[SR_PC
] = env
->regs
[14];
2637 ret
= do_syscall(env
,
2649 env
->regs
[17] = env
->sregs
[SR_PC
] + 4;
2650 if (env
->iflags
& D_FLAG
) {
2651 env
->sregs
[SR_ESR
] |= 1 << 12;
2652 env
->sregs
[SR_PC
] -= 4;
2653 /* FIXME: if branch was immed, replay the imm as well. */
2656 env
->iflags
&= ~(IMM_FLAG
| D_FLAG
);
2658 switch (env
->sregs
[SR_ESR
] & 31) {
2659 case ESR_EC_DIVZERO
:
2660 info
.si_signo
= SIGFPE
;
2662 info
.si_code
= TARGET_FPE_FLTDIV
;
2663 info
._sifields
._sigfault
._addr
= 0;
2664 queue_signal(env
, info
.si_signo
, &info
);
2667 info
.si_signo
= SIGFPE
;
2669 if (env
->sregs
[SR_FSR
] & FSR_IO
) {
2670 info
.si_code
= TARGET_FPE_FLTINV
;
2672 if (env
->sregs
[SR_FSR
] & FSR_DZ
) {
2673 info
.si_code
= TARGET_FPE_FLTDIV
;
2675 info
._sifields
._sigfault
._addr
= 0;
2676 queue_signal(env
, info
.si_signo
, &info
);
2679 printf ("Unhandled hw-exception: 0x%x\n",
2680 env
->sregs
[SR_ESR
] & ESR_EC_MASK
);
2681 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2690 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2693 info
.si_signo
= sig
;
2695 info
.si_code
= TARGET_TRAP_BRKPT
;
2696 queue_signal(env
, info
.si_signo
, &info
);
2701 printf ("Unhandled trap: 0x%x\n", trapnr
);
2702 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2705 process_pending_signals (env
);
2712 void cpu_loop(CPUM68KState
*env
)
2714 CPUState
*cs
= CPU(m68k_env_get_cpu(env
));
2717 target_siginfo_t info
;
2718 TaskState
*ts
= env
->opaque
;
2721 trapnr
= cpu_m68k_exec(env
);
2725 if (ts
->sim_syscalls
) {
2727 nr
= lduw(env
->pc
+ 2);
2729 do_m68k_simcall(env
, nr
);
2735 case EXCP_HALT_INSN
:
2736 /* Semihosing syscall. */
2738 do_m68k_semihosting(env
, env
->dregs
[0]);
2742 case EXCP_UNSUPPORTED
:
2744 info
.si_signo
= SIGILL
;
2746 info
.si_code
= TARGET_ILL_ILLOPN
;
2747 info
._sifields
._sigfault
._addr
= env
->pc
;
2748 queue_signal(env
, info
.si_signo
, &info
);
2752 ts
->sim_syscalls
= 0;
2755 env
->dregs
[0] = do_syscall(env
,
2766 case EXCP_INTERRUPT
:
2767 /* just indicate that signals should be handled asap */
2771 info
.si_signo
= SIGSEGV
;
2773 /* XXX: check env->error_code */
2774 info
.si_code
= TARGET_SEGV_MAPERR
;
2775 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2776 queue_signal(env
, info
.si_signo
, &info
);
2783 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2786 info
.si_signo
= sig
;
2788 info
.si_code
= TARGET_TRAP_BRKPT
;
2789 queue_signal(env
, info
.si_signo
, &info
);
2794 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2796 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2799 process_pending_signals(env
);
2802 #endif /* TARGET_M68K */
2805 static void do_store_exclusive(CPUAlphaState
*env
, int reg
, int quad
)
2807 target_ulong addr
, val
, tmp
;
2808 target_siginfo_t info
;
2811 addr
= env
->lock_addr
;
2812 tmp
= env
->lock_st_addr
;
2813 env
->lock_addr
= -1;
2814 env
->lock_st_addr
= 0;
2820 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
2824 if (val
== env
->lock_value
) {
2826 if (quad
? put_user_u64(tmp
, addr
) : put_user_u32(tmp
, addr
)) {
2843 info
.si_signo
= TARGET_SIGSEGV
;
2845 info
.si_code
= TARGET_SEGV_MAPERR
;
2846 info
._sifields
._sigfault
._addr
= addr
;
2847 queue_signal(env
, TARGET_SIGSEGV
, &info
);
2850 void cpu_loop(CPUAlphaState
*env
)
2852 CPUState
*cs
= CPU(alpha_env_get_cpu(env
));
2854 target_siginfo_t info
;
2858 trapnr
= cpu_alpha_exec (env
);
2860 /* All of the traps imply a transition through PALcode, which
2861 implies an REI instruction has been executed. Which means
2862 that the intr_flag should be cleared. */
2867 fprintf(stderr
, "Reset requested. Exit\n");
2871 fprintf(stderr
, "Machine check exception. Exit\n");
2874 case EXCP_SMP_INTERRUPT
:
2875 case EXCP_CLK_INTERRUPT
:
2876 case EXCP_DEV_INTERRUPT
:
2877 fprintf(stderr
, "External interrupt. Exit\n");
2881 env
->lock_addr
= -1;
2882 info
.si_signo
= TARGET_SIGSEGV
;
2884 info
.si_code
= (page_get_flags(env
->trap_arg0
) & PAGE_VALID
2885 ? TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
);
2886 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2887 queue_signal(env
, info
.si_signo
, &info
);
2890 env
->lock_addr
= -1;
2891 info
.si_signo
= TARGET_SIGBUS
;
2893 info
.si_code
= TARGET_BUS_ADRALN
;
2894 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2895 queue_signal(env
, info
.si_signo
, &info
);
2899 env
->lock_addr
= -1;
2900 info
.si_signo
= TARGET_SIGILL
;
2902 info
.si_code
= TARGET_ILL_ILLOPC
;
2903 info
._sifields
._sigfault
._addr
= env
->pc
;
2904 queue_signal(env
, info
.si_signo
, &info
);
2907 env
->lock_addr
= -1;
2908 info
.si_signo
= TARGET_SIGFPE
;
2910 info
.si_code
= TARGET_FPE_FLTINV
;
2911 info
._sifields
._sigfault
._addr
= env
->pc
;
2912 queue_signal(env
, info
.si_signo
, &info
);
2915 /* No-op. Linux simply re-enables the FPU. */
2918 env
->lock_addr
= -1;
2919 switch (env
->error_code
) {
2922 info
.si_signo
= TARGET_SIGTRAP
;
2924 info
.si_code
= TARGET_TRAP_BRKPT
;
2925 info
._sifields
._sigfault
._addr
= env
->pc
;
2926 queue_signal(env
, info
.si_signo
, &info
);
2930 info
.si_signo
= TARGET_SIGTRAP
;
2933 info
._sifields
._sigfault
._addr
= env
->pc
;
2934 queue_signal(env
, info
.si_signo
, &info
);
2938 trapnr
= env
->ir
[IR_V0
];
2939 sysret
= do_syscall(env
, trapnr
,
2940 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
2941 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
2942 env
->ir
[IR_A4
], env
->ir
[IR_A5
],
2944 if (trapnr
== TARGET_NR_sigreturn
2945 || trapnr
== TARGET_NR_rt_sigreturn
) {
2948 /* Syscall writes 0 to V0 to bypass error check, similar
2949 to how this is handled internal to Linux kernel.
2950 (Ab)use trapnr temporarily as boolean indicating error. */
2951 trapnr
= (env
->ir
[IR_V0
] != 0 && sysret
< 0);
2952 env
->ir
[IR_V0
] = (trapnr
? -sysret
: sysret
);
2953 env
->ir
[IR_A3
] = trapnr
;
2957 /* ??? We can probably elide the code using page_unprotect
2958 that is checking for self-modifying code. Instead we
2959 could simply call tb_flush here. Until we work out the
2960 changes required to turn off the extra write protection,
2961 this can be a no-op. */
2965 /* Handled in the translator for usermode. */
2969 /* Handled in the translator for usermode. */
2973 info
.si_signo
= TARGET_SIGFPE
;
2974 switch (env
->ir
[IR_A0
]) {
2975 case TARGET_GEN_INTOVF
:
2976 info
.si_code
= TARGET_FPE_INTOVF
;
2978 case TARGET_GEN_INTDIV
:
2979 info
.si_code
= TARGET_FPE_INTDIV
;
2981 case TARGET_GEN_FLTOVF
:
2982 info
.si_code
= TARGET_FPE_FLTOVF
;
2984 case TARGET_GEN_FLTUND
:
2985 info
.si_code
= TARGET_FPE_FLTUND
;
2987 case TARGET_GEN_FLTINV
:
2988 info
.si_code
= TARGET_FPE_FLTINV
;
2990 case TARGET_GEN_FLTINE
:
2991 info
.si_code
= TARGET_FPE_FLTRES
;
2993 case TARGET_GEN_ROPRAND
:
2997 info
.si_signo
= TARGET_SIGTRAP
;
3002 info
._sifields
._sigfault
._addr
= env
->pc
;
3003 queue_signal(env
, info
.si_signo
, &info
);
3010 info
.si_signo
= gdb_handlesig (env
, TARGET_SIGTRAP
);
3011 if (info
.si_signo
) {
3012 env
->lock_addr
= -1;
3014 info
.si_code
= TARGET_TRAP_BRKPT
;
3015 queue_signal(env
, info
.si_signo
, &info
);
3020 do_store_exclusive(env
, env
->error_code
, trapnr
- EXCP_STL_C
);
3022 case EXCP_INTERRUPT
:
3023 /* Just indicate that signals should be handled asap. */
3026 printf ("Unhandled trap: 0x%x\n", trapnr
);
3027 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3030 process_pending_signals (env
);
3033 #endif /* TARGET_ALPHA */
3036 void cpu_loop(CPUS390XState
*env
)
3038 CPUState
*cs
= CPU(s390_env_get_cpu(env
));
3040 target_siginfo_t info
;
3044 trapnr
= cpu_s390x_exec(env
);
3046 case EXCP_INTERRUPT
:
3047 /* Just indicate that signals should be handled asap. */
3051 n
= env
->int_svc_code
;
3053 /* syscalls > 255 */
3056 env
->psw
.addr
+= env
->int_svc_ilen
;
3057 env
->regs
[2] = do_syscall(env
, n
, env
->regs
[2], env
->regs
[3],
3058 env
->regs
[4], env
->regs
[5],
3059 env
->regs
[6], env
->regs
[7], 0, 0);
3063 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
3065 n
= TARGET_TRAP_BRKPT
;
3070 n
= env
->int_pgm_code
;
3073 case PGM_PRIVILEGED
:
3075 n
= TARGET_ILL_ILLOPC
;
3077 case PGM_PROTECTION
:
3078 case PGM_ADDRESSING
:
3080 /* XXX: check env->error_code */
3081 n
= TARGET_SEGV_MAPERR
;
3082 addr
= env
->__excp_addr
;
3085 case PGM_SPECIFICATION
:
3086 case PGM_SPECIAL_OP
:
3090 n
= TARGET_ILL_ILLOPN
;
3093 case PGM_FIXPT_OVERFLOW
:
3095 n
= TARGET_FPE_INTOVF
;
3097 case PGM_FIXPT_DIVIDE
:
3099 n
= TARGET_FPE_INTDIV
;
3103 n
= (env
->fpc
>> 8) & 0xff;
3105 /* compare-and-trap */
3108 /* An IEEE exception, simulated or otherwise. */
3110 n
= TARGET_FPE_FLTINV
;
3111 } else if (n
& 0x40) {
3112 n
= TARGET_FPE_FLTDIV
;
3113 } else if (n
& 0x20) {
3114 n
= TARGET_FPE_FLTOVF
;
3115 } else if (n
& 0x10) {
3116 n
= TARGET_FPE_FLTUND
;
3117 } else if (n
& 0x08) {
3118 n
= TARGET_FPE_FLTRES
;
3120 /* ??? Quantum exception; BFP, DFP error. */
3128 fprintf(stderr
, "Unhandled program exception: %#x\n", n
);
3129 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3135 addr
= env
->psw
.addr
;
3137 info
.si_signo
= sig
;
3140 info
._sifields
._sigfault
._addr
= addr
;
3141 queue_signal(env
, info
.si_signo
, &info
);
3145 fprintf(stderr
, "Unhandled trap: 0x%x\n", trapnr
);
3146 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3149 process_pending_signals (env
);
3153 #endif /* TARGET_S390X */
3155 THREAD CPUArchState
*thread_env
;
3157 void task_settid(TaskState
*ts
)
3159 if (ts
->ts_tid
== 0) {
3160 #ifdef CONFIG_USE_NPTL
3161 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
3163 /* when no threads are used, tid becomes pid */
3164 ts
->ts_tid
= getpid();
3169 void stop_all_tasks(void)
3172 * We trust that when using NPTL, start_exclusive()
3173 * handles thread stopping correctly.
3178 /* Assumes contents are already zeroed. */
3179 void init_task_state(TaskState
*ts
)
3184 ts
->first_free
= ts
->sigqueue_table
;
3185 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
3186 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
3188 ts
->sigqueue_table
[i
].next
= NULL
;
3191 static void handle_arg_help(const char *arg
)
3196 static void handle_arg_log(const char *arg
)
3200 mask
= qemu_str_to_log_mask(arg
);
3202 qemu_print_log_usage(stdout
);
3208 static void handle_arg_log_filename(const char *arg
)
3210 qemu_set_log_filename(arg
);
3213 static void handle_arg_set_env(const char *arg
)
3215 char *r
, *p
, *token
;
3216 r
= p
= strdup(arg
);
3217 while ((token
= strsep(&p
, ",")) != NULL
) {
3218 if (envlist_setenv(envlist
, token
) != 0) {
3225 static void handle_arg_unset_env(const char *arg
)
3227 char *r
, *p
, *token
;
3228 r
= p
= strdup(arg
);
3229 while ((token
= strsep(&p
, ",")) != NULL
) {
3230 if (envlist_unsetenv(envlist
, token
) != 0) {
3237 static void handle_arg_argv0(const char *arg
)
3239 argv0
= strdup(arg
);
3242 static void handle_arg_stack_size(const char *arg
)
3245 guest_stack_size
= strtoul(arg
, &p
, 0);
3246 if (guest_stack_size
== 0) {
3251 guest_stack_size
*= 1024 * 1024;
3252 } else if (*p
== 'k' || *p
== 'K') {
3253 guest_stack_size
*= 1024;
3257 static void handle_arg_ld_prefix(const char *arg
)
3259 interp_prefix
= strdup(arg
);
3262 static void handle_arg_pagesize(const char *arg
)
3264 qemu_host_page_size
= atoi(arg
);
3265 if (qemu_host_page_size
== 0 ||
3266 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
3267 fprintf(stderr
, "page size must be a power of two\n");
3272 static void handle_arg_gdb(const char *arg
)
3274 gdbstub_port
= atoi(arg
);
3277 static void handle_arg_uname(const char *arg
)
3279 qemu_uname_release
= strdup(arg
);
3282 static void handle_arg_cpu(const char *arg
)
3284 cpu_model
= strdup(arg
);
3285 if (cpu_model
== NULL
|| is_help_option(cpu_model
)) {
3286 /* XXX: implement xxx_cpu_list for targets that still miss it */
3287 #if defined(cpu_list)
3288 cpu_list(stdout
, &fprintf
);
3294 #if defined(CONFIG_USE_GUEST_BASE)
3295 static void handle_arg_guest_base(const char *arg
)
3297 guest_base
= strtol(arg
, NULL
, 0);
3298 have_guest_base
= 1;
3301 static void handle_arg_reserved_va(const char *arg
)
3305 reserved_va
= strtoul(arg
, &p
, 0);
3319 unsigned long unshifted
= reserved_va
;
3321 reserved_va
<<= shift
;
3322 if (((reserved_va
>> shift
) != unshifted
)
3323 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3324 || (reserved_va
> (1ul << TARGET_VIRT_ADDR_SPACE_BITS
))
3327 fprintf(stderr
, "Reserved virtual address too big\n");
3332 fprintf(stderr
, "Unrecognised -R size suffix '%s'\n", p
);
3338 static void handle_arg_singlestep(const char *arg
)
3343 static void handle_arg_strace(const char *arg
)
3348 static void handle_arg_version(const char *arg
)
3350 printf("qemu-" TARGET_NAME
" version " QEMU_VERSION QEMU_PKGVERSION
3351 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
3355 struct qemu_argument
{
3359 void (*handle_opt
)(const char *arg
);
3360 const char *example
;
3364 static const struct qemu_argument arg_table
[] = {
3365 {"h", "", false, handle_arg_help
,
3366 "", "print this help"},
3367 {"g", "QEMU_GDB", true, handle_arg_gdb
,
3368 "port", "wait gdb connection to 'port'"},
3369 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix
,
3370 "path", "set the elf interpreter prefix to 'path'"},
3371 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size
,
3372 "size", "set the stack size to 'size' bytes"},
3373 {"cpu", "QEMU_CPU", true, handle_arg_cpu
,
3374 "model", "select CPU (-cpu help for list)"},
3375 {"E", "QEMU_SET_ENV", true, handle_arg_set_env
,
3376 "var=value", "sets targets environment variable (see below)"},
3377 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env
,
3378 "var", "unsets targets environment variable (see below)"},
3379 {"0", "QEMU_ARGV0", true, handle_arg_argv0
,
3380 "argv0", "forces target process argv[0] to be 'argv0'"},
3381 {"r", "QEMU_UNAME", true, handle_arg_uname
,
3382 "uname", "set qemu uname release string to 'uname'"},
3383 #if defined(CONFIG_USE_GUEST_BASE)
3384 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base
,
3385 "address", "set guest_base address to 'address'"},
3386 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va
,
3387 "size", "reserve 'size' bytes for guest virtual address space"},
3389 {"d", "QEMU_LOG", true, handle_arg_log
,
3390 "item[,...]", "enable logging of specified items "
3391 "(use '-d help' for a list of items)"},
3392 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename
,
3393 "logfile", "write logs to 'logfile' (default stderr)"},
3394 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize
,
3395 "pagesize", "set the host page size to 'pagesize'"},
3396 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep
,
3397 "", "run in singlestep mode"},
3398 {"strace", "QEMU_STRACE", false, handle_arg_strace
,
3399 "", "log system calls"},
3400 {"version", "QEMU_VERSION", false, handle_arg_version
,
3401 "", "display version information and exit"},
3402 {NULL
, NULL
, false, NULL
, NULL
, NULL
}
3405 static void usage(void)
3407 const struct qemu_argument
*arginfo
;
3411 printf("usage: qemu-" TARGET_NAME
" [options] program [arguments...]\n"
3412 "Linux CPU emulator (compiled for " TARGET_NAME
" emulation)\n"
3414 "Options and associated environment variables:\n"
3417 /* Calculate column widths. We must always have at least enough space
3418 * for the column header.
3420 maxarglen
= strlen("Argument");
3421 maxenvlen
= strlen("Env-variable");
3423 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3424 int arglen
= strlen(arginfo
->argv
);
3425 if (arginfo
->has_arg
) {
3426 arglen
+= strlen(arginfo
->example
) + 1;
3428 if (strlen(arginfo
->env
) > maxenvlen
) {
3429 maxenvlen
= strlen(arginfo
->env
);
3431 if (arglen
> maxarglen
) {
3436 printf("%-*s %-*s Description\n", maxarglen
+1, "Argument",
3437 maxenvlen
, "Env-variable");
3439 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3440 if (arginfo
->has_arg
) {
3441 printf("-%s %-*s %-*s %s\n", arginfo
->argv
,
3442 (int)(maxarglen
- strlen(arginfo
->argv
) - 1),
3443 arginfo
->example
, maxenvlen
, arginfo
->env
, arginfo
->help
);
3445 printf("-%-*s %-*s %s\n", maxarglen
, arginfo
->argv
,
3446 maxenvlen
, arginfo
->env
,
3453 "QEMU_LD_PREFIX = %s\n"
3454 "QEMU_STACK_SIZE = %ld byte\n",
3459 "You can use -E and -U options or the QEMU_SET_ENV and\n"
3460 "QEMU_UNSET_ENV environment variables to set and unset\n"
3461 "environment variables for the target process.\n"
3462 "It is possible to provide several variables by separating them\n"
3463 "by commas in getsubopt(3) style. Additionally it is possible to\n"
3464 "provide the -E and -U options multiple times.\n"
3465 "The following lines are equivalent:\n"
3466 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
3467 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
3468 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
3469 "Note that if you provide several changes to a single variable\n"
3470 "the last change will stay in effect.\n");
3475 static int parse_args(int argc
, char **argv
)
3479 const struct qemu_argument
*arginfo
;
3481 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3482 if (arginfo
->env
== NULL
) {
3486 r
= getenv(arginfo
->env
);
3488 arginfo
->handle_opt(r
);
3494 if (optind
>= argc
) {
3503 if (!strcmp(r
, "-")) {
3507 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3508 if (!strcmp(r
, arginfo
->argv
)) {
3509 if (arginfo
->has_arg
) {
3510 if (optind
>= argc
) {
3513 arginfo
->handle_opt(argv
[optind
]);
3516 arginfo
->handle_opt(NULL
);
3522 /* no option matched the current argv */
3523 if (arginfo
->handle_opt
== NULL
) {
3528 if (optind
>= argc
) {
3532 filename
= argv
[optind
];
3533 exec_path
= argv
[optind
];
3538 int main(int argc
, char **argv
, char **envp
)
3540 struct target_pt_regs regs1
, *regs
= ®s1
;
3541 struct image_info info1
, *info
= &info1
;
3542 struct linux_binprm bprm
;
3546 char **target_environ
, **wrk
;
3552 module_call_init(MODULE_INIT_QOM
);
3554 qemu_cache_utils_init(envp
);
3556 if ((envlist
= envlist_create()) == NULL
) {
3557 (void) fprintf(stderr
, "Unable to allocate envlist\n");
3561 /* add current environment into the list */
3562 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
3563 (void) envlist_setenv(envlist
, *wrk
);
3566 /* Read the stack limit from the kernel. If it's "unlimited",
3567 then we can do little else besides use the default. */
3570 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
3571 && lim
.rlim_cur
!= RLIM_INFINITY
3572 && lim
.rlim_cur
== (target_long
)lim
.rlim_cur
) {
3573 guest_stack_size
= lim
.rlim_cur
;
3578 #if defined(cpudef_setup)
3579 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
3582 optind
= parse_args(argc
, argv
);
3585 memset(regs
, 0, sizeof(struct target_pt_regs
));
3587 /* Zero out image_info */
3588 memset(info
, 0, sizeof(struct image_info
));
3590 memset(&bprm
, 0, sizeof (bprm
));
3592 /* Scan interp_prefix dir for replacement files. */
3593 init_paths(interp_prefix
);
3595 if (cpu_model
== NULL
) {
3596 #if defined(TARGET_I386)
3597 #ifdef TARGET_X86_64
3598 cpu_model
= "qemu64";
3600 cpu_model
= "qemu32";
3602 #elif defined(TARGET_ARM)
3604 #elif defined(TARGET_UNICORE32)
3606 #elif defined(TARGET_M68K)
3608 #elif defined(TARGET_SPARC)
3609 #ifdef TARGET_SPARC64
3610 cpu_model
= "TI UltraSparc II";
3612 cpu_model
= "Fujitsu MB86904";
3614 #elif defined(TARGET_MIPS)
3615 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3620 #elif defined TARGET_OPENRISC
3621 cpu_model
= "or1200";
3622 #elif defined(TARGET_PPC)
3624 cpu_model
= "970fx";
3633 cpu_exec_init_all();
3634 /* NOTE: we need to init the CPU at this stage to get
3635 qemu_host_page_size */
3636 env
= cpu_init(cpu_model
);
3638 fprintf(stderr
, "Unable to find CPU definition\n");
3641 #if defined(TARGET_SPARC) || defined(TARGET_PPC)
3642 cpu_reset(ENV_GET_CPU(env
));
3647 if (getenv("QEMU_STRACE")) {
3651 target_environ
= envlist_to_environ(envlist
, NULL
);
3652 envlist_free(envlist
);
3654 #if defined(CONFIG_USE_GUEST_BASE)
3656 * Now that page sizes are configured in cpu_init() we can do
3657 * proper page alignment for guest_base.
3659 guest_base
= HOST_PAGE_ALIGN(guest_base
);
3661 if (reserved_va
|| have_guest_base
) {
3662 guest_base
= init_guest_space(guest_base
, reserved_va
, 0,
3664 if (guest_base
== (unsigned long)-1) {
3665 fprintf(stderr
, "Unable to reserve 0x%lx bytes of virtual address "
3666 "space for use as guest address space (check your virtual "
3667 "memory ulimit setting or reserve less using -R option)\n",
3673 mmap_next_start
= reserved_va
;
3676 #endif /* CONFIG_USE_GUEST_BASE */
3679 * Read in mmap_min_addr kernel parameter. This value is used
3680 * When loading the ELF image to determine whether guest_base
3681 * is needed. It is also used in mmap_find_vma.
3686 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
3688 if (fscanf(fp
, "%lu", &tmp
) == 1) {
3689 mmap_min_addr
= tmp
;
3690 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr
);
3697 * Prepare copy of argv vector for target.
3699 target_argc
= argc
- optind
;
3700 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
3701 if (target_argv
== NULL
) {
3702 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
3707 * If argv0 is specified (using '-0' switch) we replace
3708 * argv[0] pointer with the given one.
3711 if (argv0
!= NULL
) {
3712 target_argv
[i
++] = strdup(argv0
);
3714 for (; i
< target_argc
; i
++) {
3715 target_argv
[i
] = strdup(argv
[optind
+ i
]);
3717 target_argv
[target_argc
] = NULL
;
3719 ts
= g_malloc0 (sizeof(TaskState
));
3720 init_task_state(ts
);
3721 /* build Task State */
3727 ret
= loader_exec(filename
, target_argv
, target_environ
, regs
,
3730 printf("Error while loading %s: %s\n", filename
, strerror(-ret
));
3734 for (wrk
= target_environ
; *wrk
; wrk
++) {
3738 free(target_environ
);
3740 if (qemu_log_enabled()) {
3741 #if defined(CONFIG_USE_GUEST_BASE)
3742 qemu_log("guest_base 0x%lx\n", guest_base
);
3746 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
3747 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
3748 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n",
3750 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n",
3752 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
3753 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n",
3755 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
3756 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
3759 target_set_brk(info
->brk
);
3763 #if defined(CONFIG_USE_GUEST_BASE)
3764 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3765 generating the prologue until now so that the prologue can take
3766 the real value of GUEST_BASE into account. */
3767 tcg_prologue_init(&tcg_ctx
);
3770 #if defined(TARGET_I386)
3771 cpu_x86_set_cpl(env
, 3);
3773 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
3774 env
->hflags
|= HF_PE_MASK
;
3775 if (env
->features
[FEAT_1_EDX
] & CPUID_SSE
) {
3776 env
->cr
[4] |= CR4_OSFXSR_MASK
;
3777 env
->hflags
|= HF_OSFXSR_MASK
;
3779 #ifndef TARGET_ABI32
3780 /* enable 64 bit mode if possible */
3781 if (!(env
->features
[FEAT_8000_0001_EDX
] & CPUID_EXT2_LM
)) {
3782 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
3785 env
->cr
[4] |= CR4_PAE_MASK
;
3786 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
3787 env
->hflags
|= HF_LMA_MASK
;
3790 /* flags setup : we activate the IRQs by default as in user mode */
3791 env
->eflags
|= IF_MASK
;
3793 /* linux register setup */
3794 #ifndef TARGET_ABI32
3795 env
->regs
[R_EAX
] = regs
->rax
;
3796 env
->regs
[R_EBX
] = regs
->rbx
;
3797 env
->regs
[R_ECX
] = regs
->rcx
;
3798 env
->regs
[R_EDX
] = regs
->rdx
;
3799 env
->regs
[R_ESI
] = regs
->rsi
;
3800 env
->regs
[R_EDI
] = regs
->rdi
;
3801 env
->regs
[R_EBP
] = regs
->rbp
;
3802 env
->regs
[R_ESP
] = regs
->rsp
;
3803 env
->eip
= regs
->rip
;
3805 env
->regs
[R_EAX
] = regs
->eax
;
3806 env
->regs
[R_EBX
] = regs
->ebx
;
3807 env
->regs
[R_ECX
] = regs
->ecx
;
3808 env
->regs
[R_EDX
] = regs
->edx
;
3809 env
->regs
[R_ESI
] = regs
->esi
;
3810 env
->regs
[R_EDI
] = regs
->edi
;
3811 env
->regs
[R_EBP
] = regs
->ebp
;
3812 env
->regs
[R_ESP
] = regs
->esp
;
3813 env
->eip
= regs
->eip
;
3816 /* linux interrupt setup */
3817 #ifndef TARGET_ABI32
3818 env
->idt
.limit
= 511;
3820 env
->idt
.limit
= 255;
3822 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
3823 PROT_READ
|PROT_WRITE
,
3824 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3825 idt_table
= g2h(env
->idt
.base
);
3848 /* linux segment setup */
3850 uint64_t *gdt_table
;
3851 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
3852 PROT_READ
|PROT_WRITE
,
3853 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3854 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
3855 gdt_table
= g2h(env
->gdt
.base
);
3857 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3858 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3859 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3861 /* 64 bit code segment */
3862 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3863 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3865 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3867 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
3868 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3869 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
3871 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
3872 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
3874 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
3875 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
3876 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
3877 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
3878 /* This hack makes Wine work... */
3879 env
->segs
[R_FS
].selector
= 0;
3881 cpu_x86_load_seg(env
, R_DS
, 0);
3882 cpu_x86_load_seg(env
, R_ES
, 0);
3883 cpu_x86_load_seg(env
, R_FS
, 0);
3884 cpu_x86_load_seg(env
, R_GS
, 0);
3886 #elif defined(TARGET_ARM)
3889 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
3890 for(i
= 0; i
< 16; i
++) {
3891 env
->regs
[i
] = regs
->uregs
[i
];
3894 if (EF_ARM_EABI_VERSION(info
->elf_flags
) >= EF_ARM_EABI_VER4
3895 && (info
->elf_flags
& EF_ARM_BE8
)) {
3896 env
->bswap_code
= 1;
3899 #elif defined(TARGET_UNICORE32)
3902 cpu_asr_write(env
, regs
->uregs
[32], 0xffffffff);
3903 for (i
= 0; i
< 32; i
++) {
3904 env
->regs
[i
] = regs
->uregs
[i
];
3907 #elif defined(TARGET_SPARC)
3911 env
->npc
= regs
->npc
;
3913 for(i
= 0; i
< 8; i
++)
3914 env
->gregs
[i
] = regs
->u_regs
[i
];
3915 for(i
= 0; i
< 8; i
++)
3916 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
3918 #elif defined(TARGET_PPC)
3922 #if defined(TARGET_PPC64)
3923 #if defined(TARGET_ABI32)
3924 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
3926 env
->msr
|= (target_ulong
)1 << MSR_SF
;
3929 env
->nip
= regs
->nip
;
3930 for(i
= 0; i
< 32; i
++) {
3931 env
->gpr
[i
] = regs
->gpr
[i
];
3934 #elif defined(TARGET_M68K)
3937 env
->dregs
[0] = regs
->d0
;
3938 env
->dregs
[1] = regs
->d1
;
3939 env
->dregs
[2] = regs
->d2
;
3940 env
->dregs
[3] = regs
->d3
;
3941 env
->dregs
[4] = regs
->d4
;
3942 env
->dregs
[5] = regs
->d5
;
3943 env
->dregs
[6] = regs
->d6
;
3944 env
->dregs
[7] = regs
->d7
;
3945 env
->aregs
[0] = regs
->a0
;
3946 env
->aregs
[1] = regs
->a1
;
3947 env
->aregs
[2] = regs
->a2
;
3948 env
->aregs
[3] = regs
->a3
;
3949 env
->aregs
[4] = regs
->a4
;
3950 env
->aregs
[5] = regs
->a5
;
3951 env
->aregs
[6] = regs
->a6
;
3952 env
->aregs
[7] = regs
->usp
;
3954 ts
->sim_syscalls
= 1;
3956 #elif defined(TARGET_MICROBLAZE)
3958 env
->regs
[0] = regs
->r0
;
3959 env
->regs
[1] = regs
->r1
;
3960 env
->regs
[2] = regs
->r2
;
3961 env
->regs
[3] = regs
->r3
;
3962 env
->regs
[4] = regs
->r4
;
3963 env
->regs
[5] = regs
->r5
;
3964 env
->regs
[6] = regs
->r6
;
3965 env
->regs
[7] = regs
->r7
;
3966 env
->regs
[8] = regs
->r8
;
3967 env
->regs
[9] = regs
->r9
;
3968 env
->regs
[10] = regs
->r10
;
3969 env
->regs
[11] = regs
->r11
;
3970 env
->regs
[12] = regs
->r12
;
3971 env
->regs
[13] = regs
->r13
;
3972 env
->regs
[14] = regs
->r14
;
3973 env
->regs
[15] = regs
->r15
;
3974 env
->regs
[16] = regs
->r16
;
3975 env
->regs
[17] = regs
->r17
;
3976 env
->regs
[18] = regs
->r18
;
3977 env
->regs
[19] = regs
->r19
;
3978 env
->regs
[20] = regs
->r20
;
3979 env
->regs
[21] = regs
->r21
;
3980 env
->regs
[22] = regs
->r22
;
3981 env
->regs
[23] = regs
->r23
;
3982 env
->regs
[24] = regs
->r24
;
3983 env
->regs
[25] = regs
->r25
;
3984 env
->regs
[26] = regs
->r26
;
3985 env
->regs
[27] = regs
->r27
;
3986 env
->regs
[28] = regs
->r28
;
3987 env
->regs
[29] = regs
->r29
;
3988 env
->regs
[30] = regs
->r30
;
3989 env
->regs
[31] = regs
->r31
;
3990 env
->sregs
[SR_PC
] = regs
->pc
;
3992 #elif defined(TARGET_MIPS)
3996 for(i
= 0; i
< 32; i
++) {
3997 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
3999 env
->active_tc
.PC
= regs
->cp0_epc
& ~(target_ulong
)1;
4000 if (regs
->cp0_epc
& 1) {
4001 env
->hflags
|= MIPS_HFLAG_M16
;
4004 #elif defined(TARGET_OPENRISC)
4008 for (i
= 0; i
< 32; i
++) {
4009 env
->gpr
[i
] = regs
->gpr
[i
];
4015 #elif defined(TARGET_SH4)
4019 for(i
= 0; i
< 16; i
++) {
4020 env
->gregs
[i
] = regs
->regs
[i
];
4024 #elif defined(TARGET_ALPHA)
4028 for(i
= 0; i
< 28; i
++) {
4029 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
4031 env
->ir
[IR_SP
] = regs
->usp
;
4034 #elif defined(TARGET_CRIS)
4036 env
->regs
[0] = regs
->r0
;
4037 env
->regs
[1] = regs
->r1
;
4038 env
->regs
[2] = regs
->r2
;
4039 env
->regs
[3] = regs
->r3
;
4040 env
->regs
[4] = regs
->r4
;
4041 env
->regs
[5] = regs
->r5
;
4042 env
->regs
[6] = regs
->r6
;
4043 env
->regs
[7] = regs
->r7
;
4044 env
->regs
[8] = regs
->r8
;
4045 env
->regs
[9] = regs
->r9
;
4046 env
->regs
[10] = regs
->r10
;
4047 env
->regs
[11] = regs
->r11
;
4048 env
->regs
[12] = regs
->r12
;
4049 env
->regs
[13] = regs
->r13
;
4050 env
->regs
[14] = info
->start_stack
;
4051 env
->regs
[15] = regs
->acr
;
4052 env
->pc
= regs
->erp
;
4054 #elif defined(TARGET_S390X)
4057 for (i
= 0; i
< 16; i
++) {
4058 env
->regs
[i
] = regs
->gprs
[i
];
4060 env
->psw
.mask
= regs
->psw
.mask
;
4061 env
->psw
.addr
= regs
->psw
.addr
;
4064 #error unsupported target CPU
4067 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
4068 ts
->stack_base
= info
->start_stack
;
4069 ts
->heap_base
= info
->brk
;
4070 /* This will be filled in on the first SYS_HEAPINFO call. */
4075 if (gdbserver_start(gdbstub_port
) < 0) {
4076 fprintf(stderr
, "qemu: could not open gdbserver on port %d\n",
4080 gdb_handlesig(env
, 0);