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Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
[qemu.git] / linux-user / main.c
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19 #include <stdlib.h>
20 #include <stdio.h>
21 #include <stdarg.h>
22 #include <string.h>
23 #include <errno.h>
24 #include <unistd.h>
25 #include <sys/mman.h>
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
28
29 #include "qemu.h"
30 #include "qemu-common.h"
31 #include "cache-utils.h"
32 #include "cpu.h"
33 #include "tcg.h"
34 #include "qemu-timer.h"
35 #include "envlist.h"
36 #include "elf.h"
37
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
39
40 char *exec_path;
41
42 int singlestep;
43 const char *filename;
44 const char *argv0;
45 int gdbstub_port;
46 envlist_t *envlist;
47 const char *cpu_model;
48 unsigned long mmap_min_addr;
49 #if defined(CONFIG_USE_GUEST_BASE)
50 unsigned long guest_base;
51 int have_guest_base;
52 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
53 /*
54 * When running 32-on-64 we should make sure we can fit all of the possible
55 * guest address space into a contiguous chunk of virtual host memory.
56 *
57 * This way we will never overlap with our own libraries or binaries or stack
58 * or anything else that QEMU maps.
59 */
60 unsigned long reserved_va = 0xf7000000;
61 #else
62 unsigned long reserved_va;
63 #endif
64 #endif
65
66 static void usage(void);
67
68 static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
69 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
70
71 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
72 we allocate a bigger stack. Need a better solution, for example
73 by remapping the process stack directly at the right place */
74 unsigned long guest_stack_size = 8 * 1024 * 1024UL;
75
76 void gemu_log(const char *fmt, ...)
77 {
78 va_list ap;
79
80 va_start(ap, fmt);
81 vfprintf(stderr, fmt, ap);
82 va_end(ap);
83 }
84
85 #if defined(TARGET_I386)
86 int cpu_get_pic_interrupt(CPUX86State *env)
87 {
88 return -1;
89 }
90 #endif
91
92 /* timers for rdtsc */
93
94 #if 0
95
96 static uint64_t emu_time;
97
98 int64_t cpu_get_real_ticks(void)
99 {
100 return emu_time++;
101 }
102
103 #endif
104
105 #if defined(CONFIG_USE_NPTL)
106 /***********************************************************/
107 /* Helper routines for implementing atomic operations. */
108
109 /* To implement exclusive operations we force all cpus to syncronise.
110 We don't require a full sync, only that no cpus are executing guest code.
111 The alternative is to map target atomic ops onto host equivalents,
112 which requires quite a lot of per host/target work. */
113 static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
114 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
115 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
116 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
117 static int pending_cpus;
118
119 /* Make sure everything is in a consistent state for calling fork(). */
120 void fork_start(void)
121 {
122 pthread_mutex_lock(&tb_lock);
123 pthread_mutex_lock(&exclusive_lock);
124 mmap_fork_start();
125 }
126
127 void fork_end(int child)
128 {
129 mmap_fork_end(child);
130 if (child) {
131 /* Child processes created by fork() only have a single thread.
132 Discard information about the parent threads. */
133 first_cpu = thread_env;
134 thread_env->next_cpu = NULL;
135 pending_cpus = 0;
136 pthread_mutex_init(&exclusive_lock, NULL);
137 pthread_mutex_init(&cpu_list_mutex, NULL);
138 pthread_cond_init(&exclusive_cond, NULL);
139 pthread_cond_init(&exclusive_resume, NULL);
140 pthread_mutex_init(&tb_lock, NULL);
141 gdbserver_fork(thread_env);
142 } else {
143 pthread_mutex_unlock(&exclusive_lock);
144 pthread_mutex_unlock(&tb_lock);
145 }
146 }
147
148 /* Wait for pending exclusive operations to complete. The exclusive lock
149 must be held. */
150 static inline void exclusive_idle(void)
151 {
152 while (pending_cpus) {
153 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
154 }
155 }
156
157 /* Start an exclusive operation.
158 Must only be called from outside cpu_arm_exec. */
159 static inline void start_exclusive(void)
160 {
161 CPUArchState *other;
162 pthread_mutex_lock(&exclusive_lock);
163 exclusive_idle();
164
165 pending_cpus = 1;
166 /* Make all other cpus stop executing. */
167 for (other = first_cpu; other; other = other->next_cpu) {
168 if (other->running) {
169 pending_cpus++;
170 cpu_exit(other);
171 }
172 }
173 if (pending_cpus > 1) {
174 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
175 }
176 }
177
178 /* Finish an exclusive operation. */
179 static inline void end_exclusive(void)
180 {
181 pending_cpus = 0;
182 pthread_cond_broadcast(&exclusive_resume);
183 pthread_mutex_unlock(&exclusive_lock);
184 }
185
186 /* Wait for exclusive ops to finish, and begin cpu execution. */
187 static inline void cpu_exec_start(CPUArchState *env)
188 {
189 pthread_mutex_lock(&exclusive_lock);
190 exclusive_idle();
191 env->running = 1;
192 pthread_mutex_unlock(&exclusive_lock);
193 }
194
195 /* Mark cpu as not executing, and release pending exclusive ops. */
196 static inline void cpu_exec_end(CPUArchState *env)
197 {
198 pthread_mutex_lock(&exclusive_lock);
199 env->running = 0;
200 if (pending_cpus > 1) {
201 pending_cpus--;
202 if (pending_cpus == 1) {
203 pthread_cond_signal(&exclusive_cond);
204 }
205 }
206 exclusive_idle();
207 pthread_mutex_unlock(&exclusive_lock);
208 }
209
210 void cpu_list_lock(void)
211 {
212 pthread_mutex_lock(&cpu_list_mutex);
213 }
214
215 void cpu_list_unlock(void)
216 {
217 pthread_mutex_unlock(&cpu_list_mutex);
218 }
219 #else /* if !CONFIG_USE_NPTL */
220 /* These are no-ops because we are not threadsafe. */
221 static inline void cpu_exec_start(CPUArchState *env)
222 {
223 }
224
225 static inline void cpu_exec_end(CPUArchState *env)
226 {
227 }
228
229 static inline void start_exclusive(void)
230 {
231 }
232
233 static inline void end_exclusive(void)
234 {
235 }
236
237 void fork_start(void)
238 {
239 }
240
241 void fork_end(int child)
242 {
243 if (child) {
244 gdbserver_fork(thread_env);
245 }
246 }
247
248 void cpu_list_lock(void)
249 {
250 }
251
252 void cpu_list_unlock(void)
253 {
254 }
255 #endif
256
257
258 #ifdef TARGET_I386
259 /***********************************************************/
260 /* CPUX86 core interface */
261
262 void cpu_smm_update(CPUX86State *env)
263 {
264 }
265
266 uint64_t cpu_get_tsc(CPUX86State *env)
267 {
268 return cpu_get_real_ticks();
269 }
270
271 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
272 int flags)
273 {
274 unsigned int e1, e2;
275 uint32_t *p;
276 e1 = (addr << 16) | (limit & 0xffff);
277 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
278 e2 |= flags;
279 p = ptr;
280 p[0] = tswap32(e1);
281 p[1] = tswap32(e2);
282 }
283
284 static uint64_t *idt_table;
285 #ifdef TARGET_X86_64
286 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
287 uint64_t addr, unsigned int sel)
288 {
289 uint32_t *p, e1, e2;
290 e1 = (addr & 0xffff) | (sel << 16);
291 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
292 p = ptr;
293 p[0] = tswap32(e1);
294 p[1] = tswap32(e2);
295 p[2] = tswap32(addr >> 32);
296 p[3] = 0;
297 }
298 /* only dpl matters as we do only user space emulation */
299 static void set_idt(int n, unsigned int dpl)
300 {
301 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
302 }
303 #else
304 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
305 uint32_t addr, unsigned int sel)
306 {
307 uint32_t *p, e1, e2;
308 e1 = (addr & 0xffff) | (sel << 16);
309 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
310 p = ptr;
311 p[0] = tswap32(e1);
312 p[1] = tswap32(e2);
313 }
314
315 /* only dpl matters as we do only user space emulation */
316 static void set_idt(int n, unsigned int dpl)
317 {
318 set_gate(idt_table + n, 0, dpl, 0, 0);
319 }
320 #endif
321
322 void cpu_loop(CPUX86State *env)
323 {
324 int trapnr;
325 abi_ulong pc;
326 target_siginfo_t info;
327
328 for(;;) {
329 trapnr = cpu_x86_exec(env);
330 switch(trapnr) {
331 case 0x80:
332 /* linux syscall from int $0x80 */
333 env->regs[R_EAX] = do_syscall(env,
334 env->regs[R_EAX],
335 env->regs[R_EBX],
336 env->regs[R_ECX],
337 env->regs[R_EDX],
338 env->regs[R_ESI],
339 env->regs[R_EDI],
340 env->regs[R_EBP],
341 0, 0);
342 break;
343 #ifndef TARGET_ABI32
344 case EXCP_SYSCALL:
345 /* linux syscall from syscall instruction */
346 env->regs[R_EAX] = do_syscall(env,
347 env->regs[R_EAX],
348 env->regs[R_EDI],
349 env->regs[R_ESI],
350 env->regs[R_EDX],
351 env->regs[10],
352 env->regs[8],
353 env->regs[9],
354 0, 0);
355 env->eip = env->exception_next_eip;
356 break;
357 #endif
358 case EXCP0B_NOSEG:
359 case EXCP0C_STACK:
360 info.si_signo = SIGBUS;
361 info.si_errno = 0;
362 info.si_code = TARGET_SI_KERNEL;
363 info._sifields._sigfault._addr = 0;
364 queue_signal(env, info.si_signo, &info);
365 break;
366 case EXCP0D_GPF:
367 /* XXX: potential problem if ABI32 */
368 #ifndef TARGET_X86_64
369 if (env->eflags & VM_MASK) {
370 handle_vm86_fault(env);
371 } else
372 #endif
373 {
374 info.si_signo = SIGSEGV;
375 info.si_errno = 0;
376 info.si_code = TARGET_SI_KERNEL;
377 info._sifields._sigfault._addr = 0;
378 queue_signal(env, info.si_signo, &info);
379 }
380 break;
381 case EXCP0E_PAGE:
382 info.si_signo = SIGSEGV;
383 info.si_errno = 0;
384 if (!(env->error_code & 1))
385 info.si_code = TARGET_SEGV_MAPERR;
386 else
387 info.si_code = TARGET_SEGV_ACCERR;
388 info._sifields._sigfault._addr = env->cr[2];
389 queue_signal(env, info.si_signo, &info);
390 break;
391 case EXCP00_DIVZ:
392 #ifndef TARGET_X86_64
393 if (env->eflags & VM_MASK) {
394 handle_vm86_trap(env, trapnr);
395 } else
396 #endif
397 {
398 /* division by zero */
399 info.si_signo = SIGFPE;
400 info.si_errno = 0;
401 info.si_code = TARGET_FPE_INTDIV;
402 info._sifields._sigfault._addr = env->eip;
403 queue_signal(env, info.si_signo, &info);
404 }
405 break;
406 case EXCP01_DB:
407 case EXCP03_INT3:
408 #ifndef TARGET_X86_64
409 if (env->eflags & VM_MASK) {
410 handle_vm86_trap(env, trapnr);
411 } else
412 #endif
413 {
414 info.si_signo = SIGTRAP;
415 info.si_errno = 0;
416 if (trapnr == EXCP01_DB) {
417 info.si_code = TARGET_TRAP_BRKPT;
418 info._sifields._sigfault._addr = env->eip;
419 } else {
420 info.si_code = TARGET_SI_KERNEL;
421 info._sifields._sigfault._addr = 0;
422 }
423 queue_signal(env, info.si_signo, &info);
424 }
425 break;
426 case EXCP04_INTO:
427 case EXCP05_BOUND:
428 #ifndef TARGET_X86_64
429 if (env->eflags & VM_MASK) {
430 handle_vm86_trap(env, trapnr);
431 } else
432 #endif
433 {
434 info.si_signo = SIGSEGV;
435 info.si_errno = 0;
436 info.si_code = TARGET_SI_KERNEL;
437 info._sifields._sigfault._addr = 0;
438 queue_signal(env, info.si_signo, &info);
439 }
440 break;
441 case EXCP06_ILLOP:
442 info.si_signo = SIGILL;
443 info.si_errno = 0;
444 info.si_code = TARGET_ILL_ILLOPN;
445 info._sifields._sigfault._addr = env->eip;
446 queue_signal(env, info.si_signo, &info);
447 break;
448 case EXCP_INTERRUPT:
449 /* just indicate that signals should be handled asap */
450 break;
451 case EXCP_DEBUG:
452 {
453 int sig;
454
455 sig = gdb_handlesig (env, TARGET_SIGTRAP);
456 if (sig)
457 {
458 info.si_signo = sig;
459 info.si_errno = 0;
460 info.si_code = TARGET_TRAP_BRKPT;
461 queue_signal(env, info.si_signo, &info);
462 }
463 }
464 break;
465 default:
466 pc = env->segs[R_CS].base + env->eip;
467 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
468 (long)pc, trapnr);
469 abort();
470 }
471 process_pending_signals(env);
472 }
473 }
474 #endif
475
476 #ifdef TARGET_ARM
477
478 #define get_user_code_u32(x, gaddr, doswap) \
479 ({ abi_long __r = get_user_u32((x), (gaddr)); \
480 if (!__r && (doswap)) { \
481 (x) = bswap32(x); \
482 } \
483 __r; \
484 })
485
486 #define get_user_code_u16(x, gaddr, doswap) \
487 ({ abi_long __r = get_user_u16((x), (gaddr)); \
488 if (!__r && (doswap)) { \
489 (x) = bswap16(x); \
490 } \
491 __r; \
492 })
493
494 /*
495 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
496 * Input:
497 * r0 = pointer to oldval
498 * r1 = pointer to newval
499 * r2 = pointer to target value
500 *
501 * Output:
502 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
503 * C set if *ptr was changed, clear if no exchange happened
504 *
505 * Note segv's in kernel helpers are a bit tricky, we can set the
506 * data address sensibly but the PC address is just the entry point.
507 */
508 static void arm_kernel_cmpxchg64_helper(CPUARMState *env)
509 {
510 uint64_t oldval, newval, val;
511 uint32_t addr, cpsr;
512 target_siginfo_t info;
513
514 /* Based on the 32 bit code in do_kernel_trap */
515
516 /* XXX: This only works between threads, not between processes.
517 It's probably possible to implement this with native host
518 operations. However things like ldrex/strex are much harder so
519 there's not much point trying. */
520 start_exclusive();
521 cpsr = cpsr_read(env);
522 addr = env->regs[2];
523
524 if (get_user_u64(oldval, env->regs[0])) {
525 env->cp15.c6_data = env->regs[0];
526 goto segv;
527 };
528
529 if (get_user_u64(newval, env->regs[1])) {
530 env->cp15.c6_data = env->regs[1];
531 goto segv;
532 };
533
534 if (get_user_u64(val, addr)) {
535 env->cp15.c6_data = addr;
536 goto segv;
537 }
538
539 if (val == oldval) {
540 val = newval;
541
542 if (put_user_u64(val, addr)) {
543 env->cp15.c6_data = addr;
544 goto segv;
545 };
546
547 env->regs[0] = 0;
548 cpsr |= CPSR_C;
549 } else {
550 env->regs[0] = -1;
551 cpsr &= ~CPSR_C;
552 }
553 cpsr_write(env, cpsr, CPSR_C);
554 end_exclusive();
555 return;
556
557 segv:
558 end_exclusive();
559 /* We get the PC of the entry address - which is as good as anything,
560 on a real kernel what you get depends on which mode it uses. */
561 info.si_signo = SIGSEGV;
562 info.si_errno = 0;
563 /* XXX: check env->error_code */
564 info.si_code = TARGET_SEGV_MAPERR;
565 info._sifields._sigfault._addr = env->cp15.c6_data;
566 queue_signal(env, info.si_signo, &info);
567
568 end_exclusive();
569 }
570
571 /* Handle a jump to the kernel code page. */
572 static int
573 do_kernel_trap(CPUARMState *env)
574 {
575 uint32_t addr;
576 uint32_t cpsr;
577 uint32_t val;
578
579 switch (env->regs[15]) {
580 case 0xffff0fa0: /* __kernel_memory_barrier */
581 /* ??? No-op. Will need to do better for SMP. */
582 break;
583 case 0xffff0fc0: /* __kernel_cmpxchg */
584 /* XXX: This only works between threads, not between processes.
585 It's probably possible to implement this with native host
586 operations. However things like ldrex/strex are much harder so
587 there's not much point trying. */
588 start_exclusive();
589 cpsr = cpsr_read(env);
590 addr = env->regs[2];
591 /* FIXME: This should SEGV if the access fails. */
592 if (get_user_u32(val, addr))
593 val = ~env->regs[0];
594 if (val == env->regs[0]) {
595 val = env->regs[1];
596 /* FIXME: Check for segfaults. */
597 put_user_u32(val, addr);
598 env->regs[0] = 0;
599 cpsr |= CPSR_C;
600 } else {
601 env->regs[0] = -1;
602 cpsr &= ~CPSR_C;
603 }
604 cpsr_write(env, cpsr, CPSR_C);
605 end_exclusive();
606 break;
607 case 0xffff0fe0: /* __kernel_get_tls */
608 env->regs[0] = env->cp15.c13_tls2;
609 break;
610 case 0xffff0f60: /* __kernel_cmpxchg64 */
611 arm_kernel_cmpxchg64_helper(env);
612 break;
613
614 default:
615 return 1;
616 }
617 /* Jump back to the caller. */
618 addr = env->regs[14];
619 if (addr & 1) {
620 env->thumb = 1;
621 addr &= ~1;
622 }
623 env->regs[15] = addr;
624
625 return 0;
626 }
627
628 static int do_strex(CPUARMState *env)
629 {
630 uint32_t val;
631 int size;
632 int rc = 1;
633 int segv = 0;
634 uint32_t addr;
635 start_exclusive();
636 addr = env->exclusive_addr;
637 if (addr != env->exclusive_test) {
638 goto fail;
639 }
640 size = env->exclusive_info & 0xf;
641 switch (size) {
642 case 0:
643 segv = get_user_u8(val, addr);
644 break;
645 case 1:
646 segv = get_user_u16(val, addr);
647 break;
648 case 2:
649 case 3:
650 segv = get_user_u32(val, addr);
651 break;
652 default:
653 abort();
654 }
655 if (segv) {
656 env->cp15.c6_data = addr;
657 goto done;
658 }
659 if (val != env->exclusive_val) {
660 goto fail;
661 }
662 if (size == 3) {
663 segv = get_user_u32(val, addr + 4);
664 if (segv) {
665 env->cp15.c6_data = addr + 4;
666 goto done;
667 }
668 if (val != env->exclusive_high) {
669 goto fail;
670 }
671 }
672 val = env->regs[(env->exclusive_info >> 8) & 0xf];
673 switch (size) {
674 case 0:
675 segv = put_user_u8(val, addr);
676 break;
677 case 1:
678 segv = put_user_u16(val, addr);
679 break;
680 case 2:
681 case 3:
682 segv = put_user_u32(val, addr);
683 break;
684 }
685 if (segv) {
686 env->cp15.c6_data = addr;
687 goto done;
688 }
689 if (size == 3) {
690 val = env->regs[(env->exclusive_info >> 12) & 0xf];
691 segv = put_user_u32(val, addr + 4);
692 if (segv) {
693 env->cp15.c6_data = addr + 4;
694 goto done;
695 }
696 }
697 rc = 0;
698 fail:
699 env->regs[15] += 4;
700 env->regs[(env->exclusive_info >> 4) & 0xf] = rc;
701 done:
702 end_exclusive();
703 return segv;
704 }
705
706 void cpu_loop(CPUARMState *env)
707 {
708 int trapnr;
709 unsigned int n, insn;
710 target_siginfo_t info;
711 uint32_t addr;
712
713 for(;;) {
714 cpu_exec_start(env);
715 trapnr = cpu_arm_exec(env);
716 cpu_exec_end(env);
717 switch(trapnr) {
718 case EXCP_UDEF:
719 {
720 TaskState *ts = env->opaque;
721 uint32_t opcode;
722 int rc;
723
724 /* we handle the FPU emulation here, as Linux */
725 /* we get the opcode */
726 /* FIXME - what to do if get_user() fails? */
727 get_user_code_u32(opcode, env->regs[15], env->bswap_code);
728
729 rc = EmulateAll(opcode, &ts->fpa, env);
730 if (rc == 0) { /* illegal instruction */
731 info.si_signo = SIGILL;
732 info.si_errno = 0;
733 info.si_code = TARGET_ILL_ILLOPN;
734 info._sifields._sigfault._addr = env->regs[15];
735 queue_signal(env, info.si_signo, &info);
736 } else if (rc < 0) { /* FP exception */
737 int arm_fpe=0;
738
739 /* translate softfloat flags to FPSR flags */
740 if (-rc & float_flag_invalid)
741 arm_fpe |= BIT_IOC;
742 if (-rc & float_flag_divbyzero)
743 arm_fpe |= BIT_DZC;
744 if (-rc & float_flag_overflow)
745 arm_fpe |= BIT_OFC;
746 if (-rc & float_flag_underflow)
747 arm_fpe |= BIT_UFC;
748 if (-rc & float_flag_inexact)
749 arm_fpe |= BIT_IXC;
750
751 FPSR fpsr = ts->fpa.fpsr;
752 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
753
754 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
755 info.si_signo = SIGFPE;
756 info.si_errno = 0;
757
758 /* ordered by priority, least first */
759 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
760 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
761 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
762 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
763 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
764
765 info._sifields._sigfault._addr = env->regs[15];
766 queue_signal(env, info.si_signo, &info);
767 } else {
768 env->regs[15] += 4;
769 }
770
771 /* accumulate unenabled exceptions */
772 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
773 fpsr |= BIT_IXC;
774 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
775 fpsr |= BIT_UFC;
776 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
777 fpsr |= BIT_OFC;
778 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
779 fpsr |= BIT_DZC;
780 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
781 fpsr |= BIT_IOC;
782 ts->fpa.fpsr=fpsr;
783 } else { /* everything OK */
784 /* increment PC */
785 env->regs[15] += 4;
786 }
787 }
788 break;
789 case EXCP_SWI:
790 case EXCP_BKPT:
791 {
792 env->eabi = 1;
793 /* system call */
794 if (trapnr == EXCP_BKPT) {
795 if (env->thumb) {
796 /* FIXME - what to do if get_user() fails? */
797 get_user_code_u16(insn, env->regs[15], env->bswap_code);
798 n = insn & 0xff;
799 env->regs[15] += 2;
800 } else {
801 /* FIXME - what to do if get_user() fails? */
802 get_user_code_u32(insn, env->regs[15], env->bswap_code);
803 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
804 env->regs[15] += 4;
805 }
806 } else {
807 if (env->thumb) {
808 /* FIXME - what to do if get_user() fails? */
809 get_user_code_u16(insn, env->regs[15] - 2,
810 env->bswap_code);
811 n = insn & 0xff;
812 } else {
813 /* FIXME - what to do if get_user() fails? */
814 get_user_code_u32(insn, env->regs[15] - 4,
815 env->bswap_code);
816 n = insn & 0xffffff;
817 }
818 }
819
820 if (n == ARM_NR_cacheflush) {
821 /* nop */
822 } else if (n == ARM_NR_semihosting
823 || n == ARM_NR_thumb_semihosting) {
824 env->regs[0] = do_arm_semihosting (env);
825 } else if (n == 0 || n >= ARM_SYSCALL_BASE
826 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
827 /* linux syscall */
828 if (env->thumb || n == 0) {
829 n = env->regs[7];
830 } else {
831 n -= ARM_SYSCALL_BASE;
832 env->eabi = 0;
833 }
834 if ( n > ARM_NR_BASE) {
835 switch (n) {
836 case ARM_NR_cacheflush:
837 /* nop */
838 break;
839 case ARM_NR_set_tls:
840 cpu_set_tls(env, env->regs[0]);
841 env->regs[0] = 0;
842 break;
843 default:
844 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
845 n);
846 env->regs[0] = -TARGET_ENOSYS;
847 break;
848 }
849 } else {
850 env->regs[0] = do_syscall(env,
851 n,
852 env->regs[0],
853 env->regs[1],
854 env->regs[2],
855 env->regs[3],
856 env->regs[4],
857 env->regs[5],
858 0, 0);
859 }
860 } else {
861 goto error;
862 }
863 }
864 break;
865 case EXCP_INTERRUPT:
866 /* just indicate that signals should be handled asap */
867 break;
868 case EXCP_PREFETCH_ABORT:
869 addr = env->cp15.c6_insn;
870 goto do_segv;
871 case EXCP_DATA_ABORT:
872 addr = env->cp15.c6_data;
873 do_segv:
874 {
875 info.si_signo = SIGSEGV;
876 info.si_errno = 0;
877 /* XXX: check env->error_code */
878 info.si_code = TARGET_SEGV_MAPERR;
879 info._sifields._sigfault._addr = addr;
880 queue_signal(env, info.si_signo, &info);
881 }
882 break;
883 case EXCP_DEBUG:
884 {
885 int sig;
886
887 sig = gdb_handlesig (env, TARGET_SIGTRAP);
888 if (sig)
889 {
890 info.si_signo = sig;
891 info.si_errno = 0;
892 info.si_code = TARGET_TRAP_BRKPT;
893 queue_signal(env, info.si_signo, &info);
894 }
895 }
896 break;
897 case EXCP_KERNEL_TRAP:
898 if (do_kernel_trap(env))
899 goto error;
900 break;
901 case EXCP_STREX:
902 if (do_strex(env)) {
903 addr = env->cp15.c6_data;
904 goto do_segv;
905 }
906 break;
907 default:
908 error:
909 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
910 trapnr);
911 cpu_dump_state(env, stderr, fprintf, 0);
912 abort();
913 }
914 process_pending_signals(env);
915 }
916 }
917
918 #endif
919
920 #ifdef TARGET_UNICORE32
921
922 void cpu_loop(CPUUniCore32State *env)
923 {
924 int trapnr;
925 unsigned int n, insn;
926 target_siginfo_t info;
927
928 for (;;) {
929 cpu_exec_start(env);
930 trapnr = uc32_cpu_exec(env);
931 cpu_exec_end(env);
932 switch (trapnr) {
933 case UC32_EXCP_PRIV:
934 {
935 /* system call */
936 get_user_u32(insn, env->regs[31] - 4);
937 n = insn & 0xffffff;
938
939 if (n >= UC32_SYSCALL_BASE) {
940 /* linux syscall */
941 n -= UC32_SYSCALL_BASE;
942 if (n == UC32_SYSCALL_NR_set_tls) {
943 cpu_set_tls(env, env->regs[0]);
944 env->regs[0] = 0;
945 } else {
946 env->regs[0] = do_syscall(env,
947 n,
948 env->regs[0],
949 env->regs[1],
950 env->regs[2],
951 env->regs[3],
952 env->regs[4],
953 env->regs[5],
954 0, 0);
955 }
956 } else {
957 goto error;
958 }
959 }
960 break;
961 case UC32_EXCP_DTRAP:
962 case UC32_EXCP_ITRAP:
963 info.si_signo = SIGSEGV;
964 info.si_errno = 0;
965 /* XXX: check env->error_code */
966 info.si_code = TARGET_SEGV_MAPERR;
967 info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
968 queue_signal(env, info.si_signo, &info);
969 break;
970 case EXCP_INTERRUPT:
971 /* just indicate that signals should be handled asap */
972 break;
973 case EXCP_DEBUG:
974 {
975 int sig;
976
977 sig = gdb_handlesig(env, TARGET_SIGTRAP);
978 if (sig) {
979 info.si_signo = sig;
980 info.si_errno = 0;
981 info.si_code = TARGET_TRAP_BRKPT;
982 queue_signal(env, info.si_signo, &info);
983 }
984 }
985 break;
986 default:
987 goto error;
988 }
989 process_pending_signals(env);
990 }
991
992 error:
993 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
994 cpu_dump_state(env, stderr, fprintf, 0);
995 abort();
996 }
997 #endif
998
999 #ifdef TARGET_SPARC
1000 #define SPARC64_STACK_BIAS 2047
1001
1002 //#define DEBUG_WIN
1003
1004 /* WARNING: dealing with register windows _is_ complicated. More info
1005 can be found at http://www.sics.se/~psm/sparcstack.html */
1006 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
1007 {
1008 index = (index + cwp * 16) % (16 * env->nwindows);
1009 /* wrap handling : if cwp is on the last window, then we use the
1010 registers 'after' the end */
1011 if (index < 8 && env->cwp == env->nwindows - 1)
1012 index += 16 * env->nwindows;
1013 return index;
1014 }
1015
1016 /* save the register window 'cwp1' */
1017 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
1018 {
1019 unsigned int i;
1020 abi_ulong sp_ptr;
1021
1022 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
1023 #ifdef TARGET_SPARC64
1024 if (sp_ptr & 3)
1025 sp_ptr += SPARC64_STACK_BIAS;
1026 #endif
1027 #if defined(DEBUG_WIN)
1028 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
1029 sp_ptr, cwp1);
1030 #endif
1031 for(i = 0; i < 16; i++) {
1032 /* FIXME - what to do if put_user() fails? */
1033 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
1034 sp_ptr += sizeof(abi_ulong);
1035 }
1036 }
1037
1038 static void save_window(CPUSPARCState *env)
1039 {
1040 #ifndef TARGET_SPARC64
1041 unsigned int new_wim;
1042 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
1043 ((1LL << env->nwindows) - 1);
1044 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
1045 env->wim = new_wim;
1046 #else
1047 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
1048 env->cansave++;
1049 env->canrestore--;
1050 #endif
1051 }
1052
1053 static void restore_window(CPUSPARCState *env)
1054 {
1055 #ifndef TARGET_SPARC64
1056 unsigned int new_wim;
1057 #endif
1058 unsigned int i, cwp1;
1059 abi_ulong sp_ptr;
1060
1061 #ifndef TARGET_SPARC64
1062 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
1063 ((1LL << env->nwindows) - 1);
1064 #endif
1065
1066 /* restore the invalid window */
1067 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
1068 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
1069 #ifdef TARGET_SPARC64
1070 if (sp_ptr & 3)
1071 sp_ptr += SPARC64_STACK_BIAS;
1072 #endif
1073 #if defined(DEBUG_WIN)
1074 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
1075 sp_ptr, cwp1);
1076 #endif
1077 for(i = 0; i < 16; i++) {
1078 /* FIXME - what to do if get_user() fails? */
1079 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
1080 sp_ptr += sizeof(abi_ulong);
1081 }
1082 #ifdef TARGET_SPARC64
1083 env->canrestore++;
1084 if (env->cleanwin < env->nwindows - 1)
1085 env->cleanwin++;
1086 env->cansave--;
1087 #else
1088 env->wim = new_wim;
1089 #endif
1090 }
1091
1092 static void flush_windows(CPUSPARCState *env)
1093 {
1094 int offset, cwp1;
1095
1096 offset = 1;
1097 for(;;) {
1098 /* if restore would invoke restore_window(), then we can stop */
1099 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
1100 #ifndef TARGET_SPARC64
1101 if (env->wim & (1 << cwp1))
1102 break;
1103 #else
1104 if (env->canrestore == 0)
1105 break;
1106 env->cansave++;
1107 env->canrestore--;
1108 #endif
1109 save_window_offset(env, cwp1);
1110 offset++;
1111 }
1112 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
1113 #ifndef TARGET_SPARC64
1114 /* set wim so that restore will reload the registers */
1115 env->wim = 1 << cwp1;
1116 #endif
1117 #if defined(DEBUG_WIN)
1118 printf("flush_windows: nb=%d\n", offset - 1);
1119 #endif
1120 }
1121
1122 void cpu_loop (CPUSPARCState *env)
1123 {
1124 int trapnr;
1125 abi_long ret;
1126 target_siginfo_t info;
1127
1128 while (1) {
1129 trapnr = cpu_sparc_exec (env);
1130
1131 switch (trapnr) {
1132 #ifndef TARGET_SPARC64
1133 case 0x88:
1134 case 0x90:
1135 #else
1136 case 0x110:
1137 case 0x16d:
1138 #endif
1139 ret = do_syscall (env, env->gregs[1],
1140 env->regwptr[0], env->regwptr[1],
1141 env->regwptr[2], env->regwptr[3],
1142 env->regwptr[4], env->regwptr[5],
1143 0, 0);
1144 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
1145 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1146 env->xcc |= PSR_CARRY;
1147 #else
1148 env->psr |= PSR_CARRY;
1149 #endif
1150 ret = -ret;
1151 } else {
1152 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1153 env->xcc &= ~PSR_CARRY;
1154 #else
1155 env->psr &= ~PSR_CARRY;
1156 #endif
1157 }
1158 env->regwptr[0] = ret;
1159 /* next instruction */
1160 env->pc = env->npc;
1161 env->npc = env->npc + 4;
1162 break;
1163 case 0x83: /* flush windows */
1164 #ifdef TARGET_ABI32
1165 case 0x103:
1166 #endif
1167 flush_windows(env);
1168 /* next instruction */
1169 env->pc = env->npc;
1170 env->npc = env->npc + 4;
1171 break;
1172 #ifndef TARGET_SPARC64
1173 case TT_WIN_OVF: /* window overflow */
1174 save_window(env);
1175 break;
1176 case TT_WIN_UNF: /* window underflow */
1177 restore_window(env);
1178 break;
1179 case TT_TFAULT:
1180 case TT_DFAULT:
1181 {
1182 info.si_signo = TARGET_SIGSEGV;
1183 info.si_errno = 0;
1184 /* XXX: check env->error_code */
1185 info.si_code = TARGET_SEGV_MAPERR;
1186 info._sifields._sigfault._addr = env->mmuregs[4];
1187 queue_signal(env, info.si_signo, &info);
1188 }
1189 break;
1190 #else
1191 case TT_SPILL: /* window overflow */
1192 save_window(env);
1193 break;
1194 case TT_FILL: /* window underflow */
1195 restore_window(env);
1196 break;
1197 case TT_TFAULT:
1198 case TT_DFAULT:
1199 {
1200 info.si_signo = TARGET_SIGSEGV;
1201 info.si_errno = 0;
1202 /* XXX: check env->error_code */
1203 info.si_code = TARGET_SEGV_MAPERR;
1204 if (trapnr == TT_DFAULT)
1205 info._sifields._sigfault._addr = env->dmmuregs[4];
1206 else
1207 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
1208 queue_signal(env, info.si_signo, &info);
1209 }
1210 break;
1211 #ifndef TARGET_ABI32
1212 case 0x16e:
1213 flush_windows(env);
1214 sparc64_get_context(env);
1215 break;
1216 case 0x16f:
1217 flush_windows(env);
1218 sparc64_set_context(env);
1219 break;
1220 #endif
1221 #endif
1222 case EXCP_INTERRUPT:
1223 /* just indicate that signals should be handled asap */
1224 break;
1225 case TT_ILL_INSN:
1226 {
1227 info.si_signo = TARGET_SIGILL;
1228 info.si_errno = 0;
1229 info.si_code = TARGET_ILL_ILLOPC;
1230 info._sifields._sigfault._addr = env->pc;
1231 queue_signal(env, info.si_signo, &info);
1232 }
1233 break;
1234 case EXCP_DEBUG:
1235 {
1236 int sig;
1237
1238 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1239 if (sig)
1240 {
1241 info.si_signo = sig;
1242 info.si_errno = 0;
1243 info.si_code = TARGET_TRAP_BRKPT;
1244 queue_signal(env, info.si_signo, &info);
1245 }
1246 }
1247 break;
1248 default:
1249 printf ("Unhandled trap: 0x%x\n", trapnr);
1250 cpu_dump_state(env, stderr, fprintf, 0);
1251 exit (1);
1252 }
1253 process_pending_signals (env);
1254 }
1255 }
1256
1257 #endif
1258
1259 #ifdef TARGET_PPC
1260 static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env)
1261 {
1262 /* TO FIX */
1263 return 0;
1264 }
1265
1266 uint64_t cpu_ppc_load_tbl(CPUPPCState *env)
1267 {
1268 return cpu_ppc_get_tb(env);
1269 }
1270
1271 uint32_t cpu_ppc_load_tbu(CPUPPCState *env)
1272 {
1273 return cpu_ppc_get_tb(env) >> 32;
1274 }
1275
1276 uint64_t cpu_ppc_load_atbl(CPUPPCState *env)
1277 {
1278 return cpu_ppc_get_tb(env);
1279 }
1280
1281 uint32_t cpu_ppc_load_atbu(CPUPPCState *env)
1282 {
1283 return cpu_ppc_get_tb(env) >> 32;
1284 }
1285
1286 uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env)
1287 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1288
1289 uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env)
1290 {
1291 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1292 }
1293
1294 /* XXX: to be fixed */
1295 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
1296 {
1297 return -1;
1298 }
1299
1300 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
1301 {
1302 return -1;
1303 }
1304
1305 #define EXCP_DUMP(env, fmt, ...) \
1306 do { \
1307 fprintf(stderr, fmt , ## __VA_ARGS__); \
1308 cpu_dump_state(env, stderr, fprintf, 0); \
1309 qemu_log(fmt, ## __VA_ARGS__); \
1310 if (qemu_log_enabled()) { \
1311 log_cpu_state(env, 0); \
1312 } \
1313 } while (0)
1314
1315 static int do_store_exclusive(CPUPPCState *env)
1316 {
1317 target_ulong addr;
1318 target_ulong page_addr;
1319 target_ulong val;
1320 int flags;
1321 int segv = 0;
1322
1323 addr = env->reserve_ea;
1324 page_addr = addr & TARGET_PAGE_MASK;
1325 start_exclusive();
1326 mmap_lock();
1327 flags = page_get_flags(page_addr);
1328 if ((flags & PAGE_READ) == 0) {
1329 segv = 1;
1330 } else {
1331 int reg = env->reserve_info & 0x1f;
1332 int size = (env->reserve_info >> 5) & 0xf;
1333 int stored = 0;
1334
1335 if (addr == env->reserve_addr) {
1336 switch (size) {
1337 case 1: segv = get_user_u8(val, addr); break;
1338 case 2: segv = get_user_u16(val, addr); break;
1339 case 4: segv = get_user_u32(val, addr); break;
1340 #if defined(TARGET_PPC64)
1341 case 8: segv = get_user_u64(val, addr); break;
1342 #endif
1343 default: abort();
1344 }
1345 if (!segv && val == env->reserve_val) {
1346 val = env->gpr[reg];
1347 switch (size) {
1348 case 1: segv = put_user_u8(val, addr); break;
1349 case 2: segv = put_user_u16(val, addr); break;
1350 case 4: segv = put_user_u32(val, addr); break;
1351 #if defined(TARGET_PPC64)
1352 case 8: segv = put_user_u64(val, addr); break;
1353 #endif
1354 default: abort();
1355 }
1356 if (!segv) {
1357 stored = 1;
1358 }
1359 }
1360 }
1361 env->crf[0] = (stored << 1) | xer_so;
1362 env->reserve_addr = (target_ulong)-1;
1363 }
1364 if (!segv) {
1365 env->nip += 4;
1366 }
1367 mmap_unlock();
1368 end_exclusive();
1369 return segv;
1370 }
1371
1372 void cpu_loop(CPUPPCState *env)
1373 {
1374 target_siginfo_t info;
1375 int trapnr;
1376 target_ulong ret;
1377
1378 for(;;) {
1379 cpu_exec_start(env);
1380 trapnr = cpu_ppc_exec(env);
1381 cpu_exec_end(env);
1382 switch(trapnr) {
1383 case POWERPC_EXCP_NONE:
1384 /* Just go on */
1385 break;
1386 case POWERPC_EXCP_CRITICAL: /* Critical input */
1387 cpu_abort(env, "Critical interrupt while in user mode. "
1388 "Aborting\n");
1389 break;
1390 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1391 cpu_abort(env, "Machine check exception while in user mode. "
1392 "Aborting\n");
1393 break;
1394 case POWERPC_EXCP_DSI: /* Data storage exception */
1395 EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n",
1396 env->spr[SPR_DAR]);
1397 /* XXX: check this. Seems bugged */
1398 switch (env->error_code & 0xFF000000) {
1399 case 0x40000000:
1400 info.si_signo = TARGET_SIGSEGV;
1401 info.si_errno = 0;
1402 info.si_code = TARGET_SEGV_MAPERR;
1403 break;
1404 case 0x04000000:
1405 info.si_signo = TARGET_SIGILL;
1406 info.si_errno = 0;
1407 info.si_code = TARGET_ILL_ILLADR;
1408 break;
1409 case 0x08000000:
1410 info.si_signo = TARGET_SIGSEGV;
1411 info.si_errno = 0;
1412 info.si_code = TARGET_SEGV_ACCERR;
1413 break;
1414 default:
1415 /* Let's send a regular segfault... */
1416 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1417 env->error_code);
1418 info.si_signo = TARGET_SIGSEGV;
1419 info.si_errno = 0;
1420 info.si_code = TARGET_SEGV_MAPERR;
1421 break;
1422 }
1423 info._sifields._sigfault._addr = env->nip;
1424 queue_signal(env, info.si_signo, &info);
1425 break;
1426 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1427 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1428 "\n", env->spr[SPR_SRR0]);
1429 /* XXX: check this */
1430 switch (env->error_code & 0xFF000000) {
1431 case 0x40000000:
1432 info.si_signo = TARGET_SIGSEGV;
1433 info.si_errno = 0;
1434 info.si_code = TARGET_SEGV_MAPERR;
1435 break;
1436 case 0x10000000:
1437 case 0x08000000:
1438 info.si_signo = TARGET_SIGSEGV;
1439 info.si_errno = 0;
1440 info.si_code = TARGET_SEGV_ACCERR;
1441 break;
1442 default:
1443 /* Let's send a regular segfault... */
1444 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1445 env->error_code);
1446 info.si_signo = TARGET_SIGSEGV;
1447 info.si_errno = 0;
1448 info.si_code = TARGET_SEGV_MAPERR;
1449 break;
1450 }
1451 info._sifields._sigfault._addr = env->nip - 4;
1452 queue_signal(env, info.si_signo, &info);
1453 break;
1454 case POWERPC_EXCP_EXTERNAL: /* External input */
1455 cpu_abort(env, "External interrupt while in user mode. "
1456 "Aborting\n");
1457 break;
1458 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1459 EXCP_DUMP(env, "Unaligned memory access\n");
1460 /* XXX: check this */
1461 info.si_signo = TARGET_SIGBUS;
1462 info.si_errno = 0;
1463 info.si_code = TARGET_BUS_ADRALN;
1464 info._sifields._sigfault._addr = env->nip - 4;
1465 queue_signal(env, info.si_signo, &info);
1466 break;
1467 case POWERPC_EXCP_PROGRAM: /* Program exception */
1468 /* XXX: check this */
1469 switch (env->error_code & ~0xF) {
1470 case POWERPC_EXCP_FP:
1471 EXCP_DUMP(env, "Floating point program exception\n");
1472 info.si_signo = TARGET_SIGFPE;
1473 info.si_errno = 0;
1474 switch (env->error_code & 0xF) {
1475 case POWERPC_EXCP_FP_OX:
1476 info.si_code = TARGET_FPE_FLTOVF;
1477 break;
1478 case POWERPC_EXCP_FP_UX:
1479 info.si_code = TARGET_FPE_FLTUND;
1480 break;
1481 case POWERPC_EXCP_FP_ZX:
1482 case POWERPC_EXCP_FP_VXZDZ:
1483 info.si_code = TARGET_FPE_FLTDIV;
1484 break;
1485 case POWERPC_EXCP_FP_XX:
1486 info.si_code = TARGET_FPE_FLTRES;
1487 break;
1488 case POWERPC_EXCP_FP_VXSOFT:
1489 info.si_code = TARGET_FPE_FLTINV;
1490 break;
1491 case POWERPC_EXCP_FP_VXSNAN:
1492 case POWERPC_EXCP_FP_VXISI:
1493 case POWERPC_EXCP_FP_VXIDI:
1494 case POWERPC_EXCP_FP_VXIMZ:
1495 case POWERPC_EXCP_FP_VXVC:
1496 case POWERPC_EXCP_FP_VXSQRT:
1497 case POWERPC_EXCP_FP_VXCVI:
1498 info.si_code = TARGET_FPE_FLTSUB;
1499 break;
1500 default:
1501 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1502 env->error_code);
1503 break;
1504 }
1505 break;
1506 case POWERPC_EXCP_INVAL:
1507 EXCP_DUMP(env, "Invalid instruction\n");
1508 info.si_signo = TARGET_SIGILL;
1509 info.si_errno = 0;
1510 switch (env->error_code & 0xF) {
1511 case POWERPC_EXCP_INVAL_INVAL:
1512 info.si_code = TARGET_ILL_ILLOPC;
1513 break;
1514 case POWERPC_EXCP_INVAL_LSWX:
1515 info.si_code = TARGET_ILL_ILLOPN;
1516 break;
1517 case POWERPC_EXCP_INVAL_SPR:
1518 info.si_code = TARGET_ILL_PRVREG;
1519 break;
1520 case POWERPC_EXCP_INVAL_FP:
1521 info.si_code = TARGET_ILL_COPROC;
1522 break;
1523 default:
1524 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1525 env->error_code & 0xF);
1526 info.si_code = TARGET_ILL_ILLADR;
1527 break;
1528 }
1529 break;
1530 case POWERPC_EXCP_PRIV:
1531 EXCP_DUMP(env, "Privilege violation\n");
1532 info.si_signo = TARGET_SIGILL;
1533 info.si_errno = 0;
1534 switch (env->error_code & 0xF) {
1535 case POWERPC_EXCP_PRIV_OPC:
1536 info.si_code = TARGET_ILL_PRVOPC;
1537 break;
1538 case POWERPC_EXCP_PRIV_REG:
1539 info.si_code = TARGET_ILL_PRVREG;
1540 break;
1541 default:
1542 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1543 env->error_code & 0xF);
1544 info.si_code = TARGET_ILL_PRVOPC;
1545 break;
1546 }
1547 break;
1548 case POWERPC_EXCP_TRAP:
1549 cpu_abort(env, "Tried to call a TRAP\n");
1550 break;
1551 default:
1552 /* Should not happen ! */
1553 cpu_abort(env, "Unknown program exception (%02x)\n",
1554 env->error_code);
1555 break;
1556 }
1557 info._sifields._sigfault._addr = env->nip - 4;
1558 queue_signal(env, info.si_signo, &info);
1559 break;
1560 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1561 EXCP_DUMP(env, "No floating point allowed\n");
1562 info.si_signo = TARGET_SIGILL;
1563 info.si_errno = 0;
1564 info.si_code = TARGET_ILL_COPROC;
1565 info._sifields._sigfault._addr = env->nip - 4;
1566 queue_signal(env, info.si_signo, &info);
1567 break;
1568 case POWERPC_EXCP_SYSCALL: /* System call exception */
1569 cpu_abort(env, "Syscall exception while in user mode. "
1570 "Aborting\n");
1571 break;
1572 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1573 EXCP_DUMP(env, "No APU instruction allowed\n");
1574 info.si_signo = TARGET_SIGILL;
1575 info.si_errno = 0;
1576 info.si_code = TARGET_ILL_COPROC;
1577 info._sifields._sigfault._addr = env->nip - 4;
1578 queue_signal(env, info.si_signo, &info);
1579 break;
1580 case POWERPC_EXCP_DECR: /* Decrementer exception */
1581 cpu_abort(env, "Decrementer interrupt while in user mode. "
1582 "Aborting\n");
1583 break;
1584 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1585 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1586 "Aborting\n");
1587 break;
1588 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1589 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1590 "Aborting\n");
1591 break;
1592 case POWERPC_EXCP_DTLB: /* Data TLB error */
1593 cpu_abort(env, "Data TLB exception while in user mode. "
1594 "Aborting\n");
1595 break;
1596 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1597 cpu_abort(env, "Instruction TLB exception while in user mode. "
1598 "Aborting\n");
1599 break;
1600 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1601 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1602 info.si_signo = TARGET_SIGILL;
1603 info.si_errno = 0;
1604 info.si_code = TARGET_ILL_COPROC;
1605 info._sifields._sigfault._addr = env->nip - 4;
1606 queue_signal(env, info.si_signo, &info);
1607 break;
1608 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1609 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1610 break;
1611 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1612 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1613 break;
1614 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1615 cpu_abort(env, "Performance monitor exception not handled\n");
1616 break;
1617 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1618 cpu_abort(env, "Doorbell interrupt while in user mode. "
1619 "Aborting\n");
1620 break;
1621 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1622 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1623 "Aborting\n");
1624 break;
1625 case POWERPC_EXCP_RESET: /* System reset exception */
1626 cpu_abort(env, "Reset interrupt while in user mode. "
1627 "Aborting\n");
1628 break;
1629 case POWERPC_EXCP_DSEG: /* Data segment exception */
1630 cpu_abort(env, "Data segment exception while in user mode. "
1631 "Aborting\n");
1632 break;
1633 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1634 cpu_abort(env, "Instruction segment exception "
1635 "while in user mode. Aborting\n");
1636 break;
1637 /* PowerPC 64 with hypervisor mode support */
1638 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1639 cpu_abort(env, "Hypervisor decrementer interrupt "
1640 "while in user mode. Aborting\n");
1641 break;
1642 case POWERPC_EXCP_TRACE: /* Trace exception */
1643 /* Nothing to do:
1644 * we use this exception to emulate step-by-step execution mode.
1645 */
1646 break;
1647 /* PowerPC 64 with hypervisor mode support */
1648 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1649 cpu_abort(env, "Hypervisor data storage exception "
1650 "while in user mode. Aborting\n");
1651 break;
1652 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1653 cpu_abort(env, "Hypervisor instruction storage exception "
1654 "while in user mode. Aborting\n");
1655 break;
1656 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1657 cpu_abort(env, "Hypervisor data segment exception "
1658 "while in user mode. Aborting\n");
1659 break;
1660 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1661 cpu_abort(env, "Hypervisor instruction segment exception "
1662 "while in user mode. Aborting\n");
1663 break;
1664 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1665 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1666 info.si_signo = TARGET_SIGILL;
1667 info.si_errno = 0;
1668 info.si_code = TARGET_ILL_COPROC;
1669 info._sifields._sigfault._addr = env->nip - 4;
1670 queue_signal(env, info.si_signo, &info);
1671 break;
1672 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1673 cpu_abort(env, "Programmable interval timer interrupt "
1674 "while in user mode. Aborting\n");
1675 break;
1676 case POWERPC_EXCP_IO: /* IO error exception */
1677 cpu_abort(env, "IO error exception while in user mode. "
1678 "Aborting\n");
1679 break;
1680 case POWERPC_EXCP_RUNM: /* Run mode exception */
1681 cpu_abort(env, "Run mode exception while in user mode. "
1682 "Aborting\n");
1683 break;
1684 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1685 cpu_abort(env, "Emulation trap exception not handled\n");
1686 break;
1687 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1688 cpu_abort(env, "Instruction fetch TLB exception "
1689 "while in user-mode. Aborting");
1690 break;
1691 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1692 cpu_abort(env, "Data load TLB exception while in user-mode. "
1693 "Aborting");
1694 break;
1695 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1696 cpu_abort(env, "Data store TLB exception while in user-mode. "
1697 "Aborting");
1698 break;
1699 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1700 cpu_abort(env, "Floating-point assist exception not handled\n");
1701 break;
1702 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1703 cpu_abort(env, "Instruction address breakpoint exception "
1704 "not handled\n");
1705 break;
1706 case POWERPC_EXCP_SMI: /* System management interrupt */
1707 cpu_abort(env, "System management interrupt while in user mode. "
1708 "Aborting\n");
1709 break;
1710 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1711 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1712 "Aborting\n");
1713 break;
1714 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1715 cpu_abort(env, "Performance monitor exception not handled\n");
1716 break;
1717 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1718 cpu_abort(env, "Vector assist exception not handled\n");
1719 break;
1720 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1721 cpu_abort(env, "Soft patch exception not handled\n");
1722 break;
1723 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1724 cpu_abort(env, "Maintenance exception while in user mode. "
1725 "Aborting\n");
1726 break;
1727 case POWERPC_EXCP_STOP: /* stop translation */
1728 /* We did invalidate the instruction cache. Go on */
1729 break;
1730 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1731 /* We just stopped because of a branch. Go on */
1732 break;
1733 case POWERPC_EXCP_SYSCALL_USER:
1734 /* system call in user-mode emulation */
1735 /* WARNING:
1736 * PPC ABI uses overflow flag in cr0 to signal an error
1737 * in syscalls.
1738 */
1739 env->crf[0] &= ~0x1;
1740 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1741 env->gpr[5], env->gpr[6], env->gpr[7],
1742 env->gpr[8], 0, 0);
1743 if (ret == (target_ulong)(-TARGET_QEMU_ESIGRETURN)) {
1744 /* Returning from a successful sigreturn syscall.
1745 Avoid corrupting register state. */
1746 break;
1747 }
1748 if (ret > (target_ulong)(-515)) {
1749 env->crf[0] |= 0x1;
1750 ret = -ret;
1751 }
1752 env->gpr[3] = ret;
1753 break;
1754 case POWERPC_EXCP_STCX:
1755 if (do_store_exclusive(env)) {
1756 info.si_signo = TARGET_SIGSEGV;
1757 info.si_errno = 0;
1758 info.si_code = TARGET_SEGV_MAPERR;
1759 info._sifields._sigfault._addr = env->nip;
1760 queue_signal(env, info.si_signo, &info);
1761 }
1762 break;
1763 case EXCP_DEBUG:
1764 {
1765 int sig;
1766
1767 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1768 if (sig) {
1769 info.si_signo = sig;
1770 info.si_errno = 0;
1771 info.si_code = TARGET_TRAP_BRKPT;
1772 queue_signal(env, info.si_signo, &info);
1773 }
1774 }
1775 break;
1776 case EXCP_INTERRUPT:
1777 /* just indicate that signals should be handled asap */
1778 break;
1779 default:
1780 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1781 break;
1782 }
1783 process_pending_signals(env);
1784 }
1785 }
1786 #endif
1787
1788 #ifdef TARGET_MIPS
1789
1790 #define MIPS_SYS(name, args) args,
1791
1792 static const uint8_t mips_syscall_args[] = {
1793 MIPS_SYS(sys_syscall , 8) /* 4000 */
1794 MIPS_SYS(sys_exit , 1)
1795 MIPS_SYS(sys_fork , 0)
1796 MIPS_SYS(sys_read , 3)
1797 MIPS_SYS(sys_write , 3)
1798 MIPS_SYS(sys_open , 3) /* 4005 */
1799 MIPS_SYS(sys_close , 1)
1800 MIPS_SYS(sys_waitpid , 3)
1801 MIPS_SYS(sys_creat , 2)
1802 MIPS_SYS(sys_link , 2)
1803 MIPS_SYS(sys_unlink , 1) /* 4010 */
1804 MIPS_SYS(sys_execve , 0)
1805 MIPS_SYS(sys_chdir , 1)
1806 MIPS_SYS(sys_time , 1)
1807 MIPS_SYS(sys_mknod , 3)
1808 MIPS_SYS(sys_chmod , 2) /* 4015 */
1809 MIPS_SYS(sys_lchown , 3)
1810 MIPS_SYS(sys_ni_syscall , 0)
1811 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1812 MIPS_SYS(sys_lseek , 3)
1813 MIPS_SYS(sys_getpid , 0) /* 4020 */
1814 MIPS_SYS(sys_mount , 5)
1815 MIPS_SYS(sys_oldumount , 1)
1816 MIPS_SYS(sys_setuid , 1)
1817 MIPS_SYS(sys_getuid , 0)
1818 MIPS_SYS(sys_stime , 1) /* 4025 */
1819 MIPS_SYS(sys_ptrace , 4)
1820 MIPS_SYS(sys_alarm , 1)
1821 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1822 MIPS_SYS(sys_pause , 0)
1823 MIPS_SYS(sys_utime , 2) /* 4030 */
1824 MIPS_SYS(sys_ni_syscall , 0)
1825 MIPS_SYS(sys_ni_syscall , 0)
1826 MIPS_SYS(sys_access , 2)
1827 MIPS_SYS(sys_nice , 1)
1828 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1829 MIPS_SYS(sys_sync , 0)
1830 MIPS_SYS(sys_kill , 2)
1831 MIPS_SYS(sys_rename , 2)
1832 MIPS_SYS(sys_mkdir , 2)
1833 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1834 MIPS_SYS(sys_dup , 1)
1835 MIPS_SYS(sys_pipe , 0)
1836 MIPS_SYS(sys_times , 1)
1837 MIPS_SYS(sys_ni_syscall , 0)
1838 MIPS_SYS(sys_brk , 1) /* 4045 */
1839 MIPS_SYS(sys_setgid , 1)
1840 MIPS_SYS(sys_getgid , 0)
1841 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1842 MIPS_SYS(sys_geteuid , 0)
1843 MIPS_SYS(sys_getegid , 0) /* 4050 */
1844 MIPS_SYS(sys_acct , 0)
1845 MIPS_SYS(sys_umount , 2)
1846 MIPS_SYS(sys_ni_syscall , 0)
1847 MIPS_SYS(sys_ioctl , 3)
1848 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1849 MIPS_SYS(sys_ni_syscall , 2)
1850 MIPS_SYS(sys_setpgid , 2)
1851 MIPS_SYS(sys_ni_syscall , 0)
1852 MIPS_SYS(sys_olduname , 1)
1853 MIPS_SYS(sys_umask , 1) /* 4060 */
1854 MIPS_SYS(sys_chroot , 1)
1855 MIPS_SYS(sys_ustat , 2)
1856 MIPS_SYS(sys_dup2 , 2)
1857 MIPS_SYS(sys_getppid , 0)
1858 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1859 MIPS_SYS(sys_setsid , 0)
1860 MIPS_SYS(sys_sigaction , 3)
1861 MIPS_SYS(sys_sgetmask , 0)
1862 MIPS_SYS(sys_ssetmask , 1)
1863 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1864 MIPS_SYS(sys_setregid , 2)
1865 MIPS_SYS(sys_sigsuspend , 0)
1866 MIPS_SYS(sys_sigpending , 1)
1867 MIPS_SYS(sys_sethostname , 2)
1868 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1869 MIPS_SYS(sys_getrlimit , 2)
1870 MIPS_SYS(sys_getrusage , 2)
1871 MIPS_SYS(sys_gettimeofday, 2)
1872 MIPS_SYS(sys_settimeofday, 2)
1873 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1874 MIPS_SYS(sys_setgroups , 2)
1875 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1876 MIPS_SYS(sys_symlink , 2)
1877 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1878 MIPS_SYS(sys_readlink , 3) /* 4085 */
1879 MIPS_SYS(sys_uselib , 1)
1880 MIPS_SYS(sys_swapon , 2)
1881 MIPS_SYS(sys_reboot , 3)
1882 MIPS_SYS(old_readdir , 3)
1883 MIPS_SYS(old_mmap , 6) /* 4090 */
1884 MIPS_SYS(sys_munmap , 2)
1885 MIPS_SYS(sys_truncate , 2)
1886 MIPS_SYS(sys_ftruncate , 2)
1887 MIPS_SYS(sys_fchmod , 2)
1888 MIPS_SYS(sys_fchown , 3) /* 4095 */
1889 MIPS_SYS(sys_getpriority , 2)
1890 MIPS_SYS(sys_setpriority , 3)
1891 MIPS_SYS(sys_ni_syscall , 0)
1892 MIPS_SYS(sys_statfs , 2)
1893 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1894 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1895 MIPS_SYS(sys_socketcall , 2)
1896 MIPS_SYS(sys_syslog , 3)
1897 MIPS_SYS(sys_setitimer , 3)
1898 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1899 MIPS_SYS(sys_newstat , 2)
1900 MIPS_SYS(sys_newlstat , 2)
1901 MIPS_SYS(sys_newfstat , 2)
1902 MIPS_SYS(sys_uname , 1)
1903 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1904 MIPS_SYS(sys_vhangup , 0)
1905 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1906 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1907 MIPS_SYS(sys_wait4 , 4)
1908 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1909 MIPS_SYS(sys_sysinfo , 1)
1910 MIPS_SYS(sys_ipc , 6)
1911 MIPS_SYS(sys_fsync , 1)
1912 MIPS_SYS(sys_sigreturn , 0)
1913 MIPS_SYS(sys_clone , 6) /* 4120 */
1914 MIPS_SYS(sys_setdomainname, 2)
1915 MIPS_SYS(sys_newuname , 1)
1916 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1917 MIPS_SYS(sys_adjtimex , 1)
1918 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1919 MIPS_SYS(sys_sigprocmask , 3)
1920 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1921 MIPS_SYS(sys_init_module , 5)
1922 MIPS_SYS(sys_delete_module, 1)
1923 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1924 MIPS_SYS(sys_quotactl , 0)
1925 MIPS_SYS(sys_getpgid , 1)
1926 MIPS_SYS(sys_fchdir , 1)
1927 MIPS_SYS(sys_bdflush , 2)
1928 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1929 MIPS_SYS(sys_personality , 1)
1930 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1931 MIPS_SYS(sys_setfsuid , 1)
1932 MIPS_SYS(sys_setfsgid , 1)
1933 MIPS_SYS(sys_llseek , 5) /* 4140 */
1934 MIPS_SYS(sys_getdents , 3)
1935 MIPS_SYS(sys_select , 5)
1936 MIPS_SYS(sys_flock , 2)
1937 MIPS_SYS(sys_msync , 3)
1938 MIPS_SYS(sys_readv , 3) /* 4145 */
1939 MIPS_SYS(sys_writev , 3)
1940 MIPS_SYS(sys_cacheflush , 3)
1941 MIPS_SYS(sys_cachectl , 3)
1942 MIPS_SYS(sys_sysmips , 4)
1943 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1944 MIPS_SYS(sys_getsid , 1)
1945 MIPS_SYS(sys_fdatasync , 0)
1946 MIPS_SYS(sys_sysctl , 1)
1947 MIPS_SYS(sys_mlock , 2)
1948 MIPS_SYS(sys_munlock , 2) /* 4155 */
1949 MIPS_SYS(sys_mlockall , 1)
1950 MIPS_SYS(sys_munlockall , 0)
1951 MIPS_SYS(sys_sched_setparam, 2)
1952 MIPS_SYS(sys_sched_getparam, 2)
1953 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1954 MIPS_SYS(sys_sched_getscheduler, 1)
1955 MIPS_SYS(sys_sched_yield , 0)
1956 MIPS_SYS(sys_sched_get_priority_max, 1)
1957 MIPS_SYS(sys_sched_get_priority_min, 1)
1958 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1959 MIPS_SYS(sys_nanosleep, 2)
1960 MIPS_SYS(sys_mremap , 4)
1961 MIPS_SYS(sys_accept , 3)
1962 MIPS_SYS(sys_bind , 3)
1963 MIPS_SYS(sys_connect , 3) /* 4170 */
1964 MIPS_SYS(sys_getpeername , 3)
1965 MIPS_SYS(sys_getsockname , 3)
1966 MIPS_SYS(sys_getsockopt , 5)
1967 MIPS_SYS(sys_listen , 2)
1968 MIPS_SYS(sys_recv , 4) /* 4175 */
1969 MIPS_SYS(sys_recvfrom , 6)
1970 MIPS_SYS(sys_recvmsg , 3)
1971 MIPS_SYS(sys_send , 4)
1972 MIPS_SYS(sys_sendmsg , 3)
1973 MIPS_SYS(sys_sendto , 6) /* 4180 */
1974 MIPS_SYS(sys_setsockopt , 5)
1975 MIPS_SYS(sys_shutdown , 2)
1976 MIPS_SYS(sys_socket , 3)
1977 MIPS_SYS(sys_socketpair , 4)
1978 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1979 MIPS_SYS(sys_getresuid , 3)
1980 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1981 MIPS_SYS(sys_poll , 3)
1982 MIPS_SYS(sys_nfsservctl , 3)
1983 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1984 MIPS_SYS(sys_getresgid , 3)
1985 MIPS_SYS(sys_prctl , 5)
1986 MIPS_SYS(sys_rt_sigreturn, 0)
1987 MIPS_SYS(sys_rt_sigaction, 4)
1988 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1989 MIPS_SYS(sys_rt_sigpending, 2)
1990 MIPS_SYS(sys_rt_sigtimedwait, 4)
1991 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1992 MIPS_SYS(sys_rt_sigsuspend, 0)
1993 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1994 MIPS_SYS(sys_pwrite64 , 6)
1995 MIPS_SYS(sys_chown , 3)
1996 MIPS_SYS(sys_getcwd , 2)
1997 MIPS_SYS(sys_capget , 2)
1998 MIPS_SYS(sys_capset , 2) /* 4205 */
1999 MIPS_SYS(sys_sigaltstack , 2)
2000 MIPS_SYS(sys_sendfile , 4)
2001 MIPS_SYS(sys_ni_syscall , 0)
2002 MIPS_SYS(sys_ni_syscall , 0)
2003 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
2004 MIPS_SYS(sys_truncate64 , 4)
2005 MIPS_SYS(sys_ftruncate64 , 4)
2006 MIPS_SYS(sys_stat64 , 2)
2007 MIPS_SYS(sys_lstat64 , 2)
2008 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
2009 MIPS_SYS(sys_pivot_root , 2)
2010 MIPS_SYS(sys_mincore , 3)
2011 MIPS_SYS(sys_madvise , 3)
2012 MIPS_SYS(sys_getdents64 , 3)
2013 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
2014 MIPS_SYS(sys_ni_syscall , 0)
2015 MIPS_SYS(sys_gettid , 0)
2016 MIPS_SYS(sys_readahead , 5)
2017 MIPS_SYS(sys_setxattr , 5)
2018 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
2019 MIPS_SYS(sys_fsetxattr , 5)
2020 MIPS_SYS(sys_getxattr , 4)
2021 MIPS_SYS(sys_lgetxattr , 4)
2022 MIPS_SYS(sys_fgetxattr , 4)
2023 MIPS_SYS(sys_listxattr , 3) /* 4230 */
2024 MIPS_SYS(sys_llistxattr , 3)
2025 MIPS_SYS(sys_flistxattr , 3)
2026 MIPS_SYS(sys_removexattr , 2)
2027 MIPS_SYS(sys_lremovexattr, 2)
2028 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
2029 MIPS_SYS(sys_tkill , 2)
2030 MIPS_SYS(sys_sendfile64 , 5)
2031 MIPS_SYS(sys_futex , 2)
2032 MIPS_SYS(sys_sched_setaffinity, 3)
2033 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
2034 MIPS_SYS(sys_io_setup , 2)
2035 MIPS_SYS(sys_io_destroy , 1)
2036 MIPS_SYS(sys_io_getevents, 5)
2037 MIPS_SYS(sys_io_submit , 3)
2038 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
2039 MIPS_SYS(sys_exit_group , 1)
2040 MIPS_SYS(sys_lookup_dcookie, 3)
2041 MIPS_SYS(sys_epoll_create, 1)
2042 MIPS_SYS(sys_epoll_ctl , 4)
2043 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
2044 MIPS_SYS(sys_remap_file_pages, 5)
2045 MIPS_SYS(sys_set_tid_address, 1)
2046 MIPS_SYS(sys_restart_syscall, 0)
2047 MIPS_SYS(sys_fadvise64_64, 7)
2048 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
2049 MIPS_SYS(sys_fstatfs64 , 2)
2050 MIPS_SYS(sys_timer_create, 3)
2051 MIPS_SYS(sys_timer_settime, 4)
2052 MIPS_SYS(sys_timer_gettime, 2)
2053 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
2054 MIPS_SYS(sys_timer_delete, 1)
2055 MIPS_SYS(sys_clock_settime, 2)
2056 MIPS_SYS(sys_clock_gettime, 2)
2057 MIPS_SYS(sys_clock_getres, 2)
2058 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
2059 MIPS_SYS(sys_tgkill , 3)
2060 MIPS_SYS(sys_utimes , 2)
2061 MIPS_SYS(sys_mbind , 4)
2062 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
2063 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
2064 MIPS_SYS(sys_mq_open , 4)
2065 MIPS_SYS(sys_mq_unlink , 1)
2066 MIPS_SYS(sys_mq_timedsend, 5)
2067 MIPS_SYS(sys_mq_timedreceive, 5)
2068 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
2069 MIPS_SYS(sys_mq_getsetattr, 3)
2070 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
2071 MIPS_SYS(sys_waitid , 4)
2072 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
2073 MIPS_SYS(sys_add_key , 5)
2074 MIPS_SYS(sys_request_key, 4)
2075 MIPS_SYS(sys_keyctl , 5)
2076 MIPS_SYS(sys_set_thread_area, 1)
2077 MIPS_SYS(sys_inotify_init, 0)
2078 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
2079 MIPS_SYS(sys_inotify_rm_watch, 2)
2080 MIPS_SYS(sys_migrate_pages, 4)
2081 MIPS_SYS(sys_openat, 4)
2082 MIPS_SYS(sys_mkdirat, 3)
2083 MIPS_SYS(sys_mknodat, 4) /* 4290 */
2084 MIPS_SYS(sys_fchownat, 5)
2085 MIPS_SYS(sys_futimesat, 3)
2086 MIPS_SYS(sys_fstatat64, 4)
2087 MIPS_SYS(sys_unlinkat, 3)
2088 MIPS_SYS(sys_renameat, 4) /* 4295 */
2089 MIPS_SYS(sys_linkat, 5)
2090 MIPS_SYS(sys_symlinkat, 3)
2091 MIPS_SYS(sys_readlinkat, 4)
2092 MIPS_SYS(sys_fchmodat, 3)
2093 MIPS_SYS(sys_faccessat, 3) /* 4300 */
2094 MIPS_SYS(sys_pselect6, 6)
2095 MIPS_SYS(sys_ppoll, 5)
2096 MIPS_SYS(sys_unshare, 1)
2097 MIPS_SYS(sys_splice, 4)
2098 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
2099 MIPS_SYS(sys_tee, 4)
2100 MIPS_SYS(sys_vmsplice, 4)
2101 MIPS_SYS(sys_move_pages, 6)
2102 MIPS_SYS(sys_set_robust_list, 2)
2103 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
2104 MIPS_SYS(sys_kexec_load, 4)
2105 MIPS_SYS(sys_getcpu, 3)
2106 MIPS_SYS(sys_epoll_pwait, 6)
2107 MIPS_SYS(sys_ioprio_set, 3)
2108 MIPS_SYS(sys_ioprio_get, 2)
2109 MIPS_SYS(sys_utimensat, 4)
2110 MIPS_SYS(sys_signalfd, 3)
2111 MIPS_SYS(sys_ni_syscall, 0) /* was timerfd */
2112 MIPS_SYS(sys_eventfd, 1)
2113 MIPS_SYS(sys_fallocate, 6) /* 4320 */
2114 MIPS_SYS(sys_timerfd_create, 2)
2115 MIPS_SYS(sys_timerfd_gettime, 2)
2116 MIPS_SYS(sys_timerfd_settime, 4)
2117 MIPS_SYS(sys_signalfd4, 4)
2118 MIPS_SYS(sys_eventfd2, 2) /* 4325 */
2119 MIPS_SYS(sys_epoll_create1, 1)
2120 MIPS_SYS(sys_dup3, 3)
2121 MIPS_SYS(sys_pipe2, 2)
2122 MIPS_SYS(sys_inotify_init1, 1)
2123 MIPS_SYS(sys_preadv, 6) /* 4330 */
2124 MIPS_SYS(sys_pwritev, 6)
2125 MIPS_SYS(sys_rt_tgsigqueueinfo, 4)
2126 MIPS_SYS(sys_perf_event_open, 5)
2127 MIPS_SYS(sys_accept4, 4)
2128 MIPS_SYS(sys_recvmmsg, 5) /* 4335 */
2129 MIPS_SYS(sys_fanotify_init, 2)
2130 MIPS_SYS(sys_fanotify_mark, 6)
2131 MIPS_SYS(sys_prlimit64, 4)
2132 MIPS_SYS(sys_name_to_handle_at, 5)
2133 MIPS_SYS(sys_open_by_handle_at, 3) /* 4340 */
2134 MIPS_SYS(sys_clock_adjtime, 2)
2135 MIPS_SYS(sys_syncfs, 1)
2136 };
2137
2138 #undef MIPS_SYS
2139
2140 static int do_store_exclusive(CPUMIPSState *env)
2141 {
2142 target_ulong addr;
2143 target_ulong page_addr;
2144 target_ulong val;
2145 int flags;
2146 int segv = 0;
2147 int reg;
2148 int d;
2149
2150 addr = env->lladdr;
2151 page_addr = addr & TARGET_PAGE_MASK;
2152 start_exclusive();
2153 mmap_lock();
2154 flags = page_get_flags(page_addr);
2155 if ((flags & PAGE_READ) == 0) {
2156 segv = 1;
2157 } else {
2158 reg = env->llreg & 0x1f;
2159 d = (env->llreg & 0x20) != 0;
2160 if (d) {
2161 segv = get_user_s64(val, addr);
2162 } else {
2163 segv = get_user_s32(val, addr);
2164 }
2165 if (!segv) {
2166 if (val != env->llval) {
2167 env->active_tc.gpr[reg] = 0;
2168 } else {
2169 if (d) {
2170 segv = put_user_u64(env->llnewval, addr);
2171 } else {
2172 segv = put_user_u32(env->llnewval, addr);
2173 }
2174 if (!segv) {
2175 env->active_tc.gpr[reg] = 1;
2176 }
2177 }
2178 }
2179 }
2180 env->lladdr = -1;
2181 if (!segv) {
2182 env->active_tc.PC += 4;
2183 }
2184 mmap_unlock();
2185 end_exclusive();
2186 return segv;
2187 }
2188
2189 void cpu_loop(CPUMIPSState *env)
2190 {
2191 target_siginfo_t info;
2192 int trapnr, ret;
2193 unsigned int syscall_num;
2194
2195 for(;;) {
2196 cpu_exec_start(env);
2197 trapnr = cpu_mips_exec(env);
2198 cpu_exec_end(env);
2199 switch(trapnr) {
2200 case EXCP_SYSCALL:
2201 syscall_num = env->active_tc.gpr[2] - 4000;
2202 env->active_tc.PC += 4;
2203 if (syscall_num >= sizeof(mips_syscall_args)) {
2204 ret = -TARGET_ENOSYS;
2205 } else {
2206 int nb_args;
2207 abi_ulong sp_reg;
2208 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
2209
2210 nb_args = mips_syscall_args[syscall_num];
2211 sp_reg = env->active_tc.gpr[29];
2212 switch (nb_args) {
2213 /* these arguments are taken from the stack */
2214 case 8:
2215 if ((ret = get_user_ual(arg8, sp_reg + 28)) != 0) {
2216 goto done_syscall;
2217 }
2218 case 7:
2219 if ((ret = get_user_ual(arg7, sp_reg + 24)) != 0) {
2220 goto done_syscall;
2221 }
2222 case 6:
2223 if ((ret = get_user_ual(arg6, sp_reg + 20)) != 0) {
2224 goto done_syscall;
2225 }
2226 case 5:
2227 if ((ret = get_user_ual(arg5, sp_reg + 16)) != 0) {
2228 goto done_syscall;
2229 }
2230 default:
2231 break;
2232 }
2233 ret = do_syscall(env, env->active_tc.gpr[2],
2234 env->active_tc.gpr[4],
2235 env->active_tc.gpr[5],
2236 env->active_tc.gpr[6],
2237 env->active_tc.gpr[7],
2238 arg5, arg6, arg7, arg8);
2239 }
2240 done_syscall:
2241 if (ret == -TARGET_QEMU_ESIGRETURN) {
2242 /* Returning from a successful sigreturn syscall.
2243 Avoid clobbering register state. */
2244 break;
2245 }
2246 if ((unsigned int)ret >= (unsigned int)(-1133)) {
2247 env->active_tc.gpr[7] = 1; /* error flag */
2248 ret = -ret;
2249 } else {
2250 env->active_tc.gpr[7] = 0; /* error flag */
2251 }
2252 env->active_tc.gpr[2] = ret;
2253 break;
2254 case EXCP_TLBL:
2255 case EXCP_TLBS:
2256 case EXCP_AdEL:
2257 case EXCP_AdES:
2258 info.si_signo = TARGET_SIGSEGV;
2259 info.si_errno = 0;
2260 /* XXX: check env->error_code */
2261 info.si_code = TARGET_SEGV_MAPERR;
2262 info._sifields._sigfault._addr = env->CP0_BadVAddr;
2263 queue_signal(env, info.si_signo, &info);
2264 break;
2265 case EXCP_CpU:
2266 case EXCP_RI:
2267 info.si_signo = TARGET_SIGILL;
2268 info.si_errno = 0;
2269 info.si_code = 0;
2270 queue_signal(env, info.si_signo, &info);
2271 break;
2272 case EXCP_INTERRUPT:
2273 /* just indicate that signals should be handled asap */
2274 break;
2275 case EXCP_DEBUG:
2276 {
2277 int sig;
2278
2279 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2280 if (sig)
2281 {
2282 info.si_signo = sig;
2283 info.si_errno = 0;
2284 info.si_code = TARGET_TRAP_BRKPT;
2285 queue_signal(env, info.si_signo, &info);
2286 }
2287 }
2288 break;
2289 case EXCP_SC:
2290 if (do_store_exclusive(env)) {
2291 info.si_signo = TARGET_SIGSEGV;
2292 info.si_errno = 0;
2293 info.si_code = TARGET_SEGV_MAPERR;
2294 info._sifields._sigfault._addr = env->active_tc.PC;
2295 queue_signal(env, info.si_signo, &info);
2296 }
2297 break;
2298 default:
2299 // error:
2300 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2301 trapnr);
2302 cpu_dump_state(env, stderr, fprintf, 0);
2303 abort();
2304 }
2305 process_pending_signals(env);
2306 }
2307 }
2308 #endif
2309
2310 #ifdef TARGET_OPENRISC
2311
2312 void cpu_loop(CPUOpenRISCState *env)
2313 {
2314 int trapnr, gdbsig;
2315
2316 for (;;) {
2317 trapnr = cpu_exec(env);
2318 gdbsig = 0;
2319
2320 switch (trapnr) {
2321 case EXCP_RESET:
2322 qemu_log("\nReset request, exit, pc is %#x\n", env->pc);
2323 exit(1);
2324 break;
2325 case EXCP_BUSERR:
2326 qemu_log("\nBus error, exit, pc is %#x\n", env->pc);
2327 gdbsig = SIGBUS;
2328 break;
2329 case EXCP_DPF:
2330 case EXCP_IPF:
2331 cpu_dump_state(env, stderr, fprintf, 0);
2332 gdbsig = TARGET_SIGSEGV;
2333 break;
2334 case EXCP_TICK:
2335 qemu_log("\nTick time interrupt pc is %#x\n", env->pc);
2336 break;
2337 case EXCP_ALIGN:
2338 qemu_log("\nAlignment pc is %#x\n", env->pc);
2339 gdbsig = SIGBUS;
2340 break;
2341 case EXCP_ILLEGAL:
2342 qemu_log("\nIllegal instructionpc is %#x\n", env->pc);
2343 gdbsig = SIGILL;
2344 break;
2345 case EXCP_INT:
2346 qemu_log("\nExternal interruptpc is %#x\n", env->pc);
2347 break;
2348 case EXCP_DTLBMISS:
2349 case EXCP_ITLBMISS:
2350 qemu_log("\nTLB miss\n");
2351 break;
2352 case EXCP_RANGE:
2353 qemu_log("\nRange\n");
2354 gdbsig = SIGSEGV;
2355 break;
2356 case EXCP_SYSCALL:
2357 env->pc += 4; /* 0xc00; */
2358 env->gpr[11] = do_syscall(env,
2359 env->gpr[11], /* return value */
2360 env->gpr[3], /* r3 - r7 are params */
2361 env->gpr[4],
2362 env->gpr[5],
2363 env->gpr[6],
2364 env->gpr[7],
2365 env->gpr[8], 0, 0);
2366 break;
2367 case EXCP_FPE:
2368 qemu_log("\nFloating point error\n");
2369 break;
2370 case EXCP_TRAP:
2371 qemu_log("\nTrap\n");
2372 gdbsig = SIGTRAP;
2373 break;
2374 case EXCP_NR:
2375 qemu_log("\nNR\n");
2376 break;
2377 default:
2378 qemu_log("\nqemu: unhandled CPU exception %#x - aborting\n",
2379 trapnr);
2380 cpu_dump_state(env, stderr, fprintf, 0);
2381 gdbsig = TARGET_SIGILL;
2382 break;
2383 }
2384 if (gdbsig) {
2385 gdb_handlesig(env, gdbsig);
2386 if (gdbsig != TARGET_SIGTRAP) {
2387 exit(1);
2388 }
2389 }
2390
2391 process_pending_signals(env);
2392 }
2393 }
2394
2395 #endif /* TARGET_OPENRISC */
2396
2397 #ifdef TARGET_SH4
2398 void cpu_loop(CPUSH4State *env)
2399 {
2400 int trapnr, ret;
2401 target_siginfo_t info;
2402
2403 while (1) {
2404 trapnr = cpu_sh4_exec (env);
2405
2406 switch (trapnr) {
2407 case 0x160:
2408 env->pc += 2;
2409 ret = do_syscall(env,
2410 env->gregs[3],
2411 env->gregs[4],
2412 env->gregs[5],
2413 env->gregs[6],
2414 env->gregs[7],
2415 env->gregs[0],
2416 env->gregs[1],
2417 0, 0);
2418 env->gregs[0] = ret;
2419 break;
2420 case EXCP_INTERRUPT:
2421 /* just indicate that signals should be handled asap */
2422 break;
2423 case EXCP_DEBUG:
2424 {
2425 int sig;
2426
2427 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2428 if (sig)
2429 {
2430 info.si_signo = sig;
2431 info.si_errno = 0;
2432 info.si_code = TARGET_TRAP_BRKPT;
2433 queue_signal(env, info.si_signo, &info);
2434 }
2435 }
2436 break;
2437 case 0xa0:
2438 case 0xc0:
2439 info.si_signo = SIGSEGV;
2440 info.si_errno = 0;
2441 info.si_code = TARGET_SEGV_MAPERR;
2442 info._sifields._sigfault._addr = env->tea;
2443 queue_signal(env, info.si_signo, &info);
2444 break;
2445
2446 default:
2447 printf ("Unhandled trap: 0x%x\n", trapnr);
2448 cpu_dump_state(env, stderr, fprintf, 0);
2449 exit (1);
2450 }
2451 process_pending_signals (env);
2452 }
2453 }
2454 #endif
2455
2456 #ifdef TARGET_CRIS
2457 void cpu_loop(CPUCRISState *env)
2458 {
2459 int trapnr, ret;
2460 target_siginfo_t info;
2461
2462 while (1) {
2463 trapnr = cpu_cris_exec (env);
2464 switch (trapnr) {
2465 case 0xaa:
2466 {
2467 info.si_signo = SIGSEGV;
2468 info.si_errno = 0;
2469 /* XXX: check env->error_code */
2470 info.si_code = TARGET_SEGV_MAPERR;
2471 info._sifields._sigfault._addr = env->pregs[PR_EDA];
2472 queue_signal(env, info.si_signo, &info);
2473 }
2474 break;
2475 case EXCP_INTERRUPT:
2476 /* just indicate that signals should be handled asap */
2477 break;
2478 case EXCP_BREAK:
2479 ret = do_syscall(env,
2480 env->regs[9],
2481 env->regs[10],
2482 env->regs[11],
2483 env->regs[12],
2484 env->regs[13],
2485 env->pregs[7],
2486 env->pregs[11],
2487 0, 0);
2488 env->regs[10] = ret;
2489 break;
2490 case EXCP_DEBUG:
2491 {
2492 int sig;
2493
2494 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2495 if (sig)
2496 {
2497 info.si_signo = sig;
2498 info.si_errno = 0;
2499 info.si_code = TARGET_TRAP_BRKPT;
2500 queue_signal(env, info.si_signo, &info);
2501 }
2502 }
2503 break;
2504 default:
2505 printf ("Unhandled trap: 0x%x\n", trapnr);
2506 cpu_dump_state(env, stderr, fprintf, 0);
2507 exit (1);
2508 }
2509 process_pending_signals (env);
2510 }
2511 }
2512 #endif
2513
2514 #ifdef TARGET_MICROBLAZE
2515 void cpu_loop(CPUMBState *env)
2516 {
2517 int trapnr, ret;
2518 target_siginfo_t info;
2519
2520 while (1) {
2521 trapnr = cpu_mb_exec (env);
2522 switch (trapnr) {
2523 case 0xaa:
2524 {
2525 info.si_signo = SIGSEGV;
2526 info.si_errno = 0;
2527 /* XXX: check env->error_code */
2528 info.si_code = TARGET_SEGV_MAPERR;
2529 info._sifields._sigfault._addr = 0;
2530 queue_signal(env, info.si_signo, &info);
2531 }
2532 break;
2533 case EXCP_INTERRUPT:
2534 /* just indicate that signals should be handled asap */
2535 break;
2536 case EXCP_BREAK:
2537 /* Return address is 4 bytes after the call. */
2538 env->regs[14] += 4;
2539 ret = do_syscall(env,
2540 env->regs[12],
2541 env->regs[5],
2542 env->regs[6],
2543 env->regs[7],
2544 env->regs[8],
2545 env->regs[9],
2546 env->regs[10],
2547 0, 0);
2548 env->regs[3] = ret;
2549 env->sregs[SR_PC] = env->regs[14];
2550 break;
2551 case EXCP_HW_EXCP:
2552 env->regs[17] = env->sregs[SR_PC] + 4;
2553 if (env->iflags & D_FLAG) {
2554 env->sregs[SR_ESR] |= 1 << 12;
2555 env->sregs[SR_PC] -= 4;
2556 /* FIXME: if branch was immed, replay the imm as well. */
2557 }
2558
2559 env->iflags &= ~(IMM_FLAG | D_FLAG);
2560
2561 switch (env->sregs[SR_ESR] & 31) {
2562 case ESR_EC_DIVZERO:
2563 info.si_signo = SIGFPE;
2564 info.si_errno = 0;
2565 info.si_code = TARGET_FPE_FLTDIV;
2566 info._sifields._sigfault._addr = 0;
2567 queue_signal(env, info.si_signo, &info);
2568 break;
2569 case ESR_EC_FPU:
2570 info.si_signo = SIGFPE;
2571 info.si_errno = 0;
2572 if (env->sregs[SR_FSR] & FSR_IO) {
2573 info.si_code = TARGET_FPE_FLTINV;
2574 }
2575 if (env->sregs[SR_FSR] & FSR_DZ) {
2576 info.si_code = TARGET_FPE_FLTDIV;
2577 }
2578 info._sifields._sigfault._addr = 0;
2579 queue_signal(env, info.si_signo, &info);
2580 break;
2581 default:
2582 printf ("Unhandled hw-exception: 0x%x\n",
2583 env->sregs[SR_ESR] & ESR_EC_MASK);
2584 cpu_dump_state(env, stderr, fprintf, 0);
2585 exit (1);
2586 break;
2587 }
2588 break;
2589 case EXCP_DEBUG:
2590 {
2591 int sig;
2592
2593 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2594 if (sig)
2595 {
2596 info.si_signo = sig;
2597 info.si_errno = 0;
2598 info.si_code = TARGET_TRAP_BRKPT;
2599 queue_signal(env, info.si_signo, &info);
2600 }
2601 }
2602 break;
2603 default:
2604 printf ("Unhandled trap: 0x%x\n", trapnr);
2605 cpu_dump_state(env, stderr, fprintf, 0);
2606 exit (1);
2607 }
2608 process_pending_signals (env);
2609 }
2610 }
2611 #endif
2612
2613 #ifdef TARGET_M68K
2614
2615 void cpu_loop(CPUM68KState *env)
2616 {
2617 int trapnr;
2618 unsigned int n;
2619 target_siginfo_t info;
2620 TaskState *ts = env->opaque;
2621
2622 for(;;) {
2623 trapnr = cpu_m68k_exec(env);
2624 switch(trapnr) {
2625 case EXCP_ILLEGAL:
2626 {
2627 if (ts->sim_syscalls) {
2628 uint16_t nr;
2629 nr = lduw(env->pc + 2);
2630 env->pc += 4;
2631 do_m68k_simcall(env, nr);
2632 } else {
2633 goto do_sigill;
2634 }
2635 }
2636 break;
2637 case EXCP_HALT_INSN:
2638 /* Semihosing syscall. */
2639 env->pc += 4;
2640 do_m68k_semihosting(env, env->dregs[0]);
2641 break;
2642 case EXCP_LINEA:
2643 case EXCP_LINEF:
2644 case EXCP_UNSUPPORTED:
2645 do_sigill:
2646 info.si_signo = SIGILL;
2647 info.si_errno = 0;
2648 info.si_code = TARGET_ILL_ILLOPN;
2649 info._sifields._sigfault._addr = env->pc;
2650 queue_signal(env, info.si_signo, &info);
2651 break;
2652 case EXCP_TRAP0:
2653 {
2654 ts->sim_syscalls = 0;
2655 n = env->dregs[0];
2656 env->pc += 2;
2657 env->dregs[0] = do_syscall(env,
2658 n,
2659 env->dregs[1],
2660 env->dregs[2],
2661 env->dregs[3],
2662 env->dregs[4],
2663 env->dregs[5],
2664 env->aregs[0],
2665 0, 0);
2666 }
2667 break;
2668 case EXCP_INTERRUPT:
2669 /* just indicate that signals should be handled asap */
2670 break;
2671 case EXCP_ACCESS:
2672 {
2673 info.si_signo = SIGSEGV;
2674 info.si_errno = 0;
2675 /* XXX: check env->error_code */
2676 info.si_code = TARGET_SEGV_MAPERR;
2677 info._sifields._sigfault._addr = env->mmu.ar;
2678 queue_signal(env, info.si_signo, &info);
2679 }
2680 break;
2681 case EXCP_DEBUG:
2682 {
2683 int sig;
2684
2685 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2686 if (sig)
2687 {
2688 info.si_signo = sig;
2689 info.si_errno = 0;
2690 info.si_code = TARGET_TRAP_BRKPT;
2691 queue_signal(env, info.si_signo, &info);
2692 }
2693 }
2694 break;
2695 default:
2696 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2697 trapnr);
2698 cpu_dump_state(env, stderr, fprintf, 0);
2699 abort();
2700 }
2701 process_pending_signals(env);
2702 }
2703 }
2704 #endif /* TARGET_M68K */
2705
2706 #ifdef TARGET_ALPHA
2707 static void do_store_exclusive(CPUAlphaState *env, int reg, int quad)
2708 {
2709 target_ulong addr, val, tmp;
2710 target_siginfo_t info;
2711 int ret = 0;
2712
2713 addr = env->lock_addr;
2714 tmp = env->lock_st_addr;
2715 env->lock_addr = -1;
2716 env->lock_st_addr = 0;
2717
2718 start_exclusive();
2719 mmap_lock();
2720
2721 if (addr == tmp) {
2722 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
2723 goto do_sigsegv;
2724 }
2725
2726 if (val == env->lock_value) {
2727 tmp = env->ir[reg];
2728 if (quad ? put_user_u64(tmp, addr) : put_user_u32(tmp, addr)) {
2729 goto do_sigsegv;
2730 }
2731 ret = 1;
2732 }
2733 }
2734 env->ir[reg] = ret;
2735 env->pc += 4;
2736
2737 mmap_unlock();
2738 end_exclusive();
2739 return;
2740
2741 do_sigsegv:
2742 mmap_unlock();
2743 end_exclusive();
2744
2745 info.si_signo = TARGET_SIGSEGV;
2746 info.si_errno = 0;
2747 info.si_code = TARGET_SEGV_MAPERR;
2748 info._sifields._sigfault._addr = addr;
2749 queue_signal(env, TARGET_SIGSEGV, &info);
2750 }
2751
2752 void cpu_loop(CPUAlphaState *env)
2753 {
2754 int trapnr;
2755 target_siginfo_t info;
2756 abi_long sysret;
2757
2758 while (1) {
2759 trapnr = cpu_alpha_exec (env);
2760
2761 /* All of the traps imply a transition through PALcode, which
2762 implies an REI instruction has been executed. Which means
2763 that the intr_flag should be cleared. */
2764 env->intr_flag = 0;
2765
2766 switch (trapnr) {
2767 case EXCP_RESET:
2768 fprintf(stderr, "Reset requested. Exit\n");
2769 exit(1);
2770 break;
2771 case EXCP_MCHK:
2772 fprintf(stderr, "Machine check exception. Exit\n");
2773 exit(1);
2774 break;
2775 case EXCP_SMP_INTERRUPT:
2776 case EXCP_CLK_INTERRUPT:
2777 case EXCP_DEV_INTERRUPT:
2778 fprintf(stderr, "External interrupt. Exit\n");
2779 exit(1);
2780 break;
2781 case EXCP_MMFAULT:
2782 env->lock_addr = -1;
2783 info.si_signo = TARGET_SIGSEGV;
2784 info.si_errno = 0;
2785 info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
2786 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
2787 info._sifields._sigfault._addr = env->trap_arg0;
2788 queue_signal(env, info.si_signo, &info);
2789 break;
2790 case EXCP_UNALIGN:
2791 env->lock_addr = -1;
2792 info.si_signo = TARGET_SIGBUS;
2793 info.si_errno = 0;
2794 info.si_code = TARGET_BUS_ADRALN;
2795 info._sifields._sigfault._addr = env->trap_arg0;
2796 queue_signal(env, info.si_signo, &info);
2797 break;
2798 case EXCP_OPCDEC:
2799 do_sigill:
2800 env->lock_addr = -1;
2801 info.si_signo = TARGET_SIGILL;
2802 info.si_errno = 0;
2803 info.si_code = TARGET_ILL_ILLOPC;
2804 info._sifields._sigfault._addr = env->pc;
2805 queue_signal(env, info.si_signo, &info);
2806 break;
2807 case EXCP_ARITH:
2808 env->lock_addr = -1;
2809 info.si_signo = TARGET_SIGFPE;
2810 info.si_errno = 0;
2811 info.si_code = TARGET_FPE_FLTINV;
2812 info._sifields._sigfault._addr = env->pc;
2813 queue_signal(env, info.si_signo, &info);
2814 break;
2815 case EXCP_FEN:
2816 /* No-op. Linux simply re-enables the FPU. */
2817 break;
2818 case EXCP_CALL_PAL:
2819 env->lock_addr = -1;
2820 switch (env->error_code) {
2821 case 0x80:
2822 /* BPT */
2823 info.si_signo = TARGET_SIGTRAP;
2824 info.si_errno = 0;
2825 info.si_code = TARGET_TRAP_BRKPT;
2826 info._sifields._sigfault._addr = env->pc;
2827 queue_signal(env, info.si_signo, &info);
2828 break;
2829 case 0x81:
2830 /* BUGCHK */
2831 info.si_signo = TARGET_SIGTRAP;
2832 info.si_errno = 0;
2833 info.si_code = 0;
2834 info._sifields._sigfault._addr = env->pc;
2835 queue_signal(env, info.si_signo, &info);
2836 break;
2837 case 0x83:
2838 /* CALLSYS */
2839 trapnr = env->ir[IR_V0];
2840 sysret = do_syscall(env, trapnr,
2841 env->ir[IR_A0], env->ir[IR_A1],
2842 env->ir[IR_A2], env->ir[IR_A3],
2843 env->ir[IR_A4], env->ir[IR_A5],
2844 0, 0);
2845 if (trapnr == TARGET_NR_sigreturn
2846 || trapnr == TARGET_NR_rt_sigreturn) {
2847 break;
2848 }
2849 /* Syscall writes 0 to V0 to bypass error check, similar
2850 to how this is handled internal to Linux kernel.
2851 (Ab)use trapnr temporarily as boolean indicating error. */
2852 trapnr = (env->ir[IR_V0] != 0 && sysret < 0);
2853 env->ir[IR_V0] = (trapnr ? -sysret : sysret);
2854 env->ir[IR_A3] = trapnr;
2855 break;
2856 case 0x86:
2857 /* IMB */
2858 /* ??? We can probably elide the code using page_unprotect
2859 that is checking for self-modifying code. Instead we
2860 could simply call tb_flush here. Until we work out the
2861 changes required to turn off the extra write protection,
2862 this can be a no-op. */
2863 break;
2864 case 0x9E:
2865 /* RDUNIQUE */
2866 /* Handled in the translator for usermode. */
2867 abort();
2868 case 0x9F:
2869 /* WRUNIQUE */
2870 /* Handled in the translator for usermode. */
2871 abort();
2872 case 0xAA:
2873 /* GENTRAP */
2874 info.si_signo = TARGET_SIGFPE;
2875 switch (env->ir[IR_A0]) {
2876 case TARGET_GEN_INTOVF:
2877 info.si_code = TARGET_FPE_INTOVF;
2878 break;
2879 case TARGET_GEN_INTDIV:
2880 info.si_code = TARGET_FPE_INTDIV;
2881 break;
2882 case TARGET_GEN_FLTOVF:
2883 info.si_code = TARGET_FPE_FLTOVF;
2884 break;
2885 case TARGET_GEN_FLTUND:
2886 info.si_code = TARGET_FPE_FLTUND;
2887 break;
2888 case TARGET_GEN_FLTINV:
2889 info.si_code = TARGET_FPE_FLTINV;
2890 break;
2891 case TARGET_GEN_FLTINE:
2892 info.si_code = TARGET_FPE_FLTRES;
2893 break;
2894 case TARGET_GEN_ROPRAND:
2895 info.si_code = 0;
2896 break;
2897 default:
2898 info.si_signo = TARGET_SIGTRAP;
2899 info.si_code = 0;
2900 break;
2901 }
2902 info.si_errno = 0;
2903 info._sifields._sigfault._addr = env->pc;
2904 queue_signal(env, info.si_signo, &info);
2905 break;
2906 default:
2907 goto do_sigill;
2908 }
2909 break;
2910 case EXCP_DEBUG:
2911 info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP);
2912 if (info.si_signo) {
2913 env->lock_addr = -1;
2914 info.si_errno = 0;
2915 info.si_code = TARGET_TRAP_BRKPT;
2916 queue_signal(env, info.si_signo, &info);
2917 }
2918 break;
2919 case EXCP_STL_C:
2920 case EXCP_STQ_C:
2921 do_store_exclusive(env, env->error_code, trapnr - EXCP_STL_C);
2922 break;
2923 case EXCP_INTERRUPT:
2924 /* Just indicate that signals should be handled asap. */
2925 break;
2926 default:
2927 printf ("Unhandled trap: 0x%x\n", trapnr);
2928 cpu_dump_state(env, stderr, fprintf, 0);
2929 exit (1);
2930 }
2931 process_pending_signals (env);
2932 }
2933 }
2934 #endif /* TARGET_ALPHA */
2935
2936 #ifdef TARGET_S390X
2937 void cpu_loop(CPUS390XState *env)
2938 {
2939 int trapnr;
2940 target_siginfo_t info;
2941
2942 while (1) {
2943 trapnr = cpu_s390x_exec (env);
2944
2945 switch (trapnr) {
2946 case EXCP_INTERRUPT:
2947 /* just indicate that signals should be handled asap */
2948 break;
2949 case EXCP_DEBUG:
2950 {
2951 int sig;
2952
2953 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2954 if (sig) {
2955 info.si_signo = sig;
2956 info.si_errno = 0;
2957 info.si_code = TARGET_TRAP_BRKPT;
2958 queue_signal(env, info.si_signo, &info);
2959 }
2960 }
2961 break;
2962 case EXCP_SVC:
2963 {
2964 int n = env->int_svc_code;
2965 if (!n) {
2966 /* syscalls > 255 */
2967 n = env->regs[1];
2968 }
2969 env->psw.addr += env->int_svc_ilc;
2970 env->regs[2] = do_syscall(env, n,
2971 env->regs[2],
2972 env->regs[3],
2973 env->regs[4],
2974 env->regs[5],
2975 env->regs[6],
2976 env->regs[7],
2977 0, 0);
2978 }
2979 break;
2980 case EXCP_ADDR:
2981 {
2982 info.si_signo = SIGSEGV;
2983 info.si_errno = 0;
2984 /* XXX: check env->error_code */
2985 info.si_code = TARGET_SEGV_MAPERR;
2986 info._sifields._sigfault._addr = env->__excp_addr;
2987 queue_signal(env, info.si_signo, &info);
2988 }
2989 break;
2990 case EXCP_SPEC:
2991 {
2992 fprintf(stderr,"specification exception insn 0x%08x%04x\n", ldl(env->psw.addr), lduw(env->psw.addr + 4));
2993 info.si_signo = SIGILL;
2994 info.si_errno = 0;
2995 info.si_code = TARGET_ILL_ILLOPC;
2996 info._sifields._sigfault._addr = env->__excp_addr;
2997 queue_signal(env, info.si_signo, &info);
2998 }
2999 break;
3000 default:
3001 printf ("Unhandled trap: 0x%x\n", trapnr);
3002 cpu_dump_state(env, stderr, fprintf, 0);
3003 exit (1);
3004 }
3005 process_pending_signals (env);
3006 }
3007 }
3008
3009 #endif /* TARGET_S390X */
3010
3011 THREAD CPUArchState *thread_env;
3012
3013 void task_settid(TaskState *ts)
3014 {
3015 if (ts->ts_tid == 0) {
3016 #ifdef CONFIG_USE_NPTL
3017 ts->ts_tid = (pid_t)syscall(SYS_gettid);
3018 #else
3019 /* when no threads are used, tid becomes pid */
3020 ts->ts_tid = getpid();
3021 #endif
3022 }
3023 }
3024
3025 void stop_all_tasks(void)
3026 {
3027 /*
3028 * We trust that when using NPTL, start_exclusive()
3029 * handles thread stopping correctly.
3030 */
3031 start_exclusive();
3032 }
3033
3034 /* Assumes contents are already zeroed. */
3035 void init_task_state(TaskState *ts)
3036 {
3037 int i;
3038
3039 ts->used = 1;
3040 ts->first_free = ts->sigqueue_table;
3041 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
3042 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
3043 }
3044 ts->sigqueue_table[i].next = NULL;
3045 }
3046
3047 static void handle_arg_help(const char *arg)
3048 {
3049 usage();
3050 }
3051
3052 static void handle_arg_log(const char *arg)
3053 {
3054 int mask;
3055 const CPULogItem *item;
3056
3057 mask = cpu_str_to_log_mask(arg);
3058 if (!mask) {
3059 printf("Log items (comma separated):\n");
3060 for (item = cpu_log_items; item->mask != 0; item++) {
3061 printf("%-10s %s\n", item->name, item->help);
3062 }
3063 exit(1);
3064 }
3065 cpu_set_log(mask);
3066 }
3067
3068 static void handle_arg_log_filename(const char *arg)
3069 {
3070 cpu_set_log_filename(arg);
3071 }
3072
3073 static void handle_arg_set_env(const char *arg)
3074 {
3075 char *r, *p, *token;
3076 r = p = strdup(arg);
3077 while ((token = strsep(&p, ",")) != NULL) {
3078 if (envlist_setenv(envlist, token) != 0) {
3079 usage();
3080 }
3081 }
3082 free(r);
3083 }
3084
3085 static void handle_arg_unset_env(const char *arg)
3086 {
3087 char *r, *p, *token;
3088 r = p = strdup(arg);
3089 while ((token = strsep(&p, ",")) != NULL) {
3090 if (envlist_unsetenv(envlist, token) != 0) {
3091 usage();
3092 }
3093 }
3094 free(r);
3095 }
3096
3097 static void handle_arg_argv0(const char *arg)
3098 {
3099 argv0 = strdup(arg);
3100 }
3101
3102 static void handle_arg_stack_size(const char *arg)
3103 {
3104 char *p;
3105 guest_stack_size = strtoul(arg, &p, 0);
3106 if (guest_stack_size == 0) {
3107 usage();
3108 }
3109
3110 if (*p == 'M') {
3111 guest_stack_size *= 1024 * 1024;
3112 } else if (*p == 'k' || *p == 'K') {
3113 guest_stack_size *= 1024;
3114 }
3115 }
3116
3117 static void handle_arg_ld_prefix(const char *arg)
3118 {
3119 interp_prefix = strdup(arg);
3120 }
3121
3122 static void handle_arg_pagesize(const char *arg)
3123 {
3124 qemu_host_page_size = atoi(arg);
3125 if (qemu_host_page_size == 0 ||
3126 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
3127 fprintf(stderr, "page size must be a power of two\n");
3128 exit(1);
3129 }
3130 }
3131
3132 static void handle_arg_gdb(const char *arg)
3133 {
3134 gdbstub_port = atoi(arg);
3135 }
3136
3137 static void handle_arg_uname(const char *arg)
3138 {
3139 qemu_uname_release = strdup(arg);
3140 }
3141
3142 static void handle_arg_cpu(const char *arg)
3143 {
3144 cpu_model = strdup(arg);
3145 if (cpu_model == NULL || is_help_option(cpu_model)) {
3146 /* XXX: implement xxx_cpu_list for targets that still miss it */
3147 #if defined(cpu_list_id)
3148 cpu_list_id(stdout, &fprintf, "");
3149 #elif defined(cpu_list)
3150 cpu_list(stdout, &fprintf); /* deprecated */
3151 #endif
3152 exit(1);
3153 }
3154 }
3155
3156 #if defined(CONFIG_USE_GUEST_BASE)
3157 static void handle_arg_guest_base(const char *arg)
3158 {
3159 guest_base = strtol(arg, NULL, 0);
3160 have_guest_base = 1;
3161 }
3162
3163 static void handle_arg_reserved_va(const char *arg)
3164 {
3165 char *p;
3166 int shift = 0;
3167 reserved_va = strtoul(arg, &p, 0);
3168 switch (*p) {
3169 case 'k':
3170 case 'K':
3171 shift = 10;
3172 break;
3173 case 'M':
3174 shift = 20;
3175 break;
3176 case 'G':
3177 shift = 30;
3178 break;
3179 }
3180 if (shift) {
3181 unsigned long unshifted = reserved_va;
3182 p++;
3183 reserved_va <<= shift;
3184 if (((reserved_va >> shift) != unshifted)
3185 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3186 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
3187 #endif
3188 ) {
3189 fprintf(stderr, "Reserved virtual address too big\n");
3190 exit(1);
3191 }
3192 }
3193 if (*p) {
3194 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
3195 exit(1);
3196 }
3197 }
3198 #endif
3199
3200 static void handle_arg_singlestep(const char *arg)
3201 {
3202 singlestep = 1;
3203 }
3204
3205 static void handle_arg_strace(const char *arg)
3206 {
3207 do_strace = 1;
3208 }
3209
3210 static void handle_arg_version(const char *arg)
3211 {
3212 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION
3213 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
3214 exit(0);
3215 }
3216
3217 struct qemu_argument {
3218 const char *argv;
3219 const char *env;
3220 bool has_arg;
3221 void (*handle_opt)(const char *arg);
3222 const char *example;
3223 const char *help;
3224 };
3225
3226 struct qemu_argument arg_table[] = {
3227 {"h", "", false, handle_arg_help,
3228 "", "print this help"},
3229 {"g", "QEMU_GDB", true, handle_arg_gdb,
3230 "port", "wait gdb connection to 'port'"},
3231 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix,
3232 "path", "set the elf interpreter prefix to 'path'"},
3233 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size,
3234 "size", "set the stack size to 'size' bytes"},
3235 {"cpu", "QEMU_CPU", true, handle_arg_cpu,
3236 "model", "select CPU (-cpu help for list)"},
3237 {"E", "QEMU_SET_ENV", true, handle_arg_set_env,
3238 "var=value", "sets targets environment variable (see below)"},
3239 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env,
3240 "var", "unsets targets environment variable (see below)"},
3241 {"0", "QEMU_ARGV0", true, handle_arg_argv0,
3242 "argv0", "forces target process argv[0] to be 'argv0'"},
3243 {"r", "QEMU_UNAME", true, handle_arg_uname,
3244 "uname", "set qemu uname release string to 'uname'"},
3245 #if defined(CONFIG_USE_GUEST_BASE)
3246 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base,
3247 "address", "set guest_base address to 'address'"},
3248 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va,
3249 "size", "reserve 'size' bytes for guest virtual address space"},
3250 #endif
3251 {"d", "QEMU_LOG", true, handle_arg_log,
3252 "options", "activate log"},
3253 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename,
3254 "logfile", "override default logfile location"},
3255 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize,
3256 "pagesize", "set the host page size to 'pagesize'"},
3257 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep,
3258 "", "run in singlestep mode"},
3259 {"strace", "QEMU_STRACE", false, handle_arg_strace,
3260 "", "log system calls"},
3261 {"version", "QEMU_VERSION", false, handle_arg_version,
3262 "", "display version information and exit"},
3263 {NULL, NULL, false, NULL, NULL, NULL}
3264 };
3265
3266 static void usage(void)
3267 {
3268 struct qemu_argument *arginfo;
3269 int maxarglen;
3270 int maxenvlen;
3271
3272 printf("usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
3273 "Linux CPU emulator (compiled for " TARGET_ARCH " emulation)\n"
3274 "\n"
3275 "Options and associated environment variables:\n"
3276 "\n");
3277
3278 maxarglen = maxenvlen = 0;
3279
3280 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3281 if (strlen(arginfo->env) > maxenvlen) {
3282 maxenvlen = strlen(arginfo->env);
3283 }
3284 if (strlen(arginfo->argv) > maxarglen) {
3285 maxarglen = strlen(arginfo->argv);
3286 }
3287 }
3288
3289 printf("%-*s%-*sDescription\n", maxarglen+3, "Argument",
3290 maxenvlen+1, "Env-variable");
3291
3292 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3293 if (arginfo->has_arg) {
3294 printf("-%s %-*s %-*s %s\n", arginfo->argv,
3295 (int)(maxarglen-strlen(arginfo->argv)), arginfo->example,
3296 maxenvlen, arginfo->env, arginfo->help);
3297 } else {
3298 printf("-%-*s %-*s %s\n", maxarglen+1, arginfo->argv,
3299 maxenvlen, arginfo->env,
3300 arginfo->help);
3301 }
3302 }
3303
3304 printf("\n"
3305 "Defaults:\n"
3306 "QEMU_LD_PREFIX = %s\n"
3307 "QEMU_STACK_SIZE = %ld byte\n"
3308 "QEMU_LOG = %s\n",
3309 interp_prefix,
3310 guest_stack_size,
3311 DEBUG_LOGFILE);
3312
3313 printf("\n"
3314 "You can use -E and -U options or the QEMU_SET_ENV and\n"
3315 "QEMU_UNSET_ENV environment variables to set and unset\n"
3316 "environment variables for the target process.\n"
3317 "It is possible to provide several variables by separating them\n"
3318 "by commas in getsubopt(3) style. Additionally it is possible to\n"
3319 "provide the -E and -U options multiple times.\n"
3320 "The following lines are equivalent:\n"
3321 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
3322 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
3323 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
3324 "Note that if you provide several changes to a single variable\n"
3325 "the last change will stay in effect.\n");
3326
3327 exit(1);
3328 }
3329
3330 static int parse_args(int argc, char **argv)
3331 {
3332 const char *r;
3333 int optind;
3334 struct qemu_argument *arginfo;
3335
3336 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3337 if (arginfo->env == NULL) {
3338 continue;
3339 }
3340
3341 r = getenv(arginfo->env);
3342 if (r != NULL) {
3343 arginfo->handle_opt(r);
3344 }
3345 }
3346
3347 optind = 1;
3348 for (;;) {
3349 if (optind >= argc) {
3350 break;
3351 }
3352 r = argv[optind];
3353 if (r[0] != '-') {
3354 break;
3355 }
3356 optind++;
3357 r++;
3358 if (!strcmp(r, "-")) {
3359 break;
3360 }
3361
3362 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3363 if (!strcmp(r, arginfo->argv)) {
3364 if (arginfo->has_arg) {
3365 if (optind >= argc) {
3366 usage();
3367 }
3368 arginfo->handle_opt(argv[optind]);
3369 optind++;
3370 } else {
3371 arginfo->handle_opt(NULL);
3372 }
3373 break;
3374 }
3375 }
3376
3377 /* no option matched the current argv */
3378 if (arginfo->handle_opt == NULL) {
3379 usage();
3380 }
3381 }
3382
3383 if (optind >= argc) {
3384 usage();
3385 }
3386
3387 filename = argv[optind];
3388 exec_path = argv[optind];
3389
3390 return optind;
3391 }
3392
3393 int main(int argc, char **argv, char **envp)
3394 {
3395 const char *log_file = DEBUG_LOGFILE;
3396 struct target_pt_regs regs1, *regs = &regs1;
3397 struct image_info info1, *info = &info1;
3398 struct linux_binprm bprm;
3399 TaskState *ts;
3400 CPUArchState *env;
3401 int optind;
3402 char **target_environ, **wrk;
3403 char **target_argv;
3404 int target_argc;
3405 int i;
3406 int ret;
3407
3408 module_call_init(MODULE_INIT_QOM);
3409
3410 qemu_cache_utils_init(envp);
3411
3412 if ((envlist = envlist_create()) == NULL) {
3413 (void) fprintf(stderr, "Unable to allocate envlist\n");
3414 exit(1);
3415 }
3416
3417 /* add current environment into the list */
3418 for (wrk = environ; *wrk != NULL; wrk++) {
3419 (void) envlist_setenv(envlist, *wrk);
3420 }
3421
3422 /* Read the stack limit from the kernel. If it's "unlimited",
3423 then we can do little else besides use the default. */
3424 {
3425 struct rlimit lim;
3426 if (getrlimit(RLIMIT_STACK, &lim) == 0
3427 && lim.rlim_cur != RLIM_INFINITY
3428 && lim.rlim_cur == (target_long)lim.rlim_cur) {
3429 guest_stack_size = lim.rlim_cur;
3430 }
3431 }
3432
3433 cpu_model = NULL;
3434 #if defined(cpudef_setup)
3435 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
3436 #endif
3437
3438 /* init debug */
3439 cpu_set_log_filename(log_file);
3440 optind = parse_args(argc, argv);
3441
3442 /* Zero out regs */
3443 memset(regs, 0, sizeof(struct target_pt_regs));
3444
3445 /* Zero out image_info */
3446 memset(info, 0, sizeof(struct image_info));
3447
3448 memset(&bprm, 0, sizeof (bprm));
3449
3450 /* Scan interp_prefix dir for replacement files. */
3451 init_paths(interp_prefix);
3452
3453 if (cpu_model == NULL) {
3454 #if defined(TARGET_I386)
3455 #ifdef TARGET_X86_64
3456 cpu_model = "qemu64";
3457 #else
3458 cpu_model = "qemu32";
3459 #endif
3460 #elif defined(TARGET_ARM)
3461 cpu_model = "any";
3462 #elif defined(TARGET_UNICORE32)
3463 cpu_model = "any";
3464 #elif defined(TARGET_M68K)
3465 cpu_model = "any";
3466 #elif defined(TARGET_SPARC)
3467 #ifdef TARGET_SPARC64
3468 cpu_model = "TI UltraSparc II";
3469 #else
3470 cpu_model = "Fujitsu MB86904";
3471 #endif
3472 #elif defined(TARGET_MIPS)
3473 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3474 cpu_model = "20Kc";
3475 #else
3476 cpu_model = "24Kf";
3477 #endif
3478 #elif defined TARGET_OPENRISC
3479 cpu_model = "or1200";
3480 #elif defined(TARGET_PPC)
3481 #ifdef TARGET_PPC64
3482 cpu_model = "970fx";
3483 #else
3484 cpu_model = "750";
3485 #endif
3486 #else
3487 cpu_model = "any";
3488 #endif
3489 }
3490 tcg_exec_init(0);
3491 cpu_exec_init_all();
3492 /* NOTE: we need to init the CPU at this stage to get
3493 qemu_host_page_size */
3494 env = cpu_init(cpu_model);
3495 if (!env) {
3496 fprintf(stderr, "Unable to find CPU definition\n");
3497 exit(1);
3498 }
3499 #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
3500 cpu_reset(ENV_GET_CPU(env));
3501 #endif
3502
3503 thread_env = env;
3504
3505 if (getenv("QEMU_STRACE")) {
3506 do_strace = 1;
3507 }
3508
3509 target_environ = envlist_to_environ(envlist, NULL);
3510 envlist_free(envlist);
3511
3512 #if defined(CONFIG_USE_GUEST_BASE)
3513 /*
3514 * Now that page sizes are configured in cpu_init() we can do
3515 * proper page alignment for guest_base.
3516 */
3517 guest_base = HOST_PAGE_ALIGN(guest_base);
3518
3519 if (reserved_va) {
3520 void *p;
3521 int flags;
3522
3523 flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE;
3524 if (have_guest_base) {
3525 flags |= MAP_FIXED;
3526 }
3527 p = mmap((void *)guest_base, reserved_va, PROT_NONE, flags, -1, 0);
3528 if (p == MAP_FAILED) {
3529 fprintf(stderr, "Unable to reserve guest address space\n");
3530 exit(1);
3531 }
3532 guest_base = (unsigned long)p;
3533 /* Make sure the address is properly aligned. */
3534 if (guest_base & ~qemu_host_page_mask) {
3535 munmap(p, reserved_va);
3536 p = mmap((void *)guest_base, reserved_va + qemu_host_page_size,
3537 PROT_NONE, flags, -1, 0);
3538 if (p == MAP_FAILED) {
3539 fprintf(stderr, "Unable to reserve guest address space\n");
3540 exit(1);
3541 }
3542 guest_base = HOST_PAGE_ALIGN((unsigned long)p);
3543 }
3544 qemu_log("Reserved 0x%lx bytes of guest address space\n", reserved_va);
3545 mmap_next_start = reserved_va;
3546 }
3547
3548 if (reserved_va || have_guest_base) {
3549 if (!guest_validate_base(guest_base)) {
3550 fprintf(stderr, "Guest base/Reserved VA rejected by guest code\n");
3551 exit(1);
3552 }
3553 }
3554 #endif /* CONFIG_USE_GUEST_BASE */
3555
3556 /*
3557 * Read in mmap_min_addr kernel parameter. This value is used
3558 * When loading the ELF image to determine whether guest_base
3559 * is needed. It is also used in mmap_find_vma.
3560 */
3561 {
3562 FILE *fp;
3563
3564 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
3565 unsigned long tmp;
3566 if (fscanf(fp, "%lu", &tmp) == 1) {
3567 mmap_min_addr = tmp;
3568 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
3569 }
3570 fclose(fp);
3571 }
3572 }
3573
3574 /*
3575 * Prepare copy of argv vector for target.
3576 */
3577 target_argc = argc - optind;
3578 target_argv = calloc(target_argc + 1, sizeof (char *));
3579 if (target_argv == NULL) {
3580 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
3581 exit(1);
3582 }
3583
3584 /*
3585 * If argv0 is specified (using '-0' switch) we replace
3586 * argv[0] pointer with the given one.
3587 */
3588 i = 0;
3589 if (argv0 != NULL) {
3590 target_argv[i++] = strdup(argv0);
3591 }
3592 for (; i < target_argc; i++) {
3593 target_argv[i] = strdup(argv[optind + i]);
3594 }
3595 target_argv[target_argc] = NULL;
3596
3597 ts = g_malloc0 (sizeof(TaskState));
3598 init_task_state(ts);
3599 /* build Task State */
3600 ts->info = info;
3601 ts->bprm = &bprm;
3602 env->opaque = ts;
3603 task_settid(ts);
3604
3605 ret = loader_exec(filename, target_argv, target_environ, regs,
3606 info, &bprm);
3607 if (ret != 0) {
3608 printf("Error %d while loading %s\n", ret, filename);
3609 _exit(1);
3610 }
3611
3612 for (wrk = target_environ; *wrk; wrk++) {
3613 free(*wrk);
3614 }
3615
3616 free(target_environ);
3617
3618 if (qemu_log_enabled()) {
3619 #if defined(CONFIG_USE_GUEST_BASE)
3620 qemu_log("guest_base 0x%lx\n", guest_base);
3621 #endif
3622 log_page_dump();
3623
3624 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
3625 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
3626 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
3627 info->start_code);
3628 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
3629 info->start_data);
3630 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
3631 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
3632 info->start_stack);
3633 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
3634 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
3635 }
3636
3637 target_set_brk(info->brk);
3638 syscall_init();
3639 signal_init();
3640
3641 #if defined(CONFIG_USE_GUEST_BASE)
3642 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3643 generating the prologue until now so that the prologue can take
3644 the real value of GUEST_BASE into account. */
3645 tcg_prologue_init(&tcg_ctx);
3646 #endif
3647
3648 #if defined(TARGET_I386)
3649 cpu_x86_set_cpl(env, 3);
3650
3651 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
3652 env->hflags |= HF_PE_MASK;
3653 if (env->cpuid_features & CPUID_SSE) {
3654 env->cr[4] |= CR4_OSFXSR_MASK;
3655 env->hflags |= HF_OSFXSR_MASK;
3656 }
3657 #ifndef TARGET_ABI32
3658 /* enable 64 bit mode if possible */
3659 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
3660 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
3661 exit(1);
3662 }
3663 env->cr[4] |= CR4_PAE_MASK;
3664 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
3665 env->hflags |= HF_LMA_MASK;
3666 #endif
3667
3668 /* flags setup : we activate the IRQs by default as in user mode */
3669 env->eflags |= IF_MASK;
3670
3671 /* linux register setup */
3672 #ifndef TARGET_ABI32
3673 env->regs[R_EAX] = regs->rax;
3674 env->regs[R_EBX] = regs->rbx;
3675 env->regs[R_ECX] = regs->rcx;
3676 env->regs[R_EDX] = regs->rdx;
3677 env->regs[R_ESI] = regs->rsi;
3678 env->regs[R_EDI] = regs->rdi;
3679 env->regs[R_EBP] = regs->rbp;
3680 env->regs[R_ESP] = regs->rsp;
3681 env->eip = regs->rip;
3682 #else
3683 env->regs[R_EAX] = regs->eax;
3684 env->regs[R_EBX] = regs->ebx;
3685 env->regs[R_ECX] = regs->ecx;
3686 env->regs[R_EDX] = regs->edx;
3687 env->regs[R_ESI] = regs->esi;
3688 env->regs[R_EDI] = regs->edi;
3689 env->regs[R_EBP] = regs->ebp;
3690 env->regs[R_ESP] = regs->esp;
3691 env->eip = regs->eip;
3692 #endif
3693
3694 /* linux interrupt setup */
3695 #ifndef TARGET_ABI32
3696 env->idt.limit = 511;
3697 #else
3698 env->idt.limit = 255;
3699 #endif
3700 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
3701 PROT_READ|PROT_WRITE,
3702 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
3703 idt_table = g2h(env->idt.base);
3704 set_idt(0, 0);
3705 set_idt(1, 0);
3706 set_idt(2, 0);
3707 set_idt(3, 3);
3708 set_idt(4, 3);
3709 set_idt(5, 0);
3710 set_idt(6, 0);
3711 set_idt(7, 0);
3712 set_idt(8, 0);
3713 set_idt(9, 0);
3714 set_idt(10, 0);
3715 set_idt(11, 0);
3716 set_idt(12, 0);
3717 set_idt(13, 0);
3718 set_idt(14, 0);
3719 set_idt(15, 0);
3720 set_idt(16, 0);
3721 set_idt(17, 0);
3722 set_idt(18, 0);
3723 set_idt(19, 0);
3724 set_idt(0x80, 3);
3725
3726 /* linux segment setup */
3727 {
3728 uint64_t *gdt_table;
3729 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
3730 PROT_READ|PROT_WRITE,
3731 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
3732 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
3733 gdt_table = g2h(env->gdt.base);
3734 #ifdef TARGET_ABI32
3735 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3736 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3737 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
3738 #else
3739 /* 64 bit code segment */
3740 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3741 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3742 DESC_L_MASK |
3743 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
3744 #endif
3745 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
3746 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3747 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
3748 }
3749 cpu_x86_load_seg(env, R_CS, __USER_CS);
3750 cpu_x86_load_seg(env, R_SS, __USER_DS);
3751 #ifdef TARGET_ABI32
3752 cpu_x86_load_seg(env, R_DS, __USER_DS);
3753 cpu_x86_load_seg(env, R_ES, __USER_DS);
3754 cpu_x86_load_seg(env, R_FS, __USER_DS);
3755 cpu_x86_load_seg(env, R_GS, __USER_DS);
3756 /* This hack makes Wine work... */
3757 env->segs[R_FS].selector = 0;
3758 #else
3759 cpu_x86_load_seg(env, R_DS, 0);
3760 cpu_x86_load_seg(env, R_ES, 0);
3761 cpu_x86_load_seg(env, R_FS, 0);
3762 cpu_x86_load_seg(env, R_GS, 0);
3763 #endif
3764 #elif defined(TARGET_ARM)
3765 {
3766 int i;
3767 cpsr_write(env, regs->uregs[16], 0xffffffff);
3768 for(i = 0; i < 16; i++) {
3769 env->regs[i] = regs->uregs[i];
3770 }
3771 /* Enable BE8. */
3772 if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4
3773 && (info->elf_flags & EF_ARM_BE8)) {
3774 env->bswap_code = 1;
3775 }
3776 }
3777 #elif defined(TARGET_UNICORE32)
3778 {
3779 int i;
3780 cpu_asr_write(env, regs->uregs[32], 0xffffffff);
3781 for (i = 0; i < 32; i++) {
3782 env->regs[i] = regs->uregs[i];
3783 }
3784 }
3785 #elif defined(TARGET_SPARC)
3786 {
3787 int i;
3788 env->pc = regs->pc;
3789 env->npc = regs->npc;
3790 env->y = regs->y;
3791 for(i = 0; i < 8; i++)
3792 env->gregs[i] = regs->u_regs[i];
3793 for(i = 0; i < 8; i++)
3794 env->regwptr[i] = regs->u_regs[i + 8];
3795 }
3796 #elif defined(TARGET_PPC)
3797 {
3798 int i;
3799
3800 #if defined(TARGET_PPC64)
3801 #if defined(TARGET_ABI32)
3802 env->msr &= ~((target_ulong)1 << MSR_SF);
3803 #else
3804 env->msr |= (target_ulong)1 << MSR_SF;
3805 #endif
3806 #endif
3807 env->nip = regs->nip;
3808 for(i = 0; i < 32; i++) {
3809 env->gpr[i] = regs->gpr[i];
3810 }
3811 }
3812 #elif defined(TARGET_M68K)
3813 {
3814 env->pc = regs->pc;
3815 env->dregs[0] = regs->d0;
3816 env->dregs[1] = regs->d1;
3817 env->dregs[2] = regs->d2;
3818 env->dregs[3] = regs->d3;
3819 env->dregs[4] = regs->d4;
3820 env->dregs[5] = regs->d5;
3821 env->dregs[6] = regs->d6;
3822 env->dregs[7] = regs->d7;
3823 env->aregs[0] = regs->a0;
3824 env->aregs[1] = regs->a1;
3825 env->aregs[2] = regs->a2;
3826 env->aregs[3] = regs->a3;
3827 env->aregs[4] = regs->a4;
3828 env->aregs[5] = regs->a5;
3829 env->aregs[6] = regs->a6;
3830 env->aregs[7] = regs->usp;
3831 env->sr = regs->sr;
3832 ts->sim_syscalls = 1;
3833 }
3834 #elif defined(TARGET_MICROBLAZE)
3835 {
3836 env->regs[0] = regs->r0;
3837 env->regs[1] = regs->r1;
3838 env->regs[2] = regs->r2;
3839 env->regs[3] = regs->r3;
3840 env->regs[4] = regs->r4;
3841 env->regs[5] = regs->r5;
3842 env->regs[6] = regs->r6;
3843 env->regs[7] = regs->r7;
3844 env->regs[8] = regs->r8;
3845 env->regs[9] = regs->r9;
3846 env->regs[10] = regs->r10;
3847 env->regs[11] = regs->r11;
3848 env->regs[12] = regs->r12;
3849 env->regs[13] = regs->r13;
3850 env->regs[14] = regs->r14;
3851 env->regs[15] = regs->r15;
3852 env->regs[16] = regs->r16;
3853 env->regs[17] = regs->r17;
3854 env->regs[18] = regs->r18;
3855 env->regs[19] = regs->r19;
3856 env->regs[20] = regs->r20;
3857 env->regs[21] = regs->r21;
3858 env->regs[22] = regs->r22;
3859 env->regs[23] = regs->r23;
3860 env->regs[24] = regs->r24;
3861 env->regs[25] = regs->r25;
3862 env->regs[26] = regs->r26;
3863 env->regs[27] = regs->r27;
3864 env->regs[28] = regs->r28;
3865 env->regs[29] = regs->r29;
3866 env->regs[30] = regs->r30;
3867 env->regs[31] = regs->r31;
3868 env->sregs[SR_PC] = regs->pc;
3869 }
3870 #elif defined(TARGET_MIPS)
3871 {
3872 int i;
3873
3874 for(i = 0; i < 32; i++) {
3875 env->active_tc.gpr[i] = regs->regs[i];
3876 }
3877 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
3878 if (regs->cp0_epc & 1) {
3879 env->hflags |= MIPS_HFLAG_M16;
3880 }
3881 }
3882 #elif defined(TARGET_OPENRISC)
3883 {
3884 int i;
3885
3886 for (i = 0; i < 32; i++) {
3887 env->gpr[i] = regs->gpr[i];
3888 }
3889
3890 env->sr = regs->sr;
3891 env->pc = regs->pc;
3892 }
3893 #elif defined(TARGET_SH4)
3894 {
3895 int i;
3896
3897 for(i = 0; i < 16; i++) {
3898 env->gregs[i] = regs->regs[i];
3899 }
3900 env->pc = regs->pc;
3901 }
3902 #elif defined(TARGET_ALPHA)
3903 {
3904 int i;
3905
3906 for(i = 0; i < 28; i++) {
3907 env->ir[i] = ((abi_ulong *)regs)[i];
3908 }
3909 env->ir[IR_SP] = regs->usp;
3910 env->pc = regs->pc;
3911 }
3912 #elif defined(TARGET_CRIS)
3913 {
3914 env->regs[0] = regs->r0;
3915 env->regs[1] = regs->r1;
3916 env->regs[2] = regs->r2;
3917 env->regs[3] = regs->r3;
3918 env->regs[4] = regs->r4;
3919 env->regs[5] = regs->r5;
3920 env->regs[6] = regs->r6;
3921 env->regs[7] = regs->r7;
3922 env->regs[8] = regs->r8;
3923 env->regs[9] = regs->r9;
3924 env->regs[10] = regs->r10;
3925 env->regs[11] = regs->r11;
3926 env->regs[12] = regs->r12;
3927 env->regs[13] = regs->r13;
3928 env->regs[14] = info->start_stack;
3929 env->regs[15] = regs->acr;
3930 env->pc = regs->erp;
3931 }
3932 #elif defined(TARGET_S390X)
3933 {
3934 int i;
3935 for (i = 0; i < 16; i++) {
3936 env->regs[i] = regs->gprs[i];
3937 }
3938 env->psw.mask = regs->psw.mask;
3939 env->psw.addr = regs->psw.addr;
3940 }
3941 #else
3942 #error unsupported target CPU
3943 #endif
3944
3945 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
3946 ts->stack_base = info->start_stack;
3947 ts->heap_base = info->brk;
3948 /* This will be filled in on the first SYS_HEAPINFO call. */
3949 ts->heap_limit = 0;
3950 #endif
3951
3952 if (gdbstub_port) {
3953 if (gdbserver_start(gdbstub_port) < 0) {
3954 fprintf(stderr, "qemu: could not open gdbserver on port %d\n",
3955 gdbstub_port);
3956 exit(1);
3957 }
3958 gdb_handlesig(env, 0);
3959 }
3960 cpu_loop(env);
3961 /* never exits */
3962 return 0;
3963 }
Qemu copy for testing