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2.6 kernels make int 5 a trap gate
[qemu.git] / linux-user / main.c
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26
27 #include "qemu.h"
28 #include "qemu-common.h"
29
30 #define DEBUG_LOGFILE "/tmp/qemu.log"
31
32 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
33 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
34
35 #if defined(__i386__) && !defined(CONFIG_STATIC)
36 /* Force usage of an ELF interpreter even if it is an ELF shared
37 object ! */
38 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
39 #endif
40
41 /* for recent libc, we add these dummy symbols which are not declared
42 when generating a linked object (bug in ld ?) */
43 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
44 asm(".globl __preinit_array_start\n"
45 ".globl __preinit_array_end\n"
46 ".globl __init_array_start\n"
47 ".globl __init_array_end\n"
48 ".globl __fini_array_start\n"
49 ".globl __fini_array_end\n"
50 ".section \".rodata\"\n"
51 "__preinit_array_start:\n"
52 "__preinit_array_end:\n"
53 "__init_array_start:\n"
54 "__init_array_end:\n"
55 "__fini_array_start:\n"
56 "__fini_array_end:\n"
57 ".long 0\n"
58 ".previous\n");
59 #endif
60
61 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
62 we allocate a bigger stack. Need a better solution, for example
63 by remapping the process stack directly at the right place */
64 unsigned long x86_stack_size = 512 * 1024;
65
66 void gemu_log(const char *fmt, ...)
67 {
68 va_list ap;
69
70 va_start(ap, fmt);
71 vfprintf(stderr, fmt, ap);
72 va_end(ap);
73 }
74
75 void cpu_outb(CPUState *env, int addr, int val)
76 {
77 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
78 }
79
80 void cpu_outw(CPUState *env, int addr, int val)
81 {
82 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
83 }
84
85 void cpu_outl(CPUState *env, int addr, int val)
86 {
87 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
88 }
89
90 int cpu_inb(CPUState *env, int addr)
91 {
92 fprintf(stderr, "inb: port=0x%04x\n", addr);
93 return 0;
94 }
95
96 int cpu_inw(CPUState *env, int addr)
97 {
98 fprintf(stderr, "inw: port=0x%04x\n", addr);
99 return 0;
100 }
101
102 int cpu_inl(CPUState *env, int addr)
103 {
104 fprintf(stderr, "inl: port=0x%04x\n", addr);
105 return 0;
106 }
107
108 int cpu_get_pic_interrupt(CPUState *env)
109 {
110 return -1;
111 }
112
113 /* timers for rdtsc */
114
115 #if 0
116
117 static uint64_t emu_time;
118
119 int64_t cpu_get_real_ticks(void)
120 {
121 return emu_time++;
122 }
123
124 #endif
125
126 #ifdef TARGET_I386
127 /***********************************************************/
128 /* CPUX86 core interface */
129
130 void cpu_smm_update(CPUState *env)
131 {
132 }
133
134 uint64_t cpu_get_tsc(CPUX86State *env)
135 {
136 return cpu_get_real_ticks();
137 }
138
139 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
140 int flags)
141 {
142 unsigned int e1, e2;
143 uint32_t *p;
144 e1 = (addr << 16) | (limit & 0xffff);
145 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
146 e2 |= flags;
147 p = ptr;
148 p[0] = tswapl(e1);
149 p[1] = tswapl(e2);
150 }
151
152 #if TARGET_X86_64
153 uint64_t idt_table[512];
154
155 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
156 uint64_t addr, unsigned int sel)
157 {
158 uint32_t *p, e1, e2;
159 e1 = (addr & 0xffff) | (sel << 16);
160 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
161 p = ptr;
162 p[0] = tswap32(e1);
163 p[1] = tswap32(e2);
164 p[2] = tswap32(addr >> 32);
165 p[3] = 0;
166 }
167 /* only dpl matters as we do only user space emulation */
168 static void set_idt(int n, unsigned int dpl)
169 {
170 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
171 }
172 #else
173 uint64_t idt_table[256];
174
175 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
176 uint32_t addr, unsigned int sel)
177 {
178 uint32_t *p, e1, e2;
179 e1 = (addr & 0xffff) | (sel << 16);
180 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
181 p = ptr;
182 p[0] = tswap32(e1);
183 p[1] = tswap32(e2);
184 }
185
186 /* only dpl matters as we do only user space emulation */
187 static void set_idt(int n, unsigned int dpl)
188 {
189 set_gate(idt_table + n, 0, dpl, 0, 0);
190 }
191 #endif
192
193 void cpu_loop(CPUX86State *env)
194 {
195 int trapnr;
196 abi_ulong pc;
197 target_siginfo_t info;
198
199 for(;;) {
200 trapnr = cpu_x86_exec(env);
201 switch(trapnr) {
202 case 0x80:
203 /* linux syscall from int $0x80 */
204 env->regs[R_EAX] = do_syscall(env,
205 env->regs[R_EAX],
206 env->regs[R_EBX],
207 env->regs[R_ECX],
208 env->regs[R_EDX],
209 env->regs[R_ESI],
210 env->regs[R_EDI],
211 env->regs[R_EBP]);
212 break;
213 #ifndef TARGET_ABI32
214 case EXCP_SYSCALL:
215 /* linux syscall from syscall intruction */
216 env->regs[R_EAX] = do_syscall(env,
217 env->regs[R_EAX],
218 env->regs[R_EDI],
219 env->regs[R_ESI],
220 env->regs[R_EDX],
221 env->regs[10],
222 env->regs[8],
223 env->regs[9]);
224 env->eip = env->exception_next_eip;
225 break;
226 #endif
227 case EXCP0B_NOSEG:
228 case EXCP0C_STACK:
229 info.si_signo = SIGBUS;
230 info.si_errno = 0;
231 info.si_code = TARGET_SI_KERNEL;
232 info._sifields._sigfault._addr = 0;
233 queue_signal(info.si_signo, &info);
234 break;
235 case EXCP0D_GPF:
236 /* XXX: potential problem if ABI32 */
237 #ifndef TARGET_X86_64
238 if (env->eflags & VM_MASK) {
239 handle_vm86_fault(env);
240 } else
241 #endif
242 {
243 info.si_signo = SIGSEGV;
244 info.si_errno = 0;
245 info.si_code = TARGET_SI_KERNEL;
246 info._sifields._sigfault._addr = 0;
247 queue_signal(info.si_signo, &info);
248 }
249 break;
250 case EXCP0E_PAGE:
251 info.si_signo = SIGSEGV;
252 info.si_errno = 0;
253 if (!(env->error_code & 1))
254 info.si_code = TARGET_SEGV_MAPERR;
255 else
256 info.si_code = TARGET_SEGV_ACCERR;
257 info._sifields._sigfault._addr = env->cr[2];
258 queue_signal(info.si_signo, &info);
259 break;
260 case EXCP00_DIVZ:
261 #ifndef TARGET_X86_64
262 if (env->eflags & VM_MASK) {
263 handle_vm86_trap(env, trapnr);
264 } else
265 #endif
266 {
267 /* division by zero */
268 info.si_signo = SIGFPE;
269 info.si_errno = 0;
270 info.si_code = TARGET_FPE_INTDIV;
271 info._sifields._sigfault._addr = env->eip;
272 queue_signal(info.si_signo, &info);
273 }
274 break;
275 case EXCP01_SSTP:
276 case EXCP03_INT3:
277 #ifndef TARGET_X86_64
278 if (env->eflags & VM_MASK) {
279 handle_vm86_trap(env, trapnr);
280 } else
281 #endif
282 {
283 info.si_signo = SIGTRAP;
284 info.si_errno = 0;
285 if (trapnr == EXCP01_SSTP) {
286 info.si_code = TARGET_TRAP_BRKPT;
287 info._sifields._sigfault._addr = env->eip;
288 } else {
289 info.si_code = TARGET_SI_KERNEL;
290 info._sifields._sigfault._addr = 0;
291 }
292 queue_signal(info.si_signo, &info);
293 }
294 break;
295 case EXCP04_INTO:
296 case EXCP05_BOUND:
297 #ifndef TARGET_X86_64
298 if (env->eflags & VM_MASK) {
299 handle_vm86_trap(env, trapnr);
300 } else
301 #endif
302 {
303 info.si_signo = SIGSEGV;
304 info.si_errno = 0;
305 info.si_code = TARGET_SI_KERNEL;
306 info._sifields._sigfault._addr = 0;
307 queue_signal(info.si_signo, &info);
308 }
309 break;
310 case EXCP06_ILLOP:
311 info.si_signo = SIGILL;
312 info.si_errno = 0;
313 info.si_code = TARGET_ILL_ILLOPN;
314 info._sifields._sigfault._addr = env->eip;
315 queue_signal(info.si_signo, &info);
316 break;
317 case EXCP_INTERRUPT:
318 /* just indicate that signals should be handled asap */
319 break;
320 case EXCP_DEBUG:
321 {
322 int sig;
323
324 sig = gdb_handlesig (env, TARGET_SIGTRAP);
325 if (sig)
326 {
327 info.si_signo = sig;
328 info.si_errno = 0;
329 info.si_code = TARGET_TRAP_BRKPT;
330 queue_signal(info.si_signo, &info);
331 }
332 }
333 break;
334 default:
335 pc = env->segs[R_CS].base + env->eip;
336 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
337 (long)pc, trapnr);
338 abort();
339 }
340 process_pending_signals(env);
341 }
342 }
343 #endif
344
345 #ifdef TARGET_ARM
346
347 /* XXX: find a better solution */
348 extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end);
349
350 static void arm_cache_flush(abi_ulong start, abi_ulong last)
351 {
352 abi_ulong addr, last1;
353
354 if (last < start)
355 return;
356 addr = start;
357 for(;;) {
358 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
359 if (last1 > last)
360 last1 = last;
361 tb_invalidate_page_range(addr, last1 + 1);
362 if (last1 == last)
363 break;
364 addr = last1 + 1;
365 }
366 }
367
368 void cpu_loop(CPUARMState *env)
369 {
370 int trapnr;
371 unsigned int n, insn;
372 target_siginfo_t info;
373 uint32_t addr;
374
375 for(;;) {
376 trapnr = cpu_arm_exec(env);
377 switch(trapnr) {
378 case EXCP_UDEF:
379 {
380 TaskState *ts = env->opaque;
381 uint32_t opcode;
382 int rc;
383
384 /* we handle the FPU emulation here, as Linux */
385 /* we get the opcode */
386 /* FIXME - what to do if get_user() fails? */
387 get_user_u32(opcode, env->regs[15]);
388
389 rc = EmulateAll(opcode, &ts->fpa, env);
390 if (rc == 0) { /* illegal instruction */
391 info.si_signo = SIGILL;
392 info.si_errno = 0;
393 info.si_code = TARGET_ILL_ILLOPN;
394 info._sifields._sigfault._addr = env->regs[15];
395 queue_signal(info.si_signo, &info);
396 } else if (rc < 0) { /* FP exception */
397 int arm_fpe=0;
398
399 /* translate softfloat flags to FPSR flags */
400 if (-rc & float_flag_invalid)
401 arm_fpe |= BIT_IOC;
402 if (-rc & float_flag_divbyzero)
403 arm_fpe |= BIT_DZC;
404 if (-rc & float_flag_overflow)
405 arm_fpe |= BIT_OFC;
406 if (-rc & float_flag_underflow)
407 arm_fpe |= BIT_UFC;
408 if (-rc & float_flag_inexact)
409 arm_fpe |= BIT_IXC;
410
411 FPSR fpsr = ts->fpa.fpsr;
412 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
413
414 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
415 info.si_signo = SIGFPE;
416 info.si_errno = 0;
417
418 /* ordered by priority, least first */
419 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
420 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
421 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
422 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
423 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
424
425 info._sifields._sigfault._addr = env->regs[15];
426 queue_signal(info.si_signo, &info);
427 } else {
428 env->regs[15] += 4;
429 }
430
431 /* accumulate unenabled exceptions */
432 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
433 fpsr |= BIT_IXC;
434 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
435 fpsr |= BIT_UFC;
436 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
437 fpsr |= BIT_OFC;
438 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
439 fpsr |= BIT_DZC;
440 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
441 fpsr |= BIT_IOC;
442 ts->fpa.fpsr=fpsr;
443 } else { /* everything OK */
444 /* increment PC */
445 env->regs[15] += 4;
446 }
447 }
448 break;
449 case EXCP_SWI:
450 case EXCP_BKPT:
451 {
452 env->eabi = 1;
453 /* system call */
454 if (trapnr == EXCP_BKPT) {
455 if (env->thumb) {
456 /* FIXME - what to do if get_user() fails? */
457 get_user_u16(insn, env->regs[15]);
458 n = insn & 0xff;
459 env->regs[15] += 2;
460 } else {
461 /* FIXME - what to do if get_user() fails? */
462 get_user_u32(insn, env->regs[15]);
463 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
464 env->regs[15] += 4;
465 }
466 } else {
467 if (env->thumb) {
468 /* FIXME - what to do if get_user() fails? */
469 get_user_u16(insn, env->regs[15] - 2);
470 n = insn & 0xff;
471 } else {
472 /* FIXME - what to do if get_user() fails? */
473 get_user_u32(insn, env->regs[15] - 4);
474 n = insn & 0xffffff;
475 }
476 }
477
478 if (n == ARM_NR_cacheflush) {
479 arm_cache_flush(env->regs[0], env->regs[1]);
480 } else if (n == ARM_NR_semihosting
481 || n == ARM_NR_thumb_semihosting) {
482 env->regs[0] = do_arm_semihosting (env);
483 } else if (n == 0 || n >= ARM_SYSCALL_BASE
484 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
485 /* linux syscall */
486 if (env->thumb || n == 0) {
487 n = env->regs[7];
488 } else {
489 n -= ARM_SYSCALL_BASE;
490 env->eabi = 0;
491 }
492 env->regs[0] = do_syscall(env,
493 n,
494 env->regs[0],
495 env->regs[1],
496 env->regs[2],
497 env->regs[3],
498 env->regs[4],
499 env->regs[5]);
500 } else {
501 goto error;
502 }
503 }
504 break;
505 case EXCP_INTERRUPT:
506 /* just indicate that signals should be handled asap */
507 break;
508 case EXCP_PREFETCH_ABORT:
509 addr = env->cp15.c6_data;
510 goto do_segv;
511 case EXCP_DATA_ABORT:
512 addr = env->cp15.c6_insn;
513 goto do_segv;
514 do_segv:
515 {
516 info.si_signo = SIGSEGV;
517 info.si_errno = 0;
518 /* XXX: check env->error_code */
519 info.si_code = TARGET_SEGV_MAPERR;
520 info._sifields._sigfault._addr = addr;
521 queue_signal(info.si_signo, &info);
522 }
523 break;
524 case EXCP_DEBUG:
525 {
526 int sig;
527
528 sig = gdb_handlesig (env, TARGET_SIGTRAP);
529 if (sig)
530 {
531 info.si_signo = sig;
532 info.si_errno = 0;
533 info.si_code = TARGET_TRAP_BRKPT;
534 queue_signal(info.si_signo, &info);
535 }
536 }
537 break;
538 default:
539 error:
540 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
541 trapnr);
542 cpu_dump_state(env, stderr, fprintf, 0);
543 abort();
544 }
545 process_pending_signals(env);
546 }
547 }
548
549 #endif
550
551 #ifdef TARGET_SPARC
552
553 //#define DEBUG_WIN
554
555 /* WARNING: dealing with register windows _is_ complicated. More info
556 can be found at http://www.sics.se/~psm/sparcstack.html */
557 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
558 {
559 index = (index + cwp * 16) & (16 * NWINDOWS - 1);
560 /* wrap handling : if cwp is on the last window, then we use the
561 registers 'after' the end */
562 if (index < 8 && env->cwp == (NWINDOWS - 1))
563 index += (16 * NWINDOWS);
564 return index;
565 }
566
567 /* save the register window 'cwp1' */
568 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
569 {
570 unsigned int i;
571 abi_ulong sp_ptr;
572
573 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
574 #if defined(DEBUG_WIN)
575 printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
576 (int)sp_ptr, cwp1);
577 #endif
578 for(i = 0; i < 16; i++) {
579 /* FIXME - what to do if put_user() fails? */
580 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
581 sp_ptr += sizeof(abi_ulong);
582 }
583 }
584
585 static void save_window(CPUSPARCState *env)
586 {
587 #ifndef TARGET_SPARC64
588 unsigned int new_wim;
589 new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
590 ((1LL << NWINDOWS) - 1);
591 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
592 env->wim = new_wim;
593 #else
594 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
595 env->cansave++;
596 env->canrestore--;
597 #endif
598 }
599
600 static void restore_window(CPUSPARCState *env)
601 {
602 unsigned int new_wim, i, cwp1;
603 abi_ulong sp_ptr;
604
605 new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &
606 ((1LL << NWINDOWS) - 1);
607
608 /* restore the invalid window */
609 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
610 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
611 #if defined(DEBUG_WIN)
612 printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
613 (int)sp_ptr, cwp1);
614 #endif
615 for(i = 0; i < 16; i++) {
616 /* FIXME - what to do if get_user() fails? */
617 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
618 sp_ptr += sizeof(abi_ulong);
619 }
620 env->wim = new_wim;
621 #ifdef TARGET_SPARC64
622 env->canrestore++;
623 if (env->cleanwin < NWINDOWS - 1)
624 env->cleanwin++;
625 env->cansave--;
626 #endif
627 }
628
629 static void flush_windows(CPUSPARCState *env)
630 {
631 int offset, cwp1;
632
633 offset = 1;
634 for(;;) {
635 /* if restore would invoke restore_window(), then we can stop */
636 cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
637 if (env->wim & (1 << cwp1))
638 break;
639 save_window_offset(env, cwp1);
640 offset++;
641 }
642 /* set wim so that restore will reload the registers */
643 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
644 env->wim = 1 << cwp1;
645 #if defined(DEBUG_WIN)
646 printf("flush_windows: nb=%d\n", offset - 1);
647 #endif
648 }
649
650 void cpu_loop (CPUSPARCState *env)
651 {
652 int trapnr, ret;
653 target_siginfo_t info;
654
655 while (1) {
656 trapnr = cpu_sparc_exec (env);
657
658 switch (trapnr) {
659 #ifndef TARGET_SPARC64
660 case 0x88:
661 case 0x90:
662 #else
663 case 0x110:
664 case 0x16d:
665 #endif
666 ret = do_syscall (env, env->gregs[1],
667 env->regwptr[0], env->regwptr[1],
668 env->regwptr[2], env->regwptr[3],
669 env->regwptr[4], env->regwptr[5]);
670 if ((unsigned int)ret >= (unsigned int)(-515)) {
671 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
672 env->xcc |= PSR_CARRY;
673 #else
674 env->psr |= PSR_CARRY;
675 #endif
676 ret = -ret;
677 } else {
678 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
679 env->xcc &= ~PSR_CARRY;
680 #else
681 env->psr &= ~PSR_CARRY;
682 #endif
683 }
684 env->regwptr[0] = ret;
685 /* next instruction */
686 env->pc = env->npc;
687 env->npc = env->npc + 4;
688 break;
689 case 0x83: /* flush windows */
690 #ifdef TARGET_ABI32
691 case 0x103:
692 #endif
693 flush_windows(env);
694 /* next instruction */
695 env->pc = env->npc;
696 env->npc = env->npc + 4;
697 break;
698 #ifndef TARGET_SPARC64
699 case TT_WIN_OVF: /* window overflow */
700 save_window(env);
701 break;
702 case TT_WIN_UNF: /* window underflow */
703 restore_window(env);
704 break;
705 case TT_TFAULT:
706 case TT_DFAULT:
707 {
708 info.si_signo = SIGSEGV;
709 info.si_errno = 0;
710 /* XXX: check env->error_code */
711 info.si_code = TARGET_SEGV_MAPERR;
712 info._sifields._sigfault._addr = env->mmuregs[4];
713 queue_signal(info.si_signo, &info);
714 }
715 break;
716 #else
717 case TT_SPILL: /* window overflow */
718 save_window(env);
719 break;
720 case TT_FILL: /* window underflow */
721 restore_window(env);
722 break;
723 case TT_TFAULT:
724 case TT_DFAULT:
725 {
726 info.si_signo = SIGSEGV;
727 info.si_errno = 0;
728 /* XXX: check env->error_code */
729 info.si_code = TARGET_SEGV_MAPERR;
730 if (trapnr == TT_DFAULT)
731 info._sifields._sigfault._addr = env->dmmuregs[4];
732 else
733 info._sifields._sigfault._addr = env->tsptr->tpc;
734 queue_signal(info.si_signo, &info);
735 }
736 break;
737 #ifndef TARGET_ABI32
738 case 0x16e:
739 flush_windows(env);
740 sparc64_get_context(env);
741 break;
742 case 0x16f:
743 flush_windows(env);
744 sparc64_set_context(env);
745 break;
746 #endif
747 #endif
748 case EXCP_INTERRUPT:
749 /* just indicate that signals should be handled asap */
750 break;
751 case EXCP_DEBUG:
752 {
753 int sig;
754
755 sig = gdb_handlesig (env, TARGET_SIGTRAP);
756 if (sig)
757 {
758 info.si_signo = sig;
759 info.si_errno = 0;
760 info.si_code = TARGET_TRAP_BRKPT;
761 queue_signal(info.si_signo, &info);
762 }
763 }
764 break;
765 default:
766 printf ("Unhandled trap: 0x%x\n", trapnr);
767 cpu_dump_state(env, stderr, fprintf, 0);
768 exit (1);
769 }
770 process_pending_signals (env);
771 }
772 }
773
774 #endif
775
776 #ifdef TARGET_PPC
777 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
778 {
779 /* TO FIX */
780 return 0;
781 }
782
783 uint32_t cpu_ppc_load_tbl (CPUState *env)
784 {
785 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
786 }
787
788 uint32_t cpu_ppc_load_tbu (CPUState *env)
789 {
790 return cpu_ppc_get_tb(env) >> 32;
791 }
792
793 uint32_t cpu_ppc_load_atbl (CPUState *env)
794 {
795 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
796 }
797
798 uint32_t cpu_ppc_load_atbu (CPUState *env)
799 {
800 return cpu_ppc_get_tb(env) >> 32;
801 }
802
803 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
804 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
805
806 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
807 {
808 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
809 }
810
811 /* XXX: to be fixed */
812 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
813 {
814 return -1;
815 }
816
817 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
818 {
819 return -1;
820 }
821
822 #define EXCP_DUMP(env, fmt, args...) \
823 do { \
824 fprintf(stderr, fmt , ##args); \
825 cpu_dump_state(env, stderr, fprintf, 0); \
826 if (loglevel != 0) { \
827 fprintf(logfile, fmt , ##args); \
828 cpu_dump_state(env, logfile, fprintf, 0); \
829 } \
830 } while (0)
831
832 void cpu_loop(CPUPPCState *env)
833 {
834 target_siginfo_t info;
835 int trapnr;
836 uint32_t ret;
837
838 for(;;) {
839 trapnr = cpu_ppc_exec(env);
840 switch(trapnr) {
841 case POWERPC_EXCP_NONE:
842 /* Just go on */
843 break;
844 case POWERPC_EXCP_CRITICAL: /* Critical input */
845 cpu_abort(env, "Critical interrupt while in user mode. "
846 "Aborting\n");
847 break;
848 case POWERPC_EXCP_MCHECK: /* Machine check exception */
849 cpu_abort(env, "Machine check exception while in user mode. "
850 "Aborting\n");
851 break;
852 case POWERPC_EXCP_DSI: /* Data storage exception */
853 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
854 env->spr[SPR_DAR]);
855 /* XXX: check this. Seems bugged */
856 switch (env->error_code & 0xFF000000) {
857 case 0x40000000:
858 info.si_signo = TARGET_SIGSEGV;
859 info.si_errno = 0;
860 info.si_code = TARGET_SEGV_MAPERR;
861 break;
862 case 0x04000000:
863 info.si_signo = TARGET_SIGILL;
864 info.si_errno = 0;
865 info.si_code = TARGET_ILL_ILLADR;
866 break;
867 case 0x08000000:
868 info.si_signo = TARGET_SIGSEGV;
869 info.si_errno = 0;
870 info.si_code = TARGET_SEGV_ACCERR;
871 break;
872 default:
873 /* Let's send a regular segfault... */
874 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
875 env->error_code);
876 info.si_signo = TARGET_SIGSEGV;
877 info.si_errno = 0;
878 info.si_code = TARGET_SEGV_MAPERR;
879 break;
880 }
881 info._sifields._sigfault._addr = env->nip;
882 queue_signal(info.si_signo, &info);
883 break;
884 case POWERPC_EXCP_ISI: /* Instruction storage exception */
885 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
886 env->spr[SPR_SRR0]);
887 /* XXX: check this */
888 switch (env->error_code & 0xFF000000) {
889 case 0x40000000:
890 info.si_signo = TARGET_SIGSEGV;
891 info.si_errno = 0;
892 info.si_code = TARGET_SEGV_MAPERR;
893 break;
894 case 0x10000000:
895 case 0x08000000:
896 info.si_signo = TARGET_SIGSEGV;
897 info.si_errno = 0;
898 info.si_code = TARGET_SEGV_ACCERR;
899 break;
900 default:
901 /* Let's send a regular segfault... */
902 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
903 env->error_code);
904 info.si_signo = TARGET_SIGSEGV;
905 info.si_errno = 0;
906 info.si_code = TARGET_SEGV_MAPERR;
907 break;
908 }
909 info._sifields._sigfault._addr = env->nip - 4;
910 queue_signal(info.si_signo, &info);
911 break;
912 case POWERPC_EXCP_EXTERNAL: /* External input */
913 cpu_abort(env, "External interrupt while in user mode. "
914 "Aborting\n");
915 break;
916 case POWERPC_EXCP_ALIGN: /* Alignment exception */
917 EXCP_DUMP(env, "Unaligned memory access\n");
918 /* XXX: check this */
919 info.si_signo = TARGET_SIGBUS;
920 info.si_errno = 0;
921 info.si_code = TARGET_BUS_ADRALN;
922 info._sifields._sigfault._addr = env->nip - 4;
923 queue_signal(info.si_signo, &info);
924 break;
925 case POWERPC_EXCP_PROGRAM: /* Program exception */
926 /* XXX: check this */
927 switch (env->error_code & ~0xF) {
928 case POWERPC_EXCP_FP:
929 EXCP_DUMP(env, "Floating point program exception\n");
930 info.si_signo = TARGET_SIGFPE;
931 info.si_errno = 0;
932 switch (env->error_code & 0xF) {
933 case POWERPC_EXCP_FP_OX:
934 info.si_code = TARGET_FPE_FLTOVF;
935 break;
936 case POWERPC_EXCP_FP_UX:
937 info.si_code = TARGET_FPE_FLTUND;
938 break;
939 case POWERPC_EXCP_FP_ZX:
940 case POWERPC_EXCP_FP_VXZDZ:
941 info.si_code = TARGET_FPE_FLTDIV;
942 break;
943 case POWERPC_EXCP_FP_XX:
944 info.si_code = TARGET_FPE_FLTRES;
945 break;
946 case POWERPC_EXCP_FP_VXSOFT:
947 info.si_code = TARGET_FPE_FLTINV;
948 break;
949 case POWERPC_EXCP_FP_VXSNAN:
950 case POWERPC_EXCP_FP_VXISI:
951 case POWERPC_EXCP_FP_VXIDI:
952 case POWERPC_EXCP_FP_VXIMZ:
953 case POWERPC_EXCP_FP_VXVC:
954 case POWERPC_EXCP_FP_VXSQRT:
955 case POWERPC_EXCP_FP_VXCVI:
956 info.si_code = TARGET_FPE_FLTSUB;
957 break;
958 default:
959 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
960 env->error_code);
961 break;
962 }
963 break;
964 case POWERPC_EXCP_INVAL:
965 EXCP_DUMP(env, "Invalid instruction\n");
966 info.si_signo = TARGET_SIGILL;
967 info.si_errno = 0;
968 switch (env->error_code & 0xF) {
969 case POWERPC_EXCP_INVAL_INVAL:
970 info.si_code = TARGET_ILL_ILLOPC;
971 break;
972 case POWERPC_EXCP_INVAL_LSWX:
973 info.si_code = TARGET_ILL_ILLOPN;
974 break;
975 case POWERPC_EXCP_INVAL_SPR:
976 info.si_code = TARGET_ILL_PRVREG;
977 break;
978 case POWERPC_EXCP_INVAL_FP:
979 info.si_code = TARGET_ILL_COPROC;
980 break;
981 default:
982 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
983 env->error_code & 0xF);
984 info.si_code = TARGET_ILL_ILLADR;
985 break;
986 }
987 break;
988 case POWERPC_EXCP_PRIV:
989 EXCP_DUMP(env, "Privilege violation\n");
990 info.si_signo = TARGET_SIGILL;
991 info.si_errno = 0;
992 switch (env->error_code & 0xF) {
993 case POWERPC_EXCP_PRIV_OPC:
994 info.si_code = TARGET_ILL_PRVOPC;
995 break;
996 case POWERPC_EXCP_PRIV_REG:
997 info.si_code = TARGET_ILL_PRVREG;
998 break;
999 default:
1000 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1001 env->error_code & 0xF);
1002 info.si_code = TARGET_ILL_PRVOPC;
1003 break;
1004 }
1005 break;
1006 case POWERPC_EXCP_TRAP:
1007 cpu_abort(env, "Tried to call a TRAP\n");
1008 break;
1009 default:
1010 /* Should not happen ! */
1011 cpu_abort(env, "Unknown program exception (%02x)\n",
1012 env->error_code);
1013 break;
1014 }
1015 info._sifields._sigfault._addr = env->nip - 4;
1016 queue_signal(info.si_signo, &info);
1017 break;
1018 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1019 EXCP_DUMP(env, "No floating point allowed\n");
1020 info.si_signo = TARGET_SIGILL;
1021 info.si_errno = 0;
1022 info.si_code = TARGET_ILL_COPROC;
1023 info._sifields._sigfault._addr = env->nip - 4;
1024 queue_signal(info.si_signo, &info);
1025 break;
1026 case POWERPC_EXCP_SYSCALL: /* System call exception */
1027 cpu_abort(env, "Syscall exception while in user mode. "
1028 "Aborting\n");
1029 break;
1030 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1031 EXCP_DUMP(env, "No APU instruction allowed\n");
1032 info.si_signo = TARGET_SIGILL;
1033 info.si_errno = 0;
1034 info.si_code = TARGET_ILL_COPROC;
1035 info._sifields._sigfault._addr = env->nip - 4;
1036 queue_signal(info.si_signo, &info);
1037 break;
1038 case POWERPC_EXCP_DECR: /* Decrementer exception */
1039 cpu_abort(env, "Decrementer interrupt while in user mode. "
1040 "Aborting\n");
1041 break;
1042 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1043 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1044 "Aborting\n");
1045 break;
1046 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1047 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1048 "Aborting\n");
1049 break;
1050 case POWERPC_EXCP_DTLB: /* Data TLB error */
1051 cpu_abort(env, "Data TLB exception while in user mode. "
1052 "Aborting\n");
1053 break;
1054 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1055 cpu_abort(env, "Instruction TLB exception while in user mode. "
1056 "Aborting\n");
1057 break;
1058 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
1059 /* XXX: check this */
1060 {
1061 int sig;
1062
1063 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1064 if (sig) {
1065 info.si_signo = sig;
1066 info.si_errno = 0;
1067 info.si_code = TARGET_TRAP_BRKPT;
1068 queue_signal(info.si_signo, &info);
1069 }
1070 }
1071 break;
1072 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1073 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1074 info.si_signo = TARGET_SIGILL;
1075 info.si_errno = 0;
1076 info.si_code = TARGET_ILL_COPROC;
1077 info._sifields._sigfault._addr = env->nip - 4;
1078 queue_signal(info.si_signo, &info);
1079 break;
1080 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1081 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1082 break;
1083 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1084 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1085 break;
1086 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1087 cpu_abort(env, "Performance monitor exception not handled\n");
1088 break;
1089 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1090 cpu_abort(env, "Doorbell interrupt while in user mode. "
1091 "Aborting\n");
1092 break;
1093 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1094 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1095 "Aborting\n");
1096 break;
1097 case POWERPC_EXCP_RESET: /* System reset exception */
1098 cpu_abort(env, "Reset interrupt while in user mode. "
1099 "Aborting\n");
1100 break;
1101 case POWERPC_EXCP_DSEG: /* Data segment exception */
1102 cpu_abort(env, "Data segment exception while in user mode. "
1103 "Aborting\n");
1104 break;
1105 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1106 cpu_abort(env, "Instruction segment exception "
1107 "while in user mode. Aborting\n");
1108 break;
1109 /* PowerPC 64 with hypervisor mode support */
1110 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1111 cpu_abort(env, "Hypervisor decrementer interrupt "
1112 "while in user mode. Aborting\n");
1113 break;
1114 case POWERPC_EXCP_TRACE: /* Trace exception */
1115 /* Nothing to do:
1116 * we use this exception to emulate step-by-step execution mode.
1117 */
1118 break;
1119 /* PowerPC 64 with hypervisor mode support */
1120 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1121 cpu_abort(env, "Hypervisor data storage exception "
1122 "while in user mode. Aborting\n");
1123 break;
1124 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1125 cpu_abort(env, "Hypervisor instruction storage exception "
1126 "while in user mode. Aborting\n");
1127 break;
1128 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1129 cpu_abort(env, "Hypervisor data segment exception "
1130 "while in user mode. Aborting\n");
1131 break;
1132 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1133 cpu_abort(env, "Hypervisor instruction segment exception "
1134 "while in user mode. Aborting\n");
1135 break;
1136 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1137 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1138 info.si_signo = TARGET_SIGILL;
1139 info.si_errno = 0;
1140 info.si_code = TARGET_ILL_COPROC;
1141 info._sifields._sigfault._addr = env->nip - 4;
1142 queue_signal(info.si_signo, &info);
1143 break;
1144 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1145 cpu_abort(env, "Programable interval timer interrupt "
1146 "while in user mode. Aborting\n");
1147 break;
1148 case POWERPC_EXCP_IO: /* IO error exception */
1149 cpu_abort(env, "IO error exception while in user mode. "
1150 "Aborting\n");
1151 break;
1152 case POWERPC_EXCP_RUNM: /* Run mode exception */
1153 cpu_abort(env, "Run mode exception while in user mode. "
1154 "Aborting\n");
1155 break;
1156 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1157 cpu_abort(env, "Emulation trap exception not handled\n");
1158 break;
1159 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1160 cpu_abort(env, "Instruction fetch TLB exception "
1161 "while in user-mode. Aborting");
1162 break;
1163 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1164 cpu_abort(env, "Data load TLB exception while in user-mode. "
1165 "Aborting");
1166 break;
1167 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1168 cpu_abort(env, "Data store TLB exception while in user-mode. "
1169 "Aborting");
1170 break;
1171 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1172 cpu_abort(env, "Floating-point assist exception not handled\n");
1173 break;
1174 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1175 cpu_abort(env, "Instruction address breakpoint exception "
1176 "not handled\n");
1177 break;
1178 case POWERPC_EXCP_SMI: /* System management interrupt */
1179 cpu_abort(env, "System management interrupt while in user mode. "
1180 "Aborting\n");
1181 break;
1182 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1183 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1184 "Aborting\n");
1185 break;
1186 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1187 cpu_abort(env, "Performance monitor exception not handled\n");
1188 break;
1189 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1190 cpu_abort(env, "Vector assist exception not handled\n");
1191 break;
1192 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1193 cpu_abort(env, "Soft patch exception not handled\n");
1194 break;
1195 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1196 cpu_abort(env, "Maintenance exception while in user mode. "
1197 "Aborting\n");
1198 break;
1199 case POWERPC_EXCP_STOP: /* stop translation */
1200 /* We did invalidate the instruction cache. Go on */
1201 break;
1202 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1203 /* We just stopped because of a branch. Go on */
1204 break;
1205 case POWERPC_EXCP_SYSCALL_USER:
1206 /* system call in user-mode emulation */
1207 /* WARNING:
1208 * PPC ABI uses overflow flag in cr0 to signal an error
1209 * in syscalls.
1210 */
1211 #if 0
1212 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1213 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1214 #endif
1215 env->crf[0] &= ~0x1;
1216 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1217 env->gpr[5], env->gpr[6], env->gpr[7],
1218 env->gpr[8]);
1219 if (ret > (uint32_t)(-515)) {
1220 env->crf[0] |= 0x1;
1221 ret = -ret;
1222 }
1223 env->gpr[3] = ret;
1224 #if 0
1225 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1226 #endif
1227 break;
1228 case EXCP_INTERRUPT:
1229 /* just indicate that signals should be handled asap */
1230 break;
1231 default:
1232 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1233 break;
1234 }
1235 process_pending_signals(env);
1236 }
1237 }
1238 #endif
1239
1240 #ifdef TARGET_MIPS
1241
1242 #define MIPS_SYS(name, args) args,
1243
1244 static const uint8_t mips_syscall_args[] = {
1245 MIPS_SYS(sys_syscall , 0) /* 4000 */
1246 MIPS_SYS(sys_exit , 1)
1247 MIPS_SYS(sys_fork , 0)
1248 MIPS_SYS(sys_read , 3)
1249 MIPS_SYS(sys_write , 3)
1250 MIPS_SYS(sys_open , 3) /* 4005 */
1251 MIPS_SYS(sys_close , 1)
1252 MIPS_SYS(sys_waitpid , 3)
1253 MIPS_SYS(sys_creat , 2)
1254 MIPS_SYS(sys_link , 2)
1255 MIPS_SYS(sys_unlink , 1) /* 4010 */
1256 MIPS_SYS(sys_execve , 0)
1257 MIPS_SYS(sys_chdir , 1)
1258 MIPS_SYS(sys_time , 1)
1259 MIPS_SYS(sys_mknod , 3)
1260 MIPS_SYS(sys_chmod , 2) /* 4015 */
1261 MIPS_SYS(sys_lchown , 3)
1262 MIPS_SYS(sys_ni_syscall , 0)
1263 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1264 MIPS_SYS(sys_lseek , 3)
1265 MIPS_SYS(sys_getpid , 0) /* 4020 */
1266 MIPS_SYS(sys_mount , 5)
1267 MIPS_SYS(sys_oldumount , 1)
1268 MIPS_SYS(sys_setuid , 1)
1269 MIPS_SYS(sys_getuid , 0)
1270 MIPS_SYS(sys_stime , 1) /* 4025 */
1271 MIPS_SYS(sys_ptrace , 4)
1272 MIPS_SYS(sys_alarm , 1)
1273 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1274 MIPS_SYS(sys_pause , 0)
1275 MIPS_SYS(sys_utime , 2) /* 4030 */
1276 MIPS_SYS(sys_ni_syscall , 0)
1277 MIPS_SYS(sys_ni_syscall , 0)
1278 MIPS_SYS(sys_access , 2)
1279 MIPS_SYS(sys_nice , 1)
1280 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1281 MIPS_SYS(sys_sync , 0)
1282 MIPS_SYS(sys_kill , 2)
1283 MIPS_SYS(sys_rename , 2)
1284 MIPS_SYS(sys_mkdir , 2)
1285 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1286 MIPS_SYS(sys_dup , 1)
1287 MIPS_SYS(sys_pipe , 0)
1288 MIPS_SYS(sys_times , 1)
1289 MIPS_SYS(sys_ni_syscall , 0)
1290 MIPS_SYS(sys_brk , 1) /* 4045 */
1291 MIPS_SYS(sys_setgid , 1)
1292 MIPS_SYS(sys_getgid , 0)
1293 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1294 MIPS_SYS(sys_geteuid , 0)
1295 MIPS_SYS(sys_getegid , 0) /* 4050 */
1296 MIPS_SYS(sys_acct , 0)
1297 MIPS_SYS(sys_umount , 2)
1298 MIPS_SYS(sys_ni_syscall , 0)
1299 MIPS_SYS(sys_ioctl , 3)
1300 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1301 MIPS_SYS(sys_ni_syscall , 2)
1302 MIPS_SYS(sys_setpgid , 2)
1303 MIPS_SYS(sys_ni_syscall , 0)
1304 MIPS_SYS(sys_olduname , 1)
1305 MIPS_SYS(sys_umask , 1) /* 4060 */
1306 MIPS_SYS(sys_chroot , 1)
1307 MIPS_SYS(sys_ustat , 2)
1308 MIPS_SYS(sys_dup2 , 2)
1309 MIPS_SYS(sys_getppid , 0)
1310 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1311 MIPS_SYS(sys_setsid , 0)
1312 MIPS_SYS(sys_sigaction , 3)
1313 MIPS_SYS(sys_sgetmask , 0)
1314 MIPS_SYS(sys_ssetmask , 1)
1315 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1316 MIPS_SYS(sys_setregid , 2)
1317 MIPS_SYS(sys_sigsuspend , 0)
1318 MIPS_SYS(sys_sigpending , 1)
1319 MIPS_SYS(sys_sethostname , 2)
1320 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1321 MIPS_SYS(sys_getrlimit , 2)
1322 MIPS_SYS(sys_getrusage , 2)
1323 MIPS_SYS(sys_gettimeofday, 2)
1324 MIPS_SYS(sys_settimeofday, 2)
1325 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1326 MIPS_SYS(sys_setgroups , 2)
1327 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1328 MIPS_SYS(sys_symlink , 2)
1329 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1330 MIPS_SYS(sys_readlink , 3) /* 4085 */
1331 MIPS_SYS(sys_uselib , 1)
1332 MIPS_SYS(sys_swapon , 2)
1333 MIPS_SYS(sys_reboot , 3)
1334 MIPS_SYS(old_readdir , 3)
1335 MIPS_SYS(old_mmap , 6) /* 4090 */
1336 MIPS_SYS(sys_munmap , 2)
1337 MIPS_SYS(sys_truncate , 2)
1338 MIPS_SYS(sys_ftruncate , 2)
1339 MIPS_SYS(sys_fchmod , 2)
1340 MIPS_SYS(sys_fchown , 3) /* 4095 */
1341 MIPS_SYS(sys_getpriority , 2)
1342 MIPS_SYS(sys_setpriority , 3)
1343 MIPS_SYS(sys_ni_syscall , 0)
1344 MIPS_SYS(sys_statfs , 2)
1345 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1346 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1347 MIPS_SYS(sys_socketcall , 2)
1348 MIPS_SYS(sys_syslog , 3)
1349 MIPS_SYS(sys_setitimer , 3)
1350 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1351 MIPS_SYS(sys_newstat , 2)
1352 MIPS_SYS(sys_newlstat , 2)
1353 MIPS_SYS(sys_newfstat , 2)
1354 MIPS_SYS(sys_uname , 1)
1355 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1356 MIPS_SYS(sys_vhangup , 0)
1357 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1358 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1359 MIPS_SYS(sys_wait4 , 4)
1360 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1361 MIPS_SYS(sys_sysinfo , 1)
1362 MIPS_SYS(sys_ipc , 6)
1363 MIPS_SYS(sys_fsync , 1)
1364 MIPS_SYS(sys_sigreturn , 0)
1365 MIPS_SYS(sys_clone , 0) /* 4120 */
1366 MIPS_SYS(sys_setdomainname, 2)
1367 MIPS_SYS(sys_newuname , 1)
1368 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1369 MIPS_SYS(sys_adjtimex , 1)
1370 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1371 MIPS_SYS(sys_sigprocmask , 3)
1372 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1373 MIPS_SYS(sys_init_module , 5)
1374 MIPS_SYS(sys_delete_module, 1)
1375 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1376 MIPS_SYS(sys_quotactl , 0)
1377 MIPS_SYS(sys_getpgid , 1)
1378 MIPS_SYS(sys_fchdir , 1)
1379 MIPS_SYS(sys_bdflush , 2)
1380 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1381 MIPS_SYS(sys_personality , 1)
1382 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1383 MIPS_SYS(sys_setfsuid , 1)
1384 MIPS_SYS(sys_setfsgid , 1)
1385 MIPS_SYS(sys_llseek , 5) /* 4140 */
1386 MIPS_SYS(sys_getdents , 3)
1387 MIPS_SYS(sys_select , 5)
1388 MIPS_SYS(sys_flock , 2)
1389 MIPS_SYS(sys_msync , 3)
1390 MIPS_SYS(sys_readv , 3) /* 4145 */
1391 MIPS_SYS(sys_writev , 3)
1392 MIPS_SYS(sys_cacheflush , 3)
1393 MIPS_SYS(sys_cachectl , 3)
1394 MIPS_SYS(sys_sysmips , 4)
1395 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1396 MIPS_SYS(sys_getsid , 1)
1397 MIPS_SYS(sys_fdatasync , 0)
1398 MIPS_SYS(sys_sysctl , 1)
1399 MIPS_SYS(sys_mlock , 2)
1400 MIPS_SYS(sys_munlock , 2) /* 4155 */
1401 MIPS_SYS(sys_mlockall , 1)
1402 MIPS_SYS(sys_munlockall , 0)
1403 MIPS_SYS(sys_sched_setparam, 2)
1404 MIPS_SYS(sys_sched_getparam, 2)
1405 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1406 MIPS_SYS(sys_sched_getscheduler, 1)
1407 MIPS_SYS(sys_sched_yield , 0)
1408 MIPS_SYS(sys_sched_get_priority_max, 1)
1409 MIPS_SYS(sys_sched_get_priority_min, 1)
1410 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1411 MIPS_SYS(sys_nanosleep, 2)
1412 MIPS_SYS(sys_mremap , 4)
1413 MIPS_SYS(sys_accept , 3)
1414 MIPS_SYS(sys_bind , 3)
1415 MIPS_SYS(sys_connect , 3) /* 4170 */
1416 MIPS_SYS(sys_getpeername , 3)
1417 MIPS_SYS(sys_getsockname , 3)
1418 MIPS_SYS(sys_getsockopt , 5)
1419 MIPS_SYS(sys_listen , 2)
1420 MIPS_SYS(sys_recv , 4) /* 4175 */
1421 MIPS_SYS(sys_recvfrom , 6)
1422 MIPS_SYS(sys_recvmsg , 3)
1423 MIPS_SYS(sys_send , 4)
1424 MIPS_SYS(sys_sendmsg , 3)
1425 MIPS_SYS(sys_sendto , 6) /* 4180 */
1426 MIPS_SYS(sys_setsockopt , 5)
1427 MIPS_SYS(sys_shutdown , 2)
1428 MIPS_SYS(sys_socket , 3)
1429 MIPS_SYS(sys_socketpair , 4)
1430 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1431 MIPS_SYS(sys_getresuid , 3)
1432 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1433 MIPS_SYS(sys_poll , 3)
1434 MIPS_SYS(sys_nfsservctl , 3)
1435 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1436 MIPS_SYS(sys_getresgid , 3)
1437 MIPS_SYS(sys_prctl , 5)
1438 MIPS_SYS(sys_rt_sigreturn, 0)
1439 MIPS_SYS(sys_rt_sigaction, 4)
1440 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1441 MIPS_SYS(sys_rt_sigpending, 2)
1442 MIPS_SYS(sys_rt_sigtimedwait, 4)
1443 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1444 MIPS_SYS(sys_rt_sigsuspend, 0)
1445 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1446 MIPS_SYS(sys_pwrite64 , 6)
1447 MIPS_SYS(sys_chown , 3)
1448 MIPS_SYS(sys_getcwd , 2)
1449 MIPS_SYS(sys_capget , 2)
1450 MIPS_SYS(sys_capset , 2) /* 4205 */
1451 MIPS_SYS(sys_sigaltstack , 0)
1452 MIPS_SYS(sys_sendfile , 4)
1453 MIPS_SYS(sys_ni_syscall , 0)
1454 MIPS_SYS(sys_ni_syscall , 0)
1455 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1456 MIPS_SYS(sys_truncate64 , 4)
1457 MIPS_SYS(sys_ftruncate64 , 4)
1458 MIPS_SYS(sys_stat64 , 2)
1459 MIPS_SYS(sys_lstat64 , 2)
1460 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1461 MIPS_SYS(sys_pivot_root , 2)
1462 MIPS_SYS(sys_mincore , 3)
1463 MIPS_SYS(sys_madvise , 3)
1464 MIPS_SYS(sys_getdents64 , 3)
1465 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1466 MIPS_SYS(sys_ni_syscall , 0)
1467 MIPS_SYS(sys_gettid , 0)
1468 MIPS_SYS(sys_readahead , 5)
1469 MIPS_SYS(sys_setxattr , 5)
1470 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1471 MIPS_SYS(sys_fsetxattr , 5)
1472 MIPS_SYS(sys_getxattr , 4)
1473 MIPS_SYS(sys_lgetxattr , 4)
1474 MIPS_SYS(sys_fgetxattr , 4)
1475 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1476 MIPS_SYS(sys_llistxattr , 3)
1477 MIPS_SYS(sys_flistxattr , 3)
1478 MIPS_SYS(sys_removexattr , 2)
1479 MIPS_SYS(sys_lremovexattr, 2)
1480 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1481 MIPS_SYS(sys_tkill , 2)
1482 MIPS_SYS(sys_sendfile64 , 5)
1483 MIPS_SYS(sys_futex , 2)
1484 MIPS_SYS(sys_sched_setaffinity, 3)
1485 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1486 MIPS_SYS(sys_io_setup , 2)
1487 MIPS_SYS(sys_io_destroy , 1)
1488 MIPS_SYS(sys_io_getevents, 5)
1489 MIPS_SYS(sys_io_submit , 3)
1490 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1491 MIPS_SYS(sys_exit_group , 1)
1492 MIPS_SYS(sys_lookup_dcookie, 3)
1493 MIPS_SYS(sys_epoll_create, 1)
1494 MIPS_SYS(sys_epoll_ctl , 4)
1495 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1496 MIPS_SYS(sys_remap_file_pages, 5)
1497 MIPS_SYS(sys_set_tid_address, 1)
1498 MIPS_SYS(sys_restart_syscall, 0)
1499 MIPS_SYS(sys_fadvise64_64, 7)
1500 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1501 MIPS_SYS(sys_fstatfs64 , 2)
1502 MIPS_SYS(sys_timer_create, 3)
1503 MIPS_SYS(sys_timer_settime, 4)
1504 MIPS_SYS(sys_timer_gettime, 2)
1505 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1506 MIPS_SYS(sys_timer_delete, 1)
1507 MIPS_SYS(sys_clock_settime, 2)
1508 MIPS_SYS(sys_clock_gettime, 2)
1509 MIPS_SYS(sys_clock_getres, 2)
1510 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1511 MIPS_SYS(sys_tgkill , 3)
1512 MIPS_SYS(sys_utimes , 2)
1513 MIPS_SYS(sys_mbind , 4)
1514 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1515 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1516 MIPS_SYS(sys_mq_open , 4)
1517 MIPS_SYS(sys_mq_unlink , 1)
1518 MIPS_SYS(sys_mq_timedsend, 5)
1519 MIPS_SYS(sys_mq_timedreceive, 5)
1520 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1521 MIPS_SYS(sys_mq_getsetattr, 3)
1522 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1523 MIPS_SYS(sys_waitid , 4)
1524 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1525 MIPS_SYS(sys_add_key , 5)
1526 MIPS_SYS(sys_request_key, 4)
1527 MIPS_SYS(sys_keyctl , 5)
1528 MIPS_SYS(sys_set_thread_area, 1)
1529 MIPS_SYS(sys_inotify_init, 0)
1530 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1531 MIPS_SYS(sys_inotify_rm_watch, 2)
1532 MIPS_SYS(sys_migrate_pages, 4)
1533 MIPS_SYS(sys_openat, 4)
1534 MIPS_SYS(sys_mkdirat, 3)
1535 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1536 MIPS_SYS(sys_fchownat, 5)
1537 MIPS_SYS(sys_futimesat, 3)
1538 MIPS_SYS(sys_fstatat64, 4)
1539 MIPS_SYS(sys_unlinkat, 3)
1540 MIPS_SYS(sys_renameat, 4) /* 4295 */
1541 MIPS_SYS(sys_linkat, 5)
1542 MIPS_SYS(sys_symlinkat, 3)
1543 MIPS_SYS(sys_readlinkat, 4)
1544 MIPS_SYS(sys_fchmodat, 3)
1545 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1546 MIPS_SYS(sys_pselect6, 6)
1547 MIPS_SYS(sys_ppoll, 5)
1548 MIPS_SYS(sys_unshare, 1)
1549 MIPS_SYS(sys_splice, 4)
1550 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1551 MIPS_SYS(sys_tee, 4)
1552 MIPS_SYS(sys_vmsplice, 4)
1553 MIPS_SYS(sys_move_pages, 6)
1554 MIPS_SYS(sys_set_robust_list, 2)
1555 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1556 MIPS_SYS(sys_kexec_load, 4)
1557 MIPS_SYS(sys_getcpu, 3)
1558 MIPS_SYS(sys_epoll_pwait, 6)
1559 MIPS_SYS(sys_ioprio_set, 3)
1560 MIPS_SYS(sys_ioprio_get, 2)
1561 };
1562
1563 #undef MIPS_SYS
1564
1565 void cpu_loop(CPUMIPSState *env)
1566 {
1567 target_siginfo_t info;
1568 int trapnr, ret;
1569 unsigned int syscall_num;
1570
1571 for(;;) {
1572 trapnr = cpu_mips_exec(env);
1573 switch(trapnr) {
1574 case EXCP_SYSCALL:
1575 syscall_num = env->gpr[env->current_tc][2] - 4000;
1576 env->PC[env->current_tc] += 4;
1577 if (syscall_num >= sizeof(mips_syscall_args)) {
1578 ret = -ENOSYS;
1579 } else {
1580 int nb_args;
1581 abi_ulong sp_reg;
1582 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1583
1584 nb_args = mips_syscall_args[syscall_num];
1585 sp_reg = env->gpr[env->current_tc][29];
1586 switch (nb_args) {
1587 /* these arguments are taken from the stack */
1588 /* FIXME - what to do if get_user() fails? */
1589 case 8: get_user_ual(arg8, sp_reg + 28);
1590 case 7: get_user_ual(arg7, sp_reg + 24);
1591 case 6: get_user_ual(arg6, sp_reg + 20);
1592 case 5: get_user_ual(arg5, sp_reg + 16);
1593 default:
1594 break;
1595 }
1596 ret = do_syscall(env, env->gpr[env->current_tc][2],
1597 env->gpr[env->current_tc][4],
1598 env->gpr[env->current_tc][5],
1599 env->gpr[env->current_tc][6],
1600 env->gpr[env->current_tc][7],
1601 arg5, arg6/*, arg7, arg8*/);
1602 }
1603 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1604 env->gpr[env->current_tc][7] = 1; /* error flag */
1605 ret = -ret;
1606 } else {
1607 env->gpr[env->current_tc][7] = 0; /* error flag */
1608 }
1609 env->gpr[env->current_tc][2] = ret;
1610 break;
1611 case EXCP_TLBL:
1612 case EXCP_TLBS:
1613 case EXCP_CpU:
1614 case EXCP_RI:
1615 info.si_signo = TARGET_SIGILL;
1616 info.si_errno = 0;
1617 info.si_code = 0;
1618 queue_signal(info.si_signo, &info);
1619 break;
1620 case EXCP_INTERRUPT:
1621 /* just indicate that signals should be handled asap */
1622 break;
1623 case EXCP_DEBUG:
1624 {
1625 int sig;
1626
1627 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1628 if (sig)
1629 {
1630 info.si_signo = sig;
1631 info.si_errno = 0;
1632 info.si_code = TARGET_TRAP_BRKPT;
1633 queue_signal(info.si_signo, &info);
1634 }
1635 }
1636 break;
1637 default:
1638 // error:
1639 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1640 trapnr);
1641 cpu_dump_state(env, stderr, fprintf, 0);
1642 abort();
1643 }
1644 process_pending_signals(env);
1645 }
1646 }
1647 #endif
1648
1649 #ifdef TARGET_SH4
1650 void cpu_loop (CPUState *env)
1651 {
1652 int trapnr, ret;
1653 target_siginfo_t info;
1654
1655 while (1) {
1656 trapnr = cpu_sh4_exec (env);
1657
1658 switch (trapnr) {
1659 case 0x160:
1660 ret = do_syscall(env,
1661 env->gregs[3],
1662 env->gregs[4],
1663 env->gregs[5],
1664 env->gregs[6],
1665 env->gregs[7],
1666 env->gregs[0],
1667 env->gregs[1]);
1668 env->gregs[0] = ret;
1669 env->pc += 2;
1670 break;
1671 case EXCP_INTERRUPT:
1672 /* just indicate that signals should be handled asap */
1673 break;
1674 case EXCP_DEBUG:
1675 {
1676 int sig;
1677
1678 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1679 if (sig)
1680 {
1681 info.si_signo = sig;
1682 info.si_errno = 0;
1683 info.si_code = TARGET_TRAP_BRKPT;
1684 queue_signal(info.si_signo, &info);
1685 }
1686 }
1687 break;
1688 case 0xa0:
1689 case 0xc0:
1690 info.si_signo = SIGSEGV;
1691 info.si_errno = 0;
1692 info.si_code = TARGET_SEGV_MAPERR;
1693 info._sifields._sigfault._addr = env->tea;
1694 queue_signal(info.si_signo, &info);
1695 break;
1696
1697 default:
1698 printf ("Unhandled trap: 0x%x\n", trapnr);
1699 cpu_dump_state(env, stderr, fprintf, 0);
1700 exit (1);
1701 }
1702 process_pending_signals (env);
1703 }
1704 }
1705 #endif
1706
1707 #ifdef TARGET_CRIS
1708 void cpu_loop (CPUState *env)
1709 {
1710 int trapnr, ret;
1711 target_siginfo_t info;
1712
1713 while (1) {
1714 trapnr = cpu_cris_exec (env);
1715 switch (trapnr) {
1716 case 0xaa:
1717 {
1718 info.si_signo = SIGSEGV;
1719 info.si_errno = 0;
1720 /* XXX: check env->error_code */
1721 info.si_code = TARGET_SEGV_MAPERR;
1722 info._sifields._sigfault._addr = env->debug1;
1723 queue_signal(info.si_signo, &info);
1724 }
1725 break;
1726 case EXCP_INTERRUPT:
1727 /* just indicate that signals should be handled asap */
1728 break;
1729 case EXCP_BREAK:
1730 ret = do_syscall(env,
1731 env->regs[9],
1732 env->regs[10],
1733 env->regs[11],
1734 env->regs[12],
1735 env->regs[13],
1736 env->pregs[7],
1737 env->pregs[11]);
1738 env->regs[10] = ret;
1739 env->pc += 2;
1740 break;
1741 case EXCP_DEBUG:
1742 {
1743 int sig;
1744
1745 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1746 if (sig)
1747 {
1748 info.si_signo = sig;
1749 info.si_errno = 0;
1750 info.si_code = TARGET_TRAP_BRKPT;
1751 queue_signal(info.si_signo, &info);
1752 }
1753 }
1754 break;
1755 default:
1756 printf ("Unhandled trap: 0x%x\n", trapnr);
1757 cpu_dump_state(env, stderr, fprintf, 0);
1758 exit (1);
1759 }
1760 process_pending_signals (env);
1761 }
1762 }
1763 #endif
1764
1765 #ifdef TARGET_M68K
1766
1767 void cpu_loop(CPUM68KState *env)
1768 {
1769 int trapnr;
1770 unsigned int n;
1771 target_siginfo_t info;
1772 TaskState *ts = env->opaque;
1773
1774 for(;;) {
1775 trapnr = cpu_m68k_exec(env);
1776 switch(trapnr) {
1777 case EXCP_ILLEGAL:
1778 {
1779 if (ts->sim_syscalls) {
1780 uint16_t nr;
1781 nr = lduw(env->pc + 2);
1782 env->pc += 4;
1783 do_m68k_simcall(env, nr);
1784 } else {
1785 goto do_sigill;
1786 }
1787 }
1788 break;
1789 case EXCP_HALT_INSN:
1790 /* Semihosing syscall. */
1791 env->pc += 4;
1792 do_m68k_semihosting(env, env->dregs[0]);
1793 break;
1794 case EXCP_LINEA:
1795 case EXCP_LINEF:
1796 case EXCP_UNSUPPORTED:
1797 do_sigill:
1798 info.si_signo = SIGILL;
1799 info.si_errno = 0;
1800 info.si_code = TARGET_ILL_ILLOPN;
1801 info._sifields._sigfault._addr = env->pc;
1802 queue_signal(info.si_signo, &info);
1803 break;
1804 case EXCP_TRAP0:
1805 {
1806 ts->sim_syscalls = 0;
1807 n = env->dregs[0];
1808 env->pc += 2;
1809 env->dregs[0] = do_syscall(env,
1810 n,
1811 env->dregs[1],
1812 env->dregs[2],
1813 env->dregs[3],
1814 env->dregs[4],
1815 env->dregs[5],
1816 env->aregs[0]);
1817 }
1818 break;
1819 case EXCP_INTERRUPT:
1820 /* just indicate that signals should be handled asap */
1821 break;
1822 case EXCP_ACCESS:
1823 {
1824 info.si_signo = SIGSEGV;
1825 info.si_errno = 0;
1826 /* XXX: check env->error_code */
1827 info.si_code = TARGET_SEGV_MAPERR;
1828 info._sifields._sigfault._addr = env->mmu.ar;
1829 queue_signal(info.si_signo, &info);
1830 }
1831 break;
1832 case EXCP_DEBUG:
1833 {
1834 int sig;
1835
1836 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1837 if (sig)
1838 {
1839 info.si_signo = sig;
1840 info.si_errno = 0;
1841 info.si_code = TARGET_TRAP_BRKPT;
1842 queue_signal(info.si_signo, &info);
1843 }
1844 }
1845 break;
1846 default:
1847 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1848 trapnr);
1849 cpu_dump_state(env, stderr, fprintf, 0);
1850 abort();
1851 }
1852 process_pending_signals(env);
1853 }
1854 }
1855 #endif /* TARGET_M68K */
1856
1857 #ifdef TARGET_ALPHA
1858 void cpu_loop (CPUState *env)
1859 {
1860 int trapnr;
1861 target_siginfo_t info;
1862
1863 while (1) {
1864 trapnr = cpu_alpha_exec (env);
1865
1866 switch (trapnr) {
1867 case EXCP_RESET:
1868 fprintf(stderr, "Reset requested. Exit\n");
1869 exit(1);
1870 break;
1871 case EXCP_MCHK:
1872 fprintf(stderr, "Machine check exception. Exit\n");
1873 exit(1);
1874 break;
1875 case EXCP_ARITH:
1876 fprintf(stderr, "Arithmetic trap.\n");
1877 exit(1);
1878 break;
1879 case EXCP_HW_INTERRUPT:
1880 fprintf(stderr, "External interrupt. Exit\n");
1881 exit(1);
1882 break;
1883 case EXCP_DFAULT:
1884 fprintf(stderr, "MMU data fault\n");
1885 exit(1);
1886 break;
1887 case EXCP_DTB_MISS_PAL:
1888 fprintf(stderr, "MMU data TLB miss in PALcode\n");
1889 exit(1);
1890 break;
1891 case EXCP_ITB_MISS:
1892 fprintf(stderr, "MMU instruction TLB miss\n");
1893 exit(1);
1894 break;
1895 case EXCP_ITB_ACV:
1896 fprintf(stderr, "MMU instruction access violation\n");
1897 exit(1);
1898 break;
1899 case EXCP_DTB_MISS_NATIVE:
1900 fprintf(stderr, "MMU data TLB miss\n");
1901 exit(1);
1902 break;
1903 case EXCP_UNALIGN:
1904 fprintf(stderr, "Unaligned access\n");
1905 exit(1);
1906 break;
1907 case EXCP_OPCDEC:
1908 fprintf(stderr, "Invalid instruction\n");
1909 exit(1);
1910 break;
1911 case EXCP_FEN:
1912 fprintf(stderr, "Floating-point not allowed\n");
1913 exit(1);
1914 break;
1915 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
1916 fprintf(stderr, "Call to PALcode\n");
1917 call_pal(env, (trapnr >> 6) | 0x80);
1918 break;
1919 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
1920 fprintf(stderr, "Privileged call to PALcode\n");
1921 exit(1);
1922 break;
1923 case EXCP_DEBUG:
1924 {
1925 int sig;
1926
1927 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1928 if (sig)
1929 {
1930 info.si_signo = sig;
1931 info.si_errno = 0;
1932 info.si_code = TARGET_TRAP_BRKPT;
1933 queue_signal(info.si_signo, &info);
1934 }
1935 }
1936 break;
1937 default:
1938 printf ("Unhandled trap: 0x%x\n", trapnr);
1939 cpu_dump_state(env, stderr, fprintf, 0);
1940 exit (1);
1941 }
1942 process_pending_signals (env);
1943 }
1944 }
1945 #endif /* TARGET_ALPHA */
1946
1947 void usage(void)
1948 {
1949 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
1950 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
1951 "Linux CPU emulator (compiled for %s emulation)\n"
1952 "\n"
1953 "Standard options:\n"
1954 "-h print this help\n"
1955 "-g port wait gdb connection to port\n"
1956 "-L path set the elf interpreter prefix (default=%s)\n"
1957 "-s size set the stack size in bytes (default=%ld)\n"
1958 "-cpu model select CPU (-cpu ? for list)\n"
1959 "-drop-ld-preload drop LD_PRELOAD for target process\n"
1960 "\n"
1961 "Debug options:\n"
1962 "-d options activate log (logfile=%s)\n"
1963 "-p pagesize set the host page size to 'pagesize'\n"
1964 "-strace log system calls\n"
1965 "\n"
1966 "Environment variables:\n"
1967 "QEMU_STRACE Print system calls and arguments similar to the\n"
1968 " 'strace' program. Enable by setting to any value.\n"
1969 ,
1970 TARGET_ARCH,
1971 interp_prefix,
1972 x86_stack_size,
1973 DEBUG_LOGFILE);
1974 _exit(1);
1975 }
1976
1977 /* XXX: currently only used for async signals (see signal.c) */
1978 CPUState *global_env;
1979
1980 /* used to free thread contexts */
1981 TaskState *first_task_state;
1982
1983 int main(int argc, char **argv)
1984 {
1985 const char *filename;
1986 const char *cpu_model;
1987 struct target_pt_regs regs1, *regs = &regs1;
1988 struct image_info info1, *info = &info1;
1989 TaskState ts1, *ts = &ts1;
1990 CPUState *env;
1991 int optind;
1992 const char *r;
1993 int gdbstub_port = 0;
1994 int drop_ld_preload = 0, environ_count = 0;
1995 char **target_environ, **wrk, **dst;
1996
1997 if (argc <= 1)
1998 usage();
1999
2000 /* init debug */
2001 cpu_set_log_filename(DEBUG_LOGFILE);
2002
2003 cpu_model = NULL;
2004 optind = 1;
2005 for(;;) {
2006 if (optind >= argc)
2007 break;
2008 r = argv[optind];
2009 if (r[0] != '-')
2010 break;
2011 optind++;
2012 r++;
2013 if (!strcmp(r, "-")) {
2014 break;
2015 } else if (!strcmp(r, "d")) {
2016 int mask;
2017 CPULogItem *item;
2018
2019 if (optind >= argc)
2020 break;
2021
2022 r = argv[optind++];
2023 mask = cpu_str_to_log_mask(r);
2024 if (!mask) {
2025 printf("Log items (comma separated):\n");
2026 for(item = cpu_log_items; item->mask != 0; item++) {
2027 printf("%-10s %s\n", item->name, item->help);
2028 }
2029 exit(1);
2030 }
2031 cpu_set_log(mask);
2032 } else if (!strcmp(r, "s")) {
2033 r = argv[optind++];
2034 x86_stack_size = strtol(r, (char **)&r, 0);
2035 if (x86_stack_size <= 0)
2036 usage();
2037 if (*r == 'M')
2038 x86_stack_size *= 1024 * 1024;
2039 else if (*r == 'k' || *r == 'K')
2040 x86_stack_size *= 1024;
2041 } else if (!strcmp(r, "L")) {
2042 interp_prefix = argv[optind++];
2043 } else if (!strcmp(r, "p")) {
2044 qemu_host_page_size = atoi(argv[optind++]);
2045 if (qemu_host_page_size == 0 ||
2046 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2047 fprintf(stderr, "page size must be a power of two\n");
2048 exit(1);
2049 }
2050 } else if (!strcmp(r, "g")) {
2051 gdbstub_port = atoi(argv[optind++]);
2052 } else if (!strcmp(r, "r")) {
2053 qemu_uname_release = argv[optind++];
2054 } else if (!strcmp(r, "cpu")) {
2055 cpu_model = argv[optind++];
2056 if (strcmp(cpu_model, "?") == 0) {
2057 /* XXX: implement xxx_cpu_list for targets that still miss it */
2058 #if defined(cpu_list)
2059 cpu_list(stdout, &fprintf);
2060 #endif
2061 _exit(1);
2062 }
2063 } else if (!strcmp(r, "drop-ld-preload")) {
2064 drop_ld_preload = 1;
2065 } else if (!strcmp(r, "strace")) {
2066 do_strace = 1;
2067 } else
2068 {
2069 usage();
2070 }
2071 }
2072 if (optind >= argc)
2073 usage();
2074 filename = argv[optind];
2075
2076 /* Zero out regs */
2077 memset(regs, 0, sizeof(struct target_pt_regs));
2078
2079 /* Zero out image_info */
2080 memset(info, 0, sizeof(struct image_info));
2081
2082 /* Scan interp_prefix dir for replacement files. */
2083 init_paths(interp_prefix);
2084
2085 if (cpu_model == NULL) {
2086 #if defined(TARGET_I386)
2087 #ifdef TARGET_X86_64
2088 cpu_model = "qemu64";
2089 #else
2090 cpu_model = "qemu32";
2091 #endif
2092 #elif defined(TARGET_ARM)
2093 cpu_model = "arm926";
2094 #elif defined(TARGET_M68K)
2095 cpu_model = "any";
2096 #elif defined(TARGET_SPARC)
2097 #ifdef TARGET_SPARC64
2098 cpu_model = "TI UltraSparc II";
2099 #else
2100 cpu_model = "Fujitsu MB86904";
2101 #endif
2102 #elif defined(TARGET_MIPS)
2103 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2104 cpu_model = "20Kc";
2105 #else
2106 cpu_model = "24Kf";
2107 #endif
2108 #elif defined(TARGET_PPC)
2109 #ifdef TARGET_PPC64
2110 cpu_model = "970";
2111 #else
2112 cpu_model = "750";
2113 #endif
2114 #else
2115 cpu_model = "any";
2116 #endif
2117 }
2118 /* NOTE: we need to init the CPU at this stage to get
2119 qemu_host_page_size */
2120 env = cpu_init(cpu_model);
2121 if (!env) {
2122 fprintf(stderr, "Unable to find CPU definition\n");
2123 exit(1);
2124 }
2125 global_env = env;
2126
2127 if (getenv("QEMU_STRACE")) {
2128 do_strace = 1;
2129 }
2130
2131 wrk = environ;
2132 while (*(wrk++))
2133 environ_count++;
2134
2135 target_environ = malloc((environ_count + 1) * sizeof(char *));
2136 if (!target_environ)
2137 abort();
2138 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
2139 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
2140 continue;
2141 *(dst++) = strdup(*wrk);
2142 }
2143 *dst = NULL; /* NULL terminate target_environ */
2144
2145 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2146 printf("Error loading %s\n", filename);
2147 _exit(1);
2148 }
2149
2150 for (wrk = target_environ; *wrk; wrk++) {
2151 free(*wrk);
2152 }
2153
2154 free(target_environ);
2155
2156 if (loglevel) {
2157 page_dump(logfile);
2158
2159 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2160 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2161 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
2162 info->start_code);
2163 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
2164 info->start_data);
2165 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2166 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
2167 info->start_stack);
2168 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2169 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2170 }
2171
2172 target_set_brk(info->brk);
2173 syscall_init();
2174 signal_init();
2175
2176 /* build Task State */
2177 memset(ts, 0, sizeof(TaskState));
2178 env->opaque = ts;
2179 ts->used = 1;
2180 ts->info = info;
2181 env->user_mode_only = 1;
2182
2183 #if defined(TARGET_I386)
2184 cpu_x86_set_cpl(env, 3);
2185
2186 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2187 env->hflags |= HF_PE_MASK;
2188 if (env->cpuid_features & CPUID_SSE) {
2189 env->cr[4] |= CR4_OSFXSR_MASK;
2190 env->hflags |= HF_OSFXSR_MASK;
2191 }
2192 #ifndef TARGET_ABI32
2193 /* enable 64 bit mode if possible */
2194 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2195 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2196 exit(1);
2197 }
2198 env->cr[4] |= CR4_PAE_MASK;
2199 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2200 env->hflags |= HF_LMA_MASK;
2201 #endif
2202
2203 /* flags setup : we activate the IRQs by default as in user mode */
2204 env->eflags |= IF_MASK;
2205
2206 /* linux register setup */
2207 #ifndef TARGET_ABI32
2208 env->regs[R_EAX] = regs->rax;
2209 env->regs[R_EBX] = regs->rbx;
2210 env->regs[R_ECX] = regs->rcx;
2211 env->regs[R_EDX] = regs->rdx;
2212 env->regs[R_ESI] = regs->rsi;
2213 env->regs[R_EDI] = regs->rdi;
2214 env->regs[R_EBP] = regs->rbp;
2215 env->regs[R_ESP] = regs->rsp;
2216 env->eip = regs->rip;
2217 #else
2218 env->regs[R_EAX] = regs->eax;
2219 env->regs[R_EBX] = regs->ebx;
2220 env->regs[R_ECX] = regs->ecx;
2221 env->regs[R_EDX] = regs->edx;
2222 env->regs[R_ESI] = regs->esi;
2223 env->regs[R_EDI] = regs->edi;
2224 env->regs[R_EBP] = regs->ebp;
2225 env->regs[R_ESP] = regs->esp;
2226 env->eip = regs->eip;
2227 #endif
2228
2229 /* linux interrupt setup */
2230 env->idt.base = h2g(idt_table);
2231 env->idt.limit = sizeof(idt_table) - 1;
2232 set_idt(0, 0);
2233 set_idt(1, 0);
2234 set_idt(2, 0);
2235 set_idt(3, 3);
2236 set_idt(4, 3);
2237 set_idt(5, 0);
2238 set_idt(6, 0);
2239 set_idt(7, 0);
2240 set_idt(8, 0);
2241 set_idt(9, 0);
2242 set_idt(10, 0);
2243 set_idt(11, 0);
2244 set_idt(12, 0);
2245 set_idt(13, 0);
2246 set_idt(14, 0);
2247 set_idt(15, 0);
2248 set_idt(16, 0);
2249 set_idt(17, 0);
2250 set_idt(18, 0);
2251 set_idt(19, 0);
2252 set_idt(0x80, 3);
2253
2254 /* linux segment setup */
2255 {
2256 uint64_t *gdt_table;
2257 gdt_table = qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES);
2258 env->gdt.base = h2g((unsigned long)gdt_table);
2259 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2260 #ifdef TARGET_ABI32
2261 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2262 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2263 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2264 #else
2265 /* 64 bit code segment */
2266 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2267 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2268 DESC_L_MASK |
2269 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2270 #endif
2271 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2272 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2273 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2274 }
2275 cpu_x86_load_seg(env, R_CS, __USER_CS);
2276 cpu_x86_load_seg(env, R_SS, __USER_DS);
2277 #ifdef TARGET_ABI32
2278 cpu_x86_load_seg(env, R_DS, __USER_DS);
2279 cpu_x86_load_seg(env, R_ES, __USER_DS);
2280 cpu_x86_load_seg(env, R_FS, __USER_DS);
2281 cpu_x86_load_seg(env, R_GS, __USER_DS);
2282 /* This hack makes Wine work... */
2283 env->segs[R_FS].selector = 0;
2284 #else
2285 cpu_x86_load_seg(env, R_DS, 0);
2286 cpu_x86_load_seg(env, R_ES, 0);
2287 cpu_x86_load_seg(env, R_FS, 0);
2288 cpu_x86_load_seg(env, R_GS, 0);
2289 #endif
2290 #elif defined(TARGET_ARM)
2291 {
2292 int i;
2293 cpsr_write(env, regs->uregs[16], 0xffffffff);
2294 for(i = 0; i < 16; i++) {
2295 env->regs[i] = regs->uregs[i];
2296 }
2297 }
2298 #elif defined(TARGET_SPARC)
2299 {
2300 int i;
2301 env->pc = regs->pc;
2302 env->npc = regs->npc;
2303 env->y = regs->y;
2304 for(i = 0; i < 8; i++)
2305 env->gregs[i] = regs->u_regs[i];
2306 for(i = 0; i < 8; i++)
2307 env->regwptr[i] = regs->u_regs[i + 8];
2308 }
2309 #elif defined(TARGET_PPC)
2310 {
2311 int i;
2312
2313 #if defined(TARGET_PPC64)
2314 #if defined(TARGET_ABI32)
2315 env->msr &= ~((target_ulong)1 << MSR_SF);
2316 #else
2317 env->msr |= (target_ulong)1 << MSR_SF;
2318 #endif
2319 #endif
2320 env->nip = regs->nip;
2321 for(i = 0; i < 32; i++) {
2322 env->gpr[i] = regs->gpr[i];
2323 }
2324 }
2325 #elif defined(TARGET_M68K)
2326 {
2327 env->pc = regs->pc;
2328 env->dregs[0] = regs->d0;
2329 env->dregs[1] = regs->d1;
2330 env->dregs[2] = regs->d2;
2331 env->dregs[3] = regs->d3;
2332 env->dregs[4] = regs->d4;
2333 env->dregs[5] = regs->d5;
2334 env->dregs[6] = regs->d6;
2335 env->dregs[7] = regs->d7;
2336 env->aregs[0] = regs->a0;
2337 env->aregs[1] = regs->a1;
2338 env->aregs[2] = regs->a2;
2339 env->aregs[3] = regs->a3;
2340 env->aregs[4] = regs->a4;
2341 env->aregs[5] = regs->a5;
2342 env->aregs[6] = regs->a6;
2343 env->aregs[7] = regs->usp;
2344 env->sr = regs->sr;
2345 ts->sim_syscalls = 1;
2346 }
2347 #elif defined(TARGET_MIPS)
2348 {
2349 int i;
2350
2351 for(i = 0; i < 32; i++) {
2352 env->gpr[env->current_tc][i] = regs->regs[i];
2353 }
2354 env->PC[env->current_tc] = regs->cp0_epc;
2355 }
2356 #elif defined(TARGET_SH4)
2357 {
2358 int i;
2359
2360 for(i = 0; i < 16; i++) {
2361 env->gregs[i] = regs->regs[i];
2362 }
2363 env->pc = regs->pc;
2364 }
2365 #elif defined(TARGET_ALPHA)
2366 {
2367 int i;
2368
2369 for(i = 0; i < 28; i++) {
2370 env->ir[i] = ((abi_ulong *)regs)[i];
2371 }
2372 env->ipr[IPR_USP] = regs->usp;
2373 env->ir[30] = regs->usp;
2374 env->pc = regs->pc;
2375 env->unique = regs->unique;
2376 }
2377 #elif defined(TARGET_CRIS)
2378 {
2379 env->regs[0] = regs->r0;
2380 env->regs[1] = regs->r1;
2381 env->regs[2] = regs->r2;
2382 env->regs[3] = regs->r3;
2383 env->regs[4] = regs->r4;
2384 env->regs[5] = regs->r5;
2385 env->regs[6] = regs->r6;
2386 env->regs[7] = regs->r7;
2387 env->regs[8] = regs->r8;
2388 env->regs[9] = regs->r9;
2389 env->regs[10] = regs->r10;
2390 env->regs[11] = regs->r11;
2391 env->regs[12] = regs->r12;
2392 env->regs[13] = regs->r13;
2393 env->regs[14] = info->start_stack;
2394 env->regs[15] = regs->acr;
2395 env->pc = regs->erp;
2396 }
2397 #else
2398 #error unsupported target CPU
2399 #endif
2400
2401 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2402 ts->stack_base = info->start_stack;
2403 ts->heap_base = info->brk;
2404 /* This will be filled in on the first SYS_HEAPINFO call. */
2405 ts->heap_limit = 0;
2406 #endif
2407
2408 if (gdbstub_port) {
2409 gdbserver_start (gdbstub_port);
2410 gdb_handlesig(env, 0);
2411 }
2412 cpu_loop(env);
2413 /* never exits */
2414 return 0;
2415 }
Qemu copy for testing