4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
30 #include "qemu-common.h"
31 #include "qemu/cache-utils.h"
34 #include "qemu/timer.h"
35 #include "qemu/envlist.h"
45 const char *cpu_model
;
46 unsigned long mmap_min_addr
;
47 #if defined(CONFIG_USE_GUEST_BASE)
48 unsigned long guest_base
;
50 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
52 * When running 32-on-64 we should make sure we can fit all of the possible
53 * guest address space into a contiguous chunk of virtual host memory.
55 * This way we will never overlap with our own libraries or binaries or stack
56 * or anything else that QEMU maps.
59 /* MIPS only supports 31 bits of virtual address space for user space */
60 unsigned long reserved_va
= 0x77000000;
62 unsigned long reserved_va
= 0xf7000000;
65 unsigned long reserved_va
;
69 static void usage(void);
71 static const char *interp_prefix
= CONFIG_QEMU_INTERP_PREFIX
;
72 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
74 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
75 we allocate a bigger stack. Need a better solution, for example
76 by remapping the process stack directly at the right place */
77 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
79 void gemu_log(const char *fmt
, ...)
84 vfprintf(stderr
, fmt
, ap
);
88 #if defined(TARGET_I386)
89 int cpu_get_pic_interrupt(CPUX86State
*env
)
95 #if defined(CONFIG_USE_NPTL)
96 /***********************************************************/
97 /* Helper routines for implementing atomic operations. */
99 /* To implement exclusive operations we force all cpus to syncronise.
100 We don't require a full sync, only that no cpus are executing guest code.
101 The alternative is to map target atomic ops onto host equivalents,
102 which requires quite a lot of per host/target work. */
103 static pthread_mutex_t cpu_list_mutex
= PTHREAD_MUTEX_INITIALIZER
;
104 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
105 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
106 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
107 static int pending_cpus
;
109 /* Make sure everything is in a consistent state for calling fork(). */
110 void fork_start(void)
112 pthread_mutex_lock(&tcg_ctx
.tb_ctx
.tb_lock
);
113 pthread_mutex_lock(&exclusive_lock
);
117 void fork_end(int child
)
119 mmap_fork_end(child
);
121 /* Child processes created by fork() only have a single thread.
122 Discard information about the parent threads. */
123 first_cpu
= thread_cpu
;
124 first_cpu
->next_cpu
= NULL
;
126 pthread_mutex_init(&exclusive_lock
, NULL
);
127 pthread_mutex_init(&cpu_list_mutex
, NULL
);
128 pthread_cond_init(&exclusive_cond
, NULL
);
129 pthread_cond_init(&exclusive_resume
, NULL
);
130 pthread_mutex_init(&tcg_ctx
.tb_ctx
.tb_lock
, NULL
);
131 gdbserver_fork((CPUArchState
*)thread_cpu
->env_ptr
);
133 pthread_mutex_unlock(&exclusive_lock
);
134 pthread_mutex_unlock(&tcg_ctx
.tb_ctx
.tb_lock
);
138 /* Wait for pending exclusive operations to complete. The exclusive lock
140 static inline void exclusive_idle(void)
142 while (pending_cpus
) {
143 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
147 /* Start an exclusive operation.
148 Must only be called from outside cpu_arm_exec. */
149 static inline void start_exclusive(void)
153 pthread_mutex_lock(&exclusive_lock
);
157 /* Make all other cpus stop executing. */
158 for (other_cpu
= first_cpu
; other_cpu
; other_cpu
= other_cpu
->next_cpu
) {
159 if (other_cpu
->running
) {
164 if (pending_cpus
> 1) {
165 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
169 /* Finish an exclusive operation. */
170 static inline void end_exclusive(void)
173 pthread_cond_broadcast(&exclusive_resume
);
174 pthread_mutex_unlock(&exclusive_lock
);
177 /* Wait for exclusive ops to finish, and begin cpu execution. */
178 static inline void cpu_exec_start(CPUState
*cpu
)
180 pthread_mutex_lock(&exclusive_lock
);
183 pthread_mutex_unlock(&exclusive_lock
);
186 /* Mark cpu as not executing, and release pending exclusive ops. */
187 static inline void cpu_exec_end(CPUState
*cpu
)
189 pthread_mutex_lock(&exclusive_lock
);
190 cpu
->running
= false;
191 if (pending_cpus
> 1) {
193 if (pending_cpus
== 1) {
194 pthread_cond_signal(&exclusive_cond
);
198 pthread_mutex_unlock(&exclusive_lock
);
201 void cpu_list_lock(void)
203 pthread_mutex_lock(&cpu_list_mutex
);
206 void cpu_list_unlock(void)
208 pthread_mutex_unlock(&cpu_list_mutex
);
210 #else /* if !CONFIG_USE_NPTL */
211 /* These are no-ops because we are not threadsafe. */
212 static inline void cpu_exec_start(CPUState
*cpu
)
216 static inline void cpu_exec_end(CPUState
*cpu
)
220 static inline void start_exclusive(void)
224 static inline void end_exclusive(void)
228 void fork_start(void)
232 void fork_end(int child
)
235 gdbserver_fork((CPUArchState
*)thread_cpu
->env_ptr
);
239 void cpu_list_lock(void)
243 void cpu_list_unlock(void)
250 /***********************************************************/
251 /* CPUX86 core interface */
253 void cpu_smm_update(CPUX86State
*env
)
257 uint64_t cpu_get_tsc(CPUX86State
*env
)
259 return cpu_get_real_ticks();
262 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
267 e1
= (addr
<< 16) | (limit
& 0xffff);
268 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
275 static uint64_t *idt_table
;
277 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
278 uint64_t addr
, unsigned int sel
)
281 e1
= (addr
& 0xffff) | (sel
<< 16);
282 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
286 p
[2] = tswap32(addr
>> 32);
289 /* only dpl matters as we do only user space emulation */
290 static void set_idt(int n
, unsigned int dpl
)
292 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
295 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
296 uint32_t addr
, unsigned int sel
)
299 e1
= (addr
& 0xffff) | (sel
<< 16);
300 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
306 /* only dpl matters as we do only user space emulation */
307 static void set_idt(int n
, unsigned int dpl
)
309 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
313 void cpu_loop(CPUX86State
*env
)
317 target_siginfo_t info
;
320 trapnr
= cpu_x86_exec(env
);
323 /* linux syscall from int $0x80 */
324 env
->regs
[R_EAX
] = do_syscall(env
,
336 /* linux syscall from syscall instruction */
337 env
->regs
[R_EAX
] = do_syscall(env
,
346 env
->eip
= env
->exception_next_eip
;
351 info
.si_signo
= SIGBUS
;
353 info
.si_code
= TARGET_SI_KERNEL
;
354 info
._sifields
._sigfault
._addr
= 0;
355 queue_signal(env
, info
.si_signo
, &info
);
358 /* XXX: potential problem if ABI32 */
359 #ifndef TARGET_X86_64
360 if (env
->eflags
& VM_MASK
) {
361 handle_vm86_fault(env
);
365 info
.si_signo
= SIGSEGV
;
367 info
.si_code
= TARGET_SI_KERNEL
;
368 info
._sifields
._sigfault
._addr
= 0;
369 queue_signal(env
, info
.si_signo
, &info
);
373 info
.si_signo
= SIGSEGV
;
375 if (!(env
->error_code
& 1))
376 info
.si_code
= TARGET_SEGV_MAPERR
;
378 info
.si_code
= TARGET_SEGV_ACCERR
;
379 info
._sifields
._sigfault
._addr
= env
->cr
[2];
380 queue_signal(env
, info
.si_signo
, &info
);
383 #ifndef TARGET_X86_64
384 if (env
->eflags
& VM_MASK
) {
385 handle_vm86_trap(env
, trapnr
);
389 /* division by zero */
390 info
.si_signo
= SIGFPE
;
392 info
.si_code
= TARGET_FPE_INTDIV
;
393 info
._sifields
._sigfault
._addr
= env
->eip
;
394 queue_signal(env
, info
.si_signo
, &info
);
399 #ifndef TARGET_X86_64
400 if (env
->eflags
& VM_MASK
) {
401 handle_vm86_trap(env
, trapnr
);
405 info
.si_signo
= SIGTRAP
;
407 if (trapnr
== EXCP01_DB
) {
408 info
.si_code
= TARGET_TRAP_BRKPT
;
409 info
._sifields
._sigfault
._addr
= env
->eip
;
411 info
.si_code
= TARGET_SI_KERNEL
;
412 info
._sifields
._sigfault
._addr
= 0;
414 queue_signal(env
, info
.si_signo
, &info
);
419 #ifndef TARGET_X86_64
420 if (env
->eflags
& VM_MASK
) {
421 handle_vm86_trap(env
, trapnr
);
425 info
.si_signo
= SIGSEGV
;
427 info
.si_code
= TARGET_SI_KERNEL
;
428 info
._sifields
._sigfault
._addr
= 0;
429 queue_signal(env
, info
.si_signo
, &info
);
433 info
.si_signo
= SIGILL
;
435 info
.si_code
= TARGET_ILL_ILLOPN
;
436 info
._sifields
._sigfault
._addr
= env
->eip
;
437 queue_signal(env
, info
.si_signo
, &info
);
440 /* just indicate that signals should be handled asap */
446 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
451 info
.si_code
= TARGET_TRAP_BRKPT
;
452 queue_signal(env
, info
.si_signo
, &info
);
457 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
458 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
462 process_pending_signals(env
);
469 #define get_user_code_u32(x, gaddr, doswap) \
470 ({ abi_long __r = get_user_u32((x), (gaddr)); \
471 if (!__r && (doswap)) { \
477 #define get_user_code_u16(x, gaddr, doswap) \
478 ({ abi_long __r = get_user_u16((x), (gaddr)); \
479 if (!__r && (doswap)) { \
486 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
488 * r0 = pointer to oldval
489 * r1 = pointer to newval
490 * r2 = pointer to target value
493 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
494 * C set if *ptr was changed, clear if no exchange happened
496 * Note segv's in kernel helpers are a bit tricky, we can set the
497 * data address sensibly but the PC address is just the entry point.
499 static void arm_kernel_cmpxchg64_helper(CPUARMState
*env
)
501 uint64_t oldval
, newval
, val
;
503 target_siginfo_t info
;
505 /* Based on the 32 bit code in do_kernel_trap */
507 /* XXX: This only works between threads, not between processes.
508 It's probably possible to implement this with native host
509 operations. However things like ldrex/strex are much harder so
510 there's not much point trying. */
512 cpsr
= cpsr_read(env
);
515 if (get_user_u64(oldval
, env
->regs
[0])) {
516 env
->cp15
.c6_data
= env
->regs
[0];
520 if (get_user_u64(newval
, env
->regs
[1])) {
521 env
->cp15
.c6_data
= env
->regs
[1];
525 if (get_user_u64(val
, addr
)) {
526 env
->cp15
.c6_data
= addr
;
533 if (put_user_u64(val
, addr
)) {
534 env
->cp15
.c6_data
= addr
;
544 cpsr_write(env
, cpsr
, CPSR_C
);
550 /* We get the PC of the entry address - which is as good as anything,
551 on a real kernel what you get depends on which mode it uses. */
552 info
.si_signo
= SIGSEGV
;
554 /* XXX: check env->error_code */
555 info
.si_code
= TARGET_SEGV_MAPERR
;
556 info
._sifields
._sigfault
._addr
= env
->cp15
.c6_data
;
557 queue_signal(env
, info
.si_signo
, &info
);
562 /* Handle a jump to the kernel code page. */
564 do_kernel_trap(CPUARMState
*env
)
570 switch (env
->regs
[15]) {
571 case 0xffff0fa0: /* __kernel_memory_barrier */
572 /* ??? No-op. Will need to do better for SMP. */
574 case 0xffff0fc0: /* __kernel_cmpxchg */
575 /* XXX: This only works between threads, not between processes.
576 It's probably possible to implement this with native host
577 operations. However things like ldrex/strex are much harder so
578 there's not much point trying. */
580 cpsr
= cpsr_read(env
);
582 /* FIXME: This should SEGV if the access fails. */
583 if (get_user_u32(val
, addr
))
585 if (val
== env
->regs
[0]) {
587 /* FIXME: Check for segfaults. */
588 put_user_u32(val
, addr
);
595 cpsr_write(env
, cpsr
, CPSR_C
);
598 case 0xffff0fe0: /* __kernel_get_tls */
599 env
->regs
[0] = env
->cp15
.c13_tls2
;
601 case 0xffff0f60: /* __kernel_cmpxchg64 */
602 arm_kernel_cmpxchg64_helper(env
);
608 /* Jump back to the caller. */
609 addr
= env
->regs
[14];
614 env
->regs
[15] = addr
;
619 static int do_strex(CPUARMState
*env
)
627 addr
= env
->exclusive_addr
;
628 if (addr
!= env
->exclusive_test
) {
631 size
= env
->exclusive_info
& 0xf;
634 segv
= get_user_u8(val
, addr
);
637 segv
= get_user_u16(val
, addr
);
641 segv
= get_user_u32(val
, addr
);
647 env
->cp15
.c6_data
= addr
;
650 if (val
!= env
->exclusive_val
) {
654 segv
= get_user_u32(val
, addr
+ 4);
656 env
->cp15
.c6_data
= addr
+ 4;
659 if (val
!= env
->exclusive_high
) {
663 val
= env
->regs
[(env
->exclusive_info
>> 8) & 0xf];
666 segv
= put_user_u8(val
, addr
);
669 segv
= put_user_u16(val
, addr
);
673 segv
= put_user_u32(val
, addr
);
677 env
->cp15
.c6_data
= addr
;
681 val
= env
->regs
[(env
->exclusive_info
>> 12) & 0xf];
682 segv
= put_user_u32(val
, addr
+ 4);
684 env
->cp15
.c6_data
= addr
+ 4;
691 env
->regs
[(env
->exclusive_info
>> 4) & 0xf] = rc
;
697 void cpu_loop(CPUARMState
*env
)
699 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
701 unsigned int n
, insn
;
702 target_siginfo_t info
;
707 trapnr
= cpu_arm_exec(env
);
712 TaskState
*ts
= env
->opaque
;
716 /* we handle the FPU emulation here, as Linux */
717 /* we get the opcode */
718 /* FIXME - what to do if get_user() fails? */
719 get_user_code_u32(opcode
, env
->regs
[15], env
->bswap_code
);
721 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
722 if (rc
== 0) { /* illegal instruction */
723 info
.si_signo
= SIGILL
;
725 info
.si_code
= TARGET_ILL_ILLOPN
;
726 info
._sifields
._sigfault
._addr
= env
->regs
[15];
727 queue_signal(env
, info
.si_signo
, &info
);
728 } else if (rc
< 0) { /* FP exception */
731 /* translate softfloat flags to FPSR flags */
732 if (-rc
& float_flag_invalid
)
734 if (-rc
& float_flag_divbyzero
)
736 if (-rc
& float_flag_overflow
)
738 if (-rc
& float_flag_underflow
)
740 if (-rc
& float_flag_inexact
)
743 FPSR fpsr
= ts
->fpa
.fpsr
;
744 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
746 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
747 info
.si_signo
= SIGFPE
;
750 /* ordered by priority, least first */
751 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
752 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
753 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
754 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
755 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
757 info
._sifields
._sigfault
._addr
= env
->regs
[15];
758 queue_signal(env
, info
.si_signo
, &info
);
763 /* accumulate unenabled exceptions */
764 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
766 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
768 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
770 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
772 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
775 } else { /* everything OK */
786 if (trapnr
== EXCP_BKPT
) {
788 /* FIXME - what to do if get_user() fails? */
789 get_user_code_u16(insn
, env
->regs
[15], env
->bswap_code
);
793 /* FIXME - what to do if get_user() fails? */
794 get_user_code_u32(insn
, env
->regs
[15], env
->bswap_code
);
795 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
800 /* FIXME - what to do if get_user() fails? */
801 get_user_code_u16(insn
, env
->regs
[15] - 2,
805 /* FIXME - what to do if get_user() fails? */
806 get_user_code_u32(insn
, env
->regs
[15] - 4,
812 if (n
== ARM_NR_cacheflush
) {
814 } else if (n
== ARM_NR_semihosting
815 || n
== ARM_NR_thumb_semihosting
) {
816 env
->regs
[0] = do_arm_semihosting (env
);
817 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
|| env
->thumb
) {
819 if (env
->thumb
|| n
== 0) {
822 n
-= ARM_SYSCALL_BASE
;
825 if ( n
> ARM_NR_BASE
) {
827 case ARM_NR_cacheflush
:
831 cpu_set_tls(env
, env
->regs
[0]);
835 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
837 env
->regs
[0] = -TARGET_ENOSYS
;
841 env
->regs
[0] = do_syscall(env
,
857 /* just indicate that signals should be handled asap */
859 case EXCP_PREFETCH_ABORT
:
860 addr
= env
->cp15
.c6_insn
;
862 case EXCP_DATA_ABORT
:
863 addr
= env
->cp15
.c6_data
;
866 info
.si_signo
= SIGSEGV
;
868 /* XXX: check env->error_code */
869 info
.si_code
= TARGET_SEGV_MAPERR
;
870 info
._sifields
._sigfault
._addr
= addr
;
871 queue_signal(env
, info
.si_signo
, &info
);
878 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
883 info
.si_code
= TARGET_TRAP_BRKPT
;
884 queue_signal(env
, info
.si_signo
, &info
);
888 case EXCP_KERNEL_TRAP
:
889 if (do_kernel_trap(env
))
894 addr
= env
->cp15
.c6_data
;
900 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
902 cpu_dump_state(cs
, stderr
, fprintf
, 0);
905 process_pending_signals(env
);
911 #ifdef TARGET_UNICORE32
913 void cpu_loop(CPUUniCore32State
*env
)
915 CPUState
*cs
= CPU(uc32_env_get_cpu(env
));
917 unsigned int n
, insn
;
918 target_siginfo_t info
;
922 trapnr
= uc32_cpu_exec(env
);
928 get_user_u32(insn
, env
->regs
[31] - 4);
931 if (n
>= UC32_SYSCALL_BASE
) {
933 n
-= UC32_SYSCALL_BASE
;
934 if (n
== UC32_SYSCALL_NR_set_tls
) {
935 cpu_set_tls(env
, env
->regs
[0]);
938 env
->regs
[0] = do_syscall(env
,
953 case UC32_EXCP_DTRAP
:
954 case UC32_EXCP_ITRAP
:
955 info
.si_signo
= SIGSEGV
;
957 /* XXX: check env->error_code */
958 info
.si_code
= TARGET_SEGV_MAPERR
;
959 info
._sifields
._sigfault
._addr
= env
->cp0
.c4_faultaddr
;
960 queue_signal(env
, info
.si_signo
, &info
);
963 /* just indicate that signals should be handled asap */
969 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
973 info
.si_code
= TARGET_TRAP_BRKPT
;
974 queue_signal(env
, info
.si_signo
, &info
);
981 process_pending_signals(env
);
985 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
986 cpu_dump_state(cs
, stderr
, fprintf
, 0);
992 #define SPARC64_STACK_BIAS 2047
996 /* WARNING: dealing with register windows _is_ complicated. More info
997 can be found at http://www.sics.se/~psm/sparcstack.html */
998 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
1000 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
1001 /* wrap handling : if cwp is on the last window, then we use the
1002 registers 'after' the end */
1003 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
1004 index
+= 16 * env
->nwindows
;
1008 /* save the register window 'cwp1' */
1009 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
1014 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1015 #ifdef TARGET_SPARC64
1017 sp_ptr
+= SPARC64_STACK_BIAS
;
1019 #if defined(DEBUG_WIN)
1020 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
1023 for(i
= 0; i
< 16; i
++) {
1024 /* FIXME - what to do if put_user() fails? */
1025 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1026 sp_ptr
+= sizeof(abi_ulong
);
1030 static void save_window(CPUSPARCState
*env
)
1032 #ifndef TARGET_SPARC64
1033 unsigned int new_wim
;
1034 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
1035 ((1LL << env
->nwindows
) - 1);
1036 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1039 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1045 static void restore_window(CPUSPARCState
*env
)
1047 #ifndef TARGET_SPARC64
1048 unsigned int new_wim
;
1050 unsigned int i
, cwp1
;
1053 #ifndef TARGET_SPARC64
1054 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
1055 ((1LL << env
->nwindows
) - 1);
1058 /* restore the invalid window */
1059 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1060 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1061 #ifdef TARGET_SPARC64
1063 sp_ptr
+= SPARC64_STACK_BIAS
;
1065 #if defined(DEBUG_WIN)
1066 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
1069 for(i
= 0; i
< 16; i
++) {
1070 /* FIXME - what to do if get_user() fails? */
1071 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1072 sp_ptr
+= sizeof(abi_ulong
);
1074 #ifdef TARGET_SPARC64
1076 if (env
->cleanwin
< env
->nwindows
- 1)
1084 static void flush_windows(CPUSPARCState
*env
)
1090 /* if restore would invoke restore_window(), then we can stop */
1091 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
1092 #ifndef TARGET_SPARC64
1093 if (env
->wim
& (1 << cwp1
))
1096 if (env
->canrestore
== 0)
1101 save_window_offset(env
, cwp1
);
1104 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1105 #ifndef TARGET_SPARC64
1106 /* set wim so that restore will reload the registers */
1107 env
->wim
= 1 << cwp1
;
1109 #if defined(DEBUG_WIN)
1110 printf("flush_windows: nb=%d\n", offset
- 1);
1114 void cpu_loop (CPUSPARCState
*env
)
1116 CPUState
*cs
= CPU(sparc_env_get_cpu(env
));
1119 target_siginfo_t info
;
1122 trapnr
= cpu_sparc_exec (env
);
1124 /* Compute PSR before exposing state. */
1125 if (env
->cc_op
!= CC_OP_FLAGS
) {
1130 #ifndef TARGET_SPARC64
1137 ret
= do_syscall (env
, env
->gregs
[1],
1138 env
->regwptr
[0], env
->regwptr
[1],
1139 env
->regwptr
[2], env
->regwptr
[3],
1140 env
->regwptr
[4], env
->regwptr
[5],
1142 if ((abi_ulong
)ret
>= (abi_ulong
)(-515)) {
1143 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1144 env
->xcc
|= PSR_CARRY
;
1146 env
->psr
|= PSR_CARRY
;
1150 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1151 env
->xcc
&= ~PSR_CARRY
;
1153 env
->psr
&= ~PSR_CARRY
;
1156 env
->regwptr
[0] = ret
;
1157 /* next instruction */
1159 env
->npc
= env
->npc
+ 4;
1161 case 0x83: /* flush windows */
1166 /* next instruction */
1168 env
->npc
= env
->npc
+ 4;
1170 #ifndef TARGET_SPARC64
1171 case TT_WIN_OVF
: /* window overflow */
1174 case TT_WIN_UNF
: /* window underflow */
1175 restore_window(env
);
1180 info
.si_signo
= TARGET_SIGSEGV
;
1182 /* XXX: check env->error_code */
1183 info
.si_code
= TARGET_SEGV_MAPERR
;
1184 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1185 queue_signal(env
, info
.si_signo
, &info
);
1189 case TT_SPILL
: /* window overflow */
1192 case TT_FILL
: /* window underflow */
1193 restore_window(env
);
1198 info
.si_signo
= TARGET_SIGSEGV
;
1200 /* XXX: check env->error_code */
1201 info
.si_code
= TARGET_SEGV_MAPERR
;
1202 if (trapnr
== TT_DFAULT
)
1203 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
1205 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1206 queue_signal(env
, info
.si_signo
, &info
);
1209 #ifndef TARGET_ABI32
1212 sparc64_get_context(env
);
1216 sparc64_set_context(env
);
1220 case EXCP_INTERRUPT
:
1221 /* just indicate that signals should be handled asap */
1225 info
.si_signo
= TARGET_SIGILL
;
1227 info
.si_code
= TARGET_ILL_ILLOPC
;
1228 info
._sifields
._sigfault
._addr
= env
->pc
;
1229 queue_signal(env
, info
.si_signo
, &info
);
1236 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1239 info
.si_signo
= sig
;
1241 info
.si_code
= TARGET_TRAP_BRKPT
;
1242 queue_signal(env
, info
.si_signo
, &info
);
1247 printf ("Unhandled trap: 0x%x\n", trapnr
);
1248 cpu_dump_state(cs
, stderr
, fprintf
, 0);
1251 process_pending_signals (env
);
1258 static inline uint64_t cpu_ppc_get_tb(CPUPPCState
*env
)
1264 uint64_t cpu_ppc_load_tbl(CPUPPCState
*env
)
1266 return cpu_ppc_get_tb(env
);
1269 uint32_t cpu_ppc_load_tbu(CPUPPCState
*env
)
1271 return cpu_ppc_get_tb(env
) >> 32;
1274 uint64_t cpu_ppc_load_atbl(CPUPPCState
*env
)
1276 return cpu_ppc_get_tb(env
);
1279 uint32_t cpu_ppc_load_atbu(CPUPPCState
*env
)
1281 return cpu_ppc_get_tb(env
) >> 32;
1284 uint32_t cpu_ppc601_load_rtcu(CPUPPCState
*env
)
1285 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1287 uint32_t cpu_ppc601_load_rtcl(CPUPPCState
*env
)
1289 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1292 /* XXX: to be fixed */
1293 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1298 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1303 #define EXCP_DUMP(env, fmt, ...) \
1305 CPUState *cs = ENV_GET_CPU(env); \
1306 fprintf(stderr, fmt , ## __VA_ARGS__); \
1307 cpu_dump_state(cs, stderr, fprintf, 0); \
1308 qemu_log(fmt, ## __VA_ARGS__); \
1309 if (qemu_log_enabled()) { \
1310 log_cpu_state(cs, 0); \
1314 static int do_store_exclusive(CPUPPCState
*env
)
1317 target_ulong page_addr
;
1322 addr
= env
->reserve_ea
;
1323 page_addr
= addr
& TARGET_PAGE_MASK
;
1326 flags
= page_get_flags(page_addr
);
1327 if ((flags
& PAGE_READ
) == 0) {
1330 int reg
= env
->reserve_info
& 0x1f;
1331 int size
= (env
->reserve_info
>> 5) & 0xf;
1334 if (addr
== env
->reserve_addr
) {
1336 case 1: segv
= get_user_u8(val
, addr
); break;
1337 case 2: segv
= get_user_u16(val
, addr
); break;
1338 case 4: segv
= get_user_u32(val
, addr
); break;
1339 #if defined(TARGET_PPC64)
1340 case 8: segv
= get_user_u64(val
, addr
); break;
1344 if (!segv
&& val
== env
->reserve_val
) {
1345 val
= env
->gpr
[reg
];
1347 case 1: segv
= put_user_u8(val
, addr
); break;
1348 case 2: segv
= put_user_u16(val
, addr
); break;
1349 case 4: segv
= put_user_u32(val
, addr
); break;
1350 #if defined(TARGET_PPC64)
1351 case 8: segv
= put_user_u64(val
, addr
); break;
1360 env
->crf
[0] = (stored
<< 1) | xer_so
;
1361 env
->reserve_addr
= (target_ulong
)-1;
1371 void cpu_loop(CPUPPCState
*env
)
1373 CPUState
*cs
= CPU(ppc_env_get_cpu(env
));
1374 target_siginfo_t info
;
1380 trapnr
= cpu_ppc_exec(env
);
1383 case POWERPC_EXCP_NONE
:
1386 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1387 cpu_abort(env
, "Critical interrupt while in user mode. "
1390 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1391 cpu_abort(env
, "Machine check exception while in user mode. "
1394 case POWERPC_EXCP_DSI
: /* Data storage exception */
1395 EXCP_DUMP(env
, "Invalid data memory access: 0x" TARGET_FMT_lx
"\n",
1397 /* XXX: check this. Seems bugged */
1398 switch (env
->error_code
& 0xFF000000) {
1400 info
.si_signo
= TARGET_SIGSEGV
;
1402 info
.si_code
= TARGET_SEGV_MAPERR
;
1405 info
.si_signo
= TARGET_SIGILL
;
1407 info
.si_code
= TARGET_ILL_ILLADR
;
1410 info
.si_signo
= TARGET_SIGSEGV
;
1412 info
.si_code
= TARGET_SEGV_ACCERR
;
1415 /* Let's send a regular segfault... */
1416 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1418 info
.si_signo
= TARGET_SIGSEGV
;
1420 info
.si_code
= TARGET_SEGV_MAPERR
;
1423 info
._sifields
._sigfault
._addr
= env
->nip
;
1424 queue_signal(env
, info
.si_signo
, &info
);
1426 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1427 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1428 "\n", env
->spr
[SPR_SRR0
]);
1429 /* XXX: check this */
1430 switch (env
->error_code
& 0xFF000000) {
1432 info
.si_signo
= TARGET_SIGSEGV
;
1434 info
.si_code
= TARGET_SEGV_MAPERR
;
1438 info
.si_signo
= TARGET_SIGSEGV
;
1440 info
.si_code
= TARGET_SEGV_ACCERR
;
1443 /* Let's send a regular segfault... */
1444 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1446 info
.si_signo
= TARGET_SIGSEGV
;
1448 info
.si_code
= TARGET_SEGV_MAPERR
;
1451 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1452 queue_signal(env
, info
.si_signo
, &info
);
1454 case POWERPC_EXCP_EXTERNAL
: /* External input */
1455 cpu_abort(env
, "External interrupt while in user mode. "
1458 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1459 EXCP_DUMP(env
, "Unaligned memory access\n");
1460 /* XXX: check this */
1461 info
.si_signo
= TARGET_SIGBUS
;
1463 info
.si_code
= TARGET_BUS_ADRALN
;
1464 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1465 queue_signal(env
, info
.si_signo
, &info
);
1467 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1468 /* XXX: check this */
1469 switch (env
->error_code
& ~0xF) {
1470 case POWERPC_EXCP_FP
:
1471 EXCP_DUMP(env
, "Floating point program exception\n");
1472 info
.si_signo
= TARGET_SIGFPE
;
1474 switch (env
->error_code
& 0xF) {
1475 case POWERPC_EXCP_FP_OX
:
1476 info
.si_code
= TARGET_FPE_FLTOVF
;
1478 case POWERPC_EXCP_FP_UX
:
1479 info
.si_code
= TARGET_FPE_FLTUND
;
1481 case POWERPC_EXCP_FP_ZX
:
1482 case POWERPC_EXCP_FP_VXZDZ
:
1483 info
.si_code
= TARGET_FPE_FLTDIV
;
1485 case POWERPC_EXCP_FP_XX
:
1486 info
.si_code
= TARGET_FPE_FLTRES
;
1488 case POWERPC_EXCP_FP_VXSOFT
:
1489 info
.si_code
= TARGET_FPE_FLTINV
;
1491 case POWERPC_EXCP_FP_VXSNAN
:
1492 case POWERPC_EXCP_FP_VXISI
:
1493 case POWERPC_EXCP_FP_VXIDI
:
1494 case POWERPC_EXCP_FP_VXIMZ
:
1495 case POWERPC_EXCP_FP_VXVC
:
1496 case POWERPC_EXCP_FP_VXSQRT
:
1497 case POWERPC_EXCP_FP_VXCVI
:
1498 info
.si_code
= TARGET_FPE_FLTSUB
;
1501 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1506 case POWERPC_EXCP_INVAL
:
1507 EXCP_DUMP(env
, "Invalid instruction\n");
1508 info
.si_signo
= TARGET_SIGILL
;
1510 switch (env
->error_code
& 0xF) {
1511 case POWERPC_EXCP_INVAL_INVAL
:
1512 info
.si_code
= TARGET_ILL_ILLOPC
;
1514 case POWERPC_EXCP_INVAL_LSWX
:
1515 info
.si_code
= TARGET_ILL_ILLOPN
;
1517 case POWERPC_EXCP_INVAL_SPR
:
1518 info
.si_code
= TARGET_ILL_PRVREG
;
1520 case POWERPC_EXCP_INVAL_FP
:
1521 info
.si_code
= TARGET_ILL_COPROC
;
1524 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1525 env
->error_code
& 0xF);
1526 info
.si_code
= TARGET_ILL_ILLADR
;
1530 case POWERPC_EXCP_PRIV
:
1531 EXCP_DUMP(env
, "Privilege violation\n");
1532 info
.si_signo
= TARGET_SIGILL
;
1534 switch (env
->error_code
& 0xF) {
1535 case POWERPC_EXCP_PRIV_OPC
:
1536 info
.si_code
= TARGET_ILL_PRVOPC
;
1538 case POWERPC_EXCP_PRIV_REG
:
1539 info
.si_code
= TARGET_ILL_PRVREG
;
1542 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1543 env
->error_code
& 0xF);
1544 info
.si_code
= TARGET_ILL_PRVOPC
;
1548 case POWERPC_EXCP_TRAP
:
1549 cpu_abort(env
, "Tried to call a TRAP\n");
1552 /* Should not happen ! */
1553 cpu_abort(env
, "Unknown program exception (%02x)\n",
1557 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1558 queue_signal(env
, info
.si_signo
, &info
);
1560 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1561 EXCP_DUMP(env
, "No floating point allowed\n");
1562 info
.si_signo
= TARGET_SIGILL
;
1564 info
.si_code
= TARGET_ILL_COPROC
;
1565 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1566 queue_signal(env
, info
.si_signo
, &info
);
1568 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1569 cpu_abort(env
, "Syscall exception while in user mode. "
1572 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1573 EXCP_DUMP(env
, "No APU instruction allowed\n");
1574 info
.si_signo
= TARGET_SIGILL
;
1576 info
.si_code
= TARGET_ILL_COPROC
;
1577 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1578 queue_signal(env
, info
.si_signo
, &info
);
1580 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1581 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1584 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1585 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1588 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1589 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1592 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1593 cpu_abort(env
, "Data TLB exception while in user mode. "
1596 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1597 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1600 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1601 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1602 info
.si_signo
= TARGET_SIGILL
;
1604 info
.si_code
= TARGET_ILL_COPROC
;
1605 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1606 queue_signal(env
, info
.si_signo
, &info
);
1608 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1609 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1611 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1612 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1614 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1615 cpu_abort(env
, "Performance monitor exception not handled\n");
1617 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1618 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1621 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1622 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1625 case POWERPC_EXCP_RESET
: /* System reset exception */
1626 cpu_abort(env
, "Reset interrupt while in user mode. "
1629 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1630 cpu_abort(env
, "Data segment exception while in user mode. "
1633 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1634 cpu_abort(env
, "Instruction segment exception "
1635 "while in user mode. Aborting\n");
1637 /* PowerPC 64 with hypervisor mode support */
1638 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1639 cpu_abort(env
, "Hypervisor decrementer interrupt "
1640 "while in user mode. Aborting\n");
1642 case POWERPC_EXCP_TRACE
: /* Trace exception */
1644 * we use this exception to emulate step-by-step execution mode.
1647 /* PowerPC 64 with hypervisor mode support */
1648 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1649 cpu_abort(env
, "Hypervisor data storage exception "
1650 "while in user mode. Aborting\n");
1652 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1653 cpu_abort(env
, "Hypervisor instruction storage exception "
1654 "while in user mode. Aborting\n");
1656 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1657 cpu_abort(env
, "Hypervisor data segment exception "
1658 "while in user mode. Aborting\n");
1660 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1661 cpu_abort(env
, "Hypervisor instruction segment exception "
1662 "while in user mode. Aborting\n");
1664 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1665 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1666 info
.si_signo
= TARGET_SIGILL
;
1668 info
.si_code
= TARGET_ILL_COPROC
;
1669 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1670 queue_signal(env
, info
.si_signo
, &info
);
1672 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1673 cpu_abort(env
, "Programmable interval timer interrupt "
1674 "while in user mode. Aborting\n");
1676 case POWERPC_EXCP_IO
: /* IO error exception */
1677 cpu_abort(env
, "IO error exception while in user mode. "
1680 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1681 cpu_abort(env
, "Run mode exception while in user mode. "
1684 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1685 cpu_abort(env
, "Emulation trap exception not handled\n");
1687 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1688 cpu_abort(env
, "Instruction fetch TLB exception "
1689 "while in user-mode. Aborting");
1691 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1692 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1695 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1696 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1699 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1700 cpu_abort(env
, "Floating-point assist exception not handled\n");
1702 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1703 cpu_abort(env
, "Instruction address breakpoint exception "
1706 case POWERPC_EXCP_SMI
: /* System management interrupt */
1707 cpu_abort(env
, "System management interrupt while in user mode. "
1710 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1711 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1714 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1715 cpu_abort(env
, "Performance monitor exception not handled\n");
1717 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1718 cpu_abort(env
, "Vector assist exception not handled\n");
1720 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1721 cpu_abort(env
, "Soft patch exception not handled\n");
1723 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1724 cpu_abort(env
, "Maintenance exception while in user mode. "
1727 case POWERPC_EXCP_STOP
: /* stop translation */
1728 /* We did invalidate the instruction cache. Go on */
1730 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1731 /* We just stopped because of a branch. Go on */
1733 case POWERPC_EXCP_SYSCALL_USER
:
1734 /* system call in user-mode emulation */
1736 * PPC ABI uses overflow flag in cr0 to signal an error
1739 env
->crf
[0] &= ~0x1;
1740 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1741 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1743 if (ret
== (target_ulong
)(-TARGET_QEMU_ESIGRETURN
)) {
1744 /* Returning from a successful sigreturn syscall.
1745 Avoid corrupting register state. */
1748 if (ret
> (target_ulong
)(-515)) {
1754 case POWERPC_EXCP_STCX
:
1755 if (do_store_exclusive(env
)) {
1756 info
.si_signo
= TARGET_SIGSEGV
;
1758 info
.si_code
= TARGET_SEGV_MAPERR
;
1759 info
._sifields
._sigfault
._addr
= env
->nip
;
1760 queue_signal(env
, info
.si_signo
, &info
);
1767 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1769 info
.si_signo
= sig
;
1771 info
.si_code
= TARGET_TRAP_BRKPT
;
1772 queue_signal(env
, info
.si_signo
, &info
);
1776 case EXCP_INTERRUPT
:
1777 /* just indicate that signals should be handled asap */
1780 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1783 process_pending_signals(env
);
1790 # ifdef TARGET_ABI_MIPSO32
1791 # define MIPS_SYS(name, args) args,
1792 static const uint8_t mips_syscall_args
[] = {
1793 MIPS_SYS(sys_syscall
, 8) /* 4000 */
1794 MIPS_SYS(sys_exit
, 1)
1795 MIPS_SYS(sys_fork
, 0)
1796 MIPS_SYS(sys_read
, 3)
1797 MIPS_SYS(sys_write
, 3)
1798 MIPS_SYS(sys_open
, 3) /* 4005 */
1799 MIPS_SYS(sys_close
, 1)
1800 MIPS_SYS(sys_waitpid
, 3)
1801 MIPS_SYS(sys_creat
, 2)
1802 MIPS_SYS(sys_link
, 2)
1803 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1804 MIPS_SYS(sys_execve
, 0)
1805 MIPS_SYS(sys_chdir
, 1)
1806 MIPS_SYS(sys_time
, 1)
1807 MIPS_SYS(sys_mknod
, 3)
1808 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1809 MIPS_SYS(sys_lchown
, 3)
1810 MIPS_SYS(sys_ni_syscall
, 0)
1811 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1812 MIPS_SYS(sys_lseek
, 3)
1813 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1814 MIPS_SYS(sys_mount
, 5)
1815 MIPS_SYS(sys_oldumount
, 1)
1816 MIPS_SYS(sys_setuid
, 1)
1817 MIPS_SYS(sys_getuid
, 0)
1818 MIPS_SYS(sys_stime
, 1) /* 4025 */
1819 MIPS_SYS(sys_ptrace
, 4)
1820 MIPS_SYS(sys_alarm
, 1)
1821 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1822 MIPS_SYS(sys_pause
, 0)
1823 MIPS_SYS(sys_utime
, 2) /* 4030 */
1824 MIPS_SYS(sys_ni_syscall
, 0)
1825 MIPS_SYS(sys_ni_syscall
, 0)
1826 MIPS_SYS(sys_access
, 2)
1827 MIPS_SYS(sys_nice
, 1)
1828 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1829 MIPS_SYS(sys_sync
, 0)
1830 MIPS_SYS(sys_kill
, 2)
1831 MIPS_SYS(sys_rename
, 2)
1832 MIPS_SYS(sys_mkdir
, 2)
1833 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1834 MIPS_SYS(sys_dup
, 1)
1835 MIPS_SYS(sys_pipe
, 0)
1836 MIPS_SYS(sys_times
, 1)
1837 MIPS_SYS(sys_ni_syscall
, 0)
1838 MIPS_SYS(sys_brk
, 1) /* 4045 */
1839 MIPS_SYS(sys_setgid
, 1)
1840 MIPS_SYS(sys_getgid
, 0)
1841 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1842 MIPS_SYS(sys_geteuid
, 0)
1843 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1844 MIPS_SYS(sys_acct
, 0)
1845 MIPS_SYS(sys_umount
, 2)
1846 MIPS_SYS(sys_ni_syscall
, 0)
1847 MIPS_SYS(sys_ioctl
, 3)
1848 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1849 MIPS_SYS(sys_ni_syscall
, 2)
1850 MIPS_SYS(sys_setpgid
, 2)
1851 MIPS_SYS(sys_ni_syscall
, 0)
1852 MIPS_SYS(sys_olduname
, 1)
1853 MIPS_SYS(sys_umask
, 1) /* 4060 */
1854 MIPS_SYS(sys_chroot
, 1)
1855 MIPS_SYS(sys_ustat
, 2)
1856 MIPS_SYS(sys_dup2
, 2)
1857 MIPS_SYS(sys_getppid
, 0)
1858 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1859 MIPS_SYS(sys_setsid
, 0)
1860 MIPS_SYS(sys_sigaction
, 3)
1861 MIPS_SYS(sys_sgetmask
, 0)
1862 MIPS_SYS(sys_ssetmask
, 1)
1863 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1864 MIPS_SYS(sys_setregid
, 2)
1865 MIPS_SYS(sys_sigsuspend
, 0)
1866 MIPS_SYS(sys_sigpending
, 1)
1867 MIPS_SYS(sys_sethostname
, 2)
1868 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1869 MIPS_SYS(sys_getrlimit
, 2)
1870 MIPS_SYS(sys_getrusage
, 2)
1871 MIPS_SYS(sys_gettimeofday
, 2)
1872 MIPS_SYS(sys_settimeofday
, 2)
1873 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1874 MIPS_SYS(sys_setgroups
, 2)
1875 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1876 MIPS_SYS(sys_symlink
, 2)
1877 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1878 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1879 MIPS_SYS(sys_uselib
, 1)
1880 MIPS_SYS(sys_swapon
, 2)
1881 MIPS_SYS(sys_reboot
, 3)
1882 MIPS_SYS(old_readdir
, 3)
1883 MIPS_SYS(old_mmap
, 6) /* 4090 */
1884 MIPS_SYS(sys_munmap
, 2)
1885 MIPS_SYS(sys_truncate
, 2)
1886 MIPS_SYS(sys_ftruncate
, 2)
1887 MIPS_SYS(sys_fchmod
, 2)
1888 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1889 MIPS_SYS(sys_getpriority
, 2)
1890 MIPS_SYS(sys_setpriority
, 3)
1891 MIPS_SYS(sys_ni_syscall
, 0)
1892 MIPS_SYS(sys_statfs
, 2)
1893 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1894 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1895 MIPS_SYS(sys_socketcall
, 2)
1896 MIPS_SYS(sys_syslog
, 3)
1897 MIPS_SYS(sys_setitimer
, 3)
1898 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1899 MIPS_SYS(sys_newstat
, 2)
1900 MIPS_SYS(sys_newlstat
, 2)
1901 MIPS_SYS(sys_newfstat
, 2)
1902 MIPS_SYS(sys_uname
, 1)
1903 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1904 MIPS_SYS(sys_vhangup
, 0)
1905 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1906 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1907 MIPS_SYS(sys_wait4
, 4)
1908 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1909 MIPS_SYS(sys_sysinfo
, 1)
1910 MIPS_SYS(sys_ipc
, 6)
1911 MIPS_SYS(sys_fsync
, 1)
1912 MIPS_SYS(sys_sigreturn
, 0)
1913 MIPS_SYS(sys_clone
, 6) /* 4120 */
1914 MIPS_SYS(sys_setdomainname
, 2)
1915 MIPS_SYS(sys_newuname
, 1)
1916 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1917 MIPS_SYS(sys_adjtimex
, 1)
1918 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1919 MIPS_SYS(sys_sigprocmask
, 3)
1920 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1921 MIPS_SYS(sys_init_module
, 5)
1922 MIPS_SYS(sys_delete_module
, 1)
1923 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1924 MIPS_SYS(sys_quotactl
, 0)
1925 MIPS_SYS(sys_getpgid
, 1)
1926 MIPS_SYS(sys_fchdir
, 1)
1927 MIPS_SYS(sys_bdflush
, 2)
1928 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1929 MIPS_SYS(sys_personality
, 1)
1930 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1931 MIPS_SYS(sys_setfsuid
, 1)
1932 MIPS_SYS(sys_setfsgid
, 1)
1933 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1934 MIPS_SYS(sys_getdents
, 3)
1935 MIPS_SYS(sys_select
, 5)
1936 MIPS_SYS(sys_flock
, 2)
1937 MIPS_SYS(sys_msync
, 3)
1938 MIPS_SYS(sys_readv
, 3) /* 4145 */
1939 MIPS_SYS(sys_writev
, 3)
1940 MIPS_SYS(sys_cacheflush
, 3)
1941 MIPS_SYS(sys_cachectl
, 3)
1942 MIPS_SYS(sys_sysmips
, 4)
1943 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1944 MIPS_SYS(sys_getsid
, 1)
1945 MIPS_SYS(sys_fdatasync
, 0)
1946 MIPS_SYS(sys_sysctl
, 1)
1947 MIPS_SYS(sys_mlock
, 2)
1948 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1949 MIPS_SYS(sys_mlockall
, 1)
1950 MIPS_SYS(sys_munlockall
, 0)
1951 MIPS_SYS(sys_sched_setparam
, 2)
1952 MIPS_SYS(sys_sched_getparam
, 2)
1953 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1954 MIPS_SYS(sys_sched_getscheduler
, 1)
1955 MIPS_SYS(sys_sched_yield
, 0)
1956 MIPS_SYS(sys_sched_get_priority_max
, 1)
1957 MIPS_SYS(sys_sched_get_priority_min
, 1)
1958 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1959 MIPS_SYS(sys_nanosleep
, 2)
1960 MIPS_SYS(sys_mremap
, 4)
1961 MIPS_SYS(sys_accept
, 3)
1962 MIPS_SYS(sys_bind
, 3)
1963 MIPS_SYS(sys_connect
, 3) /* 4170 */
1964 MIPS_SYS(sys_getpeername
, 3)
1965 MIPS_SYS(sys_getsockname
, 3)
1966 MIPS_SYS(sys_getsockopt
, 5)
1967 MIPS_SYS(sys_listen
, 2)
1968 MIPS_SYS(sys_recv
, 4) /* 4175 */
1969 MIPS_SYS(sys_recvfrom
, 6)
1970 MIPS_SYS(sys_recvmsg
, 3)
1971 MIPS_SYS(sys_send
, 4)
1972 MIPS_SYS(sys_sendmsg
, 3)
1973 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1974 MIPS_SYS(sys_setsockopt
, 5)
1975 MIPS_SYS(sys_shutdown
, 2)
1976 MIPS_SYS(sys_socket
, 3)
1977 MIPS_SYS(sys_socketpair
, 4)
1978 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1979 MIPS_SYS(sys_getresuid
, 3)
1980 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1981 MIPS_SYS(sys_poll
, 3)
1982 MIPS_SYS(sys_nfsservctl
, 3)
1983 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1984 MIPS_SYS(sys_getresgid
, 3)
1985 MIPS_SYS(sys_prctl
, 5)
1986 MIPS_SYS(sys_rt_sigreturn
, 0)
1987 MIPS_SYS(sys_rt_sigaction
, 4)
1988 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1989 MIPS_SYS(sys_rt_sigpending
, 2)
1990 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1991 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1992 MIPS_SYS(sys_rt_sigsuspend
, 0)
1993 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1994 MIPS_SYS(sys_pwrite64
, 6)
1995 MIPS_SYS(sys_chown
, 3)
1996 MIPS_SYS(sys_getcwd
, 2)
1997 MIPS_SYS(sys_capget
, 2)
1998 MIPS_SYS(sys_capset
, 2) /* 4205 */
1999 MIPS_SYS(sys_sigaltstack
, 2)
2000 MIPS_SYS(sys_sendfile
, 4)
2001 MIPS_SYS(sys_ni_syscall
, 0)
2002 MIPS_SYS(sys_ni_syscall
, 0)
2003 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
2004 MIPS_SYS(sys_truncate64
, 4)
2005 MIPS_SYS(sys_ftruncate64
, 4)
2006 MIPS_SYS(sys_stat64
, 2)
2007 MIPS_SYS(sys_lstat64
, 2)
2008 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
2009 MIPS_SYS(sys_pivot_root
, 2)
2010 MIPS_SYS(sys_mincore
, 3)
2011 MIPS_SYS(sys_madvise
, 3)
2012 MIPS_SYS(sys_getdents64
, 3)
2013 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
2014 MIPS_SYS(sys_ni_syscall
, 0)
2015 MIPS_SYS(sys_gettid
, 0)
2016 MIPS_SYS(sys_readahead
, 5)
2017 MIPS_SYS(sys_setxattr
, 5)
2018 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
2019 MIPS_SYS(sys_fsetxattr
, 5)
2020 MIPS_SYS(sys_getxattr
, 4)
2021 MIPS_SYS(sys_lgetxattr
, 4)
2022 MIPS_SYS(sys_fgetxattr
, 4)
2023 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
2024 MIPS_SYS(sys_llistxattr
, 3)
2025 MIPS_SYS(sys_flistxattr
, 3)
2026 MIPS_SYS(sys_removexattr
, 2)
2027 MIPS_SYS(sys_lremovexattr
, 2)
2028 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
2029 MIPS_SYS(sys_tkill
, 2)
2030 MIPS_SYS(sys_sendfile64
, 5)
2031 MIPS_SYS(sys_futex
, 2)
2032 MIPS_SYS(sys_sched_setaffinity
, 3)
2033 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
2034 MIPS_SYS(sys_io_setup
, 2)
2035 MIPS_SYS(sys_io_destroy
, 1)
2036 MIPS_SYS(sys_io_getevents
, 5)
2037 MIPS_SYS(sys_io_submit
, 3)
2038 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
2039 MIPS_SYS(sys_exit_group
, 1)
2040 MIPS_SYS(sys_lookup_dcookie
, 3)
2041 MIPS_SYS(sys_epoll_create
, 1)
2042 MIPS_SYS(sys_epoll_ctl
, 4)
2043 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
2044 MIPS_SYS(sys_remap_file_pages
, 5)
2045 MIPS_SYS(sys_set_tid_address
, 1)
2046 MIPS_SYS(sys_restart_syscall
, 0)
2047 MIPS_SYS(sys_fadvise64_64
, 7)
2048 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
2049 MIPS_SYS(sys_fstatfs64
, 2)
2050 MIPS_SYS(sys_timer_create
, 3)
2051 MIPS_SYS(sys_timer_settime
, 4)
2052 MIPS_SYS(sys_timer_gettime
, 2)
2053 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
2054 MIPS_SYS(sys_timer_delete
, 1)
2055 MIPS_SYS(sys_clock_settime
, 2)
2056 MIPS_SYS(sys_clock_gettime
, 2)
2057 MIPS_SYS(sys_clock_getres
, 2)
2058 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
2059 MIPS_SYS(sys_tgkill
, 3)
2060 MIPS_SYS(sys_utimes
, 2)
2061 MIPS_SYS(sys_mbind
, 4)
2062 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
2063 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
2064 MIPS_SYS(sys_mq_open
, 4)
2065 MIPS_SYS(sys_mq_unlink
, 1)
2066 MIPS_SYS(sys_mq_timedsend
, 5)
2067 MIPS_SYS(sys_mq_timedreceive
, 5)
2068 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
2069 MIPS_SYS(sys_mq_getsetattr
, 3)
2070 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
2071 MIPS_SYS(sys_waitid
, 4)
2072 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
2073 MIPS_SYS(sys_add_key
, 5)
2074 MIPS_SYS(sys_request_key
, 4)
2075 MIPS_SYS(sys_keyctl
, 5)
2076 MIPS_SYS(sys_set_thread_area
, 1)
2077 MIPS_SYS(sys_inotify_init
, 0)
2078 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
2079 MIPS_SYS(sys_inotify_rm_watch
, 2)
2080 MIPS_SYS(sys_migrate_pages
, 4)
2081 MIPS_SYS(sys_openat
, 4)
2082 MIPS_SYS(sys_mkdirat
, 3)
2083 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
2084 MIPS_SYS(sys_fchownat
, 5)
2085 MIPS_SYS(sys_futimesat
, 3)
2086 MIPS_SYS(sys_fstatat64
, 4)
2087 MIPS_SYS(sys_unlinkat
, 3)
2088 MIPS_SYS(sys_renameat
, 4) /* 4295 */
2089 MIPS_SYS(sys_linkat
, 5)
2090 MIPS_SYS(sys_symlinkat
, 3)
2091 MIPS_SYS(sys_readlinkat
, 4)
2092 MIPS_SYS(sys_fchmodat
, 3)
2093 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
2094 MIPS_SYS(sys_pselect6
, 6)
2095 MIPS_SYS(sys_ppoll
, 5)
2096 MIPS_SYS(sys_unshare
, 1)
2097 MIPS_SYS(sys_splice
, 4)
2098 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
2099 MIPS_SYS(sys_tee
, 4)
2100 MIPS_SYS(sys_vmsplice
, 4)
2101 MIPS_SYS(sys_move_pages
, 6)
2102 MIPS_SYS(sys_set_robust_list
, 2)
2103 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
2104 MIPS_SYS(sys_kexec_load
, 4)
2105 MIPS_SYS(sys_getcpu
, 3)
2106 MIPS_SYS(sys_epoll_pwait
, 6)
2107 MIPS_SYS(sys_ioprio_set
, 3)
2108 MIPS_SYS(sys_ioprio_get
, 2)
2109 MIPS_SYS(sys_utimensat
, 4)
2110 MIPS_SYS(sys_signalfd
, 3)
2111 MIPS_SYS(sys_ni_syscall
, 0) /* was timerfd */
2112 MIPS_SYS(sys_eventfd
, 1)
2113 MIPS_SYS(sys_fallocate
, 6) /* 4320 */
2114 MIPS_SYS(sys_timerfd_create
, 2)
2115 MIPS_SYS(sys_timerfd_gettime
, 2)
2116 MIPS_SYS(sys_timerfd_settime
, 4)
2117 MIPS_SYS(sys_signalfd4
, 4)
2118 MIPS_SYS(sys_eventfd2
, 2) /* 4325 */
2119 MIPS_SYS(sys_epoll_create1
, 1)
2120 MIPS_SYS(sys_dup3
, 3)
2121 MIPS_SYS(sys_pipe2
, 2)
2122 MIPS_SYS(sys_inotify_init1
, 1)
2123 MIPS_SYS(sys_preadv
, 6) /* 4330 */
2124 MIPS_SYS(sys_pwritev
, 6)
2125 MIPS_SYS(sys_rt_tgsigqueueinfo
, 4)
2126 MIPS_SYS(sys_perf_event_open
, 5)
2127 MIPS_SYS(sys_accept4
, 4)
2128 MIPS_SYS(sys_recvmmsg
, 5) /* 4335 */
2129 MIPS_SYS(sys_fanotify_init
, 2)
2130 MIPS_SYS(sys_fanotify_mark
, 6)
2131 MIPS_SYS(sys_prlimit64
, 4)
2132 MIPS_SYS(sys_name_to_handle_at
, 5)
2133 MIPS_SYS(sys_open_by_handle_at
, 3) /* 4340 */
2134 MIPS_SYS(sys_clock_adjtime
, 2)
2135 MIPS_SYS(sys_syncfs
, 1)
2140 static int do_store_exclusive(CPUMIPSState
*env
)
2143 target_ulong page_addr
;
2151 page_addr
= addr
& TARGET_PAGE_MASK
;
2154 flags
= page_get_flags(page_addr
);
2155 if ((flags
& PAGE_READ
) == 0) {
2158 reg
= env
->llreg
& 0x1f;
2159 d
= (env
->llreg
& 0x20) != 0;
2161 segv
= get_user_s64(val
, addr
);
2163 segv
= get_user_s32(val
, addr
);
2166 if (val
!= env
->llval
) {
2167 env
->active_tc
.gpr
[reg
] = 0;
2170 segv
= put_user_u64(env
->llnewval
, addr
);
2172 segv
= put_user_u32(env
->llnewval
, addr
);
2175 env
->active_tc
.gpr
[reg
] = 1;
2182 env
->active_tc
.PC
+= 4;
2195 static int do_break(CPUMIPSState
*env
, target_siginfo_t
*info
,
2203 info
->si_signo
= TARGET_SIGFPE
;
2205 info
->si_code
= (code
== BRK_OVERFLOW
) ? FPE_INTOVF
: FPE_INTDIV
;
2206 queue_signal(env
, info
->si_signo
, &*info
);
2216 void cpu_loop(CPUMIPSState
*env
)
2218 CPUState
*cs
= CPU(mips_env_get_cpu(env
));
2219 target_siginfo_t info
;
2222 # ifdef TARGET_ABI_MIPSO32
2223 unsigned int syscall_num
;
2228 trapnr
= cpu_mips_exec(env
);
2232 env
->active_tc
.PC
+= 4;
2233 # ifdef TARGET_ABI_MIPSO32
2234 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
2235 if (syscall_num
>= sizeof(mips_syscall_args
)) {
2236 ret
= -TARGET_ENOSYS
;
2240 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
2242 nb_args
= mips_syscall_args
[syscall_num
];
2243 sp_reg
= env
->active_tc
.gpr
[29];
2245 /* these arguments are taken from the stack */
2247 if ((ret
= get_user_ual(arg8
, sp_reg
+ 28)) != 0) {
2251 if ((ret
= get_user_ual(arg7
, sp_reg
+ 24)) != 0) {
2255 if ((ret
= get_user_ual(arg6
, sp_reg
+ 20)) != 0) {
2259 if ((ret
= get_user_ual(arg5
, sp_reg
+ 16)) != 0) {
2265 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2266 env
->active_tc
.gpr
[4],
2267 env
->active_tc
.gpr
[5],
2268 env
->active_tc
.gpr
[6],
2269 env
->active_tc
.gpr
[7],
2270 arg5
, arg6
, arg7
, arg8
);
2274 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2275 env
->active_tc
.gpr
[4], env
->active_tc
.gpr
[5],
2276 env
->active_tc
.gpr
[6], env
->active_tc
.gpr
[7],
2277 env
->active_tc
.gpr
[8], env
->active_tc
.gpr
[9],
2278 env
->active_tc
.gpr
[10], env
->active_tc
.gpr
[11]);
2280 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2281 /* Returning from a successful sigreturn syscall.
2282 Avoid clobbering register state. */
2285 if ((abi_ulong
)ret
>= (abi_ulong
)-1133) {
2286 env
->active_tc
.gpr
[7] = 1; /* error flag */
2289 env
->active_tc
.gpr
[7] = 0; /* error flag */
2291 env
->active_tc
.gpr
[2] = ret
;
2297 info
.si_signo
= TARGET_SIGSEGV
;
2299 /* XXX: check env->error_code */
2300 info
.si_code
= TARGET_SEGV_MAPERR
;
2301 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2302 queue_signal(env
, info
.si_signo
, &info
);
2306 info
.si_signo
= TARGET_SIGILL
;
2309 queue_signal(env
, info
.si_signo
, &info
);
2311 case EXCP_INTERRUPT
:
2312 /* just indicate that signals should be handled asap */
2318 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2321 info
.si_signo
= sig
;
2323 info
.si_code
= TARGET_TRAP_BRKPT
;
2324 queue_signal(env
, info
.si_signo
, &info
);
2329 if (do_store_exclusive(env
)) {
2330 info
.si_signo
= TARGET_SIGSEGV
;
2332 info
.si_code
= TARGET_SEGV_MAPERR
;
2333 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2334 queue_signal(env
, info
.si_signo
, &info
);
2338 info
.si_signo
= TARGET_SIGILL
;
2340 info
.si_code
= TARGET_ILL_ILLOPC
;
2341 queue_signal(env
, info
.si_signo
, &info
);
2343 /* The code below was inspired by the MIPS Linux kernel trap
2344 * handling code in arch/mips/kernel/traps.c.
2348 abi_ulong trap_instr
;
2351 ret
= get_user_ual(trap_instr
, env
->active_tc
.PC
);
2356 /* As described in the original Linux kernel code, the
2357 * below checks on 'code' are to work around an old
2360 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2361 if (code
>= (1 << 10)) {
2365 if (do_break(env
, &info
, code
) != 0) {
2372 abi_ulong trap_instr
;
2373 unsigned int code
= 0;
2375 ret
= get_user_ual(trap_instr
, env
->active_tc
.PC
);
2380 /* The immediate versions don't provide a code. */
2381 if (!(trap_instr
& 0xFC000000)) {
2382 code
= ((trap_instr
>> 6) & ((1 << 10) - 1));
2385 if (do_break(env
, &info
, code
) != 0) {
2392 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2394 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2397 process_pending_signals(env
);
2402 #ifdef TARGET_OPENRISC
2404 void cpu_loop(CPUOpenRISCState
*env
)
2406 CPUState
*cs
= CPU(openrisc_env_get_cpu(env
));
2410 trapnr
= cpu_exec(env
);
2415 qemu_log("\nReset request, exit, pc is %#x\n", env
->pc
);
2419 qemu_log("\nBus error, exit, pc is %#x\n", env
->pc
);
2424 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2425 gdbsig
= TARGET_SIGSEGV
;
2428 qemu_log("\nTick time interrupt pc is %#x\n", env
->pc
);
2431 qemu_log("\nAlignment pc is %#x\n", env
->pc
);
2435 qemu_log("\nIllegal instructionpc is %#x\n", env
->pc
);
2439 qemu_log("\nExternal interruptpc is %#x\n", env
->pc
);
2443 qemu_log("\nTLB miss\n");
2446 qemu_log("\nRange\n");
2450 env
->pc
+= 4; /* 0xc00; */
2451 env
->gpr
[11] = do_syscall(env
,
2452 env
->gpr
[11], /* return value */
2453 env
->gpr
[3], /* r3 - r7 are params */
2461 qemu_log("\nFloating point error\n");
2464 qemu_log("\nTrap\n");
2471 qemu_log("\nqemu: unhandled CPU exception %#x - aborting\n",
2473 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2474 gdbsig
= TARGET_SIGILL
;
2478 gdb_handlesig(env
, gdbsig
);
2479 if (gdbsig
!= TARGET_SIGTRAP
) {
2484 process_pending_signals(env
);
2488 #endif /* TARGET_OPENRISC */
2491 void cpu_loop(CPUSH4State
*env
)
2493 CPUState
*cs
= CPU(sh_env_get_cpu(env
));
2495 target_siginfo_t info
;
2498 trapnr
= cpu_sh4_exec (env
);
2503 ret
= do_syscall(env
,
2512 env
->gregs
[0] = ret
;
2514 case EXCP_INTERRUPT
:
2515 /* just indicate that signals should be handled asap */
2521 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2524 info
.si_signo
= sig
;
2526 info
.si_code
= TARGET_TRAP_BRKPT
;
2527 queue_signal(env
, info
.si_signo
, &info
);
2533 info
.si_signo
= SIGSEGV
;
2535 info
.si_code
= TARGET_SEGV_MAPERR
;
2536 info
._sifields
._sigfault
._addr
= env
->tea
;
2537 queue_signal(env
, info
.si_signo
, &info
);
2541 printf ("Unhandled trap: 0x%x\n", trapnr
);
2542 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2545 process_pending_signals (env
);
2551 void cpu_loop(CPUCRISState
*env
)
2553 CPUState
*cs
= CPU(cris_env_get_cpu(env
));
2555 target_siginfo_t info
;
2558 trapnr
= cpu_cris_exec (env
);
2562 info
.si_signo
= SIGSEGV
;
2564 /* XXX: check env->error_code */
2565 info
.si_code
= TARGET_SEGV_MAPERR
;
2566 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2567 queue_signal(env
, info
.si_signo
, &info
);
2570 case EXCP_INTERRUPT
:
2571 /* just indicate that signals should be handled asap */
2574 ret
= do_syscall(env
,
2583 env
->regs
[10] = ret
;
2589 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2592 info
.si_signo
= sig
;
2594 info
.si_code
= TARGET_TRAP_BRKPT
;
2595 queue_signal(env
, info
.si_signo
, &info
);
2600 printf ("Unhandled trap: 0x%x\n", trapnr
);
2601 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2604 process_pending_signals (env
);
2609 #ifdef TARGET_MICROBLAZE
2610 void cpu_loop(CPUMBState
*env
)
2612 CPUState
*cs
= CPU(mb_env_get_cpu(env
));
2614 target_siginfo_t info
;
2617 trapnr
= cpu_mb_exec (env
);
2621 info
.si_signo
= SIGSEGV
;
2623 /* XXX: check env->error_code */
2624 info
.si_code
= TARGET_SEGV_MAPERR
;
2625 info
._sifields
._sigfault
._addr
= 0;
2626 queue_signal(env
, info
.si_signo
, &info
);
2629 case EXCP_INTERRUPT
:
2630 /* just indicate that signals should be handled asap */
2633 /* Return address is 4 bytes after the call. */
2635 env
->sregs
[SR_PC
] = env
->regs
[14];
2636 ret
= do_syscall(env
,
2648 env
->regs
[17] = env
->sregs
[SR_PC
] + 4;
2649 if (env
->iflags
& D_FLAG
) {
2650 env
->sregs
[SR_ESR
] |= 1 << 12;
2651 env
->sregs
[SR_PC
] -= 4;
2652 /* FIXME: if branch was immed, replay the imm as well. */
2655 env
->iflags
&= ~(IMM_FLAG
| D_FLAG
);
2657 switch (env
->sregs
[SR_ESR
] & 31) {
2658 case ESR_EC_DIVZERO
:
2659 info
.si_signo
= SIGFPE
;
2661 info
.si_code
= TARGET_FPE_FLTDIV
;
2662 info
._sifields
._sigfault
._addr
= 0;
2663 queue_signal(env
, info
.si_signo
, &info
);
2666 info
.si_signo
= SIGFPE
;
2668 if (env
->sregs
[SR_FSR
] & FSR_IO
) {
2669 info
.si_code
= TARGET_FPE_FLTINV
;
2671 if (env
->sregs
[SR_FSR
] & FSR_DZ
) {
2672 info
.si_code
= TARGET_FPE_FLTDIV
;
2674 info
._sifields
._sigfault
._addr
= 0;
2675 queue_signal(env
, info
.si_signo
, &info
);
2678 printf ("Unhandled hw-exception: 0x%x\n",
2679 env
->sregs
[SR_ESR
] & ESR_EC_MASK
);
2680 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2689 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2692 info
.si_signo
= sig
;
2694 info
.si_code
= TARGET_TRAP_BRKPT
;
2695 queue_signal(env
, info
.si_signo
, &info
);
2700 printf ("Unhandled trap: 0x%x\n", trapnr
);
2701 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2704 process_pending_signals (env
);
2711 void cpu_loop(CPUM68KState
*env
)
2713 CPUState
*cs
= CPU(m68k_env_get_cpu(env
));
2716 target_siginfo_t info
;
2717 TaskState
*ts
= env
->opaque
;
2720 trapnr
= cpu_m68k_exec(env
);
2724 if (ts
->sim_syscalls
) {
2726 nr
= lduw(env
->pc
+ 2);
2728 do_m68k_simcall(env
, nr
);
2734 case EXCP_HALT_INSN
:
2735 /* Semihosing syscall. */
2737 do_m68k_semihosting(env
, env
->dregs
[0]);
2741 case EXCP_UNSUPPORTED
:
2743 info
.si_signo
= SIGILL
;
2745 info
.si_code
= TARGET_ILL_ILLOPN
;
2746 info
._sifields
._sigfault
._addr
= env
->pc
;
2747 queue_signal(env
, info
.si_signo
, &info
);
2751 ts
->sim_syscalls
= 0;
2754 env
->dregs
[0] = do_syscall(env
,
2765 case EXCP_INTERRUPT
:
2766 /* just indicate that signals should be handled asap */
2770 info
.si_signo
= SIGSEGV
;
2772 /* XXX: check env->error_code */
2773 info
.si_code
= TARGET_SEGV_MAPERR
;
2774 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2775 queue_signal(env
, info
.si_signo
, &info
);
2782 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2785 info
.si_signo
= sig
;
2787 info
.si_code
= TARGET_TRAP_BRKPT
;
2788 queue_signal(env
, info
.si_signo
, &info
);
2793 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2795 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2798 process_pending_signals(env
);
2801 #endif /* TARGET_M68K */
2804 static void do_store_exclusive(CPUAlphaState
*env
, int reg
, int quad
)
2806 target_ulong addr
, val
, tmp
;
2807 target_siginfo_t info
;
2810 addr
= env
->lock_addr
;
2811 tmp
= env
->lock_st_addr
;
2812 env
->lock_addr
= -1;
2813 env
->lock_st_addr
= 0;
2819 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
2823 if (val
== env
->lock_value
) {
2825 if (quad
? put_user_u64(tmp
, addr
) : put_user_u32(tmp
, addr
)) {
2842 info
.si_signo
= TARGET_SIGSEGV
;
2844 info
.si_code
= TARGET_SEGV_MAPERR
;
2845 info
._sifields
._sigfault
._addr
= addr
;
2846 queue_signal(env
, TARGET_SIGSEGV
, &info
);
2849 void cpu_loop(CPUAlphaState
*env
)
2851 CPUState
*cs
= CPU(alpha_env_get_cpu(env
));
2853 target_siginfo_t info
;
2857 trapnr
= cpu_alpha_exec (env
);
2859 /* All of the traps imply a transition through PALcode, which
2860 implies an REI instruction has been executed. Which means
2861 that the intr_flag should be cleared. */
2866 fprintf(stderr
, "Reset requested. Exit\n");
2870 fprintf(stderr
, "Machine check exception. Exit\n");
2873 case EXCP_SMP_INTERRUPT
:
2874 case EXCP_CLK_INTERRUPT
:
2875 case EXCP_DEV_INTERRUPT
:
2876 fprintf(stderr
, "External interrupt. Exit\n");
2880 env
->lock_addr
= -1;
2881 info
.si_signo
= TARGET_SIGSEGV
;
2883 info
.si_code
= (page_get_flags(env
->trap_arg0
) & PAGE_VALID
2884 ? TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
);
2885 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2886 queue_signal(env
, info
.si_signo
, &info
);
2889 env
->lock_addr
= -1;
2890 info
.si_signo
= TARGET_SIGBUS
;
2892 info
.si_code
= TARGET_BUS_ADRALN
;
2893 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2894 queue_signal(env
, info
.si_signo
, &info
);
2898 env
->lock_addr
= -1;
2899 info
.si_signo
= TARGET_SIGILL
;
2901 info
.si_code
= TARGET_ILL_ILLOPC
;
2902 info
._sifields
._sigfault
._addr
= env
->pc
;
2903 queue_signal(env
, info
.si_signo
, &info
);
2906 env
->lock_addr
= -1;
2907 info
.si_signo
= TARGET_SIGFPE
;
2909 info
.si_code
= TARGET_FPE_FLTINV
;
2910 info
._sifields
._sigfault
._addr
= env
->pc
;
2911 queue_signal(env
, info
.si_signo
, &info
);
2914 /* No-op. Linux simply re-enables the FPU. */
2917 env
->lock_addr
= -1;
2918 switch (env
->error_code
) {
2921 info
.si_signo
= TARGET_SIGTRAP
;
2923 info
.si_code
= TARGET_TRAP_BRKPT
;
2924 info
._sifields
._sigfault
._addr
= env
->pc
;
2925 queue_signal(env
, info
.si_signo
, &info
);
2929 info
.si_signo
= TARGET_SIGTRAP
;
2932 info
._sifields
._sigfault
._addr
= env
->pc
;
2933 queue_signal(env
, info
.si_signo
, &info
);
2937 trapnr
= env
->ir
[IR_V0
];
2938 sysret
= do_syscall(env
, trapnr
,
2939 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
2940 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
2941 env
->ir
[IR_A4
], env
->ir
[IR_A5
],
2943 if (trapnr
== TARGET_NR_sigreturn
2944 || trapnr
== TARGET_NR_rt_sigreturn
) {
2947 /* Syscall writes 0 to V0 to bypass error check, similar
2948 to how this is handled internal to Linux kernel.
2949 (Ab)use trapnr temporarily as boolean indicating error. */
2950 trapnr
= (env
->ir
[IR_V0
] != 0 && sysret
< 0);
2951 env
->ir
[IR_V0
] = (trapnr
? -sysret
: sysret
);
2952 env
->ir
[IR_A3
] = trapnr
;
2956 /* ??? We can probably elide the code using page_unprotect
2957 that is checking for self-modifying code. Instead we
2958 could simply call tb_flush here. Until we work out the
2959 changes required to turn off the extra write protection,
2960 this can be a no-op. */
2964 /* Handled in the translator for usermode. */
2968 /* Handled in the translator for usermode. */
2972 info
.si_signo
= TARGET_SIGFPE
;
2973 switch (env
->ir
[IR_A0
]) {
2974 case TARGET_GEN_INTOVF
:
2975 info
.si_code
= TARGET_FPE_INTOVF
;
2977 case TARGET_GEN_INTDIV
:
2978 info
.si_code
= TARGET_FPE_INTDIV
;
2980 case TARGET_GEN_FLTOVF
:
2981 info
.si_code
= TARGET_FPE_FLTOVF
;
2983 case TARGET_GEN_FLTUND
:
2984 info
.si_code
= TARGET_FPE_FLTUND
;
2986 case TARGET_GEN_FLTINV
:
2987 info
.si_code
= TARGET_FPE_FLTINV
;
2989 case TARGET_GEN_FLTINE
:
2990 info
.si_code
= TARGET_FPE_FLTRES
;
2992 case TARGET_GEN_ROPRAND
:
2996 info
.si_signo
= TARGET_SIGTRAP
;
3001 info
._sifields
._sigfault
._addr
= env
->pc
;
3002 queue_signal(env
, info
.si_signo
, &info
);
3009 info
.si_signo
= gdb_handlesig (env
, TARGET_SIGTRAP
);
3010 if (info
.si_signo
) {
3011 env
->lock_addr
= -1;
3013 info
.si_code
= TARGET_TRAP_BRKPT
;
3014 queue_signal(env
, info
.si_signo
, &info
);
3019 do_store_exclusive(env
, env
->error_code
, trapnr
- EXCP_STL_C
);
3021 case EXCP_INTERRUPT
:
3022 /* Just indicate that signals should be handled asap. */
3025 printf ("Unhandled trap: 0x%x\n", trapnr
);
3026 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3029 process_pending_signals (env
);
3032 #endif /* TARGET_ALPHA */
3035 void cpu_loop(CPUS390XState
*env
)
3037 CPUState
*cs
= CPU(s390_env_get_cpu(env
));
3039 target_siginfo_t info
;
3043 trapnr
= cpu_s390x_exec(env
);
3045 case EXCP_INTERRUPT
:
3046 /* Just indicate that signals should be handled asap. */
3050 n
= env
->int_svc_code
;
3052 /* syscalls > 255 */
3055 env
->psw
.addr
+= env
->int_svc_ilen
;
3056 env
->regs
[2] = do_syscall(env
, n
, env
->regs
[2], env
->regs
[3],
3057 env
->regs
[4], env
->regs
[5],
3058 env
->regs
[6], env
->regs
[7], 0, 0);
3062 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
3064 n
= TARGET_TRAP_BRKPT
;
3069 n
= env
->int_pgm_code
;
3072 case PGM_PRIVILEGED
:
3074 n
= TARGET_ILL_ILLOPC
;
3076 case PGM_PROTECTION
:
3077 case PGM_ADDRESSING
:
3079 /* XXX: check env->error_code */
3080 n
= TARGET_SEGV_MAPERR
;
3081 addr
= env
->__excp_addr
;
3084 case PGM_SPECIFICATION
:
3085 case PGM_SPECIAL_OP
:
3089 n
= TARGET_ILL_ILLOPN
;
3092 case PGM_FIXPT_OVERFLOW
:
3094 n
= TARGET_FPE_INTOVF
;
3096 case PGM_FIXPT_DIVIDE
:
3098 n
= TARGET_FPE_INTDIV
;
3102 n
= (env
->fpc
>> 8) & 0xff;
3104 /* compare-and-trap */
3107 /* An IEEE exception, simulated or otherwise. */
3109 n
= TARGET_FPE_FLTINV
;
3110 } else if (n
& 0x40) {
3111 n
= TARGET_FPE_FLTDIV
;
3112 } else if (n
& 0x20) {
3113 n
= TARGET_FPE_FLTOVF
;
3114 } else if (n
& 0x10) {
3115 n
= TARGET_FPE_FLTUND
;
3116 } else if (n
& 0x08) {
3117 n
= TARGET_FPE_FLTRES
;
3119 /* ??? Quantum exception; BFP, DFP error. */
3127 fprintf(stderr
, "Unhandled program exception: %#x\n", n
);
3128 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3134 addr
= env
->psw
.addr
;
3136 info
.si_signo
= sig
;
3139 info
._sifields
._sigfault
._addr
= addr
;
3140 queue_signal(env
, info
.si_signo
, &info
);
3144 fprintf(stderr
, "Unhandled trap: 0x%x\n", trapnr
);
3145 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3148 process_pending_signals (env
);
3152 #endif /* TARGET_S390X */
3154 THREAD CPUState
*thread_cpu
;
3156 void task_settid(TaskState
*ts
)
3158 if (ts
->ts_tid
== 0) {
3159 #ifdef CONFIG_USE_NPTL
3160 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
3162 /* when no threads are used, tid becomes pid */
3163 ts
->ts_tid
= getpid();
3168 void stop_all_tasks(void)
3171 * We trust that when using NPTL, start_exclusive()
3172 * handles thread stopping correctly.
3177 /* Assumes contents are already zeroed. */
3178 void init_task_state(TaskState
*ts
)
3183 ts
->first_free
= ts
->sigqueue_table
;
3184 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
3185 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
3187 ts
->sigqueue_table
[i
].next
= NULL
;
3190 static void handle_arg_help(const char *arg
)
3195 static void handle_arg_log(const char *arg
)
3199 mask
= qemu_str_to_log_mask(arg
);
3201 qemu_print_log_usage(stdout
);
3207 static void handle_arg_log_filename(const char *arg
)
3209 qemu_set_log_filename(arg
);
3212 static void handle_arg_set_env(const char *arg
)
3214 char *r
, *p
, *token
;
3215 r
= p
= strdup(arg
);
3216 while ((token
= strsep(&p
, ",")) != NULL
) {
3217 if (envlist_setenv(envlist
, token
) != 0) {
3224 static void handle_arg_unset_env(const char *arg
)
3226 char *r
, *p
, *token
;
3227 r
= p
= strdup(arg
);
3228 while ((token
= strsep(&p
, ",")) != NULL
) {
3229 if (envlist_unsetenv(envlist
, token
) != 0) {
3236 static void handle_arg_argv0(const char *arg
)
3238 argv0
= strdup(arg
);
3241 static void handle_arg_stack_size(const char *arg
)
3244 guest_stack_size
= strtoul(arg
, &p
, 0);
3245 if (guest_stack_size
== 0) {
3250 guest_stack_size
*= 1024 * 1024;
3251 } else if (*p
== 'k' || *p
== 'K') {
3252 guest_stack_size
*= 1024;
3256 static void handle_arg_ld_prefix(const char *arg
)
3258 interp_prefix
= strdup(arg
);
3261 static void handle_arg_pagesize(const char *arg
)
3263 qemu_host_page_size
= atoi(arg
);
3264 if (qemu_host_page_size
== 0 ||
3265 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
3266 fprintf(stderr
, "page size must be a power of two\n");
3271 static void handle_arg_gdb(const char *arg
)
3273 gdbstub_port
= atoi(arg
);
3276 static void handle_arg_uname(const char *arg
)
3278 qemu_uname_release
= strdup(arg
);
3281 static void handle_arg_cpu(const char *arg
)
3283 cpu_model
= strdup(arg
);
3284 if (cpu_model
== NULL
|| is_help_option(cpu_model
)) {
3285 /* XXX: implement xxx_cpu_list for targets that still miss it */
3286 #if defined(cpu_list)
3287 cpu_list(stdout
, &fprintf
);
3293 #if defined(CONFIG_USE_GUEST_BASE)
3294 static void handle_arg_guest_base(const char *arg
)
3296 guest_base
= strtol(arg
, NULL
, 0);
3297 have_guest_base
= 1;
3300 static void handle_arg_reserved_va(const char *arg
)
3304 reserved_va
= strtoul(arg
, &p
, 0);
3318 unsigned long unshifted
= reserved_va
;
3320 reserved_va
<<= shift
;
3321 if (((reserved_va
>> shift
) != unshifted
)
3322 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3323 || (reserved_va
> (1ul << TARGET_VIRT_ADDR_SPACE_BITS
))
3326 fprintf(stderr
, "Reserved virtual address too big\n");
3331 fprintf(stderr
, "Unrecognised -R size suffix '%s'\n", p
);
3337 static void handle_arg_singlestep(const char *arg
)
3342 static void handle_arg_strace(const char *arg
)
3347 static void handle_arg_version(const char *arg
)
3349 printf("qemu-" TARGET_NAME
" version " QEMU_VERSION QEMU_PKGVERSION
3350 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
3354 struct qemu_argument
{
3358 void (*handle_opt
)(const char *arg
);
3359 const char *example
;
3363 static const struct qemu_argument arg_table
[] = {
3364 {"h", "", false, handle_arg_help
,
3365 "", "print this help"},
3366 {"g", "QEMU_GDB", true, handle_arg_gdb
,
3367 "port", "wait gdb connection to 'port'"},
3368 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix
,
3369 "path", "set the elf interpreter prefix to 'path'"},
3370 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size
,
3371 "size", "set the stack size to 'size' bytes"},
3372 {"cpu", "QEMU_CPU", true, handle_arg_cpu
,
3373 "model", "select CPU (-cpu help for list)"},
3374 {"E", "QEMU_SET_ENV", true, handle_arg_set_env
,
3375 "var=value", "sets targets environment variable (see below)"},
3376 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env
,
3377 "var", "unsets targets environment variable (see below)"},
3378 {"0", "QEMU_ARGV0", true, handle_arg_argv0
,
3379 "argv0", "forces target process argv[0] to be 'argv0'"},
3380 {"r", "QEMU_UNAME", true, handle_arg_uname
,
3381 "uname", "set qemu uname release string to 'uname'"},
3382 #if defined(CONFIG_USE_GUEST_BASE)
3383 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base
,
3384 "address", "set guest_base address to 'address'"},
3385 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va
,
3386 "size", "reserve 'size' bytes for guest virtual address space"},
3388 {"d", "QEMU_LOG", true, handle_arg_log
,
3389 "item[,...]", "enable logging of specified items "
3390 "(use '-d help' for a list of items)"},
3391 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename
,
3392 "logfile", "write logs to 'logfile' (default stderr)"},
3393 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize
,
3394 "pagesize", "set the host page size to 'pagesize'"},
3395 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep
,
3396 "", "run in singlestep mode"},
3397 {"strace", "QEMU_STRACE", false, handle_arg_strace
,
3398 "", "log system calls"},
3399 {"version", "QEMU_VERSION", false, handle_arg_version
,
3400 "", "display version information and exit"},
3401 {NULL
, NULL
, false, NULL
, NULL
, NULL
}
3404 static void usage(void)
3406 const struct qemu_argument
*arginfo
;
3410 printf("usage: qemu-" TARGET_NAME
" [options] program [arguments...]\n"
3411 "Linux CPU emulator (compiled for " TARGET_NAME
" emulation)\n"
3413 "Options and associated environment variables:\n"
3416 /* Calculate column widths. We must always have at least enough space
3417 * for the column header.
3419 maxarglen
= strlen("Argument");
3420 maxenvlen
= strlen("Env-variable");
3422 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3423 int arglen
= strlen(arginfo
->argv
);
3424 if (arginfo
->has_arg
) {
3425 arglen
+= strlen(arginfo
->example
) + 1;
3427 if (strlen(arginfo
->env
) > maxenvlen
) {
3428 maxenvlen
= strlen(arginfo
->env
);
3430 if (arglen
> maxarglen
) {
3435 printf("%-*s %-*s Description\n", maxarglen
+1, "Argument",
3436 maxenvlen
, "Env-variable");
3438 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3439 if (arginfo
->has_arg
) {
3440 printf("-%s %-*s %-*s %s\n", arginfo
->argv
,
3441 (int)(maxarglen
- strlen(arginfo
->argv
) - 1),
3442 arginfo
->example
, maxenvlen
, arginfo
->env
, arginfo
->help
);
3444 printf("-%-*s %-*s %s\n", maxarglen
, arginfo
->argv
,
3445 maxenvlen
, arginfo
->env
,
3452 "QEMU_LD_PREFIX = %s\n"
3453 "QEMU_STACK_SIZE = %ld byte\n",
3458 "You can use -E and -U options or the QEMU_SET_ENV and\n"
3459 "QEMU_UNSET_ENV environment variables to set and unset\n"
3460 "environment variables for the target process.\n"
3461 "It is possible to provide several variables by separating them\n"
3462 "by commas in getsubopt(3) style. Additionally it is possible to\n"
3463 "provide the -E and -U options multiple times.\n"
3464 "The following lines are equivalent:\n"
3465 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
3466 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
3467 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
3468 "Note that if you provide several changes to a single variable\n"
3469 "the last change will stay in effect.\n");
3474 static int parse_args(int argc
, char **argv
)
3478 const struct qemu_argument
*arginfo
;
3480 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3481 if (arginfo
->env
== NULL
) {
3485 r
= getenv(arginfo
->env
);
3487 arginfo
->handle_opt(r
);
3493 if (optind
>= argc
) {
3502 if (!strcmp(r
, "-")) {
3506 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3507 if (!strcmp(r
, arginfo
->argv
)) {
3508 if (arginfo
->has_arg
) {
3509 if (optind
>= argc
) {
3512 arginfo
->handle_opt(argv
[optind
]);
3515 arginfo
->handle_opt(NULL
);
3521 /* no option matched the current argv */
3522 if (arginfo
->handle_opt
== NULL
) {
3527 if (optind
>= argc
) {
3531 filename
= argv
[optind
];
3532 exec_path
= argv
[optind
];
3537 int main(int argc
, char **argv
, char **envp
)
3539 struct target_pt_regs regs1
, *regs
= ®s1
;
3540 struct image_info info1
, *info
= &info1
;
3541 struct linux_binprm bprm
;
3545 char **target_environ
, **wrk
;
3551 module_call_init(MODULE_INIT_QOM
);
3553 qemu_cache_utils_init(envp
);
3555 if ((envlist
= envlist_create()) == NULL
) {
3556 (void) fprintf(stderr
, "Unable to allocate envlist\n");
3560 /* add current environment into the list */
3561 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
3562 (void) envlist_setenv(envlist
, *wrk
);
3565 /* Read the stack limit from the kernel. If it's "unlimited",
3566 then we can do little else besides use the default. */
3569 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
3570 && lim
.rlim_cur
!= RLIM_INFINITY
3571 && lim
.rlim_cur
== (target_long
)lim
.rlim_cur
) {
3572 guest_stack_size
= lim
.rlim_cur
;
3577 #if defined(cpudef_setup)
3578 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
3581 optind
= parse_args(argc
, argv
);
3584 memset(regs
, 0, sizeof(struct target_pt_regs
));
3586 /* Zero out image_info */
3587 memset(info
, 0, sizeof(struct image_info
));
3589 memset(&bprm
, 0, sizeof (bprm
));
3591 /* Scan interp_prefix dir for replacement files. */
3592 init_paths(interp_prefix
);
3594 if (cpu_model
== NULL
) {
3595 #if defined(TARGET_I386)
3596 #ifdef TARGET_X86_64
3597 cpu_model
= "qemu64";
3599 cpu_model
= "qemu32";
3601 #elif defined(TARGET_ARM)
3603 #elif defined(TARGET_UNICORE32)
3605 #elif defined(TARGET_M68K)
3607 #elif defined(TARGET_SPARC)
3608 #ifdef TARGET_SPARC64
3609 cpu_model
= "TI UltraSparc II";
3611 cpu_model
= "Fujitsu MB86904";
3613 #elif defined(TARGET_MIPS)
3614 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3619 #elif defined TARGET_OPENRISC
3620 cpu_model
= "or1200";
3621 #elif defined(TARGET_PPC)
3623 cpu_model
= "970fx";
3632 cpu_exec_init_all();
3633 /* NOTE: we need to init the CPU at this stage to get
3634 qemu_host_page_size */
3635 env
= cpu_init(cpu_model
);
3637 fprintf(stderr
, "Unable to find CPU definition\n");
3640 #if defined(TARGET_SPARC) || defined(TARGET_PPC)
3641 cpu_reset(ENV_GET_CPU(env
));
3644 thread_cpu
= ENV_GET_CPU(env
);
3646 if (getenv("QEMU_STRACE")) {
3650 target_environ
= envlist_to_environ(envlist
, NULL
);
3651 envlist_free(envlist
);
3653 #if defined(CONFIG_USE_GUEST_BASE)
3655 * Now that page sizes are configured in cpu_init() we can do
3656 * proper page alignment for guest_base.
3658 guest_base
= HOST_PAGE_ALIGN(guest_base
);
3660 if (reserved_va
|| have_guest_base
) {
3661 guest_base
= init_guest_space(guest_base
, reserved_va
, 0,
3663 if (guest_base
== (unsigned long)-1) {
3664 fprintf(stderr
, "Unable to reserve 0x%lx bytes of virtual address "
3665 "space for use as guest address space (check your virtual "
3666 "memory ulimit setting or reserve less using -R option)\n",
3672 mmap_next_start
= reserved_va
;
3675 #endif /* CONFIG_USE_GUEST_BASE */
3678 * Read in mmap_min_addr kernel parameter. This value is used
3679 * When loading the ELF image to determine whether guest_base
3680 * is needed. It is also used in mmap_find_vma.
3685 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
3687 if (fscanf(fp
, "%lu", &tmp
) == 1) {
3688 mmap_min_addr
= tmp
;
3689 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr
);
3696 * Prepare copy of argv vector for target.
3698 target_argc
= argc
- optind
;
3699 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
3700 if (target_argv
== NULL
) {
3701 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
3706 * If argv0 is specified (using '-0' switch) we replace
3707 * argv[0] pointer with the given one.
3710 if (argv0
!= NULL
) {
3711 target_argv
[i
++] = strdup(argv0
);
3713 for (; i
< target_argc
; i
++) {
3714 target_argv
[i
] = strdup(argv
[optind
+ i
]);
3716 target_argv
[target_argc
] = NULL
;
3718 ts
= g_malloc0 (sizeof(TaskState
));
3719 init_task_state(ts
);
3720 /* build Task State */
3726 ret
= loader_exec(filename
, target_argv
, target_environ
, regs
,
3729 printf("Error while loading %s: %s\n", filename
, strerror(-ret
));
3733 for (wrk
= target_environ
; *wrk
; wrk
++) {
3737 free(target_environ
);
3739 if (qemu_log_enabled()) {
3740 #if defined(CONFIG_USE_GUEST_BASE)
3741 qemu_log("guest_base 0x%lx\n", guest_base
);
3745 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
3746 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
3747 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n",
3749 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n",
3751 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
3752 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n",
3754 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
3755 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
3758 target_set_brk(info
->brk
);
3762 #if defined(CONFIG_USE_GUEST_BASE)
3763 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3764 generating the prologue until now so that the prologue can take
3765 the real value of GUEST_BASE into account. */
3766 tcg_prologue_init(&tcg_ctx
);
3769 #if defined(TARGET_I386)
3770 cpu_x86_set_cpl(env
, 3);
3772 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
3773 env
->hflags
|= HF_PE_MASK
;
3774 if (env
->features
[FEAT_1_EDX
] & CPUID_SSE
) {
3775 env
->cr
[4] |= CR4_OSFXSR_MASK
;
3776 env
->hflags
|= HF_OSFXSR_MASK
;
3778 #ifndef TARGET_ABI32
3779 /* enable 64 bit mode if possible */
3780 if (!(env
->features
[FEAT_8000_0001_EDX
] & CPUID_EXT2_LM
)) {
3781 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
3784 env
->cr
[4] |= CR4_PAE_MASK
;
3785 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
3786 env
->hflags
|= HF_LMA_MASK
;
3789 /* flags setup : we activate the IRQs by default as in user mode */
3790 env
->eflags
|= IF_MASK
;
3792 /* linux register setup */
3793 #ifndef TARGET_ABI32
3794 env
->regs
[R_EAX
] = regs
->rax
;
3795 env
->regs
[R_EBX
] = regs
->rbx
;
3796 env
->regs
[R_ECX
] = regs
->rcx
;
3797 env
->regs
[R_EDX
] = regs
->rdx
;
3798 env
->regs
[R_ESI
] = regs
->rsi
;
3799 env
->regs
[R_EDI
] = regs
->rdi
;
3800 env
->regs
[R_EBP
] = regs
->rbp
;
3801 env
->regs
[R_ESP
] = regs
->rsp
;
3802 env
->eip
= regs
->rip
;
3804 env
->regs
[R_EAX
] = regs
->eax
;
3805 env
->regs
[R_EBX
] = regs
->ebx
;
3806 env
->regs
[R_ECX
] = regs
->ecx
;
3807 env
->regs
[R_EDX
] = regs
->edx
;
3808 env
->regs
[R_ESI
] = regs
->esi
;
3809 env
->regs
[R_EDI
] = regs
->edi
;
3810 env
->regs
[R_EBP
] = regs
->ebp
;
3811 env
->regs
[R_ESP
] = regs
->esp
;
3812 env
->eip
= regs
->eip
;
3815 /* linux interrupt setup */
3816 #ifndef TARGET_ABI32
3817 env
->idt
.limit
= 511;
3819 env
->idt
.limit
= 255;
3821 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
3822 PROT_READ
|PROT_WRITE
,
3823 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3824 idt_table
= g2h(env
->idt
.base
);
3847 /* linux segment setup */
3849 uint64_t *gdt_table
;
3850 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
3851 PROT_READ
|PROT_WRITE
,
3852 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3853 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
3854 gdt_table
= g2h(env
->gdt
.base
);
3856 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3857 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3858 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3860 /* 64 bit code segment */
3861 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3862 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3864 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3866 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
3867 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3868 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
3870 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
3871 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
3873 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
3874 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
3875 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
3876 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
3877 /* This hack makes Wine work... */
3878 env
->segs
[R_FS
].selector
= 0;
3880 cpu_x86_load_seg(env
, R_DS
, 0);
3881 cpu_x86_load_seg(env
, R_ES
, 0);
3882 cpu_x86_load_seg(env
, R_FS
, 0);
3883 cpu_x86_load_seg(env
, R_GS
, 0);
3885 #elif defined(TARGET_ARM)
3888 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
3889 for(i
= 0; i
< 16; i
++) {
3890 env
->regs
[i
] = regs
->uregs
[i
];
3893 if (EF_ARM_EABI_VERSION(info
->elf_flags
) >= EF_ARM_EABI_VER4
3894 && (info
->elf_flags
& EF_ARM_BE8
)) {
3895 env
->bswap_code
= 1;
3898 #elif defined(TARGET_UNICORE32)
3901 cpu_asr_write(env
, regs
->uregs
[32], 0xffffffff);
3902 for (i
= 0; i
< 32; i
++) {
3903 env
->regs
[i
] = regs
->uregs
[i
];
3906 #elif defined(TARGET_SPARC)
3910 env
->npc
= regs
->npc
;
3912 for(i
= 0; i
< 8; i
++)
3913 env
->gregs
[i
] = regs
->u_regs
[i
];
3914 for(i
= 0; i
< 8; i
++)
3915 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
3917 #elif defined(TARGET_PPC)
3921 #if defined(TARGET_PPC64)
3922 #if defined(TARGET_ABI32)
3923 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
3925 env
->msr
|= (target_ulong
)1 << MSR_SF
;
3928 env
->nip
= regs
->nip
;
3929 for(i
= 0; i
< 32; i
++) {
3930 env
->gpr
[i
] = regs
->gpr
[i
];
3933 #elif defined(TARGET_M68K)
3936 env
->dregs
[0] = regs
->d0
;
3937 env
->dregs
[1] = regs
->d1
;
3938 env
->dregs
[2] = regs
->d2
;
3939 env
->dregs
[3] = regs
->d3
;
3940 env
->dregs
[4] = regs
->d4
;
3941 env
->dregs
[5] = regs
->d5
;
3942 env
->dregs
[6] = regs
->d6
;
3943 env
->dregs
[7] = regs
->d7
;
3944 env
->aregs
[0] = regs
->a0
;
3945 env
->aregs
[1] = regs
->a1
;
3946 env
->aregs
[2] = regs
->a2
;
3947 env
->aregs
[3] = regs
->a3
;
3948 env
->aregs
[4] = regs
->a4
;
3949 env
->aregs
[5] = regs
->a5
;
3950 env
->aregs
[6] = regs
->a6
;
3951 env
->aregs
[7] = regs
->usp
;
3953 ts
->sim_syscalls
= 1;
3955 #elif defined(TARGET_MICROBLAZE)
3957 env
->regs
[0] = regs
->r0
;
3958 env
->regs
[1] = regs
->r1
;
3959 env
->regs
[2] = regs
->r2
;
3960 env
->regs
[3] = regs
->r3
;
3961 env
->regs
[4] = regs
->r4
;
3962 env
->regs
[5] = regs
->r5
;
3963 env
->regs
[6] = regs
->r6
;
3964 env
->regs
[7] = regs
->r7
;
3965 env
->regs
[8] = regs
->r8
;
3966 env
->regs
[9] = regs
->r9
;
3967 env
->regs
[10] = regs
->r10
;
3968 env
->regs
[11] = regs
->r11
;
3969 env
->regs
[12] = regs
->r12
;
3970 env
->regs
[13] = regs
->r13
;
3971 env
->regs
[14] = regs
->r14
;
3972 env
->regs
[15] = regs
->r15
;
3973 env
->regs
[16] = regs
->r16
;
3974 env
->regs
[17] = regs
->r17
;
3975 env
->regs
[18] = regs
->r18
;
3976 env
->regs
[19] = regs
->r19
;
3977 env
->regs
[20] = regs
->r20
;
3978 env
->regs
[21] = regs
->r21
;
3979 env
->regs
[22] = regs
->r22
;
3980 env
->regs
[23] = regs
->r23
;
3981 env
->regs
[24] = regs
->r24
;
3982 env
->regs
[25] = regs
->r25
;
3983 env
->regs
[26] = regs
->r26
;
3984 env
->regs
[27] = regs
->r27
;
3985 env
->regs
[28] = regs
->r28
;
3986 env
->regs
[29] = regs
->r29
;
3987 env
->regs
[30] = regs
->r30
;
3988 env
->regs
[31] = regs
->r31
;
3989 env
->sregs
[SR_PC
] = regs
->pc
;
3991 #elif defined(TARGET_MIPS)
3995 for(i
= 0; i
< 32; i
++) {
3996 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
3998 env
->active_tc
.PC
= regs
->cp0_epc
& ~(target_ulong
)1;
3999 if (regs
->cp0_epc
& 1) {
4000 env
->hflags
|= MIPS_HFLAG_M16
;
4003 #elif defined(TARGET_OPENRISC)
4007 for (i
= 0; i
< 32; i
++) {
4008 env
->gpr
[i
] = regs
->gpr
[i
];
4014 #elif defined(TARGET_SH4)
4018 for(i
= 0; i
< 16; i
++) {
4019 env
->gregs
[i
] = regs
->regs
[i
];
4023 #elif defined(TARGET_ALPHA)
4027 for(i
= 0; i
< 28; i
++) {
4028 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
4030 env
->ir
[IR_SP
] = regs
->usp
;
4033 #elif defined(TARGET_CRIS)
4035 env
->regs
[0] = regs
->r0
;
4036 env
->regs
[1] = regs
->r1
;
4037 env
->regs
[2] = regs
->r2
;
4038 env
->regs
[3] = regs
->r3
;
4039 env
->regs
[4] = regs
->r4
;
4040 env
->regs
[5] = regs
->r5
;
4041 env
->regs
[6] = regs
->r6
;
4042 env
->regs
[7] = regs
->r7
;
4043 env
->regs
[8] = regs
->r8
;
4044 env
->regs
[9] = regs
->r9
;
4045 env
->regs
[10] = regs
->r10
;
4046 env
->regs
[11] = regs
->r11
;
4047 env
->regs
[12] = regs
->r12
;
4048 env
->regs
[13] = regs
->r13
;
4049 env
->regs
[14] = info
->start_stack
;
4050 env
->regs
[15] = regs
->acr
;
4051 env
->pc
= regs
->erp
;
4053 #elif defined(TARGET_S390X)
4056 for (i
= 0; i
< 16; i
++) {
4057 env
->regs
[i
] = regs
->gprs
[i
];
4059 env
->psw
.mask
= regs
->psw
.mask
;
4060 env
->psw
.addr
= regs
->psw
.addr
;
4063 #error unsupported target CPU
4066 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
4067 ts
->stack_base
= info
->start_stack
;
4068 ts
->heap_base
= info
->brk
;
4069 /* This will be filled in on the first SYS_HEAPINFO call. */
4074 if (gdbserver_start(gdbstub_port
) < 0) {
4075 fprintf(stderr
, "qemu: could not open gdbserver on port %d\n",
4079 gdb_handlesig(env
, 0);